Re: [igt-dev] [Intel-gfx] [RFT i-g-t] tests/prime_vgem/basic-fence-flip: Probe display resolution

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

+Maarten - could you please have a quick look at this patch to see if it 
makes sense to you? (https://patchwork.freedesktop.org/series/59284/ - 
if you don't have the mailing list history.)

Thanks,

Tvrtko

On 10/04/2019 13:11, Tvrtko Ursulin wrote:
> 
> On 10/04/2019 12:48, Chris Wilson wrote:
>> Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
>>> @@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem, 
>>> unsigned hang)
>>>                  uint32_t offsets[4] = {};
>>>                  int fd;
>>> -               bo[i].width = 1024;
>>> -               bo[i].height = 768;
>>> +               bo[i].width = mode->hdisplay;
>>> +               bo[i].height = mode->vdisplay;
>>>                  bo[i].bpp = 32;
>>>                  vgem_create(vgem, &bo[i]);
>>
>> That may not result in a buffer that we are able to flip to. :|
>> width = ALIGN(hdisplay, 16); vdisplay should be ok.
> 
> Oh.. well I don't know. Maarten helpfully described in the BZ that the 
> skip is due BO being too small for the FB. Aligning width would then 
> make it too large. Is that OK? Who assigned this display related IGT bug 
> to me anyway? :))
> 
>> I would query what happened to the scalers though :)
> 
> Are they supposed to automagicaly apply any fb to any output? Or an 
> explicit step is required? Regardless - it may be better to involve less 
> of the driver and hardware stack in a simple test.
> 
> Regards,
> 
> Tvrtko
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