Re: [PATCH i-g-t 1/1] lib/gpu_cmds: Fix hardcoded buffer size

["Grzegorzek, Dominik" <dominik.grzegorzek@intel.com>]

On Mon, 2024-06-24 at 13:39 +0200, Dominik Karol Piatkowski wrote:
> This patch enables buffers larger than one page to be successfully
> submitted, allowing for large shader execution.
> Based on the find by Dominik Grzegorzek.
> 
> Signed-off-by: Dominik Karol Piątkowski <dominik.karol.piatkowski@intel.com>
> ---
>  lib/gpu_cmds.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
> index 378fa9166..4f2781e7c 100644
> --- a/lib/gpu_cmds.c
> +++ b/lib/gpu_cmds.c
> @@ -566,13 +566,13 @@ gen8_emit_state_base_address(struct intel_bb *ibb)
>  	/* general state buffer size */
>  	intel_bb_out(ibb, 0xfffff000 | 1);
>  	/* dynamic state buffer size */
> -	intel_bb_out(ibb, 1 << 12 | 1);
> +	intel_bb_out(ibb, ibb->size | 1);
The size is in 4K pages. ibb should be already aligned, but anyway I would make it:
	intel_bb_out(ibb, ALIGN(ibb->size, 1 << 12) | 1);

With that, you can add mine:

Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>

Please also review the premerge results, whether failures are not caused by this patch. 

Thanks, 
Dominik
>  	/* indirect object buffer size */
>  	intel_bb_out(ibb, 0xfffff000 | 1);
>  	/* instruction buffer size, must set modify enable bit, otherwise it may
>  	 * result in GPU hang
>  	 */
> -	intel_bb_out(ibb, 1 << 12 | 1);
> +	intel_bb_out(ibb, ibb->size | 1);
>  }
>  
>  void
> @@ -610,13 +610,13 @@ gen9_emit_state_base_address(struct intel_bb *ibb)
>  	/* general state buffer size */
>  	intel_bb_out(ibb, 0xfffff000 | 1);
>  	/* dynamic state buffer size */
> -	intel_bb_out(ibb, 1 << 12 | 1);
> +	intel_bb_out(ibb, ibb->size | 1);
>  	/* indirect object buffer size */
>  	intel_bb_out(ibb, 0xfffff000 | 1);
>  	/* intruction buffer size, must set modify enable bit, otherwise it may
>  	 * result in GPU hang
>  	 */
> -	intel_bb_out(ibb, 1 << 12 | 1);
> +	intel_bb_out(ibb, ibb->size | 1);
>  
>  	/* Bindless surface state base address */
>  	intel_bb_out(ibb, 0 | BASE_ADDRESS_MODIFY);
> @@ -1026,14 +1026,14 @@ xehp_emit_state_base_address(struct intel_bb *ibb)
>  	/* general state buffer size */
>  	intel_bb_out(ibb, 0xfffff000 | 1);                          //dw12
>  	/* dynamic state buffer size */
> -	intel_bb_out(ibb, 1 << 12 | 1);                             //dw13
> +	intel_bb_out(ibb, ibb->size | 1);                           //dw13
>  	/* indirect object buffer size */
>  	if (intel_graphics_ver(ibb->devid) >= IP_VER(20, 0))	    //dw14
>  		intel_bb_out(ibb, 0);
>  	else
>  		intel_bb_out(ibb, 0xfffff000 | 1);
>  	/* intruction buffer size */
> -	intel_bb_out(ibb, 1 << 12 | 1);                             //dw15
> +	intel_bb_out(ibb, ibb->size | 1);                           //dw15
>  
>  	/* Bindless surface state base address */
>  	intel_bb_out(ibb, 0 | BASE_ADDRESS_MODIFY);                 //dw16