[igt-dev] [PATCH i-g-t] igt/gem_tiled_blits: Show more errors

[igt-dev] [PATCH i-g-t] igt/gem_tiled_blits: Show more errors

[Chris Wilson]

glk is failing gem_tiled_blits which is very odd as it doesn't use
fencing and so the tiling is all internal to the GPU. From the small
number of examples seen so far, it looks like just a single bit is being
flipped. Let's dump some values to see if it there is a larger pattern
here.

Furthermore since gem_linear_blits is also showing bitflips on glk, we
can rule out the impact of tiling altogether! It just becomes a question
of which piece of hw is broken...

References: https://bugs.freedesktop.org/show_bug.cgi?id=106608
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_linear_blits.c | 11 +++++++----
 tests/gem_tiled_blits.c  | 14 ++++++++------
 2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/tests/gem_linear_blits.c b/tests/gem_linear_blits.c
index 7d05fa865..8a8d2a6cc 100644
--- a/tests/gem_linear_blits.c
+++ b/tests/gem_linear_blits.c
@@ -141,16 +141,19 @@ create_bo(int fd, uint32_t val)
 static void
 check_bo(int fd, uint32_t handle, uint32_t val)
 {
+	int num_errors;
 	int i;
 
 	gem_read(fd, handle, 0, linear, sizeof(linear));
+
+	num_errors = 0;
 	for (i = 0; i < WIDTH*HEIGHT; i++) {
-		igt_assert_f(linear[i] == val,
-			     "Expected 0x%08x, found 0x%08x "
-			     "at offset 0x%08x\n",
-			     val, linear[i], i * 4);
+		if (linear[i] != val && num_errors++ < 32)
+			igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n",
+				 i * 4, val, linear[i], val ^ linear[i]);
 		val++;
 	}
+	igt_assert_eq(num_errors, 0);
 }
 
 static void run_test(int fd, int count)
diff --git a/tests/gem_tiled_blits.c b/tests/gem_tiled_blits.c
index 0d472e3a1..26cd900b7 100644
--- a/tests/gem_tiled_blits.c
+++ b/tests/gem_tiled_blits.c
@@ -90,10 +90,11 @@ create_bo(uint32_t start_val)
 }
 
 static void
-check_bo(drm_intel_bo *bo, uint32_t start_val)
+check_bo(drm_intel_bo *bo, uint32_t val)
 {
 	drm_intel_bo *linear_bo;
 	uint32_t *linear;
+	int num_errors;
 	int i;
 
 	linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
@@ -103,13 +104,14 @@ check_bo(drm_intel_bo *bo, uint32_t start_val)
 	do_or_die(drm_intel_bo_map(linear_bo, 0));
 	linear = linear_bo->virtual;
 
+	num_errors = 0;
 	for (i = 0; i < 1024 * 1024 / 4; i++) {
-		igt_assert_f(linear[i] == start_val,
-			     "Expected 0x%08x, found 0x%08x "
-			     "at offset 0x%08x\n",
-			     start_val, linear[i], i * 4);
-		start_val++;
+		if (linear[i] != val && num_errors++ < 32)
+			igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n",
+				 i * 4, val, linear[i], val ^ linear[i]);
+		val++;
 	}
+	igt_assert_eq(num_errors, 0);
 	drm_intel_bo_unmap(linear_bo);
 
 	drm_intel_bo_unreference(linear_bo);
-- 
2.17.1

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[igt-dev] ✗ Fi.CI.BAT: failure for igt/gem_tiled_blits: Show more errors

[Patchwork]

== Series Details ==

Series: igt/gem_tiled_blits: Show more errors
URL   : https://patchwork.freedesktop.org/series/44038/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4265 -> IGTPW_1411 =

== Summary - FAILURE ==

  Serious unknown changes coming with IGTPW_1411 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1411, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44038/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1411:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
      fi-glk-j4005:       PASS -> FAIL

    
    ==== Warnings ====

    igt@kms_pipe_crc_basic@read-crc-pipe-c:
      fi-glk-j4005:       PASS -> SKIP

    
== Known issues ==

  Here are the changes found in IGTPW_1411 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-cfl-s3:          PASS -> FAIL (fdo#100368, fdo#103928)

    igt@kms_flip@basic-plain-flip:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106000) +1

    
    ==== Possible fixes ====

    igt@gem_mmap_gtt@basic-read-write-distinct:
      fi-glk-j4005:       DMESG-WARN (fdo#106745, fdo#106000) -> PASS

    igt@kms_flip@basic-flip-vs-modeset:
      fi-glk-j4005:       DMESG-WARN (fdo#106000) -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106745 https://bugs.freedesktop.org/show_bug.cgi?id=106745


== Participating hosts (43 -> 40) ==

  Missing    (3): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq 


== Build changes ==

    * IGT: IGT_4502 -> IGTPW_1411

  CI_DRM_4265: 1bef5a8b1f02a5a612ac38bc6d7950becc2a9aa8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1411: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1411/
  IGT_4502: 63f0bf3d50b70f011b9d600a1a4bc1a1c7720654 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1411/issues.html
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Re: [Intel-gfx] [PATCH i-g-t] igt/gem_tiled_blits: Show more errors

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> glk is failing gem_tiled_blits which is very odd as it doesn't use
> fencing and so the tiling is all internal to the GPU. From the small
> number of examples seen so far, it looks like just a single bit is being
> flipped. Let's dump some values to see if it there is a larger pattern
> here.
>
> Furthermore since gem_linear_blits is also showing bitflips on glk, we
> can rule out the impact of tiling altogether! It just becomes a question
> of which piece of hw is broken...
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=106608

One bit flipping, weird. And I guess we only have one glk so can't
crosscheck.

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

This will give more data out to see if there is a pattern,
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  tests/gem_linear_blits.c | 11 +++++++----
>  tests/gem_tiled_blits.c  | 14 ++++++++------
>  2 files changed, 15 insertions(+), 10 deletions(-)
>
> diff --git a/tests/gem_linear_blits.c b/tests/gem_linear_blits.c
> index 7d05fa865..8a8d2a6cc 100644
> --- a/tests/gem_linear_blits.c
> +++ b/tests/gem_linear_blits.c
> @@ -141,16 +141,19 @@ create_bo(int fd, uint32_t val)
>  static void
>  check_bo(int fd, uint32_t handle, uint32_t val)
>  {
> +	int num_errors;
>  	int i;
>  
>  	gem_read(fd, handle, 0, linear, sizeof(linear));
> +
> +	num_errors = 0;
>  	for (i = 0; i < WIDTH*HEIGHT; i++) {
> -		igt_assert_f(linear[i] == val,
> -			     "Expected 0x%08x, found 0x%08x "
> -			     "at offset 0x%08x\n",
> -			     val, linear[i], i * 4);
> +		if (linear[i] != val && num_errors++ < 32)
> +			igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n",
> +				 i * 4, val, linear[i], val ^ linear[i]);
>  		val++;
>  	}
> +	igt_assert_eq(num_errors, 0);
>  }
>  
>  static void run_test(int fd, int count)
> diff --git a/tests/gem_tiled_blits.c b/tests/gem_tiled_blits.c
> index 0d472e3a1..26cd900b7 100644
> --- a/tests/gem_tiled_blits.c
> +++ b/tests/gem_tiled_blits.c
> @@ -90,10 +90,11 @@ create_bo(uint32_t start_val)
>  }
>  
>  static void
> -check_bo(drm_intel_bo *bo, uint32_t start_val)
> +check_bo(drm_intel_bo *bo, uint32_t val)
>  {
>  	drm_intel_bo *linear_bo;
>  	uint32_t *linear;
> +	int num_errors;
>  	int i;
>  
>  	linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
> @@ -103,13 +104,14 @@ check_bo(drm_intel_bo *bo, uint32_t start_val)
>  	do_or_die(drm_intel_bo_map(linear_bo, 0));
>  	linear = linear_bo->virtual;
>  
> +	num_errors = 0;
>  	for (i = 0; i < 1024 * 1024 / 4; i++) {
> -		igt_assert_f(linear[i] == start_val,
> -			     "Expected 0x%08x, found 0x%08x "
> -			     "at offset 0x%08x\n",
> -			     start_val, linear[i], i * 4);
> -		start_val++;
> +		if (linear[i] != val && num_errors++ < 32)
> +			igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n",
> +				 i * 4, val, linear[i], val ^ linear[i]);
> +		val++;
>  	}
> +	igt_assert_eq(num_errors, 0);
>  	drm_intel_bo_unmap(linear_bo);
>  
>  	drm_intel_bo_unreference(linear_bo);
> -- 
> 2.17.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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