[PATCH i-g-t 0/2] Add PMU test for GT frequency

[PATCH i-g-t 0/2] Add PMU test for GT frequency

[Vinay Belgaumkar]

This will validate PMU frequency attributes that have been added
to the driver.

Cc: Riana Tauro <riana.tauro@intel.com>>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Vinay Belgaumkar (2):
  lib/xe_gt: Move get/set GT freq utils to lib
  tests/xe_pmu: Add frequency test

 lib/xe/xe_gt.c           |  59 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
 tests/intel/xe_pmu.c     | 128 +++++++++++++++++++++++++++++-
 4 files changed, 252 insertions(+), 101 deletions(-)

-- 
2.38.1

[PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Vinay Belgaumkar]

Add utils to get/set GT frequency attributes. These ar per GT
and exposed via sysfs already.

Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/xe/xe_gt.c           |  59 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
 3 files changed, 125 insertions(+), 100 deletions(-)

diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
index 6f1475be0..bd6d1800b 100644
--- a/lib/xe/xe_gt.c
+++ b/lib/xe/xe_gt.c
@@ -4,6 +4,7 @@
  */
 
 #include <fcntl.h>
+#include <limits.h>
 #include <sys/stat.h>
 
 #include "igt_core.h"
@@ -241,3 +242,61 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
 
 	return n;
 }
+
+/**
+ * xe_gt_set_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max) to change
+ * @freq: value of freq to set
+ *
+ * Set GT min/max frequency
+ *
+ * Return: success or failure
+ */
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
+{
+	int ret = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (ret == -EAGAIN)
+		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
+
+	close(gt_fd);
+	return ret;
+}
+
+/**
+ * xe_gt_get_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max, act, cur) to read
+ *
+ * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies
+ *
+ * Return: GT frequency value
+ */
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
+{
+	uint32_t freq;
+	int err = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (err == -EAGAIN)
+		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
+
+	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
+
+	close(gt_fd);
+	return freq;
+}
diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
index 511b31149..06a59281c 100644
--- a/lib/xe/xe_gt.h
+++ b/lib/xe/xe_gt.h
@@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
 				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
 int xe_gt_count_engines_by_class(int fd, int gt, int class);
 
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
 #endif
diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
index 843144ad2..4adb205c9 100644
--- a/tests/intel/xe_gt_freq.c
+++ b/tests/intel/xe_gt_freq.c
@@ -14,6 +14,7 @@
 
 #include "igt.h"
 #include "lib/igt_syncobj.h"
+#include "lib/xe/xe_gt.h"
 #include "igt_sysfs.h"
 
 #include "xe_drm.h"
@@ -36,43 +37,6 @@
  */
 #define SLPC_FREQ_LATENCY_US 100000
 
-static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
-{
-	int ret = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (ret == -EAGAIN)
-		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
-
-	close(gt_fd);
-	return ret;
-}
-
-static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
-{
-	uint32_t freq;
-	int err = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (err == -EAGAIN)
-		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
-
-	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
-
-	close(gt_fd);
-	return freq;
-}
-
 static bool within_expected_range(uint32_t freq, uint32_t val)
 {
 	/*
@@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
 
 static void test_freq_basic_api(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t min_freq, max_freq;
 
@@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
 	 * RPn is the floor
 	 * RP0 is the ceiling
 	 */
-	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
 
 	/* Assert min requests are respected from rp0 to rpn */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	min_freq = get_freq(fd, gt_id, "min");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	min_freq = xe_gt_get_freq(fd, gt_id, "min");
 	/* SLPC can set min higher than rpmid - as it follows RPe */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
 
 	/* Assert max requests are respected from rpn to rp0 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
-	max_freq = get_freq(fd, gt_id, "max");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
+	max_freq = xe_gt_get_freq(fd, gt_id, "max");
 	igt_assert(within_expected_range(max_freq, rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
 }
 
 /**
@@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
 
 static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur_freq, act_freq;
 
@@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 	 * And let's do this for all the 2 known Render Performance (RP) values
 	 * RP0 and RPn and something in between.
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	if (gt_idle) {
-		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
+		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
+		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur_freq = get_freq(fd, gt_id, "cur");
+	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
 	/* If rpmid is around RPe, we could see SLPC follow it */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act_freq = get_freq(fd, gt_id, "act");
+		act_freq = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
 	usleep(SLPC_FREQ_LATENCY_US);
 	/*
 	 * It is unlikely that PCODE will *always* respect any request above RPe
 	 * So for this level let's only check if GuC PC is doing its job
 	 * and respecting our request, by propagating it to the hardware.
 	 */
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	}
 
 	igt_debug("Finished testing fixed request\n");
@@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
  */
 static void test_freq_range(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur, act;
 
 	igt_debug("Starting testing range request\n");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur = get_freq(fd, gt_id, "cur");
+	cur = xe_gt_get_freq(fd, gt_id, "cur");
 	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act = get_freq(fd, gt_id, "act");
+		act = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
 	}
 
@@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
 
 static void test_freq_low_max(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 
 	/*
 	 *  When max request < min request, max is ignored and min works like
 	 * a fixed one. Let's assert this assumption
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
 
 	/* Cur freq will follow RPe, which could be higher than min freq */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
-			   get_freq(fd, gt_id, "cur"));
+			   xe_gt_get_freq(fd, gt_id, "cur"));
 }
 
 /**
@@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
 
 static void test_suspend(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
 				      SUSPEND_TEST_NONE);
 
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
 }
 
 /**
@@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
 
 static void test_reset(int fd, int gt_id, int cycles)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
 	for (int i = 0; i < cycles; i++) {
-		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
 		usleep(SLPC_FREQ_LATENCY_US);
-		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
 			     "Failed after %d good cycles\n", i);
 
 		xe_force_gt_reset_sync(fd, gt_id);
 
 		usleep(SLPC_FREQ_LATENCY_US);
 
-		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
 			     "Failed after %d good cycles\n", i);
 	}
 }
@@ -448,8 +412,8 @@ igt_main
 		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
 
 		xe_for_each_gt(fd, gt) {
-			stash_min[gt] = get_freq(fd, gt, "min");
-			stash_max[gt] = get_freq(fd, gt, "max");
+			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
+			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
 		}
 	}
 
@@ -525,8 +489,8 @@ igt_main
 
 	igt_fixture {
 		xe_for_each_gt(fd, gt) {
-			set_freq(fd, gt, "max", stash_max[gt]);
-			set_freq(fd, gt, "min", stash_min[gt]);
+			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
+			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
 		}
 		free(stash_min);
 		free(stash_max);
-- 
2.38.1

Re: [PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Kamil Konieczny]

Hi Vinay,
On 2025-04-07 at 16:44:05 -0700, Vinay Belgaumkar wrote:
> Add utils to get/set GT frequency attributes. These ar per GT

s/ar/are/

> and exposed via sysfs already.
> 
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>  lib/xe/xe_gt.c           |  59 ++++++++++++++
>  lib/xe/xe_gt.h           |   2 +
>  tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
>  3 files changed, 125 insertions(+), 100 deletions(-)
> 
> diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
> index 6f1475be0..bd6d1800b 100644
> --- a/lib/xe/xe_gt.c
> +++ b/lib/xe/xe_gt.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <fcntl.h>
> +#include <limits.h>
>  #include <sys/stat.h>
>  
>  #include "igt_core.h"
> @@ -241,3 +242,61 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
>  
>  	return n;
>  }
> +
> +/**
> + * xe_gt_set_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max) to change
> + * @freq: value of freq to set
> + *
> + * Set GT min/max frequency

Add a note about an assert in case of unsuccesfull open.

> + *
> + * Return: success or failure
> + */
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> +{
> +	int ret = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (ret == -EAGAIN)
> +		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> +
> +	close(gt_fd);
> +	return ret;
> +}
> +
> +/**
> + * xe_gt_get_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max, act, cur) to read
> + *
> + * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies

Add a note about an assert in case of unsuccesfull open.

> + *
> + * Return: GT frequency value
> + */
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
> +{
> +	uint32_t freq;
> +	int err = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (err == -EAGAIN)
> +		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> +
> +	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> +
> +	close(gt_fd);
> +	return freq;
> +}
> diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
> index 511b31149..06a59281c 100644
> --- a/lib/xe/xe_gt.h
> +++ b/lib/xe/xe_gt.h
> @@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
>  				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
>  int xe_gt_count_engines_by_class(int fd, int gt, int class);
>  
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
>  #endif
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 843144ad2..4adb205c9 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -14,6 +14,7 @@
>  
>  #include "igt.h"
>  #include "lib/igt_syncobj.h"
> +#include "lib/xe/xe_gt.h"

While it is here could you move both includes 'lib/'
after 'igt_sysfs.h'? So they will be sorted.

Regards,
Kamil

>  #include "igt_sysfs.h"
>  
>  #include "xe_drm.h"
> @@ -36,43 +37,6 @@
>   */
>  #define SLPC_FREQ_LATENCY_US 100000
>  
> -static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> -{
> -	int ret = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (ret == -EAGAIN)
> -		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> -
> -	close(gt_fd);
> -	return ret;
> -}
> -
> -static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
> -{
> -	uint32_t freq;
> -	int err = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (err == -EAGAIN)
> -		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> -
> -	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> -
> -	close(gt_fd);
> -	return freq;
> -}
> -
>  static bool within_expected_range(uint32_t freq, uint32_t val)
>  {
>  	/*
> @@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
>  
>  static void test_freq_basic_api(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t min_freq, max_freq;
>  
> @@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
>  	 * RPn is the floor
>  	 * RP0 is the ceiling
>  	 */
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
>  
>  	/* Assert min requests are respected from rp0 to rpn */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	min_freq = get_freq(fd, gt_id, "min");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	min_freq = xe_gt_get_freq(fd, gt_id, "min");
>  	/* SLPC can set min higher than rpmid - as it follows RPe */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>  
>  	/* Assert max requests are respected from rpn to rp0 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	max_freq = get_freq(fd, gt_id, "max");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
> +	max_freq = xe_gt_get_freq(fd, gt_id, "max");
>  	igt_assert(within_expected_range(max_freq, rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
>  }
>  
>  /**
> @@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
>  
>  static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur_freq, act_freq;
>  
> @@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  	 * And let's do this for all the 2 known Render Performance (RP) values
>  	 * RP0 and RPn and something in between.
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	if (gt_idle) {
> -		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
> +		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
> +		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur_freq = get_freq(fd, gt_id, "cur");
> +	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
>  	/* If rpmid is around RPe, we could see SLPC follow it */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act_freq = get_freq(fd, gt_id, "act");
> +		act_freq = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  	/*
>  	 * It is unlikely that PCODE will *always* respect any request above RPe
>  	 * So for this level let's only check if GuC PC is doing its job
>  	 * and respecting our request, by propagating it to the hardware.
>  	 */
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	}
>  
>  	igt_debug("Finished testing fixed request\n");
> @@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   */
>  static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur, act;
>  
>  	igt_debug("Starting testing range request\n");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur = get_freq(fd, gt_id, "cur");
> +	cur = xe_gt_get_freq(fd, gt_id, "cur");
>  	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act = get_freq(fd, gt_id, "act");
> +		act = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
>  	}
>  
> @@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  
>  static void test_freq_low_max(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  
>  	/*
>  	 *  When max request < min request, max is ignored and min works like
>  	 * a fixed one. Let's assert this assumption
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  
>  	/* Cur freq will follow RPe, which could be higher than min freq */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> -			   get_freq(fd, gt_id, "cur"));
> +			   xe_gt_get_freq(fd, gt_id, "cur"));
>  }
>  
>  /**
> @@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
>  
>  static void test_suspend(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>  				      SUSPEND_TEST_NONE);
>  
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>  }
>  
>  /**
> @@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
>  
>  static void test_reset(int fd, int gt_id, int cycles)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
>  	for (int i = 0; i < cycles; i++) {
> -		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
>  		usleep(SLPC_FREQ_LATENCY_US);
> -		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  
>  		xe_force_gt_reset_sync(fd, gt_id);
>  
>  		usleep(SLPC_FREQ_LATENCY_US);
>  
> -		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  	}
>  }
> @@ -448,8 +412,8 @@ igt_main
>  		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>  
>  		xe_for_each_gt(fd, gt) {
> -			stash_min[gt] = get_freq(fd, gt, "min");
> -			stash_max[gt] = get_freq(fd, gt, "max");
> +			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> +			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>  		}
>  	}
>  
> @@ -525,8 +489,8 @@ igt_main
>  
>  	igt_fixture {
>  		xe_for_each_gt(fd, gt) {
> -			set_freq(fd, gt, "max", stash_max[gt]);
> -			set_freq(fd, gt, "min", stash_min[gt]);
> +			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> +			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>  		}
>  		free(stash_min);
>  		free(stash_max);
> -- 
> 2.38.1
> 

Re: [PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Belgaumkar, Vinay]

On 4/9/2025 4:13 AM, Kamil Konieczny wrote:
> Hi Vinay,
> On 2025-04-07 at 16:44:05 -0700, Vinay Belgaumkar wrote:
>> Add utils to get/set GT frequency attributes. These ar per GT
> s/ar/are/
ok.
>
>> and exposed via sysfs already.
>>
>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> ---
>>   lib/xe/xe_gt.c           |  59 ++++++++++++++
>>   lib/xe/xe_gt.h           |   2 +
>>   tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
>>   3 files changed, 125 insertions(+), 100 deletions(-)
>>
>> diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
>> index 6f1475be0..bd6d1800b 100644
>> --- a/lib/xe/xe_gt.c
>> +++ b/lib/xe/xe_gt.c
>> @@ -4,6 +4,7 @@
>>    */
>>   
>>   #include <fcntl.h>
>> +#include <limits.h>
>>   #include <sys/stat.h>
>>   
>>   #include "igt_core.h"
>> @@ -241,3 +242,61 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
>>   
>>   	return n;
>>   }
>> +
>> +/**
>> + * xe_gt_set_freq:
>> + * @fd: pointer to xe drm fd
>> + * @gt_id: GT id
>> + * @freq_name: which GT freq(min, max) to change
>> + * @freq: value of freq to set
>> + *
>> + * Set GT min/max frequency
> Add a note about an assert in case of unsuccesfull open.
ok.
>
>> + *
>> + * Return: success or failure
>> + */
>> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
>> +{
>> +	int ret = -EAGAIN;
>> +	char freq_attr[NAME_MAX];
>> +	int gt_fd;
>> +
>> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
>> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
>> +	igt_assert_lte(0, gt_fd);
>> +
>> +	while (ret == -EAGAIN)
>> +		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
>> +
>> +	close(gt_fd);
>> +	return ret;
>> +}
>> +
>> +/**
>> + * xe_gt_get_freq:
>> + * @fd: pointer to xe drm fd
>> + * @gt_id: GT id
>> + * @freq_name: which GT freq(min, max, act, cur) to read
>> + *
>> + * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies
> Add a note about an assert in case of unsuccesfull open.
ok.
>
>> + *
>> + * Return: GT frequency value
>> + */
>> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
>> +{
>> +	uint32_t freq;
>> +	int err = -EAGAIN;
>> +	char freq_attr[NAME_MAX];
>> +	int gt_fd;
>> +
>> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
>> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
>> +	igt_assert_lte(0, gt_fd);
>> +
>> +	while (err == -EAGAIN)
>> +		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
>> +
>> +	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
>> +
>> +	close(gt_fd);
>> +	return freq;
>> +}
>> diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
>> index 511b31149..06a59281c 100644
>> --- a/lib/xe/xe_gt.h
>> +++ b/lib/xe/xe_gt.h
>> @@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
>>   				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
>>   int xe_gt_count_engines_by_class(int fd, int gt, int class);
>>   
>> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
>> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
>>   #endif
>> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
>> index 843144ad2..4adb205c9 100644
>> --- a/tests/intel/xe_gt_freq.c
>> +++ b/tests/intel/xe_gt_freq.c
>> @@ -14,6 +14,7 @@
>>   
>>   #include "igt.h"
>>   #include "lib/igt_syncobj.h"
>> +#include "lib/xe/xe_gt.h"
> While it is here could you move both includes 'lib/'
> after 'igt_sysfs.h'? So they will be sorted.

sure,

Thanks,

Vinay.

>
> Regards,
> Kamil
>
>>   #include "igt_sysfs.h"
>>   
>>   #include "xe_drm.h"
>> @@ -36,43 +37,6 @@
>>    */
>>   #define SLPC_FREQ_LATENCY_US 100000
>>   
>> -static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
>> -{
>> -	int ret = -EAGAIN;
>> -	char freq_attr[22];
>> -	int gt_fd;
>> -
>> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
>> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
>> -	igt_assert_lte(0, gt_fd);
>> -
>> -	while (ret == -EAGAIN)
>> -		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
>> -
>> -	close(gt_fd);
>> -	return ret;
>> -}
>> -
>> -static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
>> -{
>> -	uint32_t freq;
>> -	int err = -EAGAIN;
>> -	char freq_attr[22];
>> -	int gt_fd;
>> -
>> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
>> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
>> -	igt_assert_lte(0, gt_fd);
>> -
>> -	while (err == -EAGAIN)
>> -		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
>> -
>> -	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
>> -
>> -	close(gt_fd);
>> -	return freq;
>> -}
>> -
>>   static bool within_expected_range(uint32_t freq, uint32_t val)
>>   {
>>   	/*
>> @@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
>>   
>>   static void test_freq_basic_api(int fd, int gt_id)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>>   	uint32_t rpmid = (rp0 + rpn) / 2;
>>   	uint32_t min_freq, max_freq;
>>   
>> @@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
>>   	 * RPn is the floor
>>   	 * RP0 is the ceiling
>>   	 */
>> -	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
>> -	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
>> -	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
>> -	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
>> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
>> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
>> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
>> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
>>   
>>   	/* Assert min requests are respected from rp0 to rpn */
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
>> -	min_freq = get_freq(fd, gt_id, "min");
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
>> +	min_freq = xe_gt_get_freq(fd, gt_id, "min");
>>   	/* SLPC can set min higher than rpmid - as it follows RPe */
>>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>>   
>>   	/* Assert max requests are respected from rpn to rp0 */
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
>> -	max_freq = get_freq(fd, gt_id, "max");
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>> +	max_freq = xe_gt_get_freq(fd, gt_id, "max");
>>   	igt_assert(within_expected_range(max_freq, rpmid));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
>>   }
>>   
>>   /**
>> @@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
>>   
>>   static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>>   	uint32_t rpmid = (rp0 + rpn) / 2;
>>   	uint32_t cur_freq, act_freq;
>>   
>> @@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>>   	 * And let's do this for all the 2 known Render Performance (RP) values
>>   	 * RP0 and RPn and something in between.
>>   	 */
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>>   
>>   	if (gt_idle) {
>> -		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
>> +		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
>>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>>   			     "GT %d should be in C6\n", gt_id);
>> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
>> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>>   	} else {
>> -		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
>> +		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
>>   	}
>>   
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>> -	cur_freq = get_freq(fd, gt_id, "cur");
>> +	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
>>   	/* If rpmid is around RPe, we could see SLPC follow it */
>>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
>>   
>>   	if (gt_idle) {
>>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>>   			     "GT %d should be in C6\n", gt_id);
>> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
>> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>>   	} else {
>> -		act_freq = get_freq(fd, gt_id, "act");
>> +		act_freq = xe_gt_get_freq(fd, gt_id, "act");
>>   		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
>>   	}
>>   
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>>   	/*
>>   	 * It is unlikely that PCODE will *always* respect any request above RPe
>>   	 * So for this level let's only check if GuC PC is doing its job
>>   	 * and respecting our request, by propagating it to the hardware.
>>   	 */
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
>>   
>>   	if (gt_idle) {
>>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>>   			     "GT %d should be in C6\n", gt_id);
>> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
>> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>>   	}
>>   
>>   	igt_debug("Finished testing fixed request\n");
>> @@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>>    */
>>   static void test_freq_range(int fd, int gt_id, bool gt_idle)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>>   	uint32_t rpmid = (rp0 + rpn) / 2;
>>   	uint32_t cur, act;
>>   
>>   	igt_debug("Starting testing range request\n");
>>   
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>> -	cur = get_freq(fd, gt_id, "cur");
>> +	cur = xe_gt_get_freq(fd, gt_id, "cur");
>>   	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>>   
>>   	if (gt_idle) {
>>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>>   			     "GT %d should be in C6\n", gt_id);
>> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
>> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>>   	} else {
>> -		act = get_freq(fd, gt_id, "act");
>> +		act = xe_gt_get_freq(fd, gt_id, "act");
>>   		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
>>   	}
>>   
>> @@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>>   
>>   static void test_freq_low_max(int fd, int gt_id)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>>   	uint32_t rpmid = (rp0 + rpn) / 2;
>>   
>>   	/*
>>   	 *  When max request < min request, max is ignored and min works like
>>   	 * a fixed one. Let's assert this assumption
>>   	 */
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>>   
>>   	/* Cur freq will follow RPe, which could be higher than min freq */
>>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
>> -			   get_freq(fd, gt_id, "cur"));
>> +			   xe_gt_get_freq(fd, gt_id, "cur"));
>>   }
>>   
>>   /**
>> @@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
>>   
>>   static void test_suspend(int fd, int gt_id)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>>   
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
>> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
>> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>>   	usleep(SLPC_FREQ_LATENCY_US);
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>>   
>>   	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>>   				      SUSPEND_TEST_NONE);
>>   
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
>> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>>   }
>>   
>>   /**
>> @@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
>>   
>>   static void test_reset(int fd, int gt_id, int cycles)
>>   {
>> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
>> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>>   
>>   	for (int i = 0; i < cycles; i++) {
>> -		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
>> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
>>   			     "Failed after %d good cycles\n", i);
>> -		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
>> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
>>   			     "Failed after %d good cycles\n", i);
>>   		usleep(SLPC_FREQ_LATENCY_US);
>> -		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
>> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
>>   			     "Failed after %d good cycles\n", i);
>>   
>>   		xe_force_gt_reset_sync(fd, gt_id);
>>   
>>   		usleep(SLPC_FREQ_LATENCY_US);
>>   
>> -		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
>> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
>>   			     "Failed after %d good cycles\n", i);
>> -		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
>> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
>>   			     "Failed after %d good cycles\n", i);
>>   	}
>>   }
>> @@ -448,8 +412,8 @@ igt_main
>>   		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>>   
>>   		xe_for_each_gt(fd, gt) {
>> -			stash_min[gt] = get_freq(fd, gt, "min");
>> -			stash_max[gt] = get_freq(fd, gt, "max");
>> +			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
>> +			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>>   		}
>>   	}
>>   
>> @@ -525,8 +489,8 @@ igt_main
>>   
>>   	igt_fixture {
>>   		xe_for_each_gt(fd, gt) {
>> -			set_freq(fd, gt, "max", stash_max[gt]);
>> -			set_freq(fd, gt, "min", stash_min[gt]);
>> +			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
>> +			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>>   		}
>>   		free(stash_min);
>>   		free(stash_max);
>> -- 
>> 2.38.1
>>

[PATCH i-g-t 2/2] tests/xe_pmu: Add frequency test

[Vinay Belgaumkar]

Add a basic test that uses PMU to read GT actual and requested
frequencies while running a workload.

v2: Rebase and comments (Riana)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 tests/intel/xe_pmu.c | 128 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 127 insertions(+), 1 deletion(-)

diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
index 175bbf374..fbac9c798 100644
--- a/tests/intel/xe_pmu.c
+++ b/tests/intel/xe_pmu.c
@@ -376,6 +376,94 @@ static void test_gt_c6_idle(int xe, unsigned int gt)
 	close(pmu_fd);
 }
 
+/**
+ * SUBTEST: gt-frequency
+ * Description: Validate we can collect accurate frequency PMU stats
+ *		while running a workload.
+ */
+static void test_gt_frequency(int fd, struct drm_xe_engine_class_instance *eci)
+{
+	struct xe_cork *cork = NULL;
+	uint64_t end[2], start[2];
+	unsigned long config_rq_freq, config_act_freq;
+	double min[2], max[2];
+	uint32_t gt = eci->gt_id;
+	uint32_t orig_min = xe_gt_get_freq(fd, eci->gt_id, "min");
+	uint32_t orig_max = xe_gt_get_freq(fd, eci->gt_id, "max");
+	uint32_t vm;
+	int pmu_fd[2];
+
+	config_rq_freq = get_event_config(gt, NULL, "gt-requested-frequency");
+	pmu_fd[0] = open_group(fd, config_rq_freq, -1);
+
+	config_act_freq = get_event_config(gt, NULL, "gt-actual-frequency");
+	pmu_fd[1] = open_group(fd, config_act_freq, pmu_fd[0]);
+
+	vm = xe_vm_create(fd, 0, 0);
+
+	cork = xe_cork_create_opts(fd, eci, vm, 1, 1);
+	xe_cork_sync_start(fd, cork);
+
+	/*
+	 * Set GPU to min frequency and read PMU counters.
+	 */
+	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_min) > 0);
+	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_min);
+
+	pmu_read_multi(pmu_fd[0], 2, start);
+	usleep(SLEEP_DURATION * USEC_PER_SEC);
+	pmu_read_multi(pmu_fd[0], 2, end);
+
+	min[0] = (end[0] - start[0]);
+	min[1] = (end[1] - start[1]);
+
+	/*
+	 * Set GPU to max frequency and read PMU counters.
+	 */
+	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_max) > 0);
+	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_max);
+	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_max) > 0);
+	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_max);
+
+	pmu_read_multi(pmu_fd[0], 2, start);
+	usleep(SLEEP_DURATION * USEC_PER_SEC);
+	pmu_read_multi(pmu_fd[0], 2, end);
+
+	max[0] = (end[0] - start[0]);
+	max[1] = (end[1] - start[1]);
+
+	xe_cork_sync_end(fd, cork);
+
+	/*
+	 * Restore min/max.
+	 */
+	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_min) > 0);
+	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_min);
+
+	igt_info("Minimum frequency: requested %.1f, actual %.1f\n",
+		 min[0], min[1]);
+	igt_info("Maximum frequency: requested %.1f, actual %.1f\n",
+		 max[0], max[1]);
+
+	close(pmu_fd[0]);
+	close(pmu_fd[1]);
+
+	if (cork)
+		xe_cork_destroy(fd, cork);
+
+	xe_vm_destroy(fd, vm);
+
+	close(pmu_fd[0]);
+	close(pmu_fd[1]);
+
+	assert_within_epsilon(min[0], orig_min, tolerance);
+	/*
+	 * On thermally throttled devices we cannot be sure maximum frequency
+	 * can be reached so use larger tolerance downwards.
+	 */
+	assert_within_epsilon_up_down(max[0], orig_max, tolerance, 0.15f);
+}
+
 static unsigned int enable_and_provision_vfs(int fd)
 {
 	unsigned int gt, num_vfs;
@@ -429,8 +517,9 @@ static void disable_vfs(int fd)
 
 igt_main
 {
-	int fd, gt;
+	int fd, gt, num_gts;
 	struct drm_xe_engine_class_instance *eci;
+	uint32_t *stash_min, *stash_max;
 
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_XE);
@@ -482,6 +571,43 @@ igt_main
 			disable_vfs(fd);
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
+			num_gts = xe_number_gt(fd);
+
+			stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
+			stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
+
+			xe_for_each_gt(fd, gt) {
+				stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
+				stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
+			}
+		}
+
+		igt_describe("Validate PMU GT freq measured is within the tolerance");
+		igt_subtest_with_dynamic("gt-frequency") {
+			xe_for_each_gt(fd, gt) {
+				igt_dynamic_f("gt%u", gt)
+				xe_for_each_engine(fd, eci) {
+					if (gt == eci->gt_id) {
+						test_gt_frequency(fd, eci);
+						break;
+					}
+				}
+			}
+		}
+
+		igt_fixture {
+			xe_for_each_gt(fd, gt) {
+				xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
+				xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
+			}
+			free(stash_min);
+			free(stash_max);
+		}
+	}
+
 	igt_fixture {
 		close(fd);
 	}
-- 
2.38.1

Re: [PATCH i-g-t 2/2] tests/xe_pmu: Add frequency test

[Riana Tauro]

Hi Vinay

On 4/8/2025 5:14 AM, Vinay Belgaumkar wrote:
> Add a basic test that uses PMU to read GT actual and requested
> frequencies while running a workload.
> 
> v2: Rebase and comments (Riana)
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>   tests/intel/xe_pmu.c | 128 ++++++++++++++++++++++++++++++++++++++++++-
>   1 file changed, 127 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
> index 175bbf374..fbac9c798 100644
> --- a/tests/intel/xe_pmu.c
> +++ b/tests/intel/xe_pmu.c
> @@ -376,6 +376,94 @@ static void test_gt_c6_idle(int xe, unsigned int gt)
>   	close(pmu_fd);
>   }
>   
> +/**
> + * SUBTEST: gt-frequency
> + * Description: Validate we can collect accurate frequency PMU stats
> + *		while running a workload.
> + */
> +static void test_gt_frequency(int fd, struct drm_xe_engine_class_instance *eci)
> +{
> +	struct xe_cork *cork = NULL;
> +	uint64_t end[2], start[2];
> +	unsigned long config_rq_freq, config_act_freq;
> +	double min[2], max[2];
> +	uint32_t gt = eci->gt_id;
> +	uint32_t orig_min = xe_gt_get_freq(fd, eci->gt_id, "min");
> +	uint32_t orig_max = xe_gt_get_freq(fd, eci->gt_id, "max");
> +	uint32_t vm;
> +	int pmu_fd[2];
> +
> +	config_rq_freq = get_event_config(gt, NULL, "gt-requested-frequency");
> +	pmu_fd[0] = open_group(fd, config_rq_freq, -1);
> +
> +	config_act_freq = get_event_config(gt, NULL, "gt-actual-frequency");
> +	pmu_fd[1] = open_group(fd, config_act_freq, pmu_fd[0]);
> +
> +	vm = xe_vm_create(fd, 0, 0);
> +
> +	cork = xe_cork_create_opts(fd, eci, vm, 1, 1);
> +	xe_cork_sync_start(fd, cork);
> +
> +	/*
> +	 * Set GPU to min frequency and read PMU counters.
> +	 */
> +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_min) > 0);
> +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_min);
> +
> +	pmu_read_multi(pmu_fd[0], 2, start);
> +	usleep(SLEEP_DURATION * USEC_PER_SEC);
> +	pmu_read_multi(pmu_fd[0], 2, end);
> +
> +	min[0] = (end[0] - start[0]);
> +	min[1] = (end[1] - start[1]);
> +
> +	/*
> +	 * Set GPU to max frequency and read PMU counters.
> +	 */
> +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_max) > 0);
> +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_max);
> +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_max) > 0);
> +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_max);
> +
> +	pmu_read_multi(pmu_fd[0], 2, start);
> +	usleep(SLEEP_DURATION * USEC_PER_SEC);
> +	pmu_read_multi(pmu_fd[0], 2, end);
> +
> +	max[0] = (end[0] - start[0]);
> +	max[1] = (end[1] - start[1]);
> +
> +	xe_cork_sync_end(fd, cork);
> +
> +	/*
> +	 * Restore min/max.
> +	 */
> +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_min) > 0);
> +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_min);
> +
> +	igt_info("Minimum frequency: requested %.1f, actual %.1f\n",
> +		 min[0], min[1]);
> +	igt_info("Maximum frequency: requested %.1f, actual %.1f\n",
> +		 max[0], max[1]);
> +
> +	close(pmu_fd[0]);
> +	close(pmu_fd[1]);
> +
> +	if (cork)
> +		xe_cork_destroy(fd, cork);
> +
> +	xe_vm_destroy(fd, vm);
> +
> +	close(pmu_fd[0]);
> +	close(pmu_fd[1]);
> +
> +	assert_within_epsilon(min[0], orig_min, tolerance);
> +	/*
> +	 * On thermally throttled devices we cannot be sure maximum frequency
> +	 * can be reached so use larger tolerance downwards.
> +	 */
> +	assert_within_epsilon_up_down(max[0], orig_max, tolerance, 0.15f);
> +}
> +
>   static unsigned int enable_and_provision_vfs(int fd)
>   {
>   	unsigned int gt, num_vfs;
> @@ -429,8 +517,9 @@ static void disable_vfs(int fd)
>   
>   igt_main
>   {
> -	int fd, gt;
> +	int fd, gt, num_gts;
>   	struct drm_xe_engine_class_instance *eci;
> +	uint32_t *stash_min, *stash_max;
>   
>   	igt_fixture {
>   		fd = drm_open_driver(DRIVER_XE);
> @@ -482,6 +571,43 @@ igt_main
>   			disable_vfs(fd);
>   	}
>   
> +	igt_subtest_group {
> +		igt_fixture {
> +			igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
> +			num_gts = xe_number_gt(fd);
> +
> +			stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> +			stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> +
> +			xe_for_each_gt(fd, gt) {
> +				stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> +				stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
This can be moved inside the igt_subtest with local variables since it's 
only one test. The subtest group is executed for all the other tests too

Thanks
Riana> +			}
> +		}
> +
> +		igt_describe("Validate PMU GT freq measured is within the tolerance");
> +		igt_subtest_with_dynamic("gt-frequency") {
> +			xe_for_each_gt(fd, gt) {
> +				igt_dynamic_f("gt%u", gt)
> +				xe_for_each_engine(fd, eci) {
> +					if (gt == eci->gt_id) {
> +						test_gt_frequency(fd, eci);
> +						break;
> +					}
> +				}
> +			}
> +		}
> +
> +		igt_fixture {
> +			xe_for_each_gt(fd, gt) {
> +				xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> +				xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
> +			}
> +			free(stash_min);
> +			free(stash_max);
> +		}
> +	}
> +
>   	igt_fixture {
>   		close(fd);
>   	}

Re: [PATCH i-g-t 2/2] tests/xe_pmu: Add frequency test

[Kamil Konieczny]

Hi,
On 2025-04-09 at 15:28:59 +0530, Riana Tauro wrote:
> Hi Vinay
> 
> On 4/8/2025 5:14 AM, Vinay Belgaumkar wrote:
> > Add a basic test that uses PMU to read GT actual and requested
> > frequencies while running a workload.
> > 
> > v2: Rebase and comments (Riana)
> > 
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Riana Tauro <riana.tauro@intel.com>
> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> > ---
> >   tests/intel/xe_pmu.c | 128 ++++++++++++++++++++++++++++++++++++++++++-
> >   1 file changed, 127 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
> > index 175bbf374..fbac9c798 100644
> > --- a/tests/intel/xe_pmu.c
> > +++ b/tests/intel/xe_pmu.c
> > @@ -376,6 +376,94 @@ static void test_gt_c6_idle(int xe, unsigned int gt)
> >   	close(pmu_fd);
> >   }
> > +/**
> > + * SUBTEST: gt-frequency
> > + * Description: Validate we can collect accurate frequency PMU stats
> > + *		while running a workload.
> > + */
> > +static void test_gt_frequency(int fd, struct drm_xe_engine_class_instance *eci)
> > +{
> > +	struct xe_cork *cork = NULL;
> > +	uint64_t end[2], start[2];
> > +	unsigned long config_rq_freq, config_act_freq;
> > +	double min[2], max[2];
> > +	uint32_t gt = eci->gt_id;
> > +	uint32_t orig_min = xe_gt_get_freq(fd, eci->gt_id, "min");
> > +	uint32_t orig_max = xe_gt_get_freq(fd, eci->gt_id, "max");
> > +	uint32_t vm;
> > +	int pmu_fd[2];
> > +
> > +	config_rq_freq = get_event_config(gt, NULL, "gt-requested-frequency");
> > +	pmu_fd[0] = open_group(fd, config_rq_freq, -1);
> > +
> > +	config_act_freq = get_event_config(gt, NULL, "gt-actual-frequency");
> > +	pmu_fd[1] = open_group(fd, config_act_freq, pmu_fd[0]);
> > +
> > +	vm = xe_vm_create(fd, 0, 0);
> > +
> > +	cork = xe_cork_create_opts(fd, eci, vm, 1, 1);
> > +	xe_cork_sync_start(fd, cork);
> > +
> > +	/*
> > +	 * Set GPU to min frequency and read PMU counters.
> > +	 */
> > +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_min) > 0);
> > +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_min);
> > +
> > +	pmu_read_multi(pmu_fd[0], 2, start);
> > +	usleep(SLEEP_DURATION * USEC_PER_SEC);
> > +	pmu_read_multi(pmu_fd[0], 2, end);
> > +
> > +	min[0] = (end[0] - start[0]);
> > +	min[1] = (end[1] - start[1]);
> > +
> > +	/*
> > +	 * Set GPU to max frequency and read PMU counters.
> > +	 */
> > +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_max) > 0);
> > +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_max);
> > +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_max) > 0);
> > +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_max);
> > +
> > +	pmu_read_multi(pmu_fd[0], 2, start);
> > +	usleep(SLEEP_DURATION * USEC_PER_SEC);
> > +	pmu_read_multi(pmu_fd[0], 2, end);
> > +
> > +	max[0] = (end[0] - start[0]);
> > +	max[1] = (end[1] - start[1]);
> > +
> > +	xe_cork_sync_end(fd, cork);
> > +
> > +	/*
> > +	 * Restore min/max.
> > +	 */
> > +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_min) > 0);
> > +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_min);
> > +
> > +	igt_info("Minimum frequency: requested %.1f, actual %.1f\n",
> > +		 min[0], min[1]);
> > +	igt_info("Maximum frequency: requested %.1f, actual %.1f\n",
> > +		 max[0], max[1]);
> > +
> > +	close(pmu_fd[0]);
> > +	close(pmu_fd[1]);
> > +
> > +	if (cork)
> > +		xe_cork_destroy(fd, cork);
> > +
> > +	xe_vm_destroy(fd, vm);
> > +
> > +	close(pmu_fd[0]);
> > +	close(pmu_fd[1]);
> > +
> > +	assert_within_epsilon(min[0], orig_min, tolerance);
> > +	/*
> > +	 * On thermally throttled devices we cannot be sure maximum frequency
> > +	 * can be reached so use larger tolerance downwards.
> > +	 */
> > +	assert_within_epsilon_up_down(max[0], orig_max, tolerance, 0.15f);
> > +}
> > +
> >   static unsigned int enable_and_provision_vfs(int fd)
> >   {
> >   	unsigned int gt, num_vfs;
> > @@ -429,8 +517,9 @@ static void disable_vfs(int fd)
> >   igt_main
> >   {
> > -	int fd, gt;
> > +	int fd, gt, num_gts;
> >   	struct drm_xe_engine_class_instance *eci;
> > +	uint32_t *stash_min, *stash_max;
> >   	igt_fixture {
> >   		fd = drm_open_driver(DRIVER_XE);
> > @@ -482,6 +571,43 @@ igt_main
> >   			disable_vfs(fd);
> >   	}
> > +	igt_subtest_group {

Add here:
	bool has_freq0_node, needs_restore = false;

> > +		igt_fixture {
> > +			igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));

Move this require into subtest. If you need it here then remember its
value for later use:
	has_freq0_node = xe_sysfs_gt_has_node(fd, 0, "freq0");

> > +			num_gts = xe_number_gt(fd);
> > +

So here start with if:

	if (has_freq0_node) {

> > +			stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> > +			stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> > +
> > +			xe_for_each_gt(fd, gt) {
> > +				stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> > +				stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
> This can be moved inside the igt_subtest with local variables since it's
> only one test. The subtest group is executed for all the other tests too
> 
> Thanks
> Riana> +			}
> > +		}
> > +
> > +		igt_describe("Validate PMU GT freq measured is within the tolerance");
> > +		igt_subtest_with_dynamic("gt-frequency") {

needs_restore = true;

> > +			xe_for_each_gt(fd, gt) {
> > +				igt_dynamic_f("gt%u", gt)
> > +				xe_for_each_engine(fd, eci) {
> > +					if (gt == eci->gt_id) {
> > +						test_gt_frequency(fd, eci);
> > +						break;
> > +					}
> > +				}
> > +			}
> > +		}
> > +
> > +		igt_fixture {

			if (needs_restore) {
				
> > +			xe_for_each_gt(fd, gt) {
> > +				xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> > +				xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
> > +			}
> > +			free(stash_min);
> > +			free(stash_max);

			} /* restore */

Regards,
Kamil

> > +		}
> > +	}
> > +
> >   	igt_fixture {
> >   		close(fd);
> >   	}
> 

Re: [PATCH i-g-t 2/2] tests/xe_pmu: Add frequency test

[Belgaumkar, Vinay]

On 4/9/2025 4:06 AM, Kamil Konieczny wrote:
> Hi,
> On 2025-04-09 at 15:28:59 +0530, Riana Tauro wrote:
>> Hi Vinay
>>
>> On 4/8/2025 5:14 AM, Vinay Belgaumkar wrote:
>>> Add a basic test that uses PMU to read GT actual and requested
>>> frequencies while running a workload.
>>>
>>> v2: Rebase and comments (Riana)
>>>
>>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> Cc: Riana Tauro <riana.tauro@intel.com>
>>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>>> ---
>>>    tests/intel/xe_pmu.c | 128 ++++++++++++++++++++++++++++++++++++++++++-
>>>    1 file changed, 127 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
>>> index 175bbf374..fbac9c798 100644
>>> --- a/tests/intel/xe_pmu.c
>>> +++ b/tests/intel/xe_pmu.c
>>> @@ -376,6 +376,94 @@ static void test_gt_c6_idle(int xe, unsigned int gt)
>>>    	close(pmu_fd);
>>>    }
>>> +/**
>>> + * SUBTEST: gt-frequency
>>> + * Description: Validate we can collect accurate frequency PMU stats
>>> + *		while running a workload.
>>> + */
>>> +static void test_gt_frequency(int fd, struct drm_xe_engine_class_instance *eci)
>>> +{
>>> +	struct xe_cork *cork = NULL;
>>> +	uint64_t end[2], start[2];
>>> +	unsigned long config_rq_freq, config_act_freq;
>>> +	double min[2], max[2];
>>> +	uint32_t gt = eci->gt_id;
>>> +	uint32_t orig_min = xe_gt_get_freq(fd, eci->gt_id, "min");
>>> +	uint32_t orig_max = xe_gt_get_freq(fd, eci->gt_id, "max");
>>> +	uint32_t vm;
>>> +	int pmu_fd[2];
>>> +
>>> +	config_rq_freq = get_event_config(gt, NULL, "gt-requested-frequency");
>>> +	pmu_fd[0] = open_group(fd, config_rq_freq, -1);
>>> +
>>> +	config_act_freq = get_event_config(gt, NULL, "gt-actual-frequency");
>>> +	pmu_fd[1] = open_group(fd, config_act_freq, pmu_fd[0]);
>>> +
>>> +	vm = xe_vm_create(fd, 0, 0);
>>> +
>>> +	cork = xe_cork_create_opts(fd, eci, vm, 1, 1);
>>> +	xe_cork_sync_start(fd, cork);
>>> +
>>> +	/*
>>> +	 * Set GPU to min frequency and read PMU counters.
>>> +	 */
>>> +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_min) > 0);
>>> +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_min);
>>> +
>>> +	pmu_read_multi(pmu_fd[0], 2, start);
>>> +	usleep(SLEEP_DURATION * USEC_PER_SEC);
>>> +	pmu_read_multi(pmu_fd[0], 2, end);
>>> +
>>> +	min[0] = (end[0] - start[0]);
>>> +	min[1] = (end[1] - start[1]);
>>> +
>>> +	/*
>>> +	 * Set GPU to max frequency and read PMU counters.
>>> +	 */
>>> +	igt_assert(xe_gt_set_freq(fd, gt, "max", orig_max) > 0);
>>> +	igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_max);
>>> +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_max) > 0);
>>> +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_max);
>>> +
>>> +	pmu_read_multi(pmu_fd[0], 2, start);
>>> +	usleep(SLEEP_DURATION * USEC_PER_SEC);
>>> +	pmu_read_multi(pmu_fd[0], 2, end);
>>> +
>>> +	max[0] = (end[0] - start[0]);
>>> +	max[1] = (end[1] - start[1]);
>>> +
>>> +	xe_cork_sync_end(fd, cork);
>>> +
>>> +	/*
>>> +	 * Restore min/max.
>>> +	 */
>>> +	igt_assert(xe_gt_set_freq(fd, gt, "min", orig_min) > 0);
>>> +	igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_min);
>>> +
>>> +	igt_info("Minimum frequency: requested %.1f, actual %.1f\n",
>>> +		 min[0], min[1]);
>>> +	igt_info("Maximum frequency: requested %.1f, actual %.1f\n",
>>> +		 max[0], max[1]);
>>> +
>>> +	close(pmu_fd[0]);
>>> +	close(pmu_fd[1]);
>>> +
>>> +	if (cork)
>>> +		xe_cork_destroy(fd, cork);
>>> +
>>> +	xe_vm_destroy(fd, vm);
>>> +
>>> +	close(pmu_fd[0]);
>>> +	close(pmu_fd[1]);
>>> +
>>> +	assert_within_epsilon(min[0], orig_min, tolerance);
>>> +	/*
>>> +	 * On thermally throttled devices we cannot be sure maximum frequency
>>> +	 * can be reached so use larger tolerance downwards.
>>> +	 */
>>> +	assert_within_epsilon_up_down(max[0], orig_max, tolerance, 0.15f);
>>> +}
>>> +
>>>    static unsigned int enable_and_provision_vfs(int fd)
>>>    {
>>>    	unsigned int gt, num_vfs;
>>> @@ -429,8 +517,9 @@ static void disable_vfs(int fd)
>>>    igt_main
>>>    {
>>> -	int fd, gt;
>>> +	int fd, gt, num_gts;
>>>    	struct drm_xe_engine_class_instance *eci;
>>> +	uint32_t *stash_min, *stash_max;
>>>    	igt_fixture {
>>>    		fd = drm_open_driver(DRIVER_XE);
>>> @@ -482,6 +571,43 @@ igt_main
>>>    			disable_vfs(fd);
>>>    	}
>>> +	igt_subtest_group {
> Add here:
> 	bool has_freq0_node, needs_restore = false;
>
>>> +		igt_fixture {
>>> +			igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
> Move this require into subtest. If you need it here then remember its
> value for later use:
> 	has_freq0_node = xe_sysfs_gt_has_node(fd, 0, "freq0");
>
>>> +			num_gts = xe_number_gt(fd);
>>> +
> So here start with if:
>
> 	if (has_freq0_node) {
>
>>> +			stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>>> +			stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>>> +
>>> +			xe_for_each_gt(fd, gt) {
>>> +				stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
>>> +				stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>> This can be moved inside the igt_subtest with local variables since it's
>> only one test. The subtest group is executed for all the other tests too
>>
>> Thanks
>> Riana> +			}
>>> +		}
>>> +
>>> +		igt_describe("Validate PMU GT freq measured is within the tolerance");
>>> +		igt_subtest_with_dynamic("gt-frequency") {
> needs_restore = true;
>
>>> +			xe_for_each_gt(fd, gt) {
>>> +				igt_dynamic_f("gt%u", gt)
>>> +				xe_for_each_engine(fd, eci) {
>>> +					if (gt == eci->gt_id) {
>>> +						test_gt_frequency(fd, eci);
>>> +						break;
>>> +					}
>>> +				}
>>> +			}
>>> +		}
>>> +
>>> +		igt_fixture {
> 			if (needs_restore) {

ok. Thanks,

Vinay.

> 				
>>> +			xe_for_each_gt(fd, gt) {
>>> +				xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
>>> +				xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>>> +			}
>>> +			free(stash_min);
>>> +			free(stash_max);
> 			} /* restore */
>
> Regards,
> Kamil
>
>>> +		}
>>> +	}
>>> +
>>>    	igt_fixture {
>>>    		close(fd);
>>>    	}

Re: [PATCH i-g-t 2/2] tests/xe_pmu: Add frequency test

[Belgaumkar, Vinay]

On 4/9/2025 2:58 AM, Riana Tauro wrote:
> Hi Vinay
>
> On 4/8/2025 5:14 AM, Vinay Belgaumkar wrote:
>> Add a basic test that uses PMU to read GT actual and requested
>> frequencies while running a workload.
>>
>> v2: Rebase and comments (Riana)
>>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Riana Tauro <riana.tauro@intel.com>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> ---
>>   tests/intel/xe_pmu.c | 128 ++++++++++++++++++++++++++++++++++++++++++-
>>   1 file changed, 127 insertions(+), 1 deletion(-)
>>
>> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
>> index 175bbf374..fbac9c798 100644
>> --- a/tests/intel/xe_pmu.c
>> +++ b/tests/intel/xe_pmu.c
>> @@ -376,6 +376,94 @@ static void test_gt_c6_idle(int xe, unsigned int 
>> gt)
>>       close(pmu_fd);
>>   }
>>   +/**
>> + * SUBTEST: gt-frequency
>> + * Description: Validate we can collect accurate frequency PMU stats
>> + *        while running a workload.
>> + */
>> +static void test_gt_frequency(int fd, struct 
>> drm_xe_engine_class_instance *eci)
>> +{
>> +    struct xe_cork *cork = NULL;
>> +    uint64_t end[2], start[2];
>> +    unsigned long config_rq_freq, config_act_freq;
>> +    double min[2], max[2];
>> +    uint32_t gt = eci->gt_id;
>> +    uint32_t orig_min = xe_gt_get_freq(fd, eci->gt_id, "min");
>> +    uint32_t orig_max = xe_gt_get_freq(fd, eci->gt_id, "max");
>> +    uint32_t vm;
>> +    int pmu_fd[2];
>> +
>> +    config_rq_freq = get_event_config(gt, NULL, 
>> "gt-requested-frequency");
>> +    pmu_fd[0] = open_group(fd, config_rq_freq, -1);
>> +
>> +    config_act_freq = get_event_config(gt, NULL, 
>> "gt-actual-frequency");
>> +    pmu_fd[1] = open_group(fd, config_act_freq, pmu_fd[0]);
>> +
>> +    vm = xe_vm_create(fd, 0, 0);
>> +
>> +    cork = xe_cork_create_opts(fd, eci, vm, 1, 1);
>> +    xe_cork_sync_start(fd, cork);
>> +
>> +    /*
>> +     * Set GPU to min frequency and read PMU counters.
>> +     */
>> +    igt_assert(xe_gt_set_freq(fd, gt, "max", orig_min) > 0);
>> +    igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_min);
>> +
>> +    pmu_read_multi(pmu_fd[0], 2, start);
>> +    usleep(SLEEP_DURATION * USEC_PER_SEC);
>> +    pmu_read_multi(pmu_fd[0], 2, end);
>> +
>> +    min[0] = (end[0] - start[0]);
>> +    min[1] = (end[1] - start[1]);
>> +
>> +    /*
>> +     * Set GPU to max frequency and read PMU counters.
>> +     */
>> +    igt_assert(xe_gt_set_freq(fd, gt, "max", orig_max) > 0);
>> +    igt_assert(xe_gt_get_freq(fd, gt, "max") == orig_max);
>> +    igt_assert(xe_gt_set_freq(fd, gt, "min", orig_max) > 0);
>> +    igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_max);
>> +
>> +    pmu_read_multi(pmu_fd[0], 2, start);
>> +    usleep(SLEEP_DURATION * USEC_PER_SEC);
>> +    pmu_read_multi(pmu_fd[0], 2, end);
>> +
>> +    max[0] = (end[0] - start[0]);
>> +    max[1] = (end[1] - start[1]);
>> +
>> +    xe_cork_sync_end(fd, cork);
>> +
>> +    /*
>> +     * Restore min/max.
>> +     */
>> +    igt_assert(xe_gt_set_freq(fd, gt, "min", orig_min) > 0);
>> +    igt_assert(xe_gt_get_freq(fd, gt, "min") == orig_min);
>> +
>> +    igt_info("Minimum frequency: requested %.1f, actual %.1f\n",
>> +         min[0], min[1]);
>> +    igt_info("Maximum frequency: requested %.1f, actual %.1f\n",
>> +         max[0], max[1]);
>> +
>> +    close(pmu_fd[0]);
>> +    close(pmu_fd[1]);
>> +
>> +    if (cork)
>> +        xe_cork_destroy(fd, cork);
>> +
>> +    xe_vm_destroy(fd, vm);
>> +
>> +    close(pmu_fd[0]);
>> +    close(pmu_fd[1]);
>> +
>> +    assert_within_epsilon(min[0], orig_min, tolerance);
>> +    /*
>> +     * On thermally throttled devices we cannot be sure maximum 
>> frequency
>> +     * can be reached so use larger tolerance downwards.
>> +     */
>> +    assert_within_epsilon_up_down(max[0], orig_max, tolerance, 0.15f);
>> +}
>> +
>>   static unsigned int enable_and_provision_vfs(int fd)
>>   {
>>       unsigned int gt, num_vfs;
>> @@ -429,8 +517,9 @@ static void disable_vfs(int fd)
>>     igt_main
>>   {
>> -    int fd, gt;
>> +    int fd, gt, num_gts;
>>       struct drm_xe_engine_class_instance *eci;
>> +    uint32_t *stash_min, *stash_max;
>>         igt_fixture {
>>           fd = drm_open_driver(DRIVER_XE);
>> @@ -482,6 +571,43 @@ igt_main
>>               disable_vfs(fd);
>>       }
>>   +    igt_subtest_group {
>> +        igt_fixture {
>> +            igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
>> +            num_gts = xe_number_gt(fd);
>> +
>> +            stash_min = (uint32_t *) malloc(sizeof(uint32_t) * 
>> num_gts);
>> +            stash_max = (uint32_t *) malloc(sizeof(uint32_t) * 
>> num_gts);
>> +
>> +            xe_for_each_gt(fd, gt) {
>> +                stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
>> +                stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
> This can be moved inside the igt_subtest with local variables since 
> it's only one test. The subtest group is executed for all the other 
> tests too

ok.

Thanks,

Vinay.

>
> Thanks
> Riana> +            }
>> +        }
>> +
>> +        igt_describe("Validate PMU GT freq measured is within the 
>> tolerance");
>> +        igt_subtest_with_dynamic("gt-frequency") {
>> +            xe_for_each_gt(fd, gt) {
>> +                igt_dynamic_f("gt%u", gt)
>> +                xe_for_each_engine(fd, eci) {
>> +                    if (gt == eci->gt_id) {
>> +                        test_gt_frequency(fd, eci);
>> +                        break;
>> +                    }
>> +                }
>> +            }
>> +        }
>> +
>> +        igt_fixture {
>> +            xe_for_each_gt(fd, gt) {
>> +                xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
>> +                xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>> +            }
>> +            free(stash_min);
>> +            free(stash_max);
>> +        }
>> +    }
>> +
>>       igt_fixture {
>>           close(fd);
>>       }
>

✓ i915.CI.BAT: success for Add PMU test for GT frequency

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2790 bytes --]

== Series Details ==

Series: Add PMU test for GT frequency
URL   : https://patchwork.freedesktop.org/series/147350/
State : success

== Summary ==

CI Bug Log - changes from IGT_8310 -> IGTPW_12935
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/index.html

Participating hosts (44 -> 43)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_12935 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_selftest@live@sanitycheck:
    - fi-kbl-7567u:       [DMESG-WARN][1] ([i915#13735]) -> [PASS][2] +81 other tests pass
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html

  * igt@i915_selftest@live@workarounds:
    - bat-arlh-3:         [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/bat-arlh-3/igt@i915_selftest@live@workarounds.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/bat-arlh-3/igt@i915_selftest@live@workarounds.html
    - bat-dg2-11:         [DMESG-FAIL][5] ([i915#12061]) -> [PASS][6] +1 other test pass
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/bat-dg2-11/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/bat-dg2-11/igt@i915_selftest@live@workarounds.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - fi-kbl-7567u:       [DMESG-WARN][7] ([i915#13735] / [i915#180]) -> [PASS][8] +53 other tests pass
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8310 -> IGTPW_12935

  CI-20190529: 20190529
  CI_DRM_16377: a33da369e8cde6c7208381a592866cd61f1ce188 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_12935: 2a12cf4e5884b584a568c0a75e4546e1d95672a1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8310: 4b22256d016daa2f133092b62c03230ff121a3fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/index.html

[-- Attachment #2: Type: text/html, Size: 3599 bytes --]

✓ Xe.CI.BAT: success for Add PMU test for GT frequency

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4220 bytes --]

== Series Details ==

Series: Add PMU test for GT frequency
URL   : https://patchwork.freedesktop.org/series/147350/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8310_BAT -> XEIGTPW_12935_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_12935_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_gt_freq@freq_fixed_idle:
    - bat-adlp-vf:        NOTRUN -> [SKIP][1] ([Intel XE#2464]) +2 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_gt_freq@freq_fixed_idle.html

  * igt@xe_live_ktest@xe_bo:
    - bat-adlp-vf:        NOTRUN -> [SKIP][2] ([Intel XE#2229] / [Intel XE#455]) +2 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html

  * igt@xe_live_ktest@xe_migrate:
    - bat-adlp-vf:        NOTRUN -> [ABORT][3] ([Intel XE#4508]) +1 other test abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html

  * igt@xe_mmap@vram:
    - bat-adlp-vf:        NOTRUN -> [SKIP][4] ([Intel XE#1008])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xe2:
    - bat-adlp-vf:        NOTRUN -> [SKIP][5] ([Intel XE#977])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-adlp-vf:        NOTRUN -> [SKIP][6] ([Intel XE#2838] / [Intel XE#979])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-adlp-vf:        NOTRUN -> [SKIP][7] ([Intel XE#979])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm_residency@gt-c6-on-idle:
    - bat-adlp-vf:        NOTRUN -> [SKIP][8] ([Intel XE#2468])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_pm_residency@gt-c6-on-idle.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - bat-adlp-vf:        NOTRUN -> [SKIP][9] ([Intel XE#3342])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_sriov_flr@flr-vf1-clear.html

  
#### Possible fixes ####

  * igt@xe_exec_balancer@twice-virtual-userptr-rebind:
    - bat-adlp-vf:        [ABORT][10] ([Intel XE#3970]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/bat-adlp-vf/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/bat-adlp-vf/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html

  
  [Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2464]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2464
  [Intel XE#2468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2468
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4508
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979


Build changes
-------------

  * IGT: IGT_8310 -> IGTPW_12935

  IGTPW_12935: 2a12cf4e5884b584a568c0a75e4546e1d95672a1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8310: 4b22256d016daa2f133092b62c03230ff121a3fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-2911-a33da369e8cde6c7208381a592866cd61f1ce188: a33da369e8cde6c7208381a592866cd61f1ce188

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/index.html

[-- Attachment #2: Type: text/html, Size: 5064 bytes --]

✗ i915.CI.Full: failure for Add PMU test for GT frequency

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 139322 bytes --]

== Series Details ==

Series: Add PMU test for GT frequency
URL   : https://patchwork.freedesktop.org/series/147350/
State : failure

== Summary ==

CI Bug Log - changes from IGT_8310_full -> IGTPW_12935_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_12935_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_12935_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/index.html

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_12935_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
    - shard-snb:          [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb5/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb4/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-dg2-9:        NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
    - shard-mtlp:         NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][6] -> [TIMEOUT][7] +1 other test timeout
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb4/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-rkl:          [PASS][8] -> [INCOMPLETE][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@kms_vblank@ts-continuation-suspend.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][10]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html

  
New tests
---------

  New tests have been introduced between IGT_8310_full and IGTPW_12935_full:

### New IGT tests (15) ###

  * igt@kms_cursor_crc@async-cursor-crc-position-change@pipe-a-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.50] s

  * igt@kms_cursor_crc@async-cursor-crc-position-change@pipe-c-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.32] s

  * igt@kms_cursor_crc@async-cursor-crc-position-change@pipe-d-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.33] s

  * igt@kms_cursor_crc@async-cursor-crc-position-change@pipe-d-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.34] s

  * igt@kms_cursor_edge_walk@128x128-right-edge@pipe-b-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [3.61] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@ab-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.68] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@ac-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.63] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible@bc-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.60] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@ab-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.69] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@ac-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.66] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@bc-hdmi-a1-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.64] s

  * igt@kms_flip@flip-vs-dpms-on-nop@a-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [1.03] s

  * igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.98] s

  * igt@kms_flip@flip-vs-dpms-on-nop@c-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.98] s

  * igt@kms_flip@flip-vs-dpms-on-nop@d-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [1.00] s

  

Known issues
------------

  Here are the changes found in IGTPW_12935_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-keep-cache:
    - shard-dg2:          NOTRUN -> [SKIP][11] ([i915#8411])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@api_intel_bb@object-reloc-keep-cache.html
    - shard-dg1:          NOTRUN -> [SKIP][12] ([i915#8411])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-14/igt@api_intel_bb@object-reloc-keep-cache.html
    - shard-mtlp:         NOTRUN -> [SKIP][13] ([i915#8411])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@api_intel_bb@object-reloc-keep-cache.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-dg2-9:        NOTRUN -> [SKIP][14] ([i915#8411])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@api_intel_bb@object-reloc-purge-cache.html
    - shard-rkl:          NOTRUN -> [SKIP][15] ([i915#8411])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@debugfs_test@basic-hwmon:
    - shard-mtlp:         NOTRUN -> [SKIP][16] ([i915#9318])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@debugfs_test@basic-hwmon.html
    - shard-rkl:          NOTRUN -> [SKIP][17] ([i915#9318])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@debugfs_test@basic-hwmon.html
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#9318])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@debugfs_test@basic-hwmon.html

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][19] ([i915#11078])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@device_reset@cold-reset-bound.html

  * igt@drm_fdinfo@busy-hang@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][20] ([i915#8414]) +14 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@drm_fdinfo@busy-hang@rcs0.html

  * igt@drm_fdinfo@virtual-busy:
    - shard-dg2:          NOTRUN -> [SKIP][21] ([i915#8414])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-1/igt@drm_fdinfo@virtual-busy.html

  * igt@drm_fdinfo@virtual-busy-hang:
    - shard-dg2-9:        NOTRUN -> [SKIP][22] ([i915#8414])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@drm_fdinfo@virtual-busy-hang.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#3555] / [i915#9323])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
    - shard-tglu:         NOTRUN -> [SKIP][24] ([i915#3555] / [i915#9323])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@gem_ccs@block-copy-compressed.html
    - shard-mtlp:         NOTRUN -> [SKIP][25] ([i915#3555] / [i915#9323])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-mtlp:         NOTRUN -> [SKIP][26] ([i915#13008])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume:
    - shard-rkl:          NOTRUN -> [SKIP][27] ([i915#9323])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_ccs@suspend-resume.html
    - shard-dg1:          NOTRUN -> [SKIP][28] ([i915#9323])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@gem_ccs@suspend-resume.html
    - shard-tglu:         NOTRUN -> [SKIP][29] ([i915#9323])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@gem_ccs@suspend-resume.html
    - shard-mtlp:         NOTRUN -> [SKIP][30] ([i915#9323])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@gem_ccs@suspend-resume.html
    - shard-dg2-9:        NOTRUN -> [INCOMPLETE][31] ([i915#13356])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_ccs@suspend-resume.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2-9:        NOTRUN -> [INCOMPLETE][32] ([i915#12392])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-tglu-1:       NOTRUN -> [SKIP][33] ([i915#7697])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-dg2-9:        NOTRUN -> [SKIP][34] ([i915#7697])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_close_race@multigpu-basic-threads.html
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#7697]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@gem_close_race@multigpu-basic-threads.html
    - shard-tglu:         NOTRUN -> [SKIP][36] ([i915#7697])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          NOTRUN -> [ABORT][37] ([i915#13427])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_persistence@hang:
    - shard-mtlp:         NOTRUN -> [SKIP][38] ([i915#8555]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@gem_ctx_persistence@hang.html
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#8555])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@gem_ctx_persistence@hang.html
    - shard-snb:          NOTRUN -> [SKIP][40] ([i915#1099])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb2/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_persistence@heartbeat-stop:
    - shard-dg1:          NOTRUN -> [SKIP][41] ([i915#8555]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-14/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#280])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-rkl:          NOTRUN -> [SKIP][43] ([i915#280]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_ctx_sseu@invalid-sseu.html
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#280])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-tglu:         NOTRUN -> [SKIP][45] ([i915#280]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          [PASS][46] -> [ABORT][47] ([i915#10030] / [i915#7975] / [i915#8213])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-2/igt@gem_eio@hibernate.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-1/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-tglu:         [PASS][48] -> [DMESG-WARN][49] ([i915#13363])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-5/igt@gem_eio@kms.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@hog:
    - shard-dg2-9:        NOTRUN -> [SKIP][50] ([i915#4812])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_exec_balancer@hog.html

  * igt@gem_exec_balancer@parallel-keep-submit-fence:
    - shard-rkl:          NOTRUN -> [SKIP][51] ([i915#4525])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_exec_balancer@parallel-keep-submit-fence.html
    - shard-tglu-1:       NOTRUN -> [SKIP][52] ([i915#4525])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gem_exec_balancer@parallel-keep-submit-fence.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-rkl:          NOTRUN -> [SKIP][53] ([i915#6334]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_capture@capture@vecs0-smem:
    - shard-mtlp:         NOTRUN -> [FAIL][54] ([i915#11965])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@gem_exec_capture@capture@vecs0-smem.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-mtlp:         NOTRUN -> [SKIP][55] ([i915#3711])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_flush@basic-wb-set-default:
    - shard-dg2-9:        NOTRUN -> [SKIP][56] ([i915#3539] / [i915#4852])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_exec_flush@basic-wb-set-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt:
    - shard-dg2-9:        NOTRUN -> [SKIP][57] ([i915#3281])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_exec_reloc@basic-cpu-gtt.html

  * igt@gem_exec_reloc@basic-cpu-read-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][58] ([i915#3281]) +6 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_exec_reloc@basic-cpu-read-noreloc.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#3281]) +10 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_reloc@basic-write-wc-active:
    - shard-dg2:          NOTRUN -> [SKIP][60] ([i915#3281]) +5 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@gem_exec_reloc@basic-write-wc-active.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain:
    - shard-mtlp:         NOTRUN -> [SKIP][61] ([i915#4537] / [i915#4812])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_exec_schedule@preempt-queue-contexts-chain.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          NOTRUN -> [SKIP][62] ([i915#7276])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@gem_exec_schedule@semaphore-power.html
    - shard-dg2-9:        NOTRUN -> [SKIP][63] ([i915#4537] / [i915#4812])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-rkl:          [PASS][64] -> [INCOMPLETE][65] ([i915#13304]) +1 other test incomplete
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@gem_exec_suspend@basic-s0.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-3/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-rkl:          NOTRUN -> [ABORT][66] ([i915#7975] / [i915#8213]) +1 other test abort
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-dg2:          NOTRUN -> [SKIP][67] ([i915#4860]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_fence_thrash@bo-write-verify-none:
    - shard-mtlp:         NOTRUN -> [SKIP][68] ([i915#4860]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@gem_fence_thrash@bo-write-verify-none.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          NOTRUN -> [SKIP][69] ([i915#2190])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-3/igt@gem_huc_copy@huc-copy.html
    - shard-glk:          NOTRUN -> [SKIP][70] ([i915#2190])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-glk:          NOTRUN -> [SKIP][71] ([i915#4613]) +5 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk9/igt@gem_lmem_swapping@massive-random.html
    - shard-tglu-1:       NOTRUN -> [SKIP][72] ([i915#4613])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#4613]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-tglu:         NOTRUN -> [SKIP][74] ([i915#4613]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@gem_lmem_swapping@smem-oom.html
    - shard-mtlp:         NOTRUN -> [SKIP][75] ([i915#4613]) +4 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          NOTRUN -> [DMESG-WARN][76] ([i915#5493]) +1 other test dmesg-warn
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-13/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_madvise@dontneed-before-exec:
    - shard-dg2-9:        NOTRUN -> [SKIP][77] ([i915#3282])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_madvise@dontneed-before-exec.html

  * igt@gem_media_fill@media-fill:
    - shard-mtlp:         NOTRUN -> [SKIP][78] ([i915#8289])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_media_fill@media-fill.html

  * igt@gem_media_vme:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#284])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@gem_media_vme.html
    - shard-tglu-1:       NOTRUN -> [SKIP][80] ([i915#284])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gem_media_vme.html

  * igt@gem_mmap_gtt@basic-write-read-distinct:
    - shard-mtlp:         NOTRUN -> [SKIP][81] ([i915#4077]) +9 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@gem_mmap_gtt@basic-write-read-distinct.html

  * igt@gem_mmap_gtt@isolation:
    - shard-dg2-9:        NOTRUN -> [SKIP][82] ([i915#4077]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_mmap_gtt@isolation.html

  * igt@gem_mmap_gtt@zero-extend:
    - shard-dg2:          NOTRUN -> [SKIP][83] ([i915#4077]) +5 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@gem_mmap_gtt@zero-extend.html
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#4077]) +3 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@gem_mmap_gtt@zero-extend.html

  * igt@gem_mmap_wc@fault-concurrent:
    - shard-dg2-9:        NOTRUN -> [SKIP][85] ([i915#4083])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_mmap_wc@fault-concurrent.html

  * igt@gem_mmap_wc@read:
    - shard-dg1:          NOTRUN -> [SKIP][86] ([i915#4083])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@gem_mmap_wc@read.html

  * igt@gem_mmap_wc@read-write:
    - shard-mtlp:         NOTRUN -> [SKIP][87] ([i915#4083]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@gem_mmap_wc@read-write.html

  * igt@gem_mmap_wc@write-wc-read-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][88] ([i915#4083]) +5 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@gem_mmap_wc@write-wc-read-gtt.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#3282]) +4 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-dg1:          NOTRUN -> [SKIP][90] ([i915#3282]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_pread@snoop:
    - shard-mtlp:         NOTRUN -> [SKIP][91] ([i915#3282]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@gem_pread@snoop.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-glk:          NOTRUN -> [WARN][92] ([i915#2658])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk9/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-regular-context-2:
    - shard-dg2-9:        NOTRUN -> [SKIP][93] ([i915#4270])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_pxp@create-regular-context-2.html

  * igt@gem_pxp@create-valid-protected-context:
    - shard-rkl:          [PASS][94] -> [TIMEOUT][95] ([i915#12964])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@gem_pxp@create-valid-protected-context.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@gem_pxp@create-valid-protected-context.html
    - shard-dg1:          NOTRUN -> [SKIP][96] ([i915#4270]) +1 other test skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-14/igt@gem_pxp@create-valid-protected-context.html

  * igt@gem_pxp@display-protected-crc:
    - shard-dg2:          NOTRUN -> [SKIP][97] ([i915#4270]) +2 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-4/igt@gem_pxp@display-protected-crc.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-rkl:          NOTRUN -> [TIMEOUT][98] ([i915#12917] / [i915#12964])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-rkl:          [PASS][99] -> [TIMEOUT][100] ([i915#12917] / [i915#12964]) +1 other test timeout
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled:
    - shard-dg2-9:        NOTRUN -> [SKIP][101] ([i915#5190] / [i915#8428]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([i915#5190] / [i915#8428]) +1 other test skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_render_copy@y-tiled-to-vebox-x-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][103] ([i915#8428]) +5 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_render_copy@y-tiled-to-vebox-x-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#4079]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@gem_render_tiled_blits@basic.html

  * igt@gem_set_tiling_vs_gtt:
    - shard-dg1:          NOTRUN -> [SKIP][105] ([i915#4079])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@gem_set_tiling_vs_gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][106] ([i915#4079]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_set_tiling_vs_gtt.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#3282]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-rkl:          NOTRUN -> [FAIL][108] ([i915#12941])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-rkl:          NOTRUN -> [SKIP][109] ([i915#3297]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][110] ([i915#3297]) +3 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-5/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-dg2-9:        NOTRUN -> [SKIP][111] ([i915#3297])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-mtlp:         NOTRUN -> [SKIP][112] ([i915#3297]) +2 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@sd-probe:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#3297] / [i915#4958])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@gem_userptr_blits@sd-probe.html
    - shard-dg1:          NOTRUN -> [SKIP][114] ([i915#3297] / [i915#4958])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@gem_userptr_blits@sd-probe.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg2:          NOTRUN -> [SKIP][115] ([i915#3297])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@gem_userptr_blits@unsync-overlap.html
    - shard-tglu-1:       NOTRUN -> [SKIP][116] ([i915#3297])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_workarounds@suspend-resume:
    - shard-glk:          NOTRUN -> [INCOMPLETE][117] ([i915#13356])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk1/igt@gem_workarounds@suspend-resume.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#2527])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-12/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@basic-rejected-ctx-param:
    - shard-dg2-9:        NOTRUN -> [SKIP][119] ([i915#2856]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@gen9_exec_parse@basic-rejected-ctx-param.html

  * igt@gen9_exec_parse@bb-large:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#2856])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-start-cmd:
    - shard-mtlp:         NOTRUN -> [SKIP][121] ([i915#2856]) +1 other test skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@gen9_exec_parse@bb-start-cmd.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglu-1:       NOTRUN -> [SKIP][122] ([i915#2527] / [i915#2856])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@gen9_exec_parse@unaligned-jump.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#2527]) +2 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@gen9_exec_parse@valid-registers.html
    - shard-tglu:         NOTRUN -> [SKIP][124] ([i915#2527] / [i915#2856]) +2 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_hangman@gt-error-state-capture:
    - shard-mtlp:         [PASS][125] -> [ABORT][126] ([i915#13193]) +1 other test abort
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-1/igt@i915_hangman@gt-error-state-capture.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@i915_hangman@gt-error-state-capture.html

  * igt@i915_module_load@resize-bar:
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([i915#6412])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-tglu:         NOTRUN -> [SKIP][128] ([i915#8399])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
    - shard-tglu-1:       NOTRUN -> [WARN][129] ([i915#13790] / [i915#2681]) +4 other tests warn
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
    - shard-dg1:          [PASS][130] -> [FAIL][131] ([i915#3591]) +1 other test fail
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html

  * igt@i915_pm_rps@min-max-config-loaded:
    - shard-dg2:          NOTRUN -> [SKIP][132] ([i915#11681] / [i915#6621])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@i915_pm_rps@min-max-config-loaded.html

  * igt@i915_pm_rps@reset:
    - shard-mtlp:         NOTRUN -> [FAIL][133] ([i915#8346])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@i915_pm_rps@reset.html

  * igt@i915_pm_rps@thresholds-idle:
    - shard-mtlp:         NOTRUN -> [SKIP][134] ([i915#11681])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@i915_pm_rps@thresholds-idle.html
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#11681])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@i915_pm_rps@thresholds-idle.html
    - shard-dg1:          NOTRUN -> [SKIP][136] ([i915#11681])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@i915_pm_rps@thresholds-idle.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-mtlp:         NOTRUN -> [SKIP][137] ([i915#6188])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][138] ([i915#5723])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [PASS][139] -> [DMESG-FAIL][140] ([i915#12061]) +1 other test dmesg-fail
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-8/igt@i915_selftest@live@workarounds.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-glk:          NOTRUN -> [INCOMPLETE][141] ([i915#4817])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk8/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][142] ([i915#4212]) +2 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - shard-dg2-9:        NOTRUN -> [SKIP][143] ([i915#4212])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#4212])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-1-4-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][145] ([i915#8709]) +7 other tests skip
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-1-4-mc-ccs.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][146] ([i915#8709]) +2 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-4-y-rc-ccs-cc:
    - shard-dg1:          NOTRUN -> [SKIP][147] ([i915#8709]) +3 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-4-y-rc-ccs-cc.html

  * igt@kms_async_flips@invalid-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([i915#12967] / [i915#6228])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_async_flips@invalid-async-flip.html

  * igt@kms_async_flips@test-cursor:
    - shard-mtlp:         NOTRUN -> [SKIP][149] ([i915#10333])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_async_flips@test-cursor.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-dg2-9:        NOTRUN -> [SKIP][150] ([i915#9531])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
    - shard-dg1:          NOTRUN -> [SKIP][151] ([i915#9531])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
    - shard-tglu:         NOTRUN -> [SKIP][152] ([i915#9531])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-mtlp:         NOTRUN -> [SKIP][153] ([i915#1769] / [i915#3555])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-rkl:          NOTRUN -> [SKIP][154] ([i915#1769] / [i915#3555])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][155] ([i915#1769])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk9/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][156] -> [FAIL][157] ([i915#11808]) +1 other test fail
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-6/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][158] +5 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-tglu-1:       NOTRUN -> [SKIP][159] ([i915#5286]) +3 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-tglu:         NOTRUN -> [SKIP][160] ([i915#5286]) +5 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#5286]) +3 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][162] +18 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][163] ([i915#3638]) +5 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-9:        NOTRUN -> [SKIP][164] +3 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-dg2-9:        NOTRUN -> [SKIP][165] ([i915#4538] / [i915#5190]) +2 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#4538] / [i915#5190]) +5 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][167] +24 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][168] ([i915#4538])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2-9:        NOTRUN -> [SKIP][169] ([i915#5190])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-mtlp:         NOTRUN -> [SKIP][170] ([i915#6187]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][171] ([i915#6095]) +39 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc@pipe-c-edp-1.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
    - shard-glk:          NOTRUN -> [SKIP][172] +444 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk1/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#12313]) +2 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#10307] / [i915#6095]) +175 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][175] ([i915#6095]) +34 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#6095]) +97 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][177] ([i915#10307] / [i915#10434] / [i915#6095]) +4 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][178] ([i915#12805])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
    - shard-dg1:          NOTRUN -> [SKIP][179] ([i915#12805])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][180] ([i915#12805])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
    - shard-mtlp:         NOTRUN -> [SKIP][181] ([i915#12805]) +1 other test skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][182] ([i915#6095]) +74 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-2:
    - shard-dg2-9:        NOTRUN -> [SKIP][183] ([i915#6095]) +4 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][184] ([i915#6095]) +17 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-1/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][185] ([i915#12313])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-12/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][186] ([i915#12313]) +1 other test skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#6095]) +119 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-dg2-9:        NOTRUN -> [SKIP][188] ([i915#10307] / [i915#6095]) +24 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][189] ([i915#3742])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-tglu:         NOTRUN -> [SKIP][190] ([i915#3742])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@mode-transition@pipe-b-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([i915#13781]) +3 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_cdclk@mode-transition@pipe-b-dp-3.html

  * igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][192] ([i915#13783]) +3 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3.html

  * igt@kms_chamelium_audio@dp-audio-edid:
    - shard-tglu-1:       NOTRUN -> [SKIP][193] ([i915#11151] / [i915#7828]) +3 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_chamelium_audio@dp-audio-edid.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#11151] / [i915#7828]) +6 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html
    - shard-dg2-9:        NOTRUN -> [SKIP][195] ([i915#11151] / [i915#7828]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#11151] / [i915#7828]) +5 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([i915#11151] / [i915#7828]) +9 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][198] ([i915#11151] / [i915#7828]) +1 other test skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-mtlp:         NOTRUN -> [SKIP][199] ([i915#11151] / [i915#7828]) +7 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_color@deep-color:
    - shard-dg2:          NOTRUN -> [SKIP][200] ([i915#3555]) +3 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_color@deep-color.html
    - shard-tglu:         NOTRUN -> [SKIP][201] ([i915#3555] / [i915#9979])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_color@deep-color.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-mtlp:         NOTRUN -> [SKIP][202] ([i915#6944] / [i915#9424]) +1 other test skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][203] ([i915#7173])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html

  * igt@kms_content_protection@content-type-change:
    - shard-tglu:         NOTRUN -> [SKIP][204] ([i915#6944] / [i915#9424]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-6/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([i915#3116]) +1 other test skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg2-9:        NOTRUN -> [SKIP][206] ([i915#3299])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-1:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#9424])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@srm:
    - shard-tglu-1:       NOTRUN -> [SKIP][208] ([i915#6944] / [i915#7116] / [i915#7118])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-mtlp:         NOTRUN -> [SKIP][209] ([i915#3555] / [i915#6944] / [i915#9424])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-rkl:          NOTRUN -> [SKIP][210] ([i915#7118] / [i915#9424])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_content_protection@uevent.html
    - shard-tglu:         NOTRUN -> [SKIP][211] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_content_protection@uevent.html

  * igt@kms_content_protection@uevent@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][212] ([i915#1339] / [i915#7173])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_content_protection@uevent@pipe-a-dp-3.html

  * igt@kms_cursor_crc@cursor-offscreen-256x256:
    - shard-rkl:          [PASS][213] -> [DMESG-WARN][214] ([i915#12917] / [i915#12964])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@kms_cursor_crc@cursor-offscreen-256x256.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-256x256.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-mtlp:         NOTRUN -> [SKIP][215] ([i915#13049]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85:
    - shard-tglu:         NOTRUN -> [FAIL][216] ([i915#13566]) +1 other test fail
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_cursor_crc@cursor-onscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][217] ([i915#3555]) +5 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][218] -> [FAIL][219] ([i915#13566]) +3 other tests fail
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-6/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-9/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-2:
    - shard-rkl:          [PASS][220] -> [FAIL][221] ([i915#13566]) +3 other tests fail
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-1/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-2.html
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-2.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-dg2:          NOTRUN -> [SKIP][222] ([i915#13049]) +2 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_cursor_crc@cursor-random-512x512.html
    - shard-dg1:          NOTRUN -> [SKIP][223] ([i915#13049])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_cursor_crc@cursor-random-512x512.html
    - shard-tglu:         NOTRUN -> [SKIP][224] ([i915#13049])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-mtlp:         NOTRUN -> [SKIP][225] ([i915#3555] / [i915#8814]) +4 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][226] ([i915#13049])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-mtlp:         NOTRUN -> [SKIP][227] ([i915#8814]) +1 other test skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg2-9:        NOTRUN -> [SKIP][228] ([i915#3555]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [FAIL][229] ([i915#13566]) +1 other test fail
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][230] ([i915#13566]) +2 other tests fail
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-2.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][231] ([i915#9809]) +3 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-tglu-1:       NOTRUN -> [SKIP][232] ([i915#4103]) +1 other test skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][233] ([i915#4103]) +1 other test skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][234] ([i915#13046] / [i915#5354]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-mtlp:         NOTRUN -> [SKIP][235] ([i915#4213])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][236] ([i915#9723]) +1 other test skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg2:          NOTRUN -> [SKIP][237] ([i915#13691])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#3804])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          NOTRUN -> [SKIP][239] ([i915#1257])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_dp_aux_dev.html
    - shard-rkl:          NOTRUN -> [SKIP][240] ([i915#1257])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_dp_aux_dev.html
    - shard-dg1:          NOTRUN -> [SKIP][241] ([i915#1257])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_dp_aux_dev.html
    - shard-tglu:         NOTRUN -> [SKIP][242] ([i915#1257])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_dp_aux_dev.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][243] ([i915#13749])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-dg2-9:        NOTRUN -> [SKIP][244] ([i915#13748]) +1 other test skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-mtlp:         NOTRUN -> [SKIP][245] ([i915#13749]) +1 other test skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-tglu-1:       NOTRUN -> [SKIP][246] ([i915#13707])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][247] ([i915#3555] / [i915#3840])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][248] ([i915#3555] / [i915#3840])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@kms_dsc@dsc-with-bpc.html
    - shard-dg1:          NOTRUN -> [SKIP][249] ([i915#3555] / [i915#3840])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-12/igt@kms_dsc@dsc-with-bpc.html
    - shard-tglu:         NOTRUN -> [SKIP][250] ([i915#3555] / [i915#3840])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-5/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][251] ([i915#3555] / [i915#3840]) +1 other test skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][252] ([i915#9878])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk2/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][253] ([i915#3469])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-3x:
    - shard-dg2:          NOTRUN -> [SKIP][254] ([i915#1839])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg2:          NOTRUN -> [SKIP][255] ([i915#9337])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-4/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr2:
    - shard-tglu:         NOTRUN -> [SKIP][256] ([i915#658])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_feature_discovery@psr2.html
    - shard-dg2-9:        NOTRUN -> [SKIP][257] ([i915#658])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-rkl:          NOTRUN -> [SKIP][258] ([i915#9934]) +4 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][259] ([i915#3637]) +4 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-9/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-dg1:          NOTRUN -> [SKIP][260] ([i915#9934])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-12/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][261] ([i915#3637]) +5 other tests skip
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-dg2:          NOTRUN -> [SKIP][262] ([i915#9934])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][263] ([i915#4839])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk4/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-dg2-9:        NOTRUN -> [SKIP][264] ([i915#9934]) +3 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][265] -> [FAIL][266] ([i915#13734]) +3 other tests fail
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb4/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb7/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-tglu-1:       NOTRUN -> [SKIP][267] ([i915#3637]) +4 other tests skip
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-dg1:          [PASS][268] -> [FAIL][269] ([i915#13027]) +1 other test fail
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-15/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-16/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-fences:
    - shard-dg2:          NOTRUN -> [SKIP][270] ([i915#8381])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-1/igt@kms_flip@flip-vs-fences.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][271] ([i915#12745] / [i915#4839]) +1 other test incomplete
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][272] ([i915#12745])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-tglu:         [PASS][273] -> [FAIL][274] ([i915#13734]) +7 other tests fail
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@plain-flip-ts-check@b-hdmi-a2:
    - shard-rkl:          [PASS][275] -> [FAIL][276] ([i915#13734]) +2 other tests fail
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@kms_flip@plain-flip-ts-check@b-hdmi-a2.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_flip@plain-flip-ts-check@b-hdmi-a2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-dg2-9:        NOTRUN -> [SKIP][277] ([i915#2672] / [i915#3555])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
    - shard-dg2-9:        NOTRUN -> [SKIP][278] ([i915#2672])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-dg2:          NOTRUN -> [SKIP][279] ([i915#2672] / [i915#3555])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][280] ([i915#2672]) +1 other test skip
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][281] ([i915#2672] / [i915#3555] / [i915#8813]) +8 other tests skip
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][282] ([i915#2587] / [i915#2672] / [i915#3555])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][283] ([i915#2672] / [i915#3555]) +1 other test skip
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][284] ([i915#2587] / [i915#2672]) +1 other test skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][285] ([i915#3555] / [i915#8810] / [i915#8813])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][286] ([i915#3555] / [i915#8810])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][287] ([i915#2672] / [i915#3555]) +2 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
    - shard-tglu:         NOTRUN -> [SKIP][288] ([i915#2672] / [i915#3555]) +1 other test skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][289] ([i915#2672]) +2 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
    - shard-tglu:         NOTRUN -> [SKIP][290] ([i915#2587] / [i915#2672]) +2 other tests skip
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][291] ([i915#2672] / [i915#8813]) +2 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][292] ([i915#2672] / [i915#3555] / [i915#5190])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][293] ([i915#8708]) +9 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-dg2-9:        NOTRUN -> [SKIP][294] ([i915#8708]) +4 other tests skip
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-tglu-1:       NOTRUN -> [SKIP][295] +36 other tests skip
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-dg1:          NOTRUN -> [SKIP][296] +9 other tests skip
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][297] ([i915#1825]) +29 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-snb:          [PASS][298] -> [SKIP][299] +3 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-dg2:          [PASS][300] -> [FAIL][301] ([i915#6880]) +1 other test fail
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][302] ([i915#5439])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
    - shard-dg2-9:        NOTRUN -> [SKIP][303] ([i915#3458]) +4 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt:
    - shard-dg2-9:        NOTRUN -> [SKIP][304] ([i915#5354]) +6 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][305] ([i915#5354]) +16 other tests skip
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][306] ([i915#1825]) +43 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][307] ([i915#3023]) +26 other tests skip
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][308] ([i915#3458]) +9 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg1:          NOTRUN -> [SKIP][309] ([i915#3458]) +5 other tests skip
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-rkl:          NOTRUN -> [SKIP][310] ([i915#9766])
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
    - shard-tglu:         NOTRUN -> [SKIP][311] ([i915#9766])
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-9/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][312] ([i915#8708]) +8 other tests skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglu:         NOTRUN -> [SKIP][313] +80 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][314] ([i915#8708]) +7 other tests skip
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch:
    - shard-dg1:          NOTRUN -> [SKIP][315] ([i915#3555] / [i915#8228])
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_hdr@bpc-switch.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-tglu:         NOTRUN -> [SKIP][316] ([i915#12713])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-9:        NOTRUN -> [SKIP][317] ([i915#3555] / [i915#8228])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-dg2:          [PASS][318] -> [SKIP][319] ([i915#3555] / [i915#8228]) +1 other test skip
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-10/igt@kms_hdr@static-swap.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-5/igt@kms_hdr@static-swap.html
    - shard-tglu-1:       NOTRUN -> [SKIP][320] ([i915#3555] / [i915#8228])
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle:
    - shard-mtlp:         NOTRUN -> [SKIP][321] ([i915#3555] / [i915#8228]) +1 other test skip
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-dg2-9:        NOTRUN -> [SKIP][322] ([i915#12388])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][323] ([i915#13688])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][324] ([i915#12339]) +1 other test skip
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-mtlp:         NOTRUN -> [SKIP][325] ([i915#10656])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][326] ([i915#12388])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][327] ([i915#10656])
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][328] ([i915#12339])
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-6/igt@kms_joiner@invalid-modeset-ultra-joiner.html
    - shard-tglu-1:       NOTRUN -> [SKIP][329] ([i915#12339])
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          NOTRUN -> [SKIP][330] ([i915#4816])
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b:
    - shard-glk:          NOTRUN -> [INCOMPLETE][331] ([i915#13026])
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html

  * igt@kms_plane_lowres@tiling-x:
    - shard-mtlp:         NOTRUN -> [SKIP][332] ([i915#11614] / [i915#3582]) +1 other test skip
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_plane_lowres@tiling-x.html

  * igt@kms_plane_lowres@tiling-x@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][333] ([i915#10226] / [i915#11614] / [i915#3582]) +2 other tests skip
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@kms_plane_lowres@tiling-x@pipe-c-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-dg2-9:        NOTRUN -> [SKIP][334] ([i915#13958])
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-rkl:          NOTRUN -> [SKIP][335] ([i915#13958])
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-tglu:         NOTRUN -> [SKIP][336] ([i915#13958])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-mtlp:         NOTRUN -> [SKIP][337] ([i915#13958])
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][338] ([i915#3555]) +7 other tests skip
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_plane_multiple@tiling-yf.html
    - shard-dg1:          NOTRUN -> [SKIP][339] ([i915#3555]) +2 other tests skip
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-14/igt@kms_plane_multiple@tiling-yf.html
    - shard-tglu:         NOTRUN -> [SKIP][340] ([i915#3555]) +5 other tests skip
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_plane_multiple@tiling-yf.html
    - shard-mtlp:         NOTRUN -> [SKIP][341] ([i915#3555] / [i915#8806])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@kms_plane_multiple@tiling-yf.html
    - shard-dg2:          NOTRUN -> [SKIP][342] ([i915#3555] / [i915#8806])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-rkl:          NOTRUN -> [SKIP][343] ([i915#6953])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][344] ([i915#12247]) +4 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-a:
    - shard-mtlp:         NOTRUN -> [SKIP][345] ([i915#12247]) +27 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-a.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
    - shard-rkl:          NOTRUN -> [SKIP][346] ([i915#12247]) +4 other tests skip
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25:
    - shard-mtlp:         NOTRUN -> [SKIP][347] ([i915#6953])
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
    - shard-mtlp:         NOTRUN -> [SKIP][348] ([i915#12247] / [i915#6953])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-tglu:         NOTRUN -> [SKIP][349] ([i915#9812])
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][350] ([i915#5354]) +1 other test skip
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2-9:        NOTRUN -> [SKIP][351] ([i915#9685])
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-mtlp:         NOTRUN -> [SKIP][352] ([i915#9292])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-rkl:          NOTRUN -> [SKIP][353] ([i915#3828])
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-tglu:         NOTRUN -> [SKIP][354] ([i915#3828])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-rkl:          [PASS][355] -> [FAIL][356] ([i915#9295])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-5/igt@kms_pm_dc@dc6-dpms.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_pm_dc@dc6-dpms.html
    - shard-mtlp:         NOTRUN -> [FAIL][357] ([i915#12913])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-dg2:          NOTRUN -> [SKIP][358] ([i915#9685])
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_pm_dc@dc6-psr.html
    - shard-rkl:          NOTRUN -> [SKIP][359] ([i915#9685]) +1 other test skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_pm_dc@dc6-psr.html
    - shard-dg1:          NOTRUN -> [SKIP][360] ([i915#9685])
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_pm_dc@dc6-psr.html
    - shard-tglu:         NOTRUN -> [SKIP][361] ([i915#9685])
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_pm_dc@dc6-psr.html
    - shard-mtlp:         NOTRUN -> [FAIL][362] ([i915#12912])
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-rkl:          NOTRUN -> [SKIP][363] ([i915#8430])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-3/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-rkl:          [PASS][364] -> [SKIP][365] ([i915#9519]) +1 other test skip
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-mtlp:         NOTRUN -> [SKIP][366] ([i915#9519])
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-1/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg2:          [PASS][367] -> [SKIP][368] ([i915#9519])
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][369] ([i915#6524])
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_prime@basic-modeset-hybrid.html
    - shard-tglu-1:       NOTRUN -> [SKIP][370] ([i915#6524])
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
    - shard-dg1:          NOTRUN -> [SKIP][371] ([i915#11520]) +1 other test skip
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-19/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-dg2-9:        NOTRUN -> [SKIP][372] ([i915#11520]) +2 other tests skip
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][373] ([i915#9808]) +2 other tests skip
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][374] ([i915#12316]) +10 other tests skip
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][375] ([i915#11520]) +2 other tests skip
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-glk:          NOTRUN -> [SKIP][376] ([i915#11520]) +10 other tests skip
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][377] ([i915#11520]) +8 other tests skip
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][378] ([i915#11520]) +5 other tests skip
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-5/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-snb:          NOTRUN -> [SKIP][379] ([i915#11520])
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb2/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][380] ([i915#11520]) +1 other test skip
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglu:         NOTRUN -> [SKIP][381] ([i915#9683])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-cursor-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][382] ([i915#1072] / [i915#9732]) +14 other tests skip
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-2/igt@kms_psr@fbc-pr-cursor-mmap-gtt.html

  * igt@kms_psr@fbc-psr2-cursor-blt:
    - shard-dg1:          NOTRUN -> [SKIP][383] ([i915#1072] / [i915#9732]) +8 other tests skip
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_psr@fbc-psr2-cursor-blt.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff:
    - shard-mtlp:         NOTRUN -> [SKIP][384] ([i915#9688]) +20 other tests skip
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-rkl:          NOTRUN -> [SKIP][385] ([i915#1072] / [i915#9732]) +24 other tests skip
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_psr@pr-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][386] ([i915#9732]) +25 other tests skip
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-6/igt@kms_psr@pr-dpms.html

  * igt@kms_psr@psr-primary-mmap-cpu:
    - shard-dg2-9:        NOTRUN -> [SKIP][387] ([i915#1072] / [i915#9732]) +4 other tests skip
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_psr@psr-primary-mmap-cpu.html

  * igt@kms_psr@psr-sprite-blt:
    - shard-snb:          NOTRUN -> [SKIP][388] +61 other tests skip
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb4/igt@kms_psr@psr-sprite-blt.html

  * igt@kms_psr@psr-sprite-mmap-gtt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][389] ([i915#4077] / [i915#9688]) +1 other test skip
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@kms_psr@psr-sprite-mmap-gtt@edp-1.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - shard-tglu-1:       NOTRUN -> [SKIP][390] ([i915#9732]) +7 other tests skip
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-mtlp:         NOTRUN -> [SKIP][391] ([i915#12755]) +2 other tests skip
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-2/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2:          NOTRUN -> [SKIP][392] ([i915#12755] / [i915#5190]) +1 other test skip
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-rkl:          NOTRUN -> [SKIP][393] ([i915#5289])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
    - shard-tglu:         NOTRUN -> [SKIP][394] ([i915#5289])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][395] ([i915#12755]) +1 other test skip
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-4/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg1:          [PASS][396] -> [DMESG-WARN][397] ([i915#4423])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-18/igt@kms_rotation_crc@sprite-rotation-90.html
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][398] ([i915#13179]) +1 other test abort
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_sequence@get-idle@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][399] ([i915#12964]) +17 other tests dmesg-warn
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_sequence@get-idle@pipe-b-hdmi-a-1.html

  * igt@kms_setmode@basic:
    - shard-snb:          [PASS][400] -> [FAIL][401] ([i915#5465]) +2 other tests fail
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb5/igt@kms_setmode@basic.html
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb2/igt@kms_setmode@basic.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-mtlp:         NOTRUN -> [SKIP][402] ([i915#3555] / [i915#8809]) +1 other test skip
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-glk:          NOTRUN -> [FAIL][403] ([i915#10959])
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2:          NOTRUN -> [SKIP][404] ([i915#8623])
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          NOTRUN -> [SKIP][405] ([i915#11920])
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@kms_vrr@lobf.html
    - shard-tglu-1:       NOTRUN -> [SKIP][406] ([i915#11920])
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_vrr@lobf.html
    - shard-mtlp:         NOTRUN -> [SKIP][407] ([i915#11920])
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-tglu:         NOTRUN -> [SKIP][408] ([i915#9906]) +1 other test skip
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-8/igt@kms_vrr@max-min.html

  * igt@kms_vrr@negative-basic:
    - shard-dg2:          [PASS][409] -> [SKIP][410] ([i915#3555] / [i915#9906])
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-10/igt@kms_vrr@negative-basic.html
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-8/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-dg2:          NOTRUN -> [SKIP][411] ([i915#9906])
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_vrr@seamless-rr-switch-virtual.html
    - shard-rkl:          NOTRUN -> [SKIP][412] ([i915#9906])
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-virtual.html
    - shard-dg1:          NOTRUN -> [SKIP][413] ([i915#9906])
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-14/igt@kms_vrr@seamless-rr-switch-virtual.html
    - shard-mtlp:         NOTRUN -> [SKIP][414] ([i915#8808] / [i915#9906])
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@kms_writeback@writeback-check-output:
    - shard-rkl:          NOTRUN -> [SKIP][415] ([i915#2437])
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-dg2-9:        NOTRUN -> [SKIP][416] ([i915#2437] / [i915#9412])
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-9/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-glk:          NOTRUN -> [SKIP][417] ([i915#2437]) +1 other test skip
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk5/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
    - shard-dg2:          NOTRUN -> [SKIP][418] ([i915#2437] / [i915#9412])
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-tglu:         NOTRUN -> [SKIP][419] ([i915#2437])
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-2/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-tglu-1:       NOTRUN -> [SKIP][420] ([i915#2437] / [i915#9412])
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-1/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@global-sseu-config:
    - shard-mtlp:         NOTRUN -> [SKIP][421] ([i915#7387])
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@perf@global-sseu-config.html

  * igt@perf@mi-rpc:
    - shard-rkl:          NOTRUN -> [SKIP][422] ([i915#2434])
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@perf@mi-rpc.html

  * igt@perf_pmu@busy-accuracy-50@vecs0:
    - shard-rkl:          [PASS][423] -> [DMESG-WARN][424] ([i915#12964]) +39 other tests dmesg-warn
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-4/igt@perf_pmu@busy-accuracy-50@vecs0.html
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@perf_pmu@busy-accuracy-50@vecs0.html

  * igt@perf_pmu@interrupts:
    - shard-rkl:          [PASS][425] -> [FAIL][426] ([i915#13977])
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@perf_pmu@interrupts.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@perf_pmu@interrupts.html

  * igt@perf_pmu@invalid-init:
    - shard-mtlp:         NOTRUN -> [FAIL][427] ([i915#13663])
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-3/igt@perf_pmu@invalid-init.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][428] ([i915#8516])
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-3/igt@perf_pmu@rc6-all-gts.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-tglu:         NOTRUN -> [SKIP][429] ([i915#8516])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@basic-fence-flip:
    - shard-dg1:          NOTRUN -> [SKIP][430] ([i915#3708])
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-13/igt@prime_vgem@basic-fence-flip.html
    - shard-dg2:          NOTRUN -> [SKIP][431] ([i915#3708])
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][432] ([i915#3708] / [i915#4077]) +1 other test skip
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@fence-read-hang:
    - shard-rkl:          NOTRUN -> [SKIP][433] ([i915#3708])
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-6/igt@prime_vgem@fence-read-hang.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-rkl:          NOTRUN -> [SKIP][434] ([i915#9917])
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@sriov_basic@bind-unbind-vf.html

  * igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-6:
    - shard-tglu:         NOTRUN -> [FAIL][435] ([i915#12910]) +9 other tests fail
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-4/igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-6.html

  * igt@sysfs_heartbeat_interval@nopreempt@vcs0:
    - shard-mtlp:         [PASS][436] -> [DMESG-WARN][437] ([i915#13723])
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-4/igt@sysfs_heartbeat_interval@nopreempt@vcs0.html
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-7/igt@sysfs_heartbeat_interval@nopreempt@vcs0.html

  
#### Possible fixes ####

  * igt@gem_eio@hibernate:
    - shard-tglu:         [ABORT][438] ([i915#10030] / [i915#7975] / [i915#8213]) -> [PASS][439]
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-10/igt@gem_eio@hibernate.html
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-4/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-dg2:          [FAIL][440] ([i915#5784]) -> [PASS][441]
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-8/igt@gem_eio@kms.html
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-3/igt@gem_eio@kms.html

  * igt@gem_eio@unwedge-stress:
    - shard-dg2:          [FAIL][442] ([i915#12714] / [i915#5784]) -> [PASS][443]
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-11/igt@gem_eio@unwedge-stress.html
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-5/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_capture@capture@bcs0-smem:
    - shard-mtlp:         [ABORT][444] -> [PASS][445]
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-5/igt@gem_exec_capture@capture@bcs0-smem.html
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@gem_exec_capture@capture@bcs0-smem.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-rkl:          [TIMEOUT][446] ([i915#12917] / [i915#12964]) -> [PASS][447] +2 other tests pass
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-5/igt@gem_pxp@protected-raw-src-copy-not-readible.html
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [ABORT][448] ([i915#5566]) -> [PASS][449]
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk2/igt@gen9_exec_parse@allowed-single.html
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk4/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_rpm@system-suspend:
    - shard-glk:          [INCOMPLETE][450] ([i915#12797]) -> [PASS][451]
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk8/igt@i915_pm_rpm@system-suspend.html
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk2/igt@i915_pm_rpm@system-suspend.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-mtlp:         [ABORT][452] ([i915#13193]) -> [PASS][453] +3 other tests pass
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-7/igt@i915_pm_rpm@system-suspend-devices.html
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-6/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@i915_selftest@live:
    - shard-rkl:          [DMESG-FAIL][454] ([i915#12964] / [i915#13550]) -> [PASS][455]
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@i915_selftest@live.html
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@i915_selftest@live.html

  * igt@i915_selftest@live@gt_pm:
    - shard-rkl:          [DMESG-FAIL][456] ([i915#13550]) -> [PASS][457]
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@i915_selftest@live@gt_pm.html
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-5/igt@i915_selftest@live@gt_pm.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-rkl:          [INCOMPLETE][458] ([i915#12796]) -> [PASS][459]
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
    - shard-rkl:          [FAIL][460] ([i915#13566]) -> [PASS][461] +2 other tests pass
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
    - shard-tglu:         [FAIL][462] ([i915#13566]) -> [PASS][463] +3 other tests pass
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-6/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-3/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-4:
    - shard-dg1:          [DMESG-WARN][464] ([i915#4423]) -> [PASS][465] +3 other tests pass
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-14/igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-4.html
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-4.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-snb:          [SKIP][466] -> [PASS][467]
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
    - shard-snb:          [INCOMPLETE][468] ([i915#10056]) -> [PASS][469]
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb7/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb5/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-rkl:          [FAIL][470] ([i915#2346]) -> [PASS][471]
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-5/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-1:
    - shard-snb:          [INCOMPLETE][472] -> [PASS][473] +1 other test pass
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb4/igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-1.html
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb5/igt@kms_dirtyfb@default-dirtyfb-ioctl@a-hdmi-a-1.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-vga1-hdmi-a1:
    - shard-snb:          [FAIL][474] ([i915#11832] / [i915#13734]) -> [PASS][475] +1 other test pass
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-snb7/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-vga1-hdmi-a1.html
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-snb4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
    - shard-rkl:          [FAIL][476] ([i915#13734]) -> [PASS][477] +2 other tests pass
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-5/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-dg2:          [FAIL][478] ([i915#6880]) -> [PASS][479]
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
    - shard-dg1:          [DMESG-WARN][480] ([i915#4391] / [i915#4423]) -> [PASS][481]
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-dg2:          [SKIP][482] ([i915#3555] / [i915#8228]) -> [PASS][483]
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-6/igt@kms_hdr@bpc-switch-suspend.html
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a:
    - shard-glk:          [INCOMPLETE][484] ([i915#13026]) -> [PASS][485]
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [SKIP][486] ([i915#4281]) -> [PASS][487]
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-tglu-10/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [SKIP][488] ([i915#9519]) -> [PASS][489]
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [SKIP][490] ([i915#9519]) -> [PASS][491]
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@perf@polling@0-rcs0:
    - shard-rkl:          [DMESG-WARN][492] ([i915#12964]) -> [PASS][493] +49 other tests pass
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@perf@polling@0-rcs0.html
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-7/igt@perf@polling@0-rcs0.html

  * igt@perf_pmu@busy-double-start@vcs0:
    - shard-dg2:          [FAIL][494] ([i915#4349]) -> [PASS][495]
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-5/igt@perf_pmu@busy-double-start@vcs0.html
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@perf_pmu@busy-double-start@vcs0.html

  * igt@perf_pmu@busy-idle-check-all@vecs0:
    - shard-mtlp:         [FAIL][496] ([i915#4349]) -> [PASS][497] +3 other tests pass
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-2/igt@perf_pmu@busy-idle-check-all@vecs0.html
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-4/igt@perf_pmu@busy-idle-check-all@vecs0.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          [INCOMPLETE][498] ([i915#13520]) -> [PASS][499]
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-3/igt@perf_pmu@rc6-suspend.html
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@perf_pmu@rc6-suspend.html

  
#### Warnings ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-dg1:          [ABORT][500] ([i915#11814] / [i915#11815] / [i915#9413]) -> [INCOMPLETE][501] ([i915#11814])
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-19/igt@device_reset@unbind-reset-rebind.html
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-15/igt@device_reset@unbind-reset-rebind.html

  * igt@gem_eio@in-flight-suspend:
    - shard-glk:          [INCOMPLETE][502] ([i915#13197] / [i915#13390]) -> [INCOMPLETE][503] ([i915#13390])
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk6/igt@gem_eio@in-flight-suspend.html
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_capture@capture:
    - shard-mtlp:         [ABORT][504] -> [FAIL][505] ([i915#11965])
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-mtlp-5/igt@gem_exec_capture@capture.html
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-mtlp-8/igt@gem_exec_capture@capture.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-dg2:          [SKIP][506] ([i915#7118] / [i915#9424]) -> [FAIL][507] ([i915#7173])
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-1/igt@kms_content_protection@atomic-dpms.html
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-10/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@uevent:
    - shard-dg2:          [SKIP][508] ([i915#7118] / [i915#9424]) -> [FAIL][509] ([i915#1339] / [i915#7173])
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-5/igt@kms_content_protection@uevent.html
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-11/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-sliding-128x42:
    - shard-rkl:          [DMESG-FAIL][510] ([i915#12964]) -> [FAIL][511] ([i915#13566])
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-128x42.html
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-1/igt@kms_cursor_crc@cursor-sliding-128x42.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-glk:          [INCOMPLETE][512] ([i915#12314] / [i915#12745] / [i915#4839]) -> [INCOMPLETE][513] ([i915#12745] / [i915#4839])
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk8/igt@kms_flip@flip-vs-suspend.html
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
    - shard-glk:          [INCOMPLETE][514] ([i915#12314] / [i915#12745]) -> [INCOMPLETE][515] ([i915#12745])
   [514]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-glk8/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
   [515]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-glk6/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-dg1:          [SKIP][516] ([i915#2672] / [i915#3555] / [i915#4423]) -> [SKIP][517] ([i915#2672] / [i915#3555])
   [516]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
   [517]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-dg1:          [SKIP][518] ([i915#2587] / [i915#2672] / [i915#4423]) -> [SKIP][519] ([i915#2587] / [i915#2672])
   [518]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
   [519]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite:
    - shard-dg1:          [SKIP][520] ([i915#4423]) -> [SKIP][521]
   [520]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-19/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite.html
   [521]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg2:          [SKIP][522] ([i915#10433] / [i915#3458]) -> [SKIP][523] ([i915#3458]) +4 other tests skip
   [522]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
   [523]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-dg1:          [SKIP][524] ([i915#8708]) -> [SKIP][525] ([i915#4423] / [i915#8708])
   [524]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [525]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          [SKIP][526] ([i915#3458]) -> [SKIP][527] ([i915#10433] / [i915#3458]) +3 other tests skip
   [526]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [527]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          [SKIP][528] ([i915#1187] / [i915#12713]) -> [SKIP][529] ([i915#12713])
   [528]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-3/igt@kms_hdr@brightness-with-hdr.html
   [529]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-dg1:          [SKIP][530] ([i915#4423] / [i915#5354]) -> [SKIP][531] ([i915#5354])
   [530]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-12/igt@kms_pm_backlight@bad-brightness.html
   [531]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-17/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          [SKIP][532] ([i915#9340]) -> [SKIP][533] ([i915#3828])
   [532]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html
   [533]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-rkl-4/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr@fbc-psr2-sprite-mmap-cpu:
    - shard-dg1:          [SKIP][534] ([i915#1072] / [i915#4423] / [i915#9732]) -> [SKIP][535] ([i915#1072] / [i915#9732])
   [534]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-18/igt@kms_psr@fbc-psr2-sprite-mmap-cpu.html
   [535]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-18/igt@kms_psr@fbc-psr2-sprite-mmap-cpu.html

  * igt@kms_psr@psr2-cursor-render:
    - shard-dg1:          [SKIP][536] ([i915#1072] / [i915#9732]) -> [SKIP][537] ([i915#1072] / [i915#4423] / [i915#9732]) +1 other test skip
   [536]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8310/shard-dg1-16/igt@kms_psr@psr2-cursor-render.html
   [537]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/shard-dg1-12/igt@kms_psr@psr2-cursor-render.html

  
  [i915#10030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10030
  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10226
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10333]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10333
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11614]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11614
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11808
  [i915#11814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11814
  [i915#11815]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11815
  [i915#11832]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11832
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12714]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12714
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
  [i915#12797]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12797
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#12912]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12912
  [i915#12913]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12913
  [i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
  [i915#12941]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12941
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#12967]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12967
  [i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
  [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
  [i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
  [i915#13197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13197
  [i915#13304]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13304
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13363]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13363
  [i915#1339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1339
  [i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
  [i915#13427]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13427
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13550]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13550
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13663]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13663
  [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
  [i915#13734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
  [i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#13977]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13977
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3711
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4958
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5465]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5465
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5566
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6228
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8289
  [i915#8346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8346
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#9292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9292
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9413]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9413
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
  [i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8310 -> IGTPW_12935

  CI-20190529: 20190529
  CI_DRM_16377: a33da369e8cde6c7208381a592866cd61f1ce188 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_12935: 2a12cf4e5884b584a568c0a75e4546e1d95672a1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8310: 4b22256d016daa2f133092b62c03230ff121a3fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12935/index.html

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✗ Xe.CI.Full: failure for Add PMU test for GT frequency

[Patchwork]

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== Series Details ==

Series: Add PMU test for GT frequency
URL   : https://patchwork.freedesktop.org/series/147350/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_8310_FULL -> XEIGTPW_12935_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_12935_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_12935_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 3)
------------------------------

  Missing    (1): shard-adlp 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_12935_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [PASS][1] -> [SKIP][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-dg2-set2:     [PASS][3] -> [SKIP][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  
New tests
---------

  New tests have been introduced between XEIGT_8310_FULL and XEIGTPW_12935_FULL:

### New IGT tests (21) ###

  * igt@kms_cursor_crc@async-cursor-crc-framebuffer-change@pipe-a-hdmi-a-6:
    - Statuses : 1 pass(s)
    - Exec time: [0.61] s

  * igt@kms_cursor_crc@async-cursor-crc-framebuffer-change@pipe-d-hdmi-a-6:
    - Statuses : 1 pass(s)
    - Exec time: [0.32] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@ab-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.19] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@ac-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.16] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@ad-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.18] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@bc-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.18] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@bd-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.17] s

  * igt@kms_flip@2x-flip-vs-dpms-on-nop@cd-hdmi-a6-dp4:
    - Statuses : 1 pass(s)
    - Exec time: [1.18] s

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible@a-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [1.09] s

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible@b-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible@c-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible@d-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@kms_flip@flip-vs-dpms-on-nop@a-dp2:
    - Statuses : 2 pass(s)
    - Exec time: [1.04, 1.11] s

  * igt@kms_flip@flip-vs-dpms-on-nop@b-dp2:
    - Statuses : 2 pass(s)
    - Exec time: [1.04, 1.06] s

  * igt@kms_flip@flip-vs-dpms-on-nop@c-dp2:
    - Statuses : 2 pass(s)
    - Exec time: [1.02, 1.05] s

  * igt@kms_flip@flip-vs-dpms-on-nop@c-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@kms_flip@flip-vs-dpms-on-nop@d-dp2:
    - Statuses : 2 pass(s)
    - Exec time: [1.04, 1.05] s

  * igt@kms_flip@flip-vs-dpms-on-nop@d-hdmi-a2:
    - Statuses : 1 pass(s)
    - Exec time: [1.01] s

  * igt@xe_pmu@gt-frequency:
    - Statuses : 2 pass(s)
    - Exec time: [4.02, 8.04] s

  * igt@xe_pmu@gt-frequency@gt0:
    - Statuses : 2 pass(s)
    - Exec time: [4.01, 4.02] s

  * igt@xe_pmu@gt-frequency@gt1:
    - Statuses : 1 pass(s)
    - Exec time: [4.02] s

  

Known issues
------------

  Here are the changes found in XEIGTPW_12935_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1125])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-5/igt@intel_hwmon@hwmon-write.html

  * igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on:
    - shard-lnl:          [PASS][6] -> [ABORT][7] ([Intel XE#4624])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-lnl-2/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2385])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2327])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#1407]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][11] ([Intel XE#316]) +3 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-432/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#619])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#607])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#610])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1124]) +7 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#1477])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#1124]) +2 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#1124]) +13 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-dg2-set2:     [PASS][19] -> [SKIP][20] ([Intel XE#2191])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-433/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#1512])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][23] ([Intel XE#2191]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#367])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#367])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][26] ([Intel XE#367]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2887]) +11 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#2887]) +4 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-8/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][29] ([Intel XE#2907])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#2669] / [Intel XE#3433]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2652] / [Intel XE#787]) +17 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#787]) +206 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#3432])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][34] ([Intel XE#455] / [Intel XE#787]) +52 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][35] -> [INCOMPLETE][36] ([Intel XE#3124])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][37] -> [DMESG-WARN][38] ([Intel XE#1727] / [Intel XE#3113])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2325]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#306]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_chamelium_color@ctm-0-75.html
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#306])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-6/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#373]) +2 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-4/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
    - shard-dg2-set2:     NOTRUN -> [SKIP][43] ([Intel XE#373]) +13 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html

  * igt@kms_chamelium_frames@dp-crc-single:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2252]) +8 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_chamelium_frames@dp-crc-single.html

  * igt@kms_content_protection@content-type-change:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#3278])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@mei-interface:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2341])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          NOTRUN -> [FAIL][47] ([Intel XE#1178]) +3 other tests fail
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][48] ([Intel XE#1188])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_content_protection@uevent@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg2-set2:     NOTRUN -> [SKIP][49] ([Intel XE#308]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-128x42:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#1424]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-4/igt@kms_cursor_crc@cursor-random-128x42.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2320])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#2321])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2321]) +3 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2291]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#309]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-4/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][56] -> [SKIP][57] ([Intel XE#2291]) +4 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-dg2-set2:     [PASS][58] -> [SKIP][59] ([Intel XE#309]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][60] -> [FAIL][61] ([Intel XE#1475])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2286])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2-set2:     NOTRUN -> [SKIP][63] ([Intel XE#323])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [PASS][64] -> [SKIP][65] ([Intel XE#4302])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@kms_display_modes@extended-mode-basic.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_display_modes@extended-mode-basic.html
    - shard-dg2-set2:     [PASS][66] -> [SKIP][67] ([Intel XE#4302])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-433/igt@kms_display_modes@extended-mode-basic.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_display_modes@extended-mode-basic.html
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#4302])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([i915#3804])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-dg2-set2:     [PASS][70] -> [SKIP][71] ([Intel XE#4354])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-463/igt@kms_dp_link_training@non-uhbr-sst.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#4354]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_dp_link_training@uhbr-sst.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][73] ([Intel XE#4356])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2244]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][75] ([Intel XE#2244])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#4156])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@psr1:
    - shard-dg2-set2:     NOTRUN -> [SKIP][77] ([Intel XE#1135])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2316]) +1 other test skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-bmg:          [PASS][79] -> [SKIP][80] ([Intel XE#2316]) +4 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-dg2-set2:     [PASS][81] -> [SKIP][82] ([Intel XE#310]) +3 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-436/igt@kms_flip@2x-nonexisting-fb.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-lnl:          NOTRUN -> [SKIP][83] ([Intel XE#1421]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip@2x-wf_vblank-ts-check:
    - shard-dg2-set2:     NOTRUN -> [SKIP][84] ([Intel XE#310])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_flip@2x-wf_vblank-ts-check.html

  * igt@kms_flip@flip-vs-expired-vblank@a-dp2:
    - shard-bmg:          [PASS][85] -> [FAIL][86] ([Intel XE#3321]) +5 other tests fail
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@kms_flip@flip-vs-expired-vblank@a-dp2.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank@a-dp2.html

  * igt@kms_flip@flip-vs-expired-vblank@b-dp4:
    - shard-dg2-set2:     [PASS][87] -> [FAIL][88] ([Intel XE#301] / [Intel XE#3321])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@b-dp4.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@b-dp4.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6:
    - shard-dg2-set2:     [PASS][89] -> [FAIL][90] ([Intel XE#301]) +6 other tests fail
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html

  * igt@kms_flip@plain-flip-fb-recreate@a-edp1:
    - shard-lnl:          [PASS][91] -> [FAIL][92] ([Intel XE#886]) +2 other tests fail
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-lnl-3/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][93] ([Intel XE#1401] / [Intel XE#1745])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#1401])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][96] ([Intel XE#455]) +17 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#2293]) +3 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#2311]) +24 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][99] ([Intel XE#651]) +30 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#656]) +8 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     [PASS][101] -> [SKIP][102] ([Intel XE#656]) +6 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#4141]) +5 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#2312]) +4 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
    - shard-lnl:          NOTRUN -> [SKIP][105] ([Intel XE#651]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#2313]) +21 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][107] ([Intel XE#653]) +29 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][108] ([Intel XE#656]) +9 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_getfb@getfb2-accept-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#2340])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_getfb@getfb2-accept-ccs.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#3374] / [Intel XE#3544])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-swap:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#1503])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-7/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle:
    - shard-bmg:          [PASS][112] -> [SKIP][113] ([Intel XE#1503])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@kms_hdr@static-toggle.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][114] ([Intel XE#2925])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#4090])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#2486])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][117] ([Intel XE#4329])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
    - shard-dg2-set2:     [PASS][118] -> [FAIL][119] ([Intel XE#616]) +1 other test fail
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][120] ([Intel XE#4596])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#2493]) +2 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#309]) +2 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#2763]) +3 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-5/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b:
    - shard-dg2-set2:     NOTRUN -> [SKIP][124] ([Intel XE#2763]) +2 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d:
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#2763]) +9 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][127] ([Intel XE#870])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#2392])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2-set2:     [PASS][129] -> [SKIP][130] ([Intel XE#836])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-433/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-dg2-set2:     NOTRUN -> [SKIP][132] ([Intel XE#836])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][133] ([Intel XE#1489]) +8 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][134] ([Intel XE#2893] / [Intel XE#4608])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][135] ([Intel XE#4608]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#1489]) +6 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2-set2:     NOTRUN -> [SKIP][137] ([Intel XE#1122])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][138] ([Intel XE#2387])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-sprite-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][139] ([Intel XE#2850] / [Intel XE#929]) +16 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_psr@fbc-psr-sprite-render.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][140] ([Intel XE#2234] / [Intel XE#2850]) +10 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@fbc-psr2-no-drrs@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][141] ([Intel XE#4609])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@kms_psr@fbc-psr2-no-drrs@edp-1.html

  * igt@kms_psr@pr-primary-blt:
    - shard-lnl:          NOTRUN -> [SKIP][142] ([Intel XE#1406]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@kms_psr@pr-primary-blt.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-dg2-set2:     NOTRUN -> [SKIP][143] ([Intel XE#2939])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#2414])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-dg2-set2:     NOTRUN -> [SKIP][146] ([Intel XE#1127])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
    - shard-lnl:          NOTRUN -> [SKIP][147] ([Intel XE#1127])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][148] ([Intel XE#2330])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][149] ([Intel XE#3414])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][150] ([Intel XE#3414] / [Intel XE#3904])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-dg2-set2:     [PASS][151] -> [SKIP][152] ([Intel XE#455]) +1 other test skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-466/igt@kms_setmode@clone-exclusive-crtc.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-lnl:          NOTRUN -> [SKIP][153] ([Intel XE#330])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-5/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [FAIL][154] ([Intel XE#771]) +1 other test fail
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [PASS][155] -> [FAIL][156] ([Intel XE#771]) +1 other test fail
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-433/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6.html

  * igt@kms_vrr@negative-basic:
    - shard-bmg:          [PASS][157] -> [SKIP][158] ([Intel XE#1499])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@kms_vrr@negative-basic.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-bmg:          NOTRUN -> [SKIP][159] ([Intel XE#1499]) +1 other test skip
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-dg2-set2:     NOTRUN -> [SKIP][160] ([Intel XE#1091] / [Intel XE#2849])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@xe_compute_preempt@compute-preempt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][161] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@xe_compute_preempt@compute-preempt.html

  * igt@xe_copy_basic@mem-set-linear-0xfffe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][162] ([Intel XE#1126]) +1 other test skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@xe_copy_basic@mem-set-linear-0xfffe.html

  * igt@xe_eu_stall@invalid-sampling-rate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][163] ([Intel XE#4497])
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@xe_eu_stall@invalid-sampling-rate.html

  * igt@xe_eudebug@basic-close:
    - shard-dg2-set2:     NOTRUN -> [SKIP][164] ([Intel XE#2905]) +13 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@xe_eudebug@basic-close.html

  * igt@xe_eudebug@basic-vm-bind-metadata-discovery:
    - shard-bmg:          NOTRUN -> [SKIP][165] ([Intel XE#2905]) +8 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html

  * igt@xe_eudebug@discovery-race-sigint:
    - shard-bmg:          NOTRUN -> [SKIP][166] ([Intel XE#2905] / [Intel XE#4259])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_eudebug@discovery-race-sigint.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][167] ([Intel XE#2905] / [Intel XE#4259])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@xe_eudebug@discovery-race-sigint.html

  * igt@xe_eudebug_online@interrupt-other-debuggable:
    - shard-lnl:          NOTRUN -> [SKIP][168] ([Intel XE#2905]) +2 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@xe_eudebug_online@interrupt-other-debuggable.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-dg2-set2:     NOTRUN -> [SKIP][169] ([Intel XE#4577])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
    - shard-lnl:          NOTRUN -> [SKIP][170] ([Intel XE#4577])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_evict@evict-small-external-cm:
    - shard-lnl:          NOTRUN -> [SKIP][171] ([Intel XE#688]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-3/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-dg2-set2:     [PASS][172] -> [SKIP][173] ([Intel XE#1392]) +1 other test skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue:
    - shard-lnl:          NOTRUN -> [SKIP][174] ([Intel XE#1392])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-7/igt@xe_exec_basic@multigpu-once-bindexecqueue.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][175] ([Intel XE#2322]) +5 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@twice-invalid-fault:
    - shard-dg2-set2:     NOTRUN -> [SKIP][176] ([Intel XE#288]) +27 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_exec_fault_mode@twice-invalid-fault.html

  * igt@xe_huc_copy@huc_copy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][177] ([Intel XE#255])
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit:
    - shard-dg2-set2:     [PASS][178] -> [FAIL][179] ([Intel XE#1999]) +2 other tests fail
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html

  * igt@xe_module_load@force-load:
    - shard-bmg:          NOTRUN -> [SKIP][180] ([Intel XE#2457])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@force-load.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201]) -> ([PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [SKIP][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223]) ([Intel XE#2457])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-3/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-3/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-3/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-6/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-6/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-6/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-2/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-2/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-8/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-2/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@xe_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@xe_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@xe_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@xe_module_load@load.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][224] ([Intel XE#2541] / [Intel XE#3573]) +5 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@syncs-ufence-wait-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][225] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_oa@syncs-ufence-wait-cfg.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][226] ([Intel XE#2838] / [Intel XE#979])
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][227] ([Intel XE#2245])
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@xe_pat@pat-index-xelp.html

  * igt@xe_peer2peer@read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][228] ([Intel XE#1061])
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-432/igt@xe_peer2peer@read.html

  * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [FAIL][229] ([Intel XE#1173])
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pm@d3cold-mocs:
    - shard-lnl:          NOTRUN -> [SKIP][230] ([Intel XE#2284])
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-2/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s4-d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][231] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@xe_pm@s4-d3cold-basic-exec.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][232] ([Intel XE#2284] / [Intel XE#366])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@xe_pm@s4-d3cold-basic-exec.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-bmg:          NOTRUN -> [SKIP][233] ([Intel XE#579])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pmu@all-fn-engine-activity-load:
    - shard-dg2-set2:     NOTRUN -> [SKIP][234] ([Intel XE#4650])
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@xe_pmu@all-fn-engine-activity-load.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-bmg:          NOTRUN -> [SKIP][235] ([Intel XE#4650]) +1 other test skip
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_query@multigpu-query-engines:
    - shard-dg2-set2:     NOTRUN -> [SKIP][236] ([Intel XE#944]) +3 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@xe_query@multigpu-query-engines.html
    - shard-lnl:          NOTRUN -> [SKIP][237] ([Intel XE#944])
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-7/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-bmg:          NOTRUN -> [SKIP][238] ([Intel XE#944]) +2 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][239] ([Intel XE#4130]) +3 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets:
    - shard-bmg:          NOTRUN -> [SKIP][240] ([Intel XE#4351]) +1 other test skip
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html

  
#### Possible fixes ####

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][241] ([Intel XE#3862]) -> [PASS][242] +2 other tests pass
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][243] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][244] +1 other test pass
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][245] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [PASS][246]
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-dg2-set2:     [SKIP][247] ([Intel XE#309]) -> [PASS][248] +2 other tests pass
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          [SKIP][249] ([Intel XE#2291]) -> [PASS][250] +1 other test pass
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-1/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-dg2-set2:     [SKIP][251] ([Intel XE#310]) -> [PASS][252] +3 other tests pass
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-dg2-set2:     [SKIP][253] -> [PASS][254]
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-436/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][255] ([Intel XE#3321]) -> [PASS][256] +2 other tests pass
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-bmg:          [SKIP][257] ([Intel XE#2316]) -> [PASS][258] +2 other tests pass
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_flip@2x-plain-flip-interruptible.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-2/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank:
    - shard-dg2-set2:     [INCOMPLETE][259] ([Intel XE#2049]) -> [PASS][260]
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@kms_flip@flip-vs-absolute-wf_vblank.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_flip@flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [FAIL][261] ([Intel XE#301]) -> [PASS][262] +1 other test pass
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@d-dp4:
    - shard-dg2-set2:     [FAIL][263] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][264]
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank@d-dp4.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@d-dp4.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1:
    - shard-lnl:          [FAIL][265] ([Intel XE#886]) -> [PASS][266] +3 other tests pass
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-lnl-1/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-lnl-1/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-dg2-set2:     [SKIP][267] ([Intel XE#656]) -> [PASS][268] +2 other tests pass
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][269] ([Intel XE#1503]) -> [PASS][270]
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-8/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [SKIP][271] ([Intel XE#3012]) -> [PASS][272]
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_joiner@basic-force-big-joiner.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-dg2-set2:     [SKIP][273] ([Intel XE#4328]) -> [PASS][274]
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg2-set2:     [SKIP][275] ([Intel XE#836]) -> [PASS][276]
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_setmode@basic:
    - shard-bmg:          [FAIL][277] ([Intel XE#2883]) -> [PASS][278] +2 other tests pass
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-7/igt@kms_setmode@basic.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_setmode@basic.html
    - shard-dg2-set2:     [FAIL][279] ([Intel XE#2883]) -> [PASS][280]
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@kms_setmode@basic.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_setmode@basic.html

  * igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01:
    - shard-dg2-set2:     [INCOMPLETE][281] -> [PASS][282] +1 other test pass
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-435/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap:
    - shard-dg2-set2:     [SKIP][283] ([Intel XE#1392]) -> [PASS][284] +4 other tests pass
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-435/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html

  
#### Warnings ####

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [SKIP][285] ([Intel XE#787]) -> [SKIP][286] ([Intel XE#455] / [Intel XE#787]) +10 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-463/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [SKIP][287] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][288] ([Intel XE#787]) +8 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][289] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][290] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2-set2:     [SKIP][291] ([Intel XE#4440]) -> [SKIP][292] ([Intel XE#4418])
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_cdclk@mode-transition-all-outputs.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-466/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_content_protection@atomic:
    - shard-bmg:          [INCOMPLETE][293] -> [FAIL][294] ([Intel XE#1178]) +1 other test fail
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-2/igt@kms_content_protection@atomic.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_content_protection@atomic.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [FAIL][295] ([Intel XE#2882] / [Intel XE#3098]) -> [SKIP][296] ([Intel XE#2316])
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][297] ([Intel XE#2311]) -> [SKIP][298] ([Intel XE#2312]) +15 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][299] ([Intel XE#2312]) -> [SKIP][300] ([Intel XE#2311]) +6 other tests skip
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [SKIP][301] ([Intel XE#651]) -> [SKIP][302] ([Intel XE#656]) +8 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][303] ([Intel XE#2312]) -> [SKIP][304] ([Intel XE#4141]) +3 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][305] ([Intel XE#4141]) -> [SKIP][306] ([Intel XE#2312]) +5 other tests skip
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][307] ([Intel XE#656]) -> [SKIP][308] ([Intel XE#651]) +10 other tests skip
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][309] ([Intel XE#2312]) -> [SKIP][310] ([Intel XE#2313]) +4 other tests skip
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][311] ([Intel XE#2313]) -> [SKIP][312] ([Intel XE#2312]) +12 other tests skip
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][313] ([Intel XE#653]) -> [SKIP][314] ([Intel XE#656]) +9 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
    - shard-dg2-set2:     [SKIP][315] ([Intel XE#656]) -> [SKIP][316] ([Intel XE#653]) +9 other tests skip
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-dg2-set2:     [ABORT][317] -> [ABORT][318] ([Intel XE#2705])
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-466/igt@kms_plane_scaling@intel-max-src-size.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [ABORT][319] -> [ABORT][320] ([Intel XE#4502])
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-466/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][321] ([Intel XE#1500]) -> [SKIP][322] ([Intel XE#362])
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     [SKIP][323] ([Intel XE#1061]) -> [FAIL][324] ([Intel XE#1173])
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8310/shard-dg2-432/igt@xe_peer2peer@write.html
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/shard-dg2-434/igt@xe_peer2peer@write.html

  
  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475
  [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2340
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2385
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
  [Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4259
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4328
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
  [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
  [Intel XE#4440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4440
  [Intel XE#4497]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4497
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4502
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4577]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4577
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4624
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/771
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804


Build changes
-------------

  * IGT: IGT_8310 -> IGTPW_12935

  IGTPW_12935: 2a12cf4e5884b584a568c0a75e4546e1d95672a1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8310: 4b22256d016daa2f133092b62c03230ff121a3fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-2911-a33da369e8cde6c7208381a592866cd61f1ce188: a33da369e8cde6c7208381a592866cd61f1ce188

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12935/index.html

[-- Attachment #2: Type: text/html, Size: 100125 bytes --]

[PATCH i-g-t 0/2] Add PMU test for GT frequency

[Vinay Belgaumkar]

This will validate PMU frequency attributes that have been added
to the driver.

Cc: Riana Tauro <riana.tauro@intel.com>>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Vinay Belgaumkar (2):
  lib/xe_gt: Move get/set GT freq utils to lib
  tests/xe_pmu: Add frequency test

 lib/xe/xe_gt.c           |  64 +++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
 tests/intel/xe_pmu.c     | 147 ++++++++++++++++++++++++++++++++++
 4 files changed, 278 insertions(+), 101 deletions(-)

-- 
2.38.1

[PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Vinay Belgaumkar]

Add utils to get/set GT frequency attributes. These are per GT
and exposed via sysfs already.

v2: Review comments (Kamil)
v3: Fix some more nits (Kamil)

Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/xe/xe_gt.c           |  64 +++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
 3 files changed, 131 insertions(+), 101 deletions(-)

diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
index 6f1475be0..a1e080b88 100644
--- a/lib/xe/xe_gt.c
+++ b/lib/xe/xe_gt.c
@@ -4,6 +4,7 @@
  */
 
 #include <fcntl.h>
+#include <limits.h>
 #include <sys/stat.h>
 
 #include "igt_core.h"
@@ -241,3 +242,66 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
 
 	return n;
 }
+
+/**
+ * xe_gt_set_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max) to change
+ * @freq: value of freq to set
+ *
+ * Set GT min/max frequency. Function will assert if the sysfs node is
+ * not found.
+ *
+ * Return: success or failure
+ */
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
+{
+	int ret = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (ret == -EAGAIN)
+		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
+
+	close(gt_fd);
+
+	return ret;
+}
+
+/**
+ * xe_gt_get_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max, act, cur) to read
+ *
+ * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies. Function will
+ * assert if the sysfs node is not found.
+ *
+ * Return: GT frequency value
+ */
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
+{
+	uint32_t freq;
+	int err = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (err == -EAGAIN)
+		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
+
+	igt_assert_eq(err, 1);
+
+	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
+	close(gt_fd);
+
+	return freq;
+}
diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
index 511b31149..06a59281c 100644
--- a/lib/xe/xe_gt.h
+++ b/lib/xe/xe_gt.h
@@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
 				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
 int xe_gt_count_engines_by_class(int fd, int gt, int class);
 
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
 #endif
diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
index 843144ad2..689e0296a 100644
--- a/tests/intel/xe_gt_freq.c
+++ b/tests/intel/xe_gt_freq.c
@@ -13,8 +13,9 @@
  */
 
 #include "igt.h"
-#include "lib/igt_syncobj.h"
 #include "igt_sysfs.h"
+#include "lib/igt_syncobj.h"
+#include "lib/xe/xe_gt.h"
 
 #include "xe_drm.h"
 #include "xe/xe_gt.h"
@@ -36,43 +37,6 @@
  */
 #define SLPC_FREQ_LATENCY_US 100000
 
-static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
-{
-	int ret = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (ret == -EAGAIN)
-		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
-
-	close(gt_fd);
-	return ret;
-}
-
-static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
-{
-	uint32_t freq;
-	int err = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (err == -EAGAIN)
-		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
-
-	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
-
-	close(gt_fd);
-	return freq;
-}
-
 static bool within_expected_range(uint32_t freq, uint32_t val)
 {
 	/*
@@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
 
 static void test_freq_basic_api(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t min_freq, max_freq;
 
@@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
 	 * RPn is the floor
 	 * RP0 is the ceiling
 	 */
-	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
 
 	/* Assert min requests are respected from rp0 to rpn */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	min_freq = get_freq(fd, gt_id, "min");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	min_freq = xe_gt_get_freq(fd, gt_id, "min");
 	/* SLPC can set min higher than rpmid - as it follows RPe */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
 
 	/* Assert max requests are respected from rpn to rp0 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
-	max_freq = get_freq(fd, gt_id, "max");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
+	max_freq = xe_gt_get_freq(fd, gt_id, "max");
 	igt_assert(within_expected_range(max_freq, rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
 }
 
 /**
@@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
 
 static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur_freq, act_freq;
 
@@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 	 * And let's do this for all the 2 known Render Performance (RP) values
 	 * RP0 and RPn and something in between.
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	if (gt_idle) {
-		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
+		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
+		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur_freq = get_freq(fd, gt_id, "cur");
+	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
 	/* If rpmid is around RPe, we could see SLPC follow it */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act_freq = get_freq(fd, gt_id, "act");
+		act_freq = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
 	usleep(SLPC_FREQ_LATENCY_US);
 	/*
 	 * It is unlikely that PCODE will *always* respect any request above RPe
 	 * So for this level let's only check if GuC PC is doing its job
 	 * and respecting our request, by propagating it to the hardware.
 	 */
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	}
 
 	igt_debug("Finished testing fixed request\n");
@@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
  */
 static void test_freq_range(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur, act;
 
 	igt_debug("Starting testing range request\n");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur = get_freq(fd, gt_id, "cur");
+	cur = xe_gt_get_freq(fd, gt_id, "cur");
 	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act = get_freq(fd, gt_id, "act");
+		act = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
 	}
 
@@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
 
 static void test_freq_low_max(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 
 	/*
 	 *  When max request < min request, max is ignored and min works like
 	 * a fixed one. Let's assert this assumption
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
 
 	/* Cur freq will follow RPe, which could be higher than min freq */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
-			   get_freq(fd, gt_id, "cur"));
+			   xe_gt_get_freq(fd, gt_id, "cur"));
 }
 
 /**
@@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
 
 static void test_suspend(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
 				      SUSPEND_TEST_NONE);
 
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
 }
 
 /**
@@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
 
 static void test_reset(int fd, int gt_id, int cycles)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
 	for (int i = 0; i < cycles; i++) {
-		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
 		usleep(SLPC_FREQ_LATENCY_US);
-		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
 			     "Failed after %d good cycles\n", i);
 
 		xe_force_gt_reset_sync(fd, gt_id);
 
 		usleep(SLPC_FREQ_LATENCY_US);
 
-		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
 			     "Failed after %d good cycles\n", i);
 	}
 }
@@ -448,8 +412,8 @@ igt_main
 		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
 
 		xe_for_each_gt(fd, gt) {
-			stash_min[gt] = get_freq(fd, gt, "min");
-			stash_max[gt] = get_freq(fd, gt, "max");
+			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
+			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
 		}
 	}
 
@@ -525,8 +489,8 @@ igt_main
 
 	igt_fixture {
 		xe_for_each_gt(fd, gt) {
-			set_freq(fd, gt, "max", stash_max[gt]);
-			set_freq(fd, gt, "min", stash_min[gt]);
+			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
+			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
 		}
 		free(stash_min);
 		free(stash_max);
-- 
2.38.1

[PATCH i-g-t 0/2] Add PMU test for GT frequency

[Vinay Belgaumkar]

This will validate PMU frequency attributes that have been added
to the driver.

Cc: Riana Tauro <riana.tauro@intel.com>>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Vinay Belgaumkar (2):
  lib/xe_gt: Move get/set GT freq utils to lib
  tests/xe_pmu: Add frequency test

 lib/xe/xe_gt.c           |  61 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
 tests/intel/xe_pmu.c     | 147 ++++++++++++++++++++++++++++++++++
 4 files changed, 275 insertions(+), 101 deletions(-)

-- 
2.38.1

[PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Vinay Belgaumkar]

Add utils to get/set GT frequency attributes. These are per GT
and exposed via sysfs already.

v2: Review comments (Kamil)

Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/xe/xe_gt.c           |  61 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
 3 files changed, 128 insertions(+), 101 deletions(-)

diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
index 6f1475be0..5d6bcdd0b 100644
--- a/lib/xe/xe_gt.c
+++ b/lib/xe/xe_gt.c
@@ -4,6 +4,7 @@
  */
 
 #include <fcntl.h>
+#include <limits.h>
 #include <sys/stat.h>
 
 #include "igt_core.h"
@@ -241,3 +242,63 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
 
 	return n;
 }
+
+/**
+ * xe_gt_set_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max) to change
+ * @freq: value of freq to set
+ *
+ * Set GT min/max frequency. Function will assert if the sysfs node is
+ * not found.
+ *
+ * Return: success or failure
+ */
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
+{
+	int ret = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (ret == -EAGAIN)
+		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
+
+	close(gt_fd);
+	return ret;
+}
+
+/**
+ * xe_gt_get_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max, act, cur) to read
+ *
+ * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies. Function will
+ * assert if the sysfs node is not found.
+ *
+ * Return: GT frequency value
+ */
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
+{
+	uint32_t freq;
+	int err = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (err == -EAGAIN)
+		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
+
+	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
+
+	close(gt_fd);
+	return freq;
+}
diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
index 511b31149..06a59281c 100644
--- a/lib/xe/xe_gt.h
+++ b/lib/xe/xe_gt.h
@@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
 				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
 int xe_gt_count_engines_by_class(int fd, int gt, int class);
 
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
 #endif
diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
index 843144ad2..689e0296a 100644
--- a/tests/intel/xe_gt_freq.c
+++ b/tests/intel/xe_gt_freq.c
@@ -13,8 +13,9 @@
  */
 
 #include "igt.h"
-#include "lib/igt_syncobj.h"
 #include "igt_sysfs.h"
+#include "lib/igt_syncobj.h"
+#include "lib/xe/xe_gt.h"
 
 #include "xe_drm.h"
 #include "xe/xe_gt.h"
@@ -36,43 +37,6 @@
  */
 #define SLPC_FREQ_LATENCY_US 100000
 
-static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
-{
-	int ret = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (ret == -EAGAIN)
-		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
-
-	close(gt_fd);
-	return ret;
-}
-
-static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
-{
-	uint32_t freq;
-	int err = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (err == -EAGAIN)
-		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
-
-	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
-
-	close(gt_fd);
-	return freq;
-}
-
 static bool within_expected_range(uint32_t freq, uint32_t val)
 {
 	/*
@@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
 
 static void test_freq_basic_api(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t min_freq, max_freq;
 
@@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
 	 * RPn is the floor
 	 * RP0 is the ceiling
 	 */
-	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
 
 	/* Assert min requests are respected from rp0 to rpn */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	min_freq = get_freq(fd, gt_id, "min");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	min_freq = xe_gt_get_freq(fd, gt_id, "min");
 	/* SLPC can set min higher than rpmid - as it follows RPe */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
 
 	/* Assert max requests are respected from rpn to rp0 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
-	max_freq = get_freq(fd, gt_id, "max");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
+	max_freq = xe_gt_get_freq(fd, gt_id, "max");
 	igt_assert(within_expected_range(max_freq, rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
 }
 
 /**
@@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
 
 static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur_freq, act_freq;
 
@@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 	 * And let's do this for all the 2 known Render Performance (RP) values
 	 * RP0 and RPn and something in between.
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	if (gt_idle) {
-		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
+		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
+		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur_freq = get_freq(fd, gt_id, "cur");
+	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
 	/* If rpmid is around RPe, we could see SLPC follow it */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act_freq = get_freq(fd, gt_id, "act");
+		act_freq = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
 	usleep(SLPC_FREQ_LATENCY_US);
 	/*
 	 * It is unlikely that PCODE will *always* respect any request above RPe
 	 * So for this level let's only check if GuC PC is doing its job
 	 * and respecting our request, by propagating it to the hardware.
 	 */
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	}
 
 	igt_debug("Finished testing fixed request\n");
@@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
  */
 static void test_freq_range(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur, act;
 
 	igt_debug("Starting testing range request\n");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur = get_freq(fd, gt_id, "cur");
+	cur = xe_gt_get_freq(fd, gt_id, "cur");
 	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act = get_freq(fd, gt_id, "act");
+		act = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
 	}
 
@@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
 
 static void test_freq_low_max(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 
 	/*
 	 *  When max request < min request, max is ignored and min works like
 	 * a fixed one. Let's assert this assumption
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
 
 	/* Cur freq will follow RPe, which could be higher than min freq */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
-			   get_freq(fd, gt_id, "cur"));
+			   xe_gt_get_freq(fd, gt_id, "cur"));
 }
 
 /**
@@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
 
 static void test_suspend(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
 				      SUSPEND_TEST_NONE);
 
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
 }
 
 /**
@@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
 
 static void test_reset(int fd, int gt_id, int cycles)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
 	for (int i = 0; i < cycles; i++) {
-		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
 		usleep(SLPC_FREQ_LATENCY_US);
-		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
 			     "Failed after %d good cycles\n", i);
 
 		xe_force_gt_reset_sync(fd, gt_id);
 
 		usleep(SLPC_FREQ_LATENCY_US);
 
-		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
 			     "Failed after %d good cycles\n", i);
 	}
 }
@@ -448,8 +412,8 @@ igt_main
 		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
 
 		xe_for_each_gt(fd, gt) {
-			stash_min[gt] = get_freq(fd, gt, "min");
-			stash_max[gt] = get_freq(fd, gt, "max");
+			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
+			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
 		}
 	}
 
@@ -525,8 +489,8 @@ igt_main
 
 	igt_fixture {
 		xe_for_each_gt(fd, gt) {
-			set_freq(fd, gt, "max", stash_max[gt]);
-			set_freq(fd, gt, "min", stash_min[gt]);
+			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
+			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
 		}
 		free(stash_min);
 		free(stash_max);
-- 
2.38.1

Re: [PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Kamil Konieczny]

Hi Vinay,
On 2025-04-09 at 18:33:13 -0700, Vinay Belgaumkar wrote:
> Add utils to get/set GT frequency attributes. These are per GT
> and exposed via sysfs already.
> 
> v2: Review comments (Kamil)
> 
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>  lib/xe/xe_gt.c           |  61 ++++++++++++++
>  lib/xe/xe_gt.h           |   2 +
>  tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
>  3 files changed, 128 insertions(+), 101 deletions(-)
> 
> diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
> index 6f1475be0..5d6bcdd0b 100644
> --- a/lib/xe/xe_gt.c
> +++ b/lib/xe/xe_gt.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <fcntl.h>
> +#include <limits.h>
>  #include <sys/stat.h>
>  
>  #include "igt_core.h"
> @@ -241,3 +242,63 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
>  
>  	return n;
>  }
> +
> +/**
> + * xe_gt_set_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max) to change
> + * @freq: value of freq to set
> + *
> + * Set GT min/max frequency. Function will assert if the sysfs node is
> + * not found.
> + *
> + * Return: success or failure
> + */
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> +{
> +	int ret = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (ret == -EAGAIN)
> +		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> +
> +	close(gt_fd);

Please add newline here.

> +	return ret;
> +}
> +
> +/**
> + * xe_gt_get_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max, act, cur) to read
> + *
> + * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies. Function will
> + * assert if the sysfs node is not found.
> + *
> + * Return: GT frequency value
> + */
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
> +{
> +	uint32_t freq;
> +	int err = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (err == -EAGAIN)
> +		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> +
> +	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> +
> +	close(gt_fd);

Same here, add newline, with this fixed:
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>


> +	return freq;
> +}
> diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
> index 511b31149..06a59281c 100644
> --- a/lib/xe/xe_gt.h
> +++ b/lib/xe/xe_gt.h
> @@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
>  				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
>  int xe_gt_count_engines_by_class(int fd, int gt, int class);
>  
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
>  #endif
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 843144ad2..689e0296a 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -13,8 +13,9 @@
>   */
>  
>  #include "igt.h"
> -#include "lib/igt_syncobj.h"
>  #include "igt_sysfs.h"
> +#include "lib/igt_syncobj.h"
> +#include "lib/xe/xe_gt.h"
>  
>  #include "xe_drm.h"
>  #include "xe/xe_gt.h"
> @@ -36,43 +37,6 @@
>   */
>  #define SLPC_FREQ_LATENCY_US 100000
>  
> -static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> -{
> -	int ret = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (ret == -EAGAIN)
> -		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> -
> -	close(gt_fd);
> -	return ret;
> -}
> -
> -static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
> -{
> -	uint32_t freq;
> -	int err = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (err == -EAGAIN)
> -		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> -
> -	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> -
> -	close(gt_fd);
> -	return freq;
> -}
> -
>  static bool within_expected_range(uint32_t freq, uint32_t val)
>  {
>  	/*
> @@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
>  
>  static void test_freq_basic_api(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t min_freq, max_freq;
>  
> @@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
>  	 * RPn is the floor
>  	 * RP0 is the ceiling
>  	 */
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
>  
>  	/* Assert min requests are respected from rp0 to rpn */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	min_freq = get_freq(fd, gt_id, "min");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	min_freq = xe_gt_get_freq(fd, gt_id, "min");
>  	/* SLPC can set min higher than rpmid - as it follows RPe */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>  
>  	/* Assert max requests are respected from rpn to rp0 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	max_freq = get_freq(fd, gt_id, "max");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
> +	max_freq = xe_gt_get_freq(fd, gt_id, "max");
>  	igt_assert(within_expected_range(max_freq, rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
>  }
>  
>  /**
> @@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
>  
>  static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur_freq, act_freq;
>  
> @@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  	 * And let's do this for all the 2 known Render Performance (RP) values
>  	 * RP0 and RPn and something in between.
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	if (gt_idle) {
> -		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
> +		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
> +		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur_freq = get_freq(fd, gt_id, "cur");
> +	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
>  	/* If rpmid is around RPe, we could see SLPC follow it */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act_freq = get_freq(fd, gt_id, "act");
> +		act_freq = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  	/*
>  	 * It is unlikely that PCODE will *always* respect any request above RPe
>  	 * So for this level let's only check if GuC PC is doing its job
>  	 * and respecting our request, by propagating it to the hardware.
>  	 */
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	}
>  
>  	igt_debug("Finished testing fixed request\n");
> @@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   */
>  static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur, act;
>  
>  	igt_debug("Starting testing range request\n");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur = get_freq(fd, gt_id, "cur");
> +	cur = xe_gt_get_freq(fd, gt_id, "cur");
>  	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act = get_freq(fd, gt_id, "act");
> +		act = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
>  	}
>  
> @@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  
>  static void test_freq_low_max(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  
>  	/*
>  	 *  When max request < min request, max is ignored and min works like
>  	 * a fixed one. Let's assert this assumption
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  
>  	/* Cur freq will follow RPe, which could be higher than min freq */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> -			   get_freq(fd, gt_id, "cur"));
> +			   xe_gt_get_freq(fd, gt_id, "cur"));
>  }
>  
>  /**
> @@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
>  
>  static void test_suspend(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>  				      SUSPEND_TEST_NONE);
>  
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>  }
>  
>  /**
> @@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
>  
>  static void test_reset(int fd, int gt_id, int cycles)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
>  	for (int i = 0; i < cycles; i++) {
> -		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
>  		usleep(SLPC_FREQ_LATENCY_US);
> -		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  
>  		xe_force_gt_reset_sync(fd, gt_id);
>  
>  		usleep(SLPC_FREQ_LATENCY_US);
>  
> -		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  	}
>  }
> @@ -448,8 +412,8 @@ igt_main
>  		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>  
>  		xe_for_each_gt(fd, gt) {
> -			stash_min[gt] = get_freq(fd, gt, "min");
> -			stash_max[gt] = get_freq(fd, gt, "max");
> +			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> +			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>  		}
>  	}
>  
> @@ -525,8 +489,8 @@ igt_main
>  
>  	igt_fixture {
>  		xe_for_each_gt(fd, gt) {
> -			set_freq(fd, gt, "max", stash_max[gt]);
> -			set_freq(fd, gt, "min", stash_min[gt]);
> +			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> +			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>  		}
>  		free(stash_min);
>  		free(stash_max);
> -- 
> 2.38.1
> 

Re: [PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Kamil Konieczny]

Hi Vinay,
On 2025-04-09 at 18:33:13 -0700, Vinay Belgaumkar wrote:
> Add utils to get/set GT frequency attributes. These are per GT
> and exposed via sysfs already.
> 
> v2: Review comments (Kamil)
> 

One more nit, see below.

> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>  lib/xe/xe_gt.c           |  61 ++++++++++++++
>  lib/xe/xe_gt.h           |   2 +
>  tests/intel/xe_gt_freq.c | 166 +++++++++++++++------------------------
>  3 files changed, 128 insertions(+), 101 deletions(-)
> 
> diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
> index 6f1475be0..5d6bcdd0b 100644
> --- a/lib/xe/xe_gt.c
> +++ b/lib/xe/xe_gt.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <fcntl.h>
> +#include <limits.h>
>  #include <sys/stat.h>
>  
>  #include "igt_core.h"
> @@ -241,3 +242,63 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
>  
>  	return n;
>  }
> +
> +/**
> + * xe_gt_set_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max) to change
> + * @freq: value of freq to set
> + *
> + * Set GT min/max frequency. Function will assert if the sysfs node is
> + * not found.
> + *
> + * Return: success or failure
> + */
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> +{
> +	int ret = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (ret == -EAGAIN)
> +		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> +
> +	close(gt_fd);
> +	return ret;
> +}
> +
> +/**
> + * xe_gt_get_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max, act, cur) to read
> + *
> + * Read the min/max/act/cur/rp0/rpn/rpe GT frequencies. Function will
> + * assert if the sysfs node is not found.
> + *
> + * Return: GT frequency value
> + */
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
> +{
> +	uint32_t freq;
> +	int err = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (err == -EAGAIN)
> +		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> +
> +	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);

Add here:

	igt_assert_eq(err, 0);

Regards,
Kamil

> +
> +	close(gt_fd);
> +	return freq;
> +}
> diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
> index 511b31149..06a59281c 100644
> --- a/lib/xe/xe_gt.h
> +++ b/lib/xe/xe_gt.h
> @@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
>  				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
>  int xe_gt_count_engines_by_class(int fd, int gt, int class);
>  
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
>  #endif
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 843144ad2..689e0296a 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -13,8 +13,9 @@
>   */
>  
>  #include "igt.h"
> -#include "lib/igt_syncobj.h"
>  #include "igt_sysfs.h"
> +#include "lib/igt_syncobj.h"
> +#include "lib/xe/xe_gt.h"
>  
>  #include "xe_drm.h"
>  #include "xe/xe_gt.h"
> @@ -36,43 +37,6 @@
>   */
>  #define SLPC_FREQ_LATENCY_US 100000
>  
> -static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> -{
> -	int ret = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (ret == -EAGAIN)
> -		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> -
> -	close(gt_fd);
> -	return ret;
> -}
> -
> -static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
> -{
> -	uint32_t freq;
> -	int err = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (err == -EAGAIN)
> -		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> -
> -	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> -
> -	close(gt_fd);
> -	return freq;
> -}
> -
>  static bool within_expected_range(uint32_t freq, uint32_t val)
>  {
>  	/*
> @@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
>  
>  static void test_freq_basic_api(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t min_freq, max_freq;
>  
> @@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
>  	 * RPn is the floor
>  	 * RP0 is the ceiling
>  	 */
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
>  
>  	/* Assert min requests are respected from rp0 to rpn */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	min_freq = get_freq(fd, gt_id, "min");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	min_freq = xe_gt_get_freq(fd, gt_id, "min");
>  	/* SLPC can set min higher than rpmid - as it follows RPe */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>  
>  	/* Assert max requests are respected from rpn to rp0 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	max_freq = get_freq(fd, gt_id, "max");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
> +	max_freq = xe_gt_get_freq(fd, gt_id, "max");
>  	igt_assert(within_expected_range(max_freq, rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
>  }
>  
>  /**
> @@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
>  
>  static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur_freq, act_freq;
>  
> @@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>  	 * And let's do this for all the 2 known Render Performance (RP) values
>  	 * RP0 and RPn and something in between.
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	if (gt_idle) {
> -		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
> +		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
> +		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur_freq = get_freq(fd, gt_id, "cur");
> +	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
>  	/* If rpmid is around RPe, we could see SLPC follow it */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act_freq = get_freq(fd, gt_id, "act");
> +		act_freq = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
>  	}
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  	/*
>  	 * It is unlikely that PCODE will *always* respect any request above RPe
>  	 * So for this level let's only check if GuC PC is doing its job
>  	 * and respecting our request, by propagating it to the hardware.
>  	 */
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	}
>  
>  	igt_debug("Finished testing fixed request\n");
> @@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   */
>  static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  	uint32_t cur, act;
>  
>  	igt_debug("Starting testing range request\n");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	cur = get_freq(fd, gt_id, "cur");
> +	cur = xe_gt_get_freq(fd, gt_id, "cur");
>  	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>  
>  	if (gt_idle) {
>  		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>  			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>  	} else {
> -		act = get_freq(fd, gt_id, "act");
> +		act = xe_gt_get_freq(fd, gt_id, "act");
>  		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
>  	}
>  
> @@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>  
>  static void test_freq_low_max(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>  	uint32_t rpmid = (rp0 + rpn) / 2;
>  
>  	/*
>  	 *  When max request < min request, max is ignored and min works like
>  	 * a fixed one. Let's assert this assumption
>  	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
>  
>  	/* Cur freq will follow RPe, which could be higher than min freq */
>  	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> -			   get_freq(fd, gt_id, "cur"));
> +			   xe_gt_get_freq(fd, gt_id, "cur"));
>  }
>  
>  /**
> @@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
>  
>  static void test_suspend(int fd, int gt_id)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>  	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>  
>  	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>  				      SUSPEND_TEST_NONE);
>  
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>  }
>  
>  /**
> @@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
>  
>  static void test_reset(int fd, int gt_id, int cycles)
>  {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>  
>  	for (int i = 0; i < cycles; i++) {
> -		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
>  			     "Failed after %d good cycles\n", i);
>  		usleep(SLPC_FREQ_LATENCY_US);
> -		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  
>  		xe_force_gt_reset_sync(fd, gt_id);
>  
>  		usleep(SLPC_FREQ_LATENCY_US);
>  
> -		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
>  			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
>  			     "Failed after %d good cycles\n", i);
>  	}
>  }
> @@ -448,8 +412,8 @@ igt_main
>  		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>  
>  		xe_for_each_gt(fd, gt) {
> -			stash_min[gt] = get_freq(fd, gt, "min");
> -			stash_max[gt] = get_freq(fd, gt, "max");
> +			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> +			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>  		}
>  	}
>  
> @@ -525,8 +489,8 @@ igt_main
>  
>  	igt_fixture {
>  		xe_for_each_gt(fd, gt) {
> -			set_freq(fd, gt, "max", stash_max[gt]);
> -			set_freq(fd, gt, "min", stash_min[gt]);
> +			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> +			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>  		}
>  		free(stash_min);
>  		free(stash_max);
> -- 
> 2.38.1
> 

[PATCH i-g-t 0/2] Add PMU tests for GT frequency

[Vinay Belgaumkar]

Also move some frequency helpers to lib.

Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Vinay Belgaumkar (2):
  lib/xe_gt: Move get/set GT freq utils to lib
  tests/xe_pmu: Add frequency test

 lib/xe/xe_gt.c           |  59 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
 tests/intel/xe_pmu.c     |  93 ++++++++++++++++++++++
 4 files changed, 218 insertions(+), 100 deletions(-)

-- 
2.38.1

[PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Vinay Belgaumkar]

These can be used from other tests as well.

Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/xe/xe_gt.c           |  59 ++++++++++++++
 lib/xe/xe_gt.h           |   2 +
 tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
 3 files changed, 125 insertions(+), 100 deletions(-)

diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
index 6f1475be0..2fafd6ffd 100644
--- a/lib/xe/xe_gt.c
+++ b/lib/xe/xe_gt.c
@@ -4,6 +4,7 @@
  */
 
 #include <fcntl.h>
+#include <limits.h>
 #include <sys/stat.h>
 
 #include "igt_core.h"
@@ -241,3 +242,61 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
 
 	return n;
 }
+
+/**
+ * xe_gt_set_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max) to change
+ * @freq: value of freq to set
+ *
+ * Set GT min/max frequency
+ *
+ * Return: success or failure
+ */
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
+{
+	int ret = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (ret == -EAGAIN)
+		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
+
+	close(gt_fd);
+	return ret;
+}
+
+/**
+ * xe_gt_get_freq:
+ * @fd: pointer to xe drm fd
+ * @gt_id: GT id
+ * @freq_name: which GT freq(min, max, act, cur) to read
+ *
+ * Read the min/max/act/cur GT frequency
+ *
+ * Return: GT frequency value
+ */
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
+{
+	uint32_t freq;
+	int err = -EAGAIN;
+	char freq_attr[NAME_MAX];
+	int gt_fd;
+
+	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
+	gt_fd = xe_sysfs_gt_open(fd, gt_id);
+	igt_assert_lte(0, gt_fd);
+
+	while (err == -EAGAIN)
+		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
+
+	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
+
+	close(gt_fd);
+	return freq;
+}
diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
index 511b31149..06a59281c 100644
--- a/lib/xe/xe_gt.h
+++ b/lib/xe/xe_gt.h
@@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
 				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
 int xe_gt_count_engines_by_class(int fd, int gt, int class);
 
+int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
+uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
 #endif
diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
index 843144ad2..4adb205c9 100644
--- a/tests/intel/xe_gt_freq.c
+++ b/tests/intel/xe_gt_freq.c
@@ -14,6 +14,7 @@
 
 #include "igt.h"
 #include "lib/igt_syncobj.h"
+#include "lib/xe/xe_gt.h"
 #include "igt_sysfs.h"
 
 #include "xe_drm.h"
@@ -36,43 +37,6 @@
  */
 #define SLPC_FREQ_LATENCY_US 100000
 
-static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
-{
-	int ret = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (ret == -EAGAIN)
-		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
-
-	close(gt_fd);
-	return ret;
-}
-
-static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
-{
-	uint32_t freq;
-	int err = -EAGAIN;
-	char freq_attr[22];
-	int gt_fd;
-
-	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
-	gt_fd = xe_sysfs_gt_open(fd, gt_id);
-	igt_assert_lte(0, gt_fd);
-
-	while (err == -EAGAIN)
-		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
-
-	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
-
-	close(gt_fd);
-	return freq;
-}
-
 static bool within_expected_range(uint32_t freq, uint32_t val)
 {
 	/*
@@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
 
 static void test_freq_basic_api(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t min_freq, max_freq;
 
@@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
 	 * RPn is the floor
 	 * RP0 is the ceiling
 	 */
-	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
-	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
+	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
 
 	/* Assert min requests are respected from rp0 to rpn */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	min_freq = get_freq(fd, gt_id, "min");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	min_freq = xe_gt_get_freq(fd, gt_id, "min");
 	/* SLPC can set min higher than rpmid - as it follows RPe */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
 
 	/* Assert max requests are respected from rpn to rp0 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
-	max_freq = get_freq(fd, gt_id, "max");
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
+	max_freq = xe_gt_get_freq(fd, gt_id, "max");
 	igt_assert(within_expected_range(max_freq, rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
 }
 
 /**
@@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
 
 static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur_freq, act_freq;
 
@@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
 	 * And let's do this for all the 2 known Render Performance (RP) values
 	 * RP0 and RPn and something in between.
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	if (gt_idle) {
-		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
+		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
+		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur_freq = get_freq(fd, gt_id, "cur");
+	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
 	/* If rpmid is around RPe, we could see SLPC follow it */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act_freq = get_freq(fd, gt_id, "act");
+		act_freq = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
 	}
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
 	usleep(SLPC_FREQ_LATENCY_US);
 	/*
 	 * It is unlikely that PCODE will *always* respect any request above RPe
 	 * So for this level let's only check if GuC PC is doing its job
 	 * and respecting our request, by propagating it to the hardware.
 	 */
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	}
 
 	igt_debug("Finished testing fixed request\n");
@@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
  */
 static void test_freq_range(int fd, int gt_id, bool gt_idle)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 	uint32_t cur, act;
 
 	igt_debug("Starting testing range request\n");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
 	usleep(SLPC_FREQ_LATENCY_US);
-	cur = get_freq(fd, gt_id, "cur");
+	cur = xe_gt_get_freq(fd, gt_id, "cur");
 	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
 
 	if (gt_idle) {
 		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
 			     "GT %d should be in C6\n", gt_id);
-		igt_assert(get_freq(fd, gt_id, "act") == 0);
+		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
 	} else {
-		act = get_freq(fd, gt_id, "act");
+		act = xe_gt_get_freq(fd, gt_id, "act");
 		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
 	}
 
@@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
 
 static void test_freq_low_max(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
-	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
+	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
 	uint32_t rpmid = (rp0 + rpn) / 2;
 
 	/*
 	 *  When max request < min request, max is ignored and min works like
 	 * a fixed one. Let's assert this assumption
 	 */
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
 
 	/* Cur freq will follow RPe, which could be higher than min freq */
 	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
-			   get_freq(fd, gt_id, "cur"));
+			   xe_gt_get_freq(fd, gt_id, "cur"));
 }
 
 /**
@@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
 
 static void test_suspend(int fd, int gt_id)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
-	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
-	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
+	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
 	usleep(SLPC_FREQ_LATENCY_US);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
 
 	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
 				      SUSPEND_TEST_NONE);
 
-	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
-	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
+	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
 }
 
 /**
@@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
 
 static void test_reset(int fd, int gt_id, int cycles)
 {
-	uint32_t rpn = get_freq(fd, gt_id, "rpn");
+	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
 
 	for (int i = 0; i < cycles; i++) {
-		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
+		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
 			     "Failed after %d good cycles\n", i);
 		usleep(SLPC_FREQ_LATENCY_US);
-		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
 			     "Failed after %d good cycles\n", i);
 
 		xe_force_gt_reset_sync(fd, gt_id);
 
 		usleep(SLPC_FREQ_LATENCY_US);
 
-		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
 			     "Failed after %d good cycles\n", i);
-		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
+		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
 			     "Failed after %d good cycles\n", i);
 	}
 }
@@ -448,8 +412,8 @@ igt_main
 		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
 
 		xe_for_each_gt(fd, gt) {
-			stash_min[gt] = get_freq(fd, gt, "min");
-			stash_max[gt] = get_freq(fd, gt, "max");
+			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
+			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
 		}
 	}
 
@@ -525,8 +489,8 @@ igt_main
 
 	igt_fixture {
 		xe_for_each_gt(fd, gt) {
-			set_freq(fd, gt, "max", stash_max[gt]);
-			set_freq(fd, gt, "min", stash_min[gt]);
+			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
+			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
 		}
 		free(stash_min);
 		free(stash_max);
-- 
2.38.1

Re: [PATCH i-g-t 1/2] lib/xe_gt: Move get/set GT freq utils to lib

[Riana Tauro]

Hi Vinay

On 4/2/2025 7:09 AM, Vinay Belgaumkar wrote:
> These can be used from other tests as well.
Could you add more description to the commit message>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>   lib/xe/xe_gt.c           |  59 ++++++++++++++
>   lib/xe/xe_gt.h           |   2 +
>   tests/intel/xe_gt_freq.c | 164 +++++++++++++++------------------------
>   3 files changed, 125 insertions(+), 100 deletions(-)
> 
> diff --git a/lib/xe/xe_gt.c b/lib/xe/xe_gt.c
> index 6f1475be0..2fafd6ffd 100644
> --- a/lib/xe/xe_gt.c
> +++ b/lib/xe/xe_gt.c
> @@ -4,6 +4,7 @@
>    */
>   
>   #include <fcntl.h>
> +#include <limits.h>
>   #include <sys/stat.h>
>   
>   #include "igt_core.h"
> @@ -241,3 +242,61 @@ int xe_gt_count_engines_by_class(int fd, int gt, int class)
>   
>   	return n;
>   }
> +
> +/**
> + * xe_gt_set_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max) to change
> + * @freq: value of freq to set
> + *
> + * Set GT min/max frequency
> + *
> + * Return: success or failure
> + */
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> +{
> +	int ret = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (ret == -EAGAIN)
> +		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> +
> +	close(gt_fd);
> +	return ret;
> +}
> +
> +/**
> + * xe_gt_get_freq:
> + * @fd: pointer to xe drm fd
> + * @gt_id: GT id
> + * @freq_name: which GT freq(min, max, act, cur) to read
> + *
> + * Read the min/max/act/cur GT frequency
rp0/rpn/rpe

enum that matches the string would be better in case
some other test sends a wrong name, but upto you

With addition of the missing names and descriptive commit message
Reviewed-by: Riana Tauro <riana.tauro@intel.com>> + *
> + * Return: GT frequency value
> + */
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name)
> +{
> +	uint32_t freq;
> +	int err = -EAGAIN;
> +	char freq_attr[NAME_MAX];
> +	int gt_fd;
> +
> +	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> +	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> +	igt_assert_lte(0, gt_fd);
> +
> +	while (err == -EAGAIN)
> +		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> +
> +	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> +
> +	close(gt_fd);
> +	return freq;
> +}
> diff --git a/lib/xe/xe_gt.h b/lib/xe/xe_gt.h
> index 511b31149..06a59281c 100644
> --- a/lib/xe/xe_gt.h
> +++ b/lib/xe/xe_gt.h
> @@ -23,4 +23,6 @@ int xe_gt_fill_engines_by_class(int fd, int gt, int class,
>   				struct drm_xe_engine_class_instance eci[static XE_MAX_ENGINE_INSTANCE]);
>   int xe_gt_count_engines_by_class(int fd, int gt, int class);
>   
> +int xe_gt_set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq);
> +uint32_t xe_gt_get_freq(int fd, int gt_id, const char *freq_name);
>   #endif
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 843144ad2..4adb205c9 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -14,6 +14,7 @@
>   
>   #include "igt.h"
>   #include "lib/igt_syncobj.h"
> +#include "lib/xe/xe_gt.h"
>   #include "igt_sysfs.h"
>   
>   #include "xe_drm.h"
> @@ -36,43 +37,6 @@
>    */
>   #define SLPC_FREQ_LATENCY_US 100000
>   
> -static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> -{
> -	int ret = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (ret == -EAGAIN)
> -		ret = igt_sysfs_printf(gt_fd, freq_attr, "%u", freq);
> -
> -	close(gt_fd);
> -	return ret;
> -}
> -
> -static uint32_t get_freq(int fd, int gt_id, const char *freq_name)
> -{
> -	uint32_t freq;
> -	int err = -EAGAIN;
> -	char freq_attr[22];
> -	int gt_fd;
> -
> -	snprintf(freq_attr, sizeof(freq_attr), "freq0/%s_freq", freq_name);
> -	gt_fd = xe_sysfs_gt_open(fd, gt_id);
> -	igt_assert_lte(0, gt_fd);
> -
> -	while (err == -EAGAIN)
> -		err = igt_sysfs_scanf(gt_fd, freq_attr, "%u", &freq);
> -
> -	igt_debug("gt%d: %s freq %u\n", gt_id, freq_name, freq);
> -
> -	close(gt_fd);
> -	return freq;
> -}
> -
>   static bool within_expected_range(uint32_t freq, uint32_t val)
>   {
>   	/*
> @@ -134,8 +98,8 @@ static void test_throttle_basic_api(int fd, int gt_id)
>   
>   static void test_freq_basic_api(int fd, int gt_id)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>   	uint32_t rpmid = (rp0 + rpn) / 2;
>   	uint32_t min_freq, max_freq;
>   
> @@ -144,29 +108,29 @@ static void test_freq_basic_api(int fd, int gt_id)
>   	 * RPn is the floor
>   	 * RP0 is the ceiling
>   	 */
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "min", rp0 + 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rpn - 1), 0);
> -	igt_assert_lt(set_freq(fd, gt_id, "max", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "min", rp0 + 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rpn - 1), 0);
> +	igt_assert_lt(xe_gt_set_freq(fd, gt_id, "max", rp0 + 1), 0);
>   
>   	/* Assert min requests are respected from rp0 to rpn */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rp0);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	min_freq = get_freq(fd, gt_id, "min");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	min_freq = xe_gt_get_freq(fd, gt_id, "min");
>   	/* SLPC can set min higher than rpmid - as it follows RPe */
>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), min_freq);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
>   
>   	/* Assert max requests are respected from rpn to rp0 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> -	max_freq = get_freq(fd, gt_id, "max");
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
> +	max_freq = xe_gt_get_freq(fd, gt_id, "max");
>   	igt_assert(within_expected_range(max_freq, rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rp0);
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rp0);
>   }
>   
>   /**
> @@ -179,8 +143,8 @@ static void test_freq_basic_api(int fd, int gt_id)
>   
>   static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>   	uint32_t rpmid = (rp0 + rpn) / 2;
>   	uint32_t cur_freq, act_freq;
>   
> @@ -192,50 +156,50 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>   	 * And let's do this for all the 2 known Render Performance (RP) values
>   	 * RP0 and RPn and something in between.
>   	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>   	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>   
>   	if (gt_idle) {
> -		/* Wait for GT to go in C6 as previous get_freq wakes up GT*/
> +		/* Wait for GT to go in C6 as previous xe_gt_get_freq wakes up GT*/
>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>   			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>   	} else {
> -		igt_assert_eq_u32(get_freq(fd, gt_id, "act"), rpn);
> +		igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "act"), rpn);
>   	}
>   
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>   	usleep(SLPC_FREQ_LATENCY_US);
> -	cur_freq = get_freq(fd, gt_id, "cur");
> +	cur_freq = xe_gt_get_freq(fd, gt_id, "cur");
>   	/* If rpmid is around RPe, we could see SLPC follow it */
>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
>   
>   	if (gt_idle) {
>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>   			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>   	} else {
> -		act_freq = get_freq(fd, gt_id, "act");
> +		act_freq = xe_gt_get_freq(fd, gt_id, "act");
>   		igt_assert_lte_u32(act_freq, cur_freq + FREQ_UNIT_MHZ);
>   	}
>   
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rp0));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rp0));
>   	usleep(SLPC_FREQ_LATENCY_US);
>   	/*
>   	 * It is unlikely that PCODE will *always* respect any request above RPe
>   	 * So for this level let's only check if GuC PC is doing its job
>   	 * and respecting our request, by propagating it to the hardware.
>   	 */
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rp0);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rp0);
>   
>   	if (gt_idle) {
>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>   			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>   	}
>   
>   	igt_debug("Finished testing fixed request\n");
> @@ -250,25 +214,25 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>    */
>   static void test_freq_range(int fd, int gt_id, bool gt_idle)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>   	uint32_t rpmid = (rp0 + rpn) / 2;
>   	uint32_t cur, act;
>   
>   	igt_debug("Starting testing range request\n");
>   
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpmid));
>   	usleep(SLPC_FREQ_LATENCY_US);
> -	cur = get_freq(fd, gt_id, "cur");
> +	cur = xe_gt_get_freq(fd, gt_id, "cur");
>   	igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>   
>   	if (gt_idle) {
>   		igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt_id), 1000, 10),
>   			     "GT %d should be in C6\n", gt_id);
> -		igt_assert(get_freq(fd, gt_id, "act") == 0);
> +		igt_assert(xe_gt_get_freq(fd, gt_id, "act") == 0);
>   	} else {
> -		act = get_freq(fd, gt_id, "act");
> +		act = xe_gt_get_freq(fd, gt_id, "act");
>   		igt_assert((rpn <= act) && (act <= cur + FREQ_UNIT_MHZ));
>   	}
>   
> @@ -282,21 +246,21 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>   
>   static void test_freq_low_max(int fd, int gt_id)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> -	uint32_t rp0 = get_freq(fd, gt_id, "rp0");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
> +	uint32_t rp0 = xe_gt_get_freq(fd, gt_id, "rp0");
>   	uint32_t rpmid = (rp0 + rpn) / 2;
>   
>   	/*
>   	 *  When max request < min request, max is ignored and min works like
>   	 * a fixed one. Let's assert this assumption
>   	 */
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpmid));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>   	usleep(SLPC_FREQ_LATENCY_US);
>   
>   	/* Cur freq will follow RPe, which could be higher than min freq */
>   	igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> -			   get_freq(fd, gt_id, "cur"));
> +			   xe_gt_get_freq(fd, gt_id, "cur"));
>   }
>   
>   /**
> @@ -306,18 +270,18 @@ static void test_freq_low_max(int fd, int gt_id)
>   
>   static void test_suspend(int fd, int gt_id)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>   
> -	igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> -	igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "min", rpn));
> +	igt_assert_lt(0, xe_gt_set_freq(fd, gt_id, "max", rpn));
>   	usleep(SLPC_FREQ_LATENCY_US);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "cur"), rpn);
>   
>   	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>   				      SUSPEND_TEST_NONE);
>   
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "min"), rpn);
> -	igt_assert_eq_u32(get_freq(fd, gt_id, "max"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "min"), rpn);
> +	igt_assert_eq_u32(xe_gt_get_freq(fd, gt_id, "max"), rpn);
>   }
>   
>   /**
> @@ -330,24 +294,24 @@ static void test_suspend(int fd, int gt_id)
>   
>   static void test_reset(int fd, int gt_id, int cycles)
>   {
> -	uint32_t rpn = get_freq(fd, gt_id, "rpn");
> +	uint32_t rpn = xe_gt_get_freq(fd, gt_id, "rpn");
>   
>   	for (int i = 0; i < cycles; i++) {
> -		igt_assert_f(set_freq(fd, gt_id, "min", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "min", rpn) > 0,
>   			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
> +		igt_assert_f(xe_gt_set_freq(fd, gt_id, "max", rpn) > 0,
>   			     "Failed after %d good cycles\n", i);
>   		usleep(SLPC_FREQ_LATENCY_US);
> -		igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "cur") == rpn,
>   			     "Failed after %d good cycles\n", i);
>   
>   		xe_force_gt_reset_sync(fd, gt_id);
>   
>   		usleep(SLPC_FREQ_LATENCY_US);
>   
> -		igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "min") == rpn,
>   			     "Failed after %d good cycles\n", i);
> -		igt_assert_f(get_freq(fd, gt_id, "max") == rpn,
> +		igt_assert_f(xe_gt_get_freq(fd, gt_id, "max") == rpn,
>   			     "Failed after %d good cycles\n", i);
>   	}
>   }
> @@ -448,8 +412,8 @@ igt_main
>   		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
>   
>   		xe_for_each_gt(fd, gt) {
> -			stash_min[gt] = get_freq(fd, gt, "min");
> -			stash_max[gt] = get_freq(fd, gt, "max");
> +			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> +			stash_max[gt] = xe_gt_get_freq(fd, gt, "max");
>   		}
>   	}
>   
> @@ -525,8 +489,8 @@ igt_main
>   
>   	igt_fixture {
>   		xe_for_each_gt(fd, gt) {
> -			set_freq(fd, gt, "max", stash_max[gt]);
> -			set_freq(fd, gt, "min", stash_min[gt]);
> +			xe_gt_set_freq(fd, gt, "max", stash_max[gt]);
> +			xe_gt_set_freq(fd, gt, "min", stash_min[gt]);
>   		}
>   		free(stash_min);
>   		free(stash_max);