[igt-dev] [PATCH i-g-t 0/3] Include intel_blt funtions to blitter path for igt_fb.c

[igt-dev] [PATCH i-g-t 0/3] Include intel_blt funtions to blitter path for igt_fb.c

[Juha-Pekka Heikkila]

Here start to use copy engine for doing rc ccs on Intel hw with flat ccs. This
will replace usage of use of rendercopy on framebuffer creation with i915
devices with flat ccs.

Juha-Pekka Heikkila (3):
  lib/intel_blt: Add offset to block and fast copy
  lib/igt_fb: include lib/intel_blt functions to blitter path
  lib/igt_fb: On blitter path take clear color modifier into account

 lib/igt_fb.c    | 216 ++++++++++++++++++++++++++++++++++++++++++------
 lib/intel_blt.c |  12 ++-
 lib/intel_blt.h |   3 +
 3 files changed, 202 insertions(+), 29 deletions(-)

-- 
2.25.1

[igt-dev] [PATCH i-g-t 1/3] lib/intel_blt: Add offset to block and fast copy

[Juha-Pekka Heikkila]

Add offset to src and dst blits, this allow to use intel_blt with multiplane
framebuffers.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_blt.c | 12 ++++++++----
 lib/intel_blt.h |  3 +++
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index 28a740094..998c16939 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -708,8 +708,10 @@ uint64_t emit_blt_block_copy(int fd,
 	igt_assert_f(blt, "block-copy requires data to do blit\n");
 
 	alignment = gem_detect_safe_alignment(fd);
-	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
-	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+		     + blt->src.plane_offset;
+	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+		     + blt->dst.plane_offset;
 	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
 
 	fill_data(&data, blt, src_offset, dst_offset, ext);
@@ -1179,8 +1181,10 @@ uint64_t emit_blt_fast_copy(int fd,
 	data.dw03.dst_x2 = blt->dst.x2;
 	data.dw03.dst_y2 = blt->dst.y2;
 
-	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
-	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+		     + blt->src.plane_offset;
+	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+		     + blt->dst.plane_offset;
 	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
 
 	data.dw04.dst_address_lo = dst_offset;
diff --git a/lib/intel_blt.h b/lib/intel_blt.h
index 0cbe881f4..62cc835fd 100644
--- a/lib/intel_blt.h
+++ b/lib/intel_blt.h
@@ -88,6 +88,9 @@ struct blt_copy_object {
 
 	/* mapping or null */
 	uint32_t *ptr;
+
+	/* enable to use multiplane framebuffers */
+	uint32_t plane_offset;
 };
 
 struct blt_copy_batch {
-- 
2.25.1

[igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Juha-Pekka Heikkila]

Use intel_blt functions on blitter path and on i915 devices with
flat ccs use blitter instead of render copy.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 186 insertions(+), 23 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 402fadf41..d8f2cc640 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,8 @@
 #include "drmtest.h"
 #include "i915/gem_create.h"
 #include "i915/gem_mman.h"
+#include "intel_blt.h"
+#include "intel_mocs.h"
 #include "igt_aux.h"
 #include "igt_color_encoding.h"
 #include "igt_fb.h"
@@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 		*height_ret = 1;
 		break;
 	case I915_FORMAT_MOD_X_TILED:
-		igt_require_i915(fd);
+		igt_require_intel(fd);
 		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
 			*width_ret = 128;
 			*height_ret = 16;
@@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
-		igt_require_i915(fd);
+		igt_require_intel(fd);
 		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
 			*width_ret = 128;
 			*height_ret = 16;
@@ -2453,29 +2455,47 @@ struct fb_blit_upload {
 	struct intel_bb *ibb;
 };
 
-static bool fast_blit_ok(const struct igt_fb *fb)
+static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
 {
-	int dev_id = intel_get_drm_devid(fb->fd);
-	int ver = intel_display_ver(dev_id);
-
-	if (ver < 9)
-		return false;
-
-	if (ver < 12)
-		return true;
+	switch (igt_fb_mod_to_tiling(tile)) {
+	case I915_TILING_NONE:
+		return T_LINEAR;
+	case I915_TILING_X:
+		return T_XMAJOR;
+	case I915_TILING_Y:
+		return T_YMAJOR;
+	case I915_TILING_4:
+		return T_TILE4;
+	case I915_TILING_Yf:
+		return T_YFMAJOR;
+	default:
+		igt_assert_f(0, "Unknown tiling!\n");
+	}
+}
 
-	if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
-		return true;
+static bool fast_blit_ok(const struct igt_fb *fb)
+{
+	return blt_has_fast_copy(fb->fd) &&
+		!is_ccs_modifier(fb->modifier) &&
+		blt_fast_copy_supports_tiling(fb->fd,
+					       fb_tile_to_blt_tile(fb->modifier));
+}
 
-	return fb->modifier != I915_FORMAT_MOD_X_TILED;
+static bool block_copy_ok(const struct igt_fb *fb)
+{
+	return blt_has_block_copy(fb->fd) &&
+		blt_block_copy_supports_tiling(fb->fd,
+					       fb_tile_to_blt_tile(fb->modifier));
 }
 
 static bool blitter_ok(const struct igt_fb *fb)
 {
-	if (!is_i915_device(fb->fd))
+	if (!is_intel_device(fb->fd))
 		return false;
 
-	if (is_ccs_modifier(fb->modifier))
+	if ((is_ccs_modifier(fb->modifier) &&
+	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
+	     || is_gen12_mc_ccs_modifier(fb->modifier))
 		return false;
 
 	for (int i = 0; i < fb->num_planes; i++) {
@@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
 		return false;
 
 	return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
-	       is_ccs_modifier(fb->modifier) ||
-	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
+	       (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) ||
+	       is_gen12_mc_ccs_modifier(fb->modifier);
 }
 
 static bool use_blitter(const struct igt_fb *fb)
@@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
 		return false;
 
 	return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+	       fb->modifier == I915_FORMAT_MOD_4_TILED ||
 	       fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
 	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
 }
@@ -2711,12 +2732,115 @@ static void copy_with_engine(struct fb_blit_upload *blit,
 	fini_buf(src);
 }
 
+static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
+					   uint32_t plane, uint32_t memregion)
+{
+	uint32_t name, handle;
+	struct blt_copy_object *blt;
+	enum blt_tiling_type blt_tile;
+	uint64_t stride;
+
+	blt = malloc(sizeof(*blt));
+	igt_assert(blt);
+
+	name = gem_flink(fb->fd, fb->gem_handle);
+	handle = gem_open(fb->fd, name);
+
+	blt_tile = fb_tile_to_blt_tile(fb->modifier);
+	stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4;
+
+	blt_set_object(blt, handle, fb->size, memregion,
+		       intel_get_uc_mocs(fb->fd),
+		       blt_tile,
+		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
+		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
+
+	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
+
+	blt->plane_offset = fb->offsets[plane];
+
+	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
+					     PROT_READ | PROT_WRITE);
+	return blt;
+}
+
+static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
+{
+	switch (fb->plane_bpp[0]) {
+	case 8:
+		return CD_8bit;
+	case 16:
+		return CD_16bit;
+	case 32:
+		return CD_32bit;
+	case 64:
+		return CD_64bit;
+	case 96:
+		return CD_96bit;
+	case 128:
+		return CD_128bit;
+	default:
+		igt_assert(0);
+	}
+}
+
+#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_3D)
+
+#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_MEDIA)
+
+static uint32_t blt_compression_format(struct blt_copy_data *blt,
+				       const struct igt_fb *fb)
+{
+	if (blt->src.compression == COMPRESSION_DISABLED &&
+	    blt->dst.compression == COMPRESSION_DISABLED)
+		return 0;
+
+	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
+		switch (blt->color_depth) {
+		case CD_32bit:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
+		}
+	} else if (BLT_TARGET_MC(blt->src)) {
+		switch (fb->drm_format) {
+		case DRM_FORMAT_XRGB8888:
+			return 8;
+		case DRM_FORMAT_XYUV8888:
+			return 9;
+		case DRM_FORMAT_NV12:
+			return 9;
+		case DRM_FORMAT_P010:
+		case DRM_FORMAT_P012:
+		case DRM_FORMAT_P016:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
+		}
+	} else if (BLT_TARGET_MC(blt->dst)) {
+		igt_assert_f(0, "Destination compression not supported on mc ccs\n");
+	} else {
+		igt_assert_f(0, "unknown compression\n");
+	}
+}
+
 static void blitcopy(const struct igt_fb *dst_fb,
 		     const struct igt_fb *src_fb)
 {
 	uint32_t src_tiling, dst_tiling;
 	uint32_t ctx = 0;
 	uint64_t ahnd = 0;
+	const intel_ctx_t *ictx = NULL;
+	struct intel_execution_engine2 *e;
+	uint32_t bb;
+	uint64_t bb_size = 4096;
+	struct blt_copy_data blt = {};
+	struct blt_copy_object *src, *dst;
+	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
+	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
+			   ? REGION_LMEM(0) : REGION_SMEM;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
 	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
@@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
 
 	if (is_i915_device(dst_fb->fd) && !gem_has_relocations(dst_fb->fd)) {
 		igt_require(gem_has_contexts(dst_fb->fd));
+		ictx = intel_ctx_create_all_physical(src_fb->fd);
 		ctx = gem_context_create(dst_fb->fd);
 		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
+
+		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
+							  &bb,
+							  &bb_size,
+							  mem_region) == 0);
 	}
 
 	for (int i = 0; i < dst_fb->num_planes; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-		/*
-		 * On GEN12+ X-tiled format support is removed from the fast
-		 * blit command, so use the XY_SRC blit command for it
-		 * instead.
-		 */
+
 		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
 			igt_blitter_fast_copy__raw(dst_fb->fd,
 						   ahnd, ctx, NULL,
@@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
 						   dst_tiling,
 						   0, 0 /* dst_x, dst_y */,
 						   dst_fb->size);
+		} else if (ahnd && block_copy_ok(src_fb) && block_copy_ok(dst_fb)) {
+			for_each_ctx_engine(src_fb->fd, ictx, e) {
+				if (gem_engine_can_block_copy(src_fb->fd, e))
+					break;
+			}
+			igt_assert_f(e, "No block copy capable engine found!\n");
+
+			src = blt_fb_init(src_fb, i, mem_region);
+			dst = blt_fb_init(dst_fb, i, mem_region);
+
+			memset(&blt, 0, sizeof(blt));
+			blt.color_depth = blt_get_bpp(src_fb);
+			blt_set_copy_object(&blt.src, src);
+			blt_set_copy_object(&blt.dst, dst);
+
+			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
+				blt_set_object_ext(&ext.src,
+						   blt_compression_format(&blt, src_fb),
+						   src_fb->width, src_fb->height,
+						   SURFACE_TYPE_2D);
+
+				blt_set_object_ext(&ext.dst,
+						   blt_compression_format(&blt, dst_fb),
+						   dst_fb->width, dst_fb->height,
+						   SURFACE_TYPE_2D);
+
+				pext = &ext;
+			}
+
+			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
+
+			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
+			gem_sync(src_fb->fd, blt.dst.handle);
+
+			blt_destroy_object(src_fb->fd, src);
+			blt_destroy_object(dst_fb->fd, dst);
 		} else {
 			igt_blitter_src_copy(dst_fb->fd,
 					     ahnd, ctx, NULL,
@@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	if (ctx)
 		gem_context_destroy(dst_fb->fd, ctx);
 	put_ahnd(ahnd);
+	intel_ctx_destroy(src_fb->fd, ictx);
 }
 
 static void free_linear_mapping(struct fb_blit_upload *blit)
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Modem, Bhanuprakash]

Hi J-P,

On Tue-27-06-2023 10:52 pm, Juha-Pekka Heikkila wrote:
> Use intel_blt functions on blitter path and on i915 devices with
> flat ccs use blitter instead of render copy.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>   lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
>   1 file changed, 186 insertions(+), 23 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 402fadf41..d8f2cc640 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -35,6 +35,8 @@
>   #include "drmtest.h"
>   #include "i915/gem_create.h"
>   #include "i915/gem_mman.h"
> +#include "intel_blt.h"
> +#include "intel_mocs.h"
>   #include "igt_aux.h"
>   #include "igt_color_encoding.h"
>   #include "igt_fb.h"
> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>   		*height_ret = 1;
>   		break;
>   	case I915_FORMAT_MOD_X_TILED:
> -		igt_require_i915(fd);
> +		igt_require_intel(fd);

This seems to be a bug fix, and should come in a separate patch.

>   		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>   			*width_ret = 128;
>   			*height_ret = 16;
> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>   	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
> -		igt_require_i915(fd);
> +		igt_require_intel(fd);

Here too.

>   		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>   			*width_ret = 128;
>   			*height_ret = 16;
> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>   	struct intel_bb *ibb;
>   };
>   
> -static bool fast_blit_ok(const struct igt_fb *fb)
> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
>   {
> -	int dev_id = intel_get_drm_devid(fb->fd);
> -	int ver = intel_display_ver(dev_id);
> -
> -	if (ver < 9)
> -		return false;
> -
> -	if (ver < 12)
> -		return true;
> +	switch (igt_fb_mod_to_tiling(tile)) {
> +	case I915_TILING_NONE:
> +		return T_LINEAR;
> +	case I915_TILING_X:
> +		return T_XMAJOR;
> +	case I915_TILING_Y:
> +		return T_YMAJOR;
> +	case I915_TILING_4:
> +		return T_TILE4;
> +	case I915_TILING_Yf:
> +		return T_YFMAJOR;
> +	default:
> +		igt_assert_f(0, "Unknown tiling!\n");
> +	}
> +}
>   
> -	if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
> -		return true;
> +static bool fast_blit_ok(const struct igt_fb *fb)
> +{
> +	return blt_has_fast_copy(fb->fd) &&
> +		!is_ccs_modifier(fb->modifier) &&
> +		blt_fast_copy_supports_tiling(fb->fd,
> +					       fb_tile_to_blt_tile(fb->modifier));
> +}
>   
> -	return fb->modifier != I915_FORMAT_MOD_X_TILED;
> +static bool block_copy_ok(const struct igt_fb *fb)
> +{
> +	return blt_has_block_copy(fb->fd) &&
> +		blt_block_copy_supports_tiling(fb->fd,
> +					       fb_tile_to_blt_tile(fb->modifier));
>   }
>   
>   static bool blitter_ok(const struct igt_fb *fb)
>   {
> -	if (!is_i915_device(fb->fd))
> +	if (!is_intel_device(fb->fd))

Here also.

>   		return false;
>   
> -	if (is_ccs_modifier(fb->modifier))
> +	if ((is_ccs_modifier(fb->modifier) &&
> +	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
> +	     || is_gen12_mc_ccs_modifier(fb->modifier))
>   		return false;
>   
>   	for (int i = 0; i < fb->num_planes; i++) {
> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
>   		return false;
>   
>   	return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
> -	       is_ccs_modifier(fb->modifier) ||
> -	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
> +	       (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) ||
> +	       is_gen12_mc_ccs_modifier(fb->modifier);
>   }
>   
>   static bool use_blitter(const struct igt_fb *fb)
> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>   		return false;
>   
>   	return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> +	       fb->modifier == I915_FORMAT_MOD_4_TILED ||

Do we need to add X-tiled too?

>   	       fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>   	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>   }
> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct fb_blit_upload *blit,
>   	fini_buf(src);
>   }
>   
> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
> +					   uint32_t plane, uint32_t memregion)
> +{
> +	uint32_t name, handle;
> +	struct blt_copy_object *blt;
> +	enum blt_tiling_type blt_tile;
> +	uint64_t stride;
> +
> +	blt = malloc(sizeof(*blt));
> +	igt_assert(blt);
> +
> +	name = gem_flink(fb->fd, fb->gem_handle);
> +	handle = gem_open(fb->fd, name);
> +
> +	blt_tile = fb_tile_to_blt_tile(fb->modifier);
> +	stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4;
> +
> +	blt_set_object(blt, handle, fb->size, memregion,
> +		       intel_get_uc_mocs(fb->fd),
> +		       blt_tile,
> +		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
> +		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
> +
> +	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
> +
> +	blt->plane_offset = fb->offsets[plane];
> +
> +	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
> +					     PROT_READ | PROT_WRITE);
> +	return blt;
> +}
> +
> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
> +{
> +	switch (fb->plane_bpp[0]) {
> +	case 8:
> +		return CD_8bit;
> +	case 16:
> +		return CD_16bit;
> +	case 32:
> +		return CD_32bit;
> +	case 64:
> +		return CD_64bit;
> +	case 96:
> +		return CD_96bit;
> +	case 128:
> +		return CD_128bit;
> +	default:
> +		igt_assert(0);
> +	}
> +}
> +
> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_3D)
> +
> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_MEDIA)
> +
> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
> +				       const struct igt_fb *fb)
> +{
> +	if (blt->src.compression == COMPRESSION_DISABLED &&
> +	    blt->dst.compression == COMPRESSION_DISABLED)
> +		return 0;
> +
> +	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
> +		switch (blt->color_depth) {
> +		case CD_32bit:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
> +		}
> +	} else if (BLT_TARGET_MC(blt->src)) {
> +		switch (fb->drm_format) {
> +		case DRM_FORMAT_XRGB8888:
> +			return 8;
> +		case DRM_FORMAT_XYUV8888:
> +			return 9;
> +		case DRM_FORMAT_NV12:
> +			return 9;
> +		case DRM_FORMAT_P010:
> +		case DRM_FORMAT_P012:
> +		case DRM_FORMAT_P016:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
> +		}
> +	} else if (BLT_TARGET_MC(blt->dst)) {
> +		igt_assert_f(0, "Destination compression not supported on mc ccs\n");
> +	} else {
> +		igt_assert_f(0, "unknown compression\n");
> +	}
> +}
> +
>   static void blitcopy(const struct igt_fb *dst_fb,
>   		     const struct igt_fb *src_fb)
>   {
>   	uint32_t src_tiling, dst_tiling;
>   	uint32_t ctx = 0;
>   	uint64_t ahnd = 0;
> +	const intel_ctx_t *ictx = NULL;
> +	struct intel_execution_engine2 *e;
> +	uint32_t bb;
> +	uint64_t bb_size = 4096;
> +	struct blt_copy_data blt = {};
> +	struct blt_copy_object *src, *dst;
> +	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
> +	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
> +			   ? REGION_LMEM(0) : REGION_SMEM;
>   
>   	igt_assert_eq(dst_fb->fd, src_fb->fd);
>   	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   
>   	if (is_i915_device(dst_fb->fd) && !gem_has_relocations(dst_fb->fd)) {
>   		igt_require(gem_has_contexts(dst_fb->fd));
> +		ictx = intel_ctx_create_all_physical(src_fb->fd);
>   		ctx = gem_context_create(dst_fb->fd);
>   		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
> +
> +		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
> +							  &bb,
> +							  &bb_size,
> +							  mem_region) == 0);
>   	}
>   
>   	for (int i = 0; i < dst_fb->num_planes; i++) {
>   		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>   		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>   		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
> -		/*
> -		 * On GEN12+ X-tiled format support is removed from the fast
> -		 * blit command, so use the XY_SRC blit command for it
> -		 * instead.
> -		 */
> +
>   		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>   			igt_blitter_fast_copy__raw(dst_fb->fd,
>   						   ahnd, ctx, NULL,
> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   						   dst_tiling,
>   						   0, 0 /* dst_x, dst_y */,
>   						   dst_fb->size);
> +		} else if (ahnd && block_copy_ok(src_fb) && block_copy_ok(dst_fb)) {
> +			for_each_ctx_engine(src_fb->fd, ictx, e) {
> +				if (gem_engine_can_block_copy(src_fb->fd, e))
> +					break;
> +			}
> +			igt_assert_f(e, "No block copy capable engine found!\n");
> +
> +			src = blt_fb_init(src_fb, i, mem_region);
> +			dst = blt_fb_init(dst_fb, i, mem_region);
> +
> +			memset(&blt, 0, sizeof(blt));
> +			blt.color_depth = blt_get_bpp(src_fb);
> +			blt_set_copy_object(&blt.src, src);
> +			blt_set_copy_object(&blt.dst, dst);
> +
> +			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
> +				blt_set_object_ext(&ext.src,
> +						   blt_compression_format(&blt, src_fb),
> +						   src_fb->width, src_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				blt_set_object_ext(&ext.dst,
> +						   blt_compression_format(&blt, dst_fb),
> +						   dst_fb->width, dst_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				pext = &ext;
> +			}
> +
> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
> +
> +			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
> +			gem_sync(src_fb->fd, blt.dst.handle);
> +
> +			blt_destroy_object(src_fb->fd, src);
> +			blt_destroy_object(dst_fb->fd, dst);
>   		} else {
>   			igt_blitter_src_copy(dst_fb->fd,
>   					     ahnd, ctx, NULL,
> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   	if (ctx)
>   		gem_context_destroy(dst_fb->fd, ctx);
>   	put_ahnd(ahnd);
> +	intel_ctx_destroy(src_fb->fd, ictx);
>   }
>   
>   static void free_linear_mapping(struct fb_blit_upload *blit)

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Juha-Pekka Heikkila]

On 28.6.2023 10.52, Modem, Bhanuprakash wrote:
> Hi J-P,
> 
> On Tue-27-06-2023 10:52 pm, Juha-Pekka Heikkila wrote:
>> Use intel_blt functions on blitter path and on i915 devices with
>> flat ccs use blitter instead of render copy.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>>   lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
>>   1 file changed, 186 insertions(+), 23 deletions(-)
>>
>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>> index 402fadf41..d8f2cc640 100644
>> --- a/lib/igt_fb.c
>> +++ b/lib/igt_fb.c
>> @@ -35,6 +35,8 @@
>>   #include "drmtest.h"
>>   #include "i915/gem_create.h"
>>   #include "i915/gem_mman.h"
>> +#include "intel_blt.h"
>> +#include "intel_mocs.h"
>>   #include "igt_aux.h"
>>   #include "igt_color_encoding.h"
>>   #include "igt_fb.h"
>> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>> modifier, int fb_bpp,
>>           *height_ret = 1;
>>           break;
>>       case I915_FORMAT_MOD_X_TILED:
>> -        igt_require_i915(fd);
>> +        igt_require_intel(fd);
> 
> This seems to be a bug fix, and should come in a separate patch.
> 
>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>               *width_ret = 128;
>>               *height_ret = 16;
>> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>> modifier, int fb_bpp,
>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>       case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>> -        igt_require_i915(fd);
>> +        igt_require_intel(fd);
> 
> Here too.
> 
>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>               *width_ret = 128;
>>               *height_ret = 16;
>> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>>       struct intel_bb *ibb;
>>   };
>> -static bool fast_blit_ok(const struct igt_fb *fb)
>> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
>>   {
>> -    int dev_id = intel_get_drm_devid(fb->fd);
>> -    int ver = intel_display_ver(dev_id);
>> -
>> -    if (ver < 9)
>> -        return false;
>> -
>> -    if (ver < 12)
>> -        return true;
>> +    switch (igt_fb_mod_to_tiling(tile)) {
>> +    case I915_TILING_NONE:
>> +        return T_LINEAR;
>> +    case I915_TILING_X:
>> +        return T_XMAJOR;
>> +    case I915_TILING_Y:
>> +        return T_YMAJOR;
>> +    case I915_TILING_4:
>> +        return T_TILE4;
>> +    case I915_TILING_Yf:
>> +        return T_YFMAJOR;
>> +    default:
>> +        igt_assert_f(0, "Unknown tiling!\n");
>> +    }
>> +}
>> -    if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
>> -        return true;
>> +static bool fast_blit_ok(const struct igt_fb *fb)
>> +{
>> +    return blt_has_fast_copy(fb->fd) &&
>> +        !is_ccs_modifier(fb->modifier) &&
>> +        blt_fast_copy_supports_tiling(fb->fd,
>> +                           fb_tile_to_blt_tile(fb->modifier));
>> +}
>> -    return fb->modifier != I915_FORMAT_MOD_X_TILED;
>> +static bool block_copy_ok(const struct igt_fb *fb)
>> +{
>> +    return blt_has_block_copy(fb->fd) &&
>> +        blt_block_copy_supports_tiling(fb->fd,
>> +                           fb_tile_to_blt_tile(fb->modifier));
>>   }
>>   static bool blitter_ok(const struct igt_fb *fb)
>>   {
>> -    if (!is_i915_device(fb->fd))
>> +    if (!is_intel_device(fb->fd))
> 
> Here also.
> 
>>           return false;
>> -    if (is_ccs_modifier(fb->modifier))
>> +    if ((is_ccs_modifier(fb->modifier) &&
>> +         !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
>> +         || is_gen12_mc_ccs_modifier(fb->modifier))
>>           return false;
>>       for (int i = 0; i < fb->num_planes; i++) {
>> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
>>           return false;
>>       return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>> -           is_ccs_modifier(fb->modifier) ||
>> -           (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>> +           (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && 
>> is_ccs_modifier(fb->modifier)) ||
>> +           is_gen12_mc_ccs_modifier(fb->modifier);
>>   }
>>   static bool use_blitter(const struct igt_fb *fb)
>> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>>           return false;
>>       return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>> +           fb->modifier == I915_FORMAT_MOD_4_TILED ||
> 
> Do we need to add X-tiled too?

Hi Bhanu, thanks for looking at these.

I noticed here strictly wouldn't be needed any of these while on i915, 
this logic will need to be sorted out bit later. These will become 
effective when xe driver come to these parts hence I'll add all tilings 
here and separate those other fixes and send new version.

/Juha-Pekka

> 
>>              fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>              (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>>   }
>> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct 
>> fb_blit_upload *blit,
>>       fini_buf(src);
>>   }
>> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
>> +                       uint32_t plane, uint32_t memregion)
>> +{
>> +    uint32_t name, handle;
>> +    struct blt_copy_object *blt;
>> +    enum blt_tiling_type blt_tile;
>> +    uint64_t stride;
>> +
>> +    blt = malloc(sizeof(*blt));
>> +    igt_assert(blt);
>> +
>> +    name = gem_flink(fb->fd, fb->gem_handle);
>> +    handle = gem_open(fb->fd, name);
>> +
>> +    blt_tile = fb_tile_to_blt_tile(fb->modifier);
>> +    stride = blt_tile == T_LINEAR ? fb->strides[plane] : 
>> fb->strides[plane] / 4;
>> +
>> +    blt_set_object(blt, handle, fb->size, memregion,
>> +               intel_get_uc_mocs(fb->fd),
>> +               blt_tile,
>> +               is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : 
>> COMPRESSION_DISABLED,
>> +               is_gen12_mc_ccs_modifier(fb->modifier) ? 
>> COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
>> +
>> +    blt_set_geom(blt, stride, 0, 0, fb->width, 
>> fb->plane_height[plane], 0, 0);
>> +
>> +    blt->plane_offset = fb->offsets[plane];
>> +
>> +    blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
>> +                         PROT_READ | PROT_WRITE);
>> +    return blt;
>> +}
>> +
>> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
>> +{
>> +    switch (fb->plane_bpp[0]) {
>> +    case 8:
>> +        return CD_8bit;
>> +    case 16:
>> +        return CD_16bit;
>> +    case 32:
>> +        return CD_32bit;
>> +    case 64:
>> +        return CD_64bit;
>> +    case 96:
>> +        return CD_96bit;
>> +    case 128:
>> +        return CD_128bit;
>> +    default:
>> +        igt_assert(0);
>> +    }
>> +}
>> +
>> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
>> +              x.compression_type == COMPRESSION_TYPE_3D)
>> +
>> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
>> +              x.compression_type == COMPRESSION_TYPE_MEDIA)
>> +
>> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
>> +                       const struct igt_fb *fb)
>> +{
>> +    if (blt->src.compression == COMPRESSION_DISABLED &&
>> +        blt->dst.compression == COMPRESSION_DISABLED)
>> +        return 0;
>> +
>> +    if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
>> +        switch (blt->color_depth) {
>> +        case CD_32bit:
>> +            return 8;
>> +        default:
>> +            igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color 
>> depth\n");
>> +        }
>> +    } else if (BLT_TARGET_MC(blt->src)) {
>> +        switch (fb->drm_format) {
>> +        case DRM_FORMAT_XRGB8888:
>> +            return 8;
>> +        case DRM_FORMAT_XYUV8888:
>> +            return 9;
>> +        case DRM_FORMAT_NV12:
>> +            return 9;
>> +        case DRM_FORMAT_P010:
>> +        case DRM_FORMAT_P012:
>> +        case DRM_FORMAT_P016:
>> +            return 8;
>> +        default:
>> +            igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
>> +        }
>> +    } else if (BLT_TARGET_MC(blt->dst)) {
>> +        igt_assert_f(0, "Destination compression not supported on mc 
>> ccs\n");
>> +    } else {
>> +        igt_assert_f(0, "unknown compression\n");
>> +    }
>> +}
>> +
>>   static void blitcopy(const struct igt_fb *dst_fb,
>>                const struct igt_fb *src_fb)
>>   {
>>       uint32_t src_tiling, dst_tiling;
>>       uint32_t ctx = 0;
>>       uint64_t ahnd = 0;
>> +    const intel_ctx_t *ictx = NULL;
>> +    struct intel_execution_engine2 *e;
>> +    uint32_t bb;
>> +    uint64_t bb_size = 4096;
>> +    struct blt_copy_data blt = {};
>> +    struct blt_copy_object *src, *dst;
>> +    struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>> +    uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>> +               ? REGION_LMEM(0) : REGION_SMEM;
>>       igt_assert_eq(dst_fb->fd, src_fb->fd);
>>       igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
>> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>       if (is_i915_device(dst_fb->fd) && 
>> !gem_has_relocations(dst_fb->fd)) {
>>           igt_require(gem_has_contexts(dst_fb->fd));
>> +        ictx = intel_ctx_create_all_physical(src_fb->fd);
>>           ctx = gem_context_create(dst_fb->fd);
>>           ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
>> +
>> +        igt_assert(__gem_create_in_memory_regions(src_fb->fd,
>> +                              &bb,
>> +                              &bb_size,
>> +                              mem_region) == 0);
>>       }
>>       for (int i = 0; i < dst_fb->num_planes; i++) {
>>           igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>>           igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>>           igt_assert_eq(dst_fb->plane_height[i], 
>> src_fb->plane_height[i]);
>> -        /*
>> -         * On GEN12+ X-tiled format support is removed from the fast
>> -         * blit command, so use the XY_SRC blit command for it
>> -         * instead.
>> -         */
>> +
>>           if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>>               igt_blitter_fast_copy__raw(dst_fb->fd,
>>                              ahnd, ctx, NULL,
>> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>                              dst_tiling,
>>                              0, 0 /* dst_x, dst_y */,
>>                              dst_fb->size);
>> +        } else if (ahnd && block_copy_ok(src_fb) && 
>> block_copy_ok(dst_fb)) {
>> +            for_each_ctx_engine(src_fb->fd, ictx, e) {
>> +                if (gem_engine_can_block_copy(src_fb->fd, e))
>> +                    break;
>> +            }
>> +            igt_assert_f(e, "No block copy capable engine found!\n");
>> +
>> +            src = blt_fb_init(src_fb, i, mem_region);
>> +            dst = blt_fb_init(dst_fb, i, mem_region);
>> +
>> +            memset(&blt, 0, sizeof(blt));
>> +            blt.color_depth = blt_get_bpp(src_fb);
>> +            blt_set_copy_object(&blt.src, src);
>> +            blt_set_copy_object(&blt.dst, dst);
>> +
>> +            if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
>> +                blt_set_object_ext(&ext.src,
>> +                           blt_compression_format(&blt, src_fb),
>> +                           src_fb->width, src_fb->height,
>> +                           SURFACE_TYPE_2D);
>> +
>> +                blt_set_object_ext(&ext.dst,
>> +                           blt_compression_format(&blt, dst_fb),
>> +                           dst_fb->width, dst_fb->height,
>> +                           SURFACE_TYPE_2D);
>> +
>> +                pext = &ext;
>> +            }
>> +
>> +            blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>> +
>> +            blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
>> +            gem_sync(src_fb->fd, blt.dst.handle);
>> +
>> +            blt_destroy_object(src_fb->fd, src);
>> +            blt_destroy_object(dst_fb->fd, dst);
>>           } else {
>>               igt_blitter_src_copy(dst_fb->fd,
>>                            ahnd, ctx, NULL,
>> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>       if (ctx)
>>           gem_context_destroy(dst_fb->fd, ctx);
>>       put_ahnd(ahnd);
>> +    intel_ctx_destroy(src_fb->fd, ictx);
>>   }
>>   static void free_linear_mapping(struct fb_blit_upload *blit)

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Karolina Stolarek]

Hi Juha-Pekka,

On 27.06.2023 19:22, Juha-Pekka Heikkila wrote:
> Use intel_blt functions on blitter path and on i915 devices with
> flat ccs use blitter instead of render copy.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>   lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
>   1 file changed, 186 insertions(+), 23 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 402fadf41..d8f2cc640 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -35,6 +35,8 @@
>   #include "drmtest.h"
>   #include "i915/gem_create.h"
>   #include "i915/gem_mman.h"
> +#include "intel_blt.h"
> +#include "intel_mocs.h"
>   #include "igt_aux.h"
>   #include "igt_color_encoding.h"
>   #include "igt_fb.h"
> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>   		*height_ret = 1;
>   		break;
>   	case I915_FORMAT_MOD_X_TILED:
> -		igt_require_i915(fd);
> +		igt_require_intel(fd);
>   		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>   			*width_ret = 128;
>   			*height_ret = 16;
> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>   	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>   	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
> -		igt_require_i915(fd);
> +		igt_require_intel(fd);
>   		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>   			*width_ret = 128;
>   			*height_ret = 16;
> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>   	struct intel_bb *ibb;
>   };
>   
> -static bool fast_blit_ok(const struct igt_fb *fb)
> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)

Could we promote this function to intel_blt.c? These enums are not just 
fb-specific, they are legacy stuff, and I think that tests such as 
gem_blits would make use of such converter.

>   {
> -	int dev_id = intel_get_drm_devid(fb->fd);
> -	int ver = intel_display_ver(dev_id);
> -
> -	if (ver < 9)
> -		return false;
> -
> -	if (ver < 12)
> -		return true;
> +	switch (igt_fb_mod_to_tiling(tile)) {
> +	case I915_TILING_NONE:
> +		return T_LINEAR;
> +	case I915_TILING_X:
> +		return T_XMAJOR;
> +	case I915_TILING_Y:
> +		return T_YMAJOR;
> +	case I915_TILING_4:
> +		return T_TILE4;
> +	case I915_TILING_Yf:
> +		return T_YFMAJOR;
> +	default:
> +		igt_assert_f(0, "Unknown tiling!\n");
> +	}
> +}
>   
> -	if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
> -		return true;
> +static bool fast_blit_ok(const struct igt_fb *fb)
> +{
> +	return blt_has_fast_copy(fb->fd) &&
> +		!is_ccs_modifier(fb->modifier) &&
> +		blt_fast_copy_supports_tiling(fb->fd,
> +					       fb_tile_to_blt_tile(fb->modifier));

Nit: this line is slightly misaligned

> +}
>   
> -	return fb->modifier != I915_FORMAT_MOD_X_TILED;
> +static bool block_copy_ok(const struct igt_fb *fb)
> +{
> +	return blt_has_block_copy(fb->fd) &&
> +		blt_block_copy_supports_tiling(fb->fd,
> +					       fb_tile_to_blt_tile(fb->modifier));
>   }
>   
>   static bool blitter_ok(const struct igt_fb *fb)
>   {
> -	if (!is_i915_device(fb->fd))
> +	if (!is_intel_device(fb->fd))
>   		return false;
>   
> -	if (is_ccs_modifier(fb->modifier))
> +	if ((is_ccs_modifier(fb->modifier) &&
> +	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
> +	     || is_gen12_mc_ccs_modifier(fb->modifier))

Nit: This || should go line up

>   		return false;
>   
>   	for (int i = 0; i < fb->num_planes; i++) {
> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
>   		return false;
>   
>   	return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
> -	       is_ccs_modifier(fb->modifier) ||
> -	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
> +	       (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) ||
> +	       is_gen12_mc_ccs_modifier(fb->modifier);
>   }
>   
>   static bool use_blitter(const struct igt_fb *fb)
> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>   		return false;
>   
>   	return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
> +	       fb->modifier == I915_FORMAT_MOD_4_TILED ||
>   	       fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>   	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>   }
> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct fb_blit_upload *blit,
>   	fini_buf(src);
>   }
>   
> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
> +					   uint32_t plane, uint32_t memregion)
> +{
> +	uint32_t name, handle;
> +	struct blt_copy_object *blt;
> +	enum blt_tiling_type blt_tile;
> +	uint64_t stride;
> +
> +	blt = malloc(sizeof(*blt));
> +	igt_assert(blt);
> +
> +	name = gem_flink(fb->fd, fb->gem_handle);
> +	handle = gem_open(fb->fd, name);
> +
> +	blt_tile = fb_tile_to_blt_tile(fb->modifier);
> +	stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4;
> +
> +	blt_set_object(blt, handle, fb->size, memregion,
> +		       intel_get_uc_mocs(fb->fd),
> +		       blt_tile,
> +		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
> +		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
> +
> +	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);

Why do we go with fb->width instead of fb->plane_width[plane]?

Also, in blt_set_geom, you're passing 0s instead of x_offset and 
y_offset, which have to be set in dword6 and dword11. I'm not sure if 
that's correct.

> +
> +	blt->plane_offset = fb->offsets[plane];
> +
> +	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
> +					     PROT_READ | PROT_WRITE);
> +	return blt;
> +}
> +
> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
> +{
> +	switch (fb->plane_bpp[0]) {
> +	case 8:
> +		return CD_8bit;
> +	case 16:
> +		return CD_16bit;
> +	case 32:
> +		return CD_32bit;
> +	case 64:
> +		return CD_64bit;
> +	case 96:
> +		return CD_96bit;
> +	case 128:
> +		return CD_128bit;
> +	default:
> +		igt_assert(0);
> +	}
> +}
> +
> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_3D)
> +
> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_MEDIA)
> +
> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
> +				       const struct igt_fb *fb)
> +{
> +	if (blt->src.compression == COMPRESSION_DISABLED &&
> +	    blt->dst.compression == COMPRESSION_DISABLED)
> +		return 0;
> +
> +	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
> +		switch (blt->color_depth) {
> +		case CD_32bit:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
> +		}
> +	} else if (BLT_TARGET_MC(blt->src)) {
> +		switch (fb->drm_format) {
> +		case DRM_FORMAT_XRGB8888:
> +			return 8;
> +		case DRM_FORMAT_XYUV8888:
> +			return 9;
> +		case DRM_FORMAT_NV12:
> +			return 9;
> +		case DRM_FORMAT_P010:
> +		case DRM_FORMAT_P012:
> +		case DRM_FORMAT_P016:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
> +		}
> +	} else if (BLT_TARGET_MC(blt->dst)) {
> +		igt_assert_f(0, "Destination compression not supported on mc ccs\n");
> +	} else {
> +		igt_assert_f(0, "unknown compression\n");
> +	}
> +}
> +
>   static void blitcopy(const struct igt_fb *dst_fb,
>   		     const struct igt_fb *src_fb)
>   {
>   	uint32_t src_tiling, dst_tiling;
>   	uint32_t ctx = 0;
>   	uint64_t ahnd = 0;
> +	const intel_ctx_t *ictx = NULL;
> +	struct intel_execution_engine2 *e;
> +	uint32_t bb;
> +	uint64_t bb_size = 4096;
> +	struct blt_copy_data blt = {};
> +	struct blt_copy_object *src, *dst;
> +	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
> +	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
> +			   ? REGION_LMEM(0) : REGION_SMEM;
>   
>   	igt_assert_eq(dst_fb->fd, src_fb->fd);
>   	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   
>   	if (is_i915_device(dst_fb->fd) && !gem_has_relocations(dst_fb->fd)) {
>   		igt_require(gem_has_contexts(dst_fb->fd));
> +		ictx = intel_ctx_create_all_physical(src_fb->fd);

Why do we take src_fb when we have dst_fb everywhere else? Maybe it 
doesn't matter much, but wanted to check it anyway.

>   		ctx = gem_context_create(dst_fb->fd);
>   		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
> +
> +		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
> +							  &bb,
> +							  &bb_size,
> +							  mem_region) == 0);
>   	}
>   
>   	for (int i = 0; i < dst_fb->num_planes; i++) {
>   		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>   		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>   		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
> -		/*
> -		 * On GEN12+ X-tiled format support is removed from the fast
> -		 * blit command, so use the XY_SRC blit command for it
> -		 * instead.
> -		 */
> +
>   		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {

I know it's beyond the scope of this patch, but do you plan to switch to 
intel_blt.c's fast copy as well?

>   			igt_blitter_fast_copy__raw(dst_fb->fd,
>   						   ahnd, ctx, NULL,
> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   						   dst_tiling,
>   						   0, 0 /* dst_x, dst_y */,
>   						   dst_fb->size);
> +		} else if (ahnd && block_copy_ok(src_fb) && block_copy_ok(dst_fb)) {
> +			for_each_ctx_engine(src_fb->fd, ictx, e) {
> +				if (gem_engine_can_block_copy(src_fb->fd, e))
> +					break;
> +			}
> +			igt_assert_f(e, "No block copy capable engine found!\n");
> +
> +			src = blt_fb_init(src_fb, i, mem_region);
> +			dst = blt_fb_init(dst_fb, i, mem_region);
> +
> +			memset(&blt, 0, sizeof(blt));
> +			blt.color_depth = blt_get_bpp(src_fb);

It gets bpp only from fb->plane_bpp[0], whereas in src_copy we take 
(dst)_fb->plane_bpp[i]. Is this bpp still correct?

> +			blt_set_copy_object(&blt.src, src);
> +			blt_set_copy_object(&blt.dst, dst);
> +
> +			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {

This check might not be correct on some platforms. To check if we need 
to fill in ext part, you could do a similar check as in commit 
45da871dd268 ("tests/gem_ccs: Check for extended block-copy and 
compression support").

+Zbigniew, what is the status of HAS_FLATCCS? How is it useful in the 
context of blitter copy? I believe we want to switch to using command 
flags, like BLT_CMD_EXTENDED? Or am I misremembering something?

All the best,
Karolina

> +				blt_set_object_ext(&ext.src,
> +						   blt_compression_format(&blt, src_fb),
> +						   src_fb->width, src_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				blt_set_object_ext(&ext.dst,
> +						   blt_compression_format(&blt, dst_fb),
> +						   dst_fb->width, dst_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				pext = &ext;
> +			}
> +
> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
> +
> +			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
> +			gem_sync(src_fb->fd, blt.dst.handle);
> +
> +			blt_destroy_object(src_fb->fd, src);
> +			blt_destroy_object(dst_fb->fd, dst);
>   		} else {
>   			igt_blitter_src_copy(dst_fb->fd,
>   					     ahnd, ctx, NULL,
> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   	if (ctx)
>   		gem_context_destroy(dst_fb->fd, ctx);
>   	put_ahnd(ahnd);
> +	intel_ctx_destroy(src_fb->fd, ictx);
>   }
>   
>   static void free_linear_mapping(struct fb_blit_upload *blit)

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Juha-Pekka Heikkila]

On 29.6.2023 11.45, Karolina Stolarek wrote:
> Hi Juha-Pekka,
> 
> On 27.06.2023 19:22, Juha-Pekka Heikkila wrote:
>> Use intel_blt functions on blitter path and on i915 devices with
>> flat ccs use blitter instead of render copy.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>>   lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
>>   1 file changed, 186 insertions(+), 23 deletions(-)
>>
>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>> index 402fadf41..d8f2cc640 100644
>> --- a/lib/igt_fb.c
>> +++ b/lib/igt_fb.c
>> @@ -35,6 +35,8 @@
>>   #include "drmtest.h"
>>   #include "i915/gem_create.h"
>>   #include "i915/gem_mman.h"
>> +#include "intel_blt.h"
>> +#include "intel_mocs.h"
>>   #include "igt_aux.h"
>>   #include "igt_color_encoding.h"
>>   #include "igt_fb.h"
>> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>> modifier, int fb_bpp,
>>           *height_ret = 1;
>>           break;
>>       case I915_FORMAT_MOD_X_TILED:
>> -        igt_require_i915(fd);
>> +        igt_require_intel(fd);
>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>               *width_ret = 128;
>>               *height_ret = 16;
>> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>> modifier, int fb_bpp,
>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>       case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>> -        igt_require_i915(fd);
>> +        igt_require_intel(fd);
>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>               *width_ret = 128;
>>               *height_ret = 16;
>> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>>       struct intel_bb *ibb;
>>   };
>> -static bool fast_blit_ok(const struct igt_fb *fb)
>> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
> 
> Could we promote this function to intel_blt.c? These enums are not just 
> fb-specific, they are legacy stuff, and I think that tests such as 
> gem_blits would make use of such converter.

We can do that but I'd rather commit this as is and then add form of 
clean up on top with this type changes as it will then need all those 
other places patched as well.

> 
>>   {
>> -    int dev_id = intel_get_drm_devid(fb->fd);
>> -    int ver = intel_display_ver(dev_id);
>> -
>> -    if (ver < 9)
>> -        return false;
>> -
>> -    if (ver < 12)
>> -        return true;
>> +    switch (igt_fb_mod_to_tiling(tile)) {
>> +    case I915_TILING_NONE:
>> +        return T_LINEAR;
>> +    case I915_TILING_X:
>> +        return T_XMAJOR;
>> +    case I915_TILING_Y:
>> +        return T_YMAJOR;
>> +    case I915_TILING_4:
>> +        return T_TILE4;
>> +    case I915_TILING_Yf:
>> +        return T_YFMAJOR;
>> +    default:
>> +        igt_assert_f(0, "Unknown tiling!\n");
>> +    }
>> +}
>> -    if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
>> -        return true;
>> +static bool fast_blit_ok(const struct igt_fb *fb)
>> +{
>> +    return blt_has_fast_copy(fb->fd) &&
>> +        !is_ccs_modifier(fb->modifier) &&
>> +        blt_fast_copy_supports_tiling(fb->fd,
>> +                           fb_tile_to_blt_tile(fb->modifier));
> 
> Nit: this line is slightly misaligned
> 
>> +}
>> -    return fb->modifier != I915_FORMAT_MOD_X_TILED;
>> +static bool block_copy_ok(const struct igt_fb *fb)
>> +{
>> +    return blt_has_block_copy(fb->fd) &&
>> +        blt_block_copy_supports_tiling(fb->fd,
>> +                           fb_tile_to_blt_tile(fb->modifier));
>>   }
>>   static bool blitter_ok(const struct igt_fb *fb)
>>   {
>> -    if (!is_i915_device(fb->fd))
>> +    if (!is_intel_device(fb->fd))
>>           return false;
>> -    if (is_ccs_modifier(fb->modifier))
>> +    if ((is_ccs_modifier(fb->modifier) &&
>> +         !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
>> +         || is_gen12_mc_ccs_modifier(fb->modifier))
> 
> Nit: This || should go line up
> 
>>           return false;
>>       for (int i = 0; i < fb->num_planes; i++) {
>> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
>>           return false;
>>       return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>> -           is_ccs_modifier(fb->modifier) ||
>> -           (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>> +           (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && 
>> is_ccs_modifier(fb->modifier)) ||
>> +           is_gen12_mc_ccs_modifier(fb->modifier);
>>   }
>>   static bool use_blitter(const struct igt_fb *fb)
>> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>>           return false;
>>       return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>> +           fb->modifier == I915_FORMAT_MOD_4_TILED ||
>>              fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>              (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>>   }
>> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct 
>> fb_blit_upload *blit,
>>       fini_buf(src);
>>   }
>> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
>> +                       uint32_t plane, uint32_t memregion)
>> +{
>> +    uint32_t name, handle;
>> +    struct blt_copy_object *blt;
>> +    enum blt_tiling_type blt_tile;
>> +    uint64_t stride;
>> +
>> +    blt = malloc(sizeof(*blt));
>> +    igt_assert(blt);
>> +
>> +    name = gem_flink(fb->fd, fb->gem_handle);
>> +    handle = gem_open(fb->fd, name);
>> +
>> +    blt_tile = fb_tile_to_blt_tile(fb->modifier);
>> +    stride = blt_tile == T_LINEAR ? fb->strides[plane] : 
>> fb->strides[plane] / 4;
>> +
>> +    blt_set_object(blt, handle, fb->size, memregion,
>> +               intel_get_uc_mocs(fb->fd),
>> +               blt_tile,
>> +               is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : 
>> COMPRESSION_DISABLED,
>> +               is_gen12_mc_ccs_modifier(fb->modifier) ? 
>> COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
>> +
>> +    blt_set_geom(blt, stride, 0, 0, fb->width, 
>> fb->plane_height[plane], 0, 0);
> 
> Why do we go with fb->width instead of fb->plane_width[plane]?

For blitter with planar formats will need to use fb->width, otherwise 
part of uv plane would not get copied.

> 
> Also, in blt_set_geom, you're passing 0s instead of x_offset and 
> y_offset, which have to be set in dword6 and dword11. I'm not sure if 
> that's correct.

Here those offsets will always be zero, they cannot be anything else. 
There are no x_offset or y_offset parameters that I could pass which 
would make sense in this copy. Framebuffer will always be copied in full 
when calling this function.

> 
>> +
>> +    blt->plane_offset = fb->offsets[plane];
>> +
>> +    blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
>> +                         PROT_READ | PROT_WRITE);
>> +    return blt;
>> +}
>> +
>> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
>> +{
>> +    switch (fb->plane_bpp[0]) {
>> +    case 8:
>> +        return CD_8bit;
>> +    case 16:
>> +        return CD_16bit;
>> +    case 32:
>> +        return CD_32bit;
>> +    case 64:
>> +        return CD_64bit;
>> +    case 96:
>> +        return CD_96bit;
>> +    case 128:
>> +        return CD_128bit;
>> +    default:
>> +        igt_assert(0);
>> +    }
>> +}
>> +
>> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
>> +              x.compression_type == COMPRESSION_TYPE_3D)
>> +
>> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
>> +              x.compression_type == COMPRESSION_TYPE_MEDIA)
>> +
>> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
>> +                       const struct igt_fb *fb)
>> +{
>> +    if (blt->src.compression == COMPRESSION_DISABLED &&
>> +        blt->dst.compression == COMPRESSION_DISABLED)
>> +        return 0;
>> +
>> +    if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
>> +        switch (blt->color_depth) {
>> +        case CD_32bit:
>> +            return 8;
>> +        default:
>> +            igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color 
>> depth\n");
>> +        }
>> +    } else if (BLT_TARGET_MC(blt->src)) {
>> +        switch (fb->drm_format) {
>> +        case DRM_FORMAT_XRGB8888:
>> +            return 8;
>> +        case DRM_FORMAT_XYUV8888:
>> +            return 9;
>> +        case DRM_FORMAT_NV12:
>> +            return 9;
>> +        case DRM_FORMAT_P010:
>> +        case DRM_FORMAT_P012:
>> +        case DRM_FORMAT_P016:
>> +            return 8;
>> +        default:
>> +            igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
>> +        }
>> +    } else if (BLT_TARGET_MC(blt->dst)) {
>> +        igt_assert_f(0, "Destination compression not supported on mc 
>> ccs\n");
>> +    } else {
>> +        igt_assert_f(0, "unknown compression\n");
>> +    }
>> +}
>> +
>>   static void blitcopy(const struct igt_fb *dst_fb,
>>                const struct igt_fb *src_fb)
>>   {
>>       uint32_t src_tiling, dst_tiling;
>>       uint32_t ctx = 0;
>>       uint64_t ahnd = 0;
>> +    const intel_ctx_t *ictx = NULL;
>> +    struct intel_execution_engine2 *e;
>> +    uint32_t bb;
>> +    uint64_t bb_size = 4096;
>> +    struct blt_copy_data blt = {};
>> +    struct blt_copy_object *src, *dst;
>> +    struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>> +    uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>> +               ? REGION_LMEM(0) : REGION_SMEM;
>>       igt_assert_eq(dst_fb->fd, src_fb->fd);
>>       igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
>> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>       if (is_i915_device(dst_fb->fd) && 
>> !gem_has_relocations(dst_fb->fd)) {
>>           igt_require(gem_has_contexts(dst_fb->fd));
>> +        ictx = intel_ctx_create_all_physical(src_fb->fd);
> 
> Why do we take src_fb when we have dst_fb everywhere else? Maybe it 
> doesn't matter much, but wanted to check it anyway.

This I don't know why it is so, I saw some other code take this from 
source hence I did the same.

> 
>>           ctx = gem_context_create(dst_fb->fd);
>>           ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
>> +
>> +        igt_assert(__gem_create_in_memory_regions(src_fb->fd,
>> +                              &bb,
>> +                              &bb_size,
>> +                              mem_region) == 0);
>>       }
>>       for (int i = 0; i < dst_fb->num_planes; i++) {
>>           igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>>           igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>>           igt_assert_eq(dst_fb->plane_height[i], 
>> src_fb->plane_height[i]);
>> -        /*
>> -         * On GEN12+ X-tiled format support is removed from the fast
>> -         * blit command, so use the XY_SRC blit command for it
>> -         * instead.
>> -         */
>> +
>>           if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
> 
> I know it's beyond the scope of this patch, but do you plan to switch to 
> intel_blt.c's fast copy as well?

No, that fast copy igt_blitter_fast_copy__raw() is here also for 
platforms where relocations are supported. If this was changed there 
would come need to add another blitting case or go around need for ahnd.

> 
>>               igt_blitter_fast_copy__raw(dst_fb->fd,
>>                              ahnd, ctx, NULL,
>> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>                              dst_tiling,
>>                              0, 0 /* dst_x, dst_y */,
>>                              dst_fb->size);
>> +        } else if (ahnd && block_copy_ok(src_fb) && 
>> block_copy_ok(dst_fb)) {
>> +            for_each_ctx_engine(src_fb->fd, ictx, e) {
>> +                if (gem_engine_can_block_copy(src_fb->fd, e))
>> +                    break;
>> +            }
>> +            igt_assert_f(e, "No block copy capable engine found!\n");
>> +
>> +            src = blt_fb_init(src_fb, i, mem_region);
>> +            dst = blt_fb_init(dst_fb, i, mem_region);
>> +
>> +            memset(&blt, 0, sizeof(blt));
>> +            blt.color_depth = blt_get_bpp(src_fb);
> 
> It gets bpp only from fb->plane_bpp[0], whereas in src_copy we take 
> (dst)_fb->plane_bpp[i]. Is this bpp still correct?

This is what is generally used. Currently when handling framebuffer 
surfaces with pixel data information their bpp is always the same on i915.

> 
>> +            blt_set_copy_object(&blt.src, src);
>> +            blt_set_copy_object(&blt.dst, dst);
>> +
>> +            if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
> 
> This check might not be correct on some platforms. To check if we need 
> to fill in ext part, you could do a similar check as in commit 
> 45da871dd268 ("tests/gem_ccs: Check for extended block-copy and 
> compression support").
> 
> +Zbigniew, what is the status of HAS_FLATCCS? How is it useful in the 
> context of blitter copy? I believe we want to switch to using command 
> flags, like BLT_CMD_EXTENDED? Or am I misremembering something?
> 

This is bit double edged situation. Even if for MTL there would be added 
support for compression into intel_blt, all the related handling for aux 
ccs would still not be here on igt_fb.c. For flat ccs everything that is 
needed is now in place and for time being it seems correct, everything 
matches. Do note this in not only controlled by HAS_FLATCCS() but also 
by modifiers which actually arrive onto this part of code.

/Juha-Pekka

> 
>> +                blt_set_object_ext(&ext.src,
>> +                           blt_compression_format(&blt, src_fb),
>> +                           src_fb->width, src_fb->height,
>> +                           SURFACE_TYPE_2D);
>> +
>> +                blt_set_object_ext(&ext.dst,
>> +                           blt_compression_format(&blt, dst_fb),
>> +                           dst_fb->width, dst_fb->height,
>> +                           SURFACE_TYPE_2D);
>> +
>> +                pext = &ext;
>> +            }
>> +
>> +            blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>> +
>> +            blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
>> +            gem_sync(src_fb->fd, blt.dst.handle);
>> +
>> +            blt_destroy_object(src_fb->fd, src);
>> +            blt_destroy_object(dst_fb->fd, dst);
>>           } else {
>>               igt_blitter_src_copy(dst_fb->fd,
>>                            ahnd, ctx, NULL,
>> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>       if (ctx)
>>           gem_context_destroy(dst_fb->fd, ctx);
>>       put_ahnd(ahnd);
>> +    intel_ctx_destroy(src_fb->fd, ictx);
>>   }
>>   static void free_linear_mapping(struct fb_blit_upload *blit)

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Karolina Stolarek]

On 29.06.2023 13:17, Juha-Pekka Heikkila wrote:
> On 29.6.2023 11.45, Karolina Stolarek wrote:
>> Hi Juha-Pekka,
>>
>> On 27.06.2023 19:22, Juha-Pekka Heikkila wrote:
>>> Use intel_blt functions on blitter path and on i915 devices with
>>> flat ccs use blitter instead of render copy.
>>>
>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>> ---
>>>   lib/igt_fb.c | 209 +++++++++++++++++++++++++++++++++++++++++++++------
>>>   1 file changed, 186 insertions(+), 23 deletions(-)
>>>
>>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>>> index 402fadf41..d8f2cc640 100644
>>> --- a/lib/igt_fb.c
>>> +++ b/lib/igt_fb.c
>>> @@ -35,6 +35,8 @@
>>>   #include "drmtest.h"
>>>   #include "i915/gem_create.h"
>>>   #include "i915/gem_mman.h"
>>> +#include "intel_blt.h"
>>> +#include "intel_mocs.h"
>>>   #include "igt_aux.h"
>>>   #include "igt_color_encoding.h"
>>>   #include "igt_fb.h"
>>> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>>> modifier, int fb_bpp,
>>>           *height_ret = 1;
>>>           break;
>>>       case I915_FORMAT_MOD_X_TILED:
>>> -        igt_require_i915(fd);
>>> +        igt_require_intel(fd);
>>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>>               *width_ret = 128;
>>>               *height_ret = 16;
>>> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>>> modifier, int fb_bpp,
>>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>>       case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>>> -        igt_require_i915(fd);
>>> +        igt_require_intel(fd);
>>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>>               *width_ret = 128;
>>>               *height_ret = 16;
>>> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>>>       struct intel_bb *ibb;
>>>   };
>>> -static bool fast_blit_ok(const struct igt_fb *fb)
>>> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
>>
>> Could we promote this function to intel_blt.c? These enums are not 
>> just fb-specific, they are legacy stuff, and I think that tests such 
>> as gem_blits would make use of such converter.
> 
> We can do that but I'd rather commit this as is and then add form of 
> clean up on top with this type changes as it will then need all those 
> other places patched as well.

Sure thing

> 
>>
>>>   {
>>> -    int dev_id = intel_get_drm_devid(fb->fd);
>>> -    int ver = intel_display_ver(dev_id);
>>> -
>>> -    if (ver < 9)
>>> -        return false;
>>> -
>>> -    if (ver < 12)
>>> -        return true;
>>> +    switch (igt_fb_mod_to_tiling(tile)) {
>>> +    case I915_TILING_NONE:
>>> +        return T_LINEAR;
>>> +    case I915_TILING_X:
>>> +        return T_XMAJOR;
>>> +    case I915_TILING_Y:
>>> +        return T_YMAJOR;
>>> +    case I915_TILING_4:
>>> +        return T_TILE4;
>>> +    case I915_TILING_Yf:
>>> +        return T_YFMAJOR;
>>> +    default:
>>> +        igt_assert_f(0, "Unknown tiling!\n");
>>> +    }
>>> +}
>>> -    if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
>>> -        return true;
>>> +static bool fast_blit_ok(const struct igt_fb *fb)
>>> +{
>>> +    return blt_has_fast_copy(fb->fd) &&
>>> +        !is_ccs_modifier(fb->modifier) &&
>>> +        blt_fast_copy_supports_tiling(fb->fd,
>>> +                           fb_tile_to_blt_tile(fb->modifier));
>>
>> Nit: this line is slightly misaligned
>>
>>> +}
>>> -    return fb->modifier != I915_FORMAT_MOD_X_TILED;
>>> +static bool block_copy_ok(const struct igt_fb *fb)
>>> +{
>>> +    return blt_has_block_copy(fb->fd) &&
>>> +        blt_block_copy_supports_tiling(fb->fd,
>>> +                           fb_tile_to_blt_tile(fb->modifier));
>>>   }
>>>   static bool blitter_ok(const struct igt_fb *fb)
>>>   {
>>> -    if (!is_i915_device(fb->fd))
>>> +    if (!is_intel_device(fb->fd))
>>>           return false;
>>> -    if (is_ccs_modifier(fb->modifier))
>>> +    if ((is_ccs_modifier(fb->modifier) &&
>>> +         !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
>>> +         || is_gen12_mc_ccs_modifier(fb->modifier))
>>
>> Nit: This || should go line up
>>
>>>           return false;
>>>       for (int i = 0; i < fb->num_planes; i++) {
>>> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb 
>>> *fb)
>>>           return false;
>>>       return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>> -           is_ccs_modifier(fb->modifier) ||
>>> -           (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>>> +           (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && 
>>> is_ccs_modifier(fb->modifier)) ||
>>> +           is_gen12_mc_ccs_modifier(fb->modifier);
>>>   }
>>>   static bool use_blitter(const struct igt_fb *fb)
>>> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>>>           return false;
>>>       return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>>> +           fb->modifier == I915_FORMAT_MOD_4_TILED ||
>>>              fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>>              (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>>>   }
>>> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct 
>>> fb_blit_upload *blit,
>>>       fini_buf(src);
>>>   }
>>> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
>>> +                       uint32_t plane, uint32_t memregion)
>>> +{
>>> +    uint32_t name, handle;
>>> +    struct blt_copy_object *blt;
>>> +    enum blt_tiling_type blt_tile;
>>> +    uint64_t stride;
>>> +
>>> +    blt = malloc(sizeof(*blt));
>>> +    igt_assert(blt);
>>> +
>>> +    name = gem_flink(fb->fd, fb->gem_handle);
>>> +    handle = gem_open(fb->fd, name);
>>> +
>>> +    blt_tile = fb_tile_to_blt_tile(fb->modifier);
>>> +    stride = blt_tile == T_LINEAR ? fb->strides[plane] : 
>>> fb->strides[plane] / 4;
>>> +
>>> +    blt_set_object(blt, handle, fb->size, memregion,
>>> +               intel_get_uc_mocs(fb->fd),
>>> +               blt_tile,
>>> +               is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : 
>>> COMPRESSION_DISABLED,
>>> +               is_gen12_mc_ccs_modifier(fb->modifier) ? 
>>> COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
>>> +
>>> +    blt_set_geom(blt, stride, 0, 0, fb->width, 
>>> fb->plane_height[plane], 0, 0);
>>
>> Why do we go with fb->width instead of fb->plane_width[plane]?
> 
> For blitter with planar formats will need to use fb->width, otherwise 
> part of uv plane would not get copied.
> 

OK, I clearly lack the context :) Thank you for the explaination.

>>
>> Also, in blt_set_geom, you're passing 0s instead of x_offset and 
>> y_offset, which have to be set in dword6 and dword11. I'm not sure if 
>> that's correct.
> 
> Here those offsets will always be zero, they cannot be anything else. 
> There are no x_offset or y_offset parameters that I could pass which 
> would make sense in this copy. Framebuffer will always be copied in full 
> when calling this function.

Right, I was asking because I saw some offsets defined, and wasn't sure 
if these 0s were intentional.

> 
>>
>>> +
>>> +    blt->plane_offset = fb->offsets[plane];
>>> +
>>> +    blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
>>> +                         PROT_READ | PROT_WRITE);
>>> +    return blt;
>>> +}
>>> +
>>> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
>>> +{
>>> +    switch (fb->plane_bpp[0]) {
>>> +    case 8:
>>> +        return CD_8bit;
>>> +    case 16:
>>> +        return CD_16bit;
>>> +    case 32:
>>> +        return CD_32bit;
>>> +    case 64:
>>> +        return CD_64bit;
>>> +    case 96:
>>> +        return CD_96bit;
>>> +    case 128:
>>> +        return CD_128bit;
>>> +    default:
>>> +        igt_assert(0);
>>> +    }
>>> +}
>>> +
>>> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
>>> +              x.compression_type == COMPRESSION_TYPE_3D)
>>> +
>>> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
>>> +              x.compression_type == COMPRESSION_TYPE_MEDIA)
>>> +
>>> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
>>> +                       const struct igt_fb *fb)
>>> +{
>>> +    if (blt->src.compression == COMPRESSION_DISABLED &&
>>> +        blt->dst.compression == COMPRESSION_DISABLED)
>>> +        return 0;
>>> +
>>> +    if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
>>> +        switch (blt->color_depth) {
>>> +        case CD_32bit:
>>> +            return 8;
>>> +        default:
>>> +            igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color 
>>> depth\n");
>>> +        }
>>> +    } else if (BLT_TARGET_MC(blt->src)) {
>>> +        switch (fb->drm_format) {
>>> +        case DRM_FORMAT_XRGB8888:
>>> +            return 8;
>>> +        case DRM_FORMAT_XYUV8888:
>>> +            return 9;
>>> +        case DRM_FORMAT_NV12:
>>> +            return 9;
>>> +        case DRM_FORMAT_P010:
>>> +        case DRM_FORMAT_P012:
>>> +        case DRM_FORMAT_P016:
>>> +            return 8;
>>> +        default:
>>> +            igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
>>> +        }
>>> +    } else if (BLT_TARGET_MC(blt->dst)) {
>>> +        igt_assert_f(0, "Destination compression not supported on mc 
>>> ccs\n");
>>> +    } else {
>>> +        igt_assert_f(0, "unknown compression\n");
>>> +    }
>>> +}
>>> +
>>>   static void blitcopy(const struct igt_fb *dst_fb,
>>>                const struct igt_fb *src_fb)
>>>   {
>>>       uint32_t src_tiling, dst_tiling;
>>>       uint32_t ctx = 0;
>>>       uint64_t ahnd = 0;
>>> +    const intel_ctx_t *ictx = NULL;
>>> +    struct intel_execution_engine2 *e;
>>> +    uint32_t bb;
>>> +    uint64_t bb_size = 4096;
>>> +    struct blt_copy_data blt = {};
>>> +    struct blt_copy_object *src, *dst;
>>> +    struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>>> +    uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>>> +               ? REGION_LMEM(0) : REGION_SMEM;
>>>       igt_assert_eq(dst_fb->fd, src_fb->fd);
>>>       igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
>>> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb 
>>> *dst_fb,
>>>       if (is_i915_device(dst_fb->fd) && 
>>> !gem_has_relocations(dst_fb->fd)) {
>>>           igt_require(gem_has_contexts(dst_fb->fd));
>>> +        ictx = intel_ctx_create_all_physical(src_fb->fd);
>>
>> Why do we take src_fb when we have dst_fb everywhere else? Maybe it 
>> doesn't matter much, but wanted to check it anyway.
> 
> This I don't know why it is so, I saw some other code take this from 
> source hence I did the same.

Right, I think that both should work, but you can leave it as it is.

> 
>>
>>>           ctx = gem_context_create(dst_fb->fd);
>>>           ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
>>> +
>>> +        igt_assert(__gem_create_in_memory_regions(src_fb->fd,
>>> +                              &bb,
>>> +                              &bb_size,
>>> +                              mem_region) == 0);
>>>       }
>>>       for (int i = 0; i < dst_fb->num_planes; i++) {
>>>           igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>>>           igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>>>           igt_assert_eq(dst_fb->plane_height[i], 
>>> src_fb->plane_height[i]);
>>> -        /*
>>> -         * On GEN12+ X-tiled format support is removed from the fast
>>> -         * blit command, so use the XY_SRC blit command for it
>>> -         * instead.
>>> -         */
>>> +
>>>           if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>>
>> I know it's beyond the scope of this patch, but do you plan to switch 
>> to intel_blt.c's fast copy as well?
> 
> No, that fast copy igt_blitter_fast_copy__raw() is here also for 
> platforms where relocations are supported. If this was changed there 
> would come need to add another blitting case or go around need for ahnd.

Hmm, adding support for relocations to intel_blt.c would be a good move, 
noted.

> 
>>
>>>               igt_blitter_fast_copy__raw(dst_fb->fd,
>>>                              ahnd, ctx, NULL,
>>> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>>                              dst_tiling,
>>>                              0, 0 /* dst_x, dst_y */,
>>>                              dst_fb->size);
>>> +        } else if (ahnd && block_copy_ok(src_fb) && 
>>> block_copy_ok(dst_fb)) {
>>> +            for_each_ctx_engine(src_fb->fd, ictx, e) {
>>> +                if (gem_engine_can_block_copy(src_fb->fd, e))
>>> +                    break;
>>> +            }
>>> +            igt_assert_f(e, "No block copy capable engine found!\n");
>>> +
>>> +            src = blt_fb_init(src_fb, i, mem_region);
>>> +            dst = blt_fb_init(dst_fb, i, mem_region);
>>> +
>>> +            memset(&blt, 0, sizeof(blt));
>>> +            blt.color_depth = blt_get_bpp(src_fb);
>>
>> It gets bpp only from fb->plane_bpp[0], whereas in src_copy we take 
>> (dst)_fb->plane_bpp[i]. Is this bpp still correct?
> 
> This is what is generally used. Currently when handling framebuffer 
> surfaces with pixel data information their bpp is always the same on i915.

I wonder if this will be also the case for Xe (but that's a problem for 
future selves).

> 
>>
>>> +            blt_set_copy_object(&blt.src, src);
>>> +            blt_set_copy_object(&blt.dst, dst);
>>> +
>>> +            if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
>>
>> This check might not be correct on some platforms. To check if we need 
>> to fill in ext part, you could do a similar check as in commit 
>> 45da871dd268 ("tests/gem_ccs: Check for extended block-copy and 
>> compression support").
>>
>> +Zbigniew, what is the status of HAS_FLATCCS? How is it useful in the 
>> context of blitter copy? I believe we want to switch to using command 
>> flags, like BLT_CMD_EXTENDED? Or am I misremembering something?
>>
> 
> This is bit double edged situation. Even if for MTL there would be added 
> support for compression into intel_blt, all the related handling for aux 
> ccs would still not be here on igt_fb.c. For flat ccs everything that is 
> needed is now in place and for time being it seems correct, everything 
> matches. Do note this in not only controlled by HAS_FLATCCS() but also 
> by modifiers which actually arrive onto this part of code.

Hmm, I see, let's leave it for now and we can revisit it in the future.

Thanks for answering my questions. Like I said, there are two nits that 
would be good to tidy up, but everything else looks good to me:

Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>

All the best,
Karolina

> 
> /Juha-Pekka
> 
>>
>>> +                blt_set_object_ext(&ext.src,
>>> +                           blt_compression_format(&blt, src_fb),
>>> +                           src_fb->width, src_fb->height,
>>> +                           SURFACE_TYPE_2D);
>>> +
>>> +                blt_set_object_ext(&ext.dst,
>>> +                           blt_compression_format(&blt, dst_fb),
>>> +                           dst_fb->width, dst_fb->height,
>>> +                           SURFACE_TYPE_2D);
>>> +
>>> +                pext = &ext;
>>> +            }
>>> +
>>> +            blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>>> +
>>> +            blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
>>> +            gem_sync(src_fb->fd, blt.dst.handle);
>>> +
>>> +            blt_destroy_object(src_fb->fd, src);
>>> +            blt_destroy_object(dst_fb->fd, dst);
>>>           } else {
>>>               igt_blitter_src_copy(dst_fb->fd,
>>>                            ahnd, ctx, NULL,
>>> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>>       if (ctx)
>>>           gem_context_destroy(dst_fb->fd, ctx);
>>>       put_ahnd(ahnd);
>>> +    intel_ctx_destroy(src_fb->fd, ictx);
>>>   }
>>>   static void free_linear_mapping(struct fb_blit_upload *blit)
> 

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Juha-Pekka Heikkila]

On 29.6.2023 14.51, Karolina Stolarek wrote:
> On 29.06.2023 13:17, Juha-Pekka Heikkila wrote:
>> On 29.6.2023 11.45, Karolina Stolarek wrote:
>>> Hi Juha-Pekka,
>>>
>>> On 27.06.2023 19:22, Juha-Pekka Heikkila wrote:
>>>> Use intel_blt functions on blitter path and on i915 devices with
>>>> flat ccs use blitter instead of render copy.
>>>>
>>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>>> ---
>>>>   lib/igt_fb.c | 209 
>>>> +++++++++++++++++++++++++++++++++++++++++++++------
>>>>   1 file changed, 186 insertions(+), 23 deletions(-)
>>>>
>>>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>>>> index 402fadf41..d8f2cc640 100644
>>>> --- a/lib/igt_fb.c
>>>> +++ b/lib/igt_fb.c
>>>> @@ -35,6 +35,8 @@
>>>>   #include "drmtest.h"
>>>>   #include "i915/gem_create.h"
>>>>   #include "i915/gem_mman.h"
>>>> +#include "intel_blt.h"
>>>> +#include "intel_mocs.h"
>>>>   #include "igt_aux.h"
>>>>   #include "igt_color_encoding.h"
>>>>   #include "igt_fb.h"
>>>> @@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>>>> modifier, int fb_bpp,
>>>>           *height_ret = 1;
>>>>           break;
>>>>       case I915_FORMAT_MOD_X_TILED:
>>>> -        igt_require_i915(fd);
>>>> +        igt_require_intel(fd);
>>>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>>>               *width_ret = 128;
>>>>               *height_ret = 16;
>>>> @@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t 
>>>> modifier, int fb_bpp,
>>>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
>>>>       case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
>>>>       case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
>>>> -        igt_require_i915(fd);
>>>> +        igt_require_intel(fd);
>>>>           if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
>>>>               *width_ret = 128;
>>>>               *height_ret = 16;
>>>> @@ -2453,29 +2455,47 @@ struct fb_blit_upload {
>>>>       struct intel_bb *ibb;
>>>>   };
>>>> -static bool fast_blit_ok(const struct igt_fb *fb)
>>>> +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
>>>
>>> Could we promote this function to intel_blt.c? These enums are not 
>>> just fb-specific, they are legacy stuff, and I think that tests such 
>>> as gem_blits would make use of such converter.
>>
>> We can do that but I'd rather commit this as is and then add form of 
>> clean up on top with this type changes as it will then need all those 
>> other places patched as well.
> 
> Sure thing
> 
>>
>>>
>>>>   {
>>>> -    int dev_id = intel_get_drm_devid(fb->fd);
>>>> -    int ver = intel_display_ver(dev_id);
>>>> -
>>>> -    if (ver < 9)
>>>> -        return false;
>>>> -
>>>> -    if (ver < 12)
>>>> -        return true;
>>>> +    switch (igt_fb_mod_to_tiling(tile)) {
>>>> +    case I915_TILING_NONE:
>>>> +        return T_LINEAR;
>>>> +    case I915_TILING_X:
>>>> +        return T_XMAJOR;
>>>> +    case I915_TILING_Y:
>>>> +        return T_YMAJOR;
>>>> +    case I915_TILING_4:
>>>> +        return T_TILE4;
>>>> +    case I915_TILING_Yf:
>>>> +        return T_YFMAJOR;
>>>> +    default:
>>>> +        igt_assert_f(0, "Unknown tiling!\n");
>>>> +    }
>>>> +}
>>>> -    if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
>>>> -        return true;
>>>> +static bool fast_blit_ok(const struct igt_fb *fb)
>>>> +{
>>>> +    return blt_has_fast_copy(fb->fd) &&
>>>> +        !is_ccs_modifier(fb->modifier) &&
>>>> +        blt_fast_copy_supports_tiling(fb->fd,
>>>> +                           fb_tile_to_blt_tile(fb->modifier));
>>>
>>> Nit: this line is slightly misaligned
>>>
>>>> +}
>>>> -    return fb->modifier != I915_FORMAT_MOD_X_TILED;
>>>> +static bool block_copy_ok(const struct igt_fb *fb)
>>>> +{
>>>> +    return blt_has_block_copy(fb->fd) &&
>>>> +        blt_block_copy_supports_tiling(fb->fd,
>>>> +                           fb_tile_to_blt_tile(fb->modifier));
>>>>   }
>>>>   static bool blitter_ok(const struct igt_fb *fb)
>>>>   {
>>>> -    if (!is_i915_device(fb->fd))
>>>> +    if (!is_intel_device(fb->fd))
>>>>           return false;
>>>> -    if (is_ccs_modifier(fb->modifier))
>>>> +    if ((is_ccs_modifier(fb->modifier) &&
>>>> +         !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
>>>> +         || is_gen12_mc_ccs_modifier(fb->modifier))
>>>
>>> Nit: This || should go line up
>>>
>>>>           return false;
>>>>       for (int i = 0; i < fb->num_planes; i++) {
>>>> @@ -2510,8 +2530,8 @@ static bool use_enginecopy(const struct igt_fb 
>>>> *fb)
>>>>           return false;
>>>>       return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>>> -           is_ccs_modifier(fb->modifier) ||
>>>> -           (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
>>>> +           (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && 
>>>> is_ccs_modifier(fb->modifier)) ||
>>>> +           is_gen12_mc_ccs_modifier(fb->modifier);
>>>>   }
>>>>   static bool use_blitter(const struct igt_fb *fb)
>>>> @@ -2520,6 +2540,7 @@ static bool use_blitter(const struct igt_fb *fb)
>>>>           return false;
>>>>       return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>>>> +           fb->modifier == I915_FORMAT_MOD_4_TILED ||
>>>>              fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
>>>>              (is_i915_device(fb->fd) && 
>>>> !gem_has_mappable_ggtt(fb->fd));
>>>>   }
>>>> @@ -2711,12 +2732,115 @@ static void copy_with_engine(struct 
>>>> fb_blit_upload *blit,
>>>>       fini_buf(src);
>>>>   }
>>>> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
>>>> +                       uint32_t plane, uint32_t memregion)
>>>> +{
>>>> +    uint32_t name, handle;
>>>> +    struct blt_copy_object *blt;
>>>> +    enum blt_tiling_type blt_tile;
>>>> +    uint64_t stride;
>>>> +
>>>> +    blt = malloc(sizeof(*blt));
>>>> +    igt_assert(blt);
>>>> +
>>>> +    name = gem_flink(fb->fd, fb->gem_handle);
>>>> +    handle = gem_open(fb->fd, name);
>>>> +
>>>> +    blt_tile = fb_tile_to_blt_tile(fb->modifier);
>>>> +    stride = blt_tile == T_LINEAR ? fb->strides[plane] : 
>>>> fb->strides[plane] / 4;
>>>> +
>>>> +    blt_set_object(blt, handle, fb->size, memregion,
>>>> +               intel_get_uc_mocs(fb->fd),
>>>> +               blt_tile,
>>>> +               is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED 
>>>> : COMPRESSION_DISABLED,
>>>> +               is_gen12_mc_ccs_modifier(fb->modifier) ? 
>>>> COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
>>>> +
>>>> +    blt_set_geom(blt, stride, 0, 0, fb->width, 
>>>> fb->plane_height[plane], 0, 0);
>>>
>>> Why do we go with fb->width instead of fb->plane_width[plane]?
>>
>> For blitter with planar formats will need to use fb->width, otherwise 
>> part of uv plane would not get copied.
>>
> 
> OK, I clearly lack the context :) Thank you for the explaination.
> 
>>>
>>> Also, in blt_set_geom, you're passing 0s instead of x_offset and 
>>> y_offset, which have to be set in dword6 and dword11. I'm not sure if 
>>> that's correct.
>>
>> Here those offsets will always be zero, they cannot be anything else. 
>> There are no x_offset or y_offset parameters that I could pass which 
>> would make sense in this copy. Framebuffer will always be copied in 
>> full when calling this function.
> 
> Right, I was asking because I saw some offsets defined, and wasn't sure 
> if these 0s were intentional.
> 
>>
>>>
>>>> +
>>>> +    blt->plane_offset = fb->offsets[plane];
>>>> +
>>>> +    blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
>>>> +                         PROT_READ | PROT_WRITE);
>>>> +    return blt;
>>>> +}
>>>> +
>>>> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
>>>> +{
>>>> +    switch (fb->plane_bpp[0]) {
>>>> +    case 8:
>>>> +        return CD_8bit;
>>>> +    case 16:
>>>> +        return CD_16bit;
>>>> +    case 32:
>>>> +        return CD_32bit;
>>>> +    case 64:
>>>> +        return CD_64bit;
>>>> +    case 96:
>>>> +        return CD_96bit;
>>>> +    case 128:
>>>> +        return CD_128bit;
>>>> +    default:
>>>> +        igt_assert(0);
>>>> +    }
>>>> +}
>>>> +
>>>> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
>>>> +              x.compression_type == COMPRESSION_TYPE_3D)
>>>> +
>>>> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
>>>> +              x.compression_type == COMPRESSION_TYPE_MEDIA)
>>>> +
>>>> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
>>>> +                       const struct igt_fb *fb)
>>>> +{
>>>> +    if (blt->src.compression == COMPRESSION_DISABLED &&
>>>> +        blt->dst.compression == COMPRESSION_DISABLED)
>>>> +        return 0;
>>>> +
>>>> +    if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
>>>> +        switch (blt->color_depth) {
>>>> +        case CD_32bit:
>>>> +            return 8;
>>>> +        default:
>>>> +            igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color 
>>>> depth\n");
>>>> +        }
>>>> +    } else if (BLT_TARGET_MC(blt->src)) {
>>>> +        switch (fb->drm_format) {
>>>> +        case DRM_FORMAT_XRGB8888:
>>>> +            return 8;
>>>> +        case DRM_FORMAT_XYUV8888:
>>>> +            return 9;
>>>> +        case DRM_FORMAT_NV12:
>>>> +            return 9;
>>>> +        case DRM_FORMAT_P010:
>>>> +        case DRM_FORMAT_P012:
>>>> +        case DRM_FORMAT_P016:
>>>> +            return 8;
>>>> +        default:
>>>> +            igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown 
>>>> format\n");
>>>> +        }
>>>> +    } else if (BLT_TARGET_MC(blt->dst)) {
>>>> +        igt_assert_f(0, "Destination compression not supported on 
>>>> mc ccs\n");
>>>> +    } else {
>>>> +        igt_assert_f(0, "unknown compression\n");
>>>> +    }
>>>> +}
>>>> +
>>>>   static void blitcopy(const struct igt_fb *dst_fb,
>>>>                const struct igt_fb *src_fb)
>>>>   {
>>>>       uint32_t src_tiling, dst_tiling;
>>>>       uint32_t ctx = 0;
>>>>       uint64_t ahnd = 0;
>>>> +    const intel_ctx_t *ictx = NULL;
>>>> +    struct intel_execution_engine2 *e;
>>>> +    uint32_t bb;
>>>> +    uint64_t bb_size = 4096;
>>>> +    struct blt_copy_data blt = {};
>>>> +    struct blt_copy_object *src, *dst;
>>>> +    struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>>>> +    uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>>>> +               ? REGION_LMEM(0) : REGION_SMEM;
>>>>       igt_assert_eq(dst_fb->fd, src_fb->fd);
>>>>       igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
>>>> @@ -2726,19 +2850,21 @@ static void blitcopy(const struct igt_fb 
>>>> *dst_fb,
>>>>       if (is_i915_device(dst_fb->fd) && 
>>>> !gem_has_relocations(dst_fb->fd)) {
>>>>           igt_require(gem_has_contexts(dst_fb->fd));
>>>> +        ictx = intel_ctx_create_all_physical(src_fb->fd);
>>>
>>> Why do we take src_fb when we have dst_fb everywhere else? Maybe it 
>>> doesn't matter much, but wanted to check it anyway.
>>
>> This I don't know why it is so, I saw some other code take this from 
>> source hence I did the same.
> 
> Right, I think that both should work, but you can leave it as it is.
> 
>>
>>>
>>>>           ctx = gem_context_create(dst_fb->fd);
>>>>           ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
>>>> +
>>>> +        igt_assert(__gem_create_in_memory_regions(src_fb->fd,
>>>> +                              &bb,
>>>> +                              &bb_size,
>>>> +                              mem_region) == 0);
>>>>       }
>>>>       for (int i = 0; i < dst_fb->num_planes; i++) {
>>>>           igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>>>>           igt_assert_eq(dst_fb->plane_width[i], 
>>>> src_fb->plane_width[i]);
>>>>           igt_assert_eq(dst_fb->plane_height[i], 
>>>> src_fb->plane_height[i]);
>>>> -        /*
>>>> -         * On GEN12+ X-tiled format support is removed from the fast
>>>> -         * blit command, so use the XY_SRC blit command for it
>>>> -         * instead.
>>>> -         */
>>>> +
>>>>           if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>>>
>>> I know it's beyond the scope of this patch, but do you plan to switch 
>>> to intel_blt.c's fast copy as well?
>>
>> No, that fast copy igt_blitter_fast_copy__raw() is here also for 
>> platforms where relocations are supported. If this was changed there 
>> would come need to add another blitting case or go around need for ahnd.
> 
> Hmm, adding support for relocations to intel_blt.c would be a good move, 
> noted.
> 
>>
>>>
>>>>               igt_blitter_fast_copy__raw(dst_fb->fd,
>>>>                              ahnd, ctx, NULL,
>>>> @@ -2757,6 +2883,42 @@ static void blitcopy(const struct igt_fb 
>>>> *dst_fb,
>>>>                              dst_tiling,
>>>>                              0, 0 /* dst_x, dst_y */,
>>>>                              dst_fb->size);
>>>> +        } else if (ahnd && block_copy_ok(src_fb) && 
>>>> block_copy_ok(dst_fb)) {
>>>> +            for_each_ctx_engine(src_fb->fd, ictx, e) {
>>>> +                if (gem_engine_can_block_copy(src_fb->fd, e))
>>>> +                    break;
>>>> +            }
>>>> +            igt_assert_f(e, "No block copy capable engine found!\n");
>>>> +
>>>> +            src = blt_fb_init(src_fb, i, mem_region);
>>>> +            dst = blt_fb_init(dst_fb, i, mem_region);
>>>> +
>>>> +            memset(&blt, 0, sizeof(blt));
>>>> +            blt.color_depth = blt_get_bpp(src_fb);
>>>
>>> It gets bpp only from fb->plane_bpp[0], whereas in src_copy we take 
>>> (dst)_fb->plane_bpp[i]. Is this bpp still correct?
>>
>> This is what is generally used. Currently when handling framebuffer 
>> surfaces with pixel data information their bpp is always the same on 
>> i915.
> 
> I wonder if this will be also the case for Xe (but that's a problem for 
> future selves).

For time being I think this will be valid also with Xe because Xe shares 
display code with i915.

> 
>>
>>>
>>>> +            blt_set_copy_object(&blt.src, src);
>>>> +            blt_set_copy_object(&blt.dst, dst);
>>>> +
>>>> +            if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
>>>
>>> This check might not be correct on some platforms. To check if we 
>>> need to fill in ext part, you could do a similar check as in commit 
>>> 45da871dd268 ("tests/gem_ccs: Check for extended block-copy and 
>>> compression support").
>>>
>>> +Zbigniew, what is the status of HAS_FLATCCS? How is it useful in the 
>>> context of blitter copy? I believe we want to switch to using command 
>>> flags, like BLT_CMD_EXTENDED? Or am I misremembering something?
>>>
>>
>> This is bit double edged situation. Even if for MTL there would be 
>> added support for compression into intel_blt, all the related handling 
>> for aux ccs would still not be here on igt_fb.c. For flat ccs 
>> everything that is needed is now in place and for time being it seems 
>> correct, everything matches. Do note this in not only controlled by 
>> HAS_FLATCCS() but also by modifiers which actually arrive onto this 
>> part of code.
> 
> Hmm, I see, let's leave it for now and we can revisit it in the future.
> 
> Thanks for answering my questions. Like I said, there are two nits that 
> would be good to tidy up, but everything else looks good to me:
> 
> Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>

Thanks Karolina. In the mean time this patch was separated into two 
parts, one where there were couple of more Xe related changes and other 
where these blitting related changes. May I use this R-b here

https://patchwork.freedesktop.org/patch/544642/?series=119886&rev=4

?

Those few alignment fixes and small adjustments I'll apply before 
pushing if I will not need another ci round.

/Juha-Pekka

>>
>>>
>>>> +                blt_set_object_ext(&ext.src,
>>>> +                           blt_compression_format(&blt, src_fb),
>>>> +                           src_fb->width, src_fb->height,
>>>> +                           SURFACE_TYPE_2D);
>>>> +
>>>> +                blt_set_object_ext(&ext.dst,
>>>> +                           blt_compression_format(&blt, dst_fb),
>>>> +                           dst_fb->width, dst_fb->height,
>>>> +                           SURFACE_TYPE_2D);
>>>> +
>>>> +                pext = &ext;
>>>> +            }
>>>> +
>>>> +            blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>>>> +
>>>> +            blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
>>>> +            gem_sync(src_fb->fd, blt.dst.handle);
>>>> +
>>>> +            blt_destroy_object(src_fb->fd, src);
>>>> +            blt_destroy_object(dst_fb->fd, dst);
>>>>           } else {
>>>>               igt_blitter_src_copy(dst_fb->fd,
>>>>                            ahnd, ctx, NULL,
>>>> @@ -2781,6 +2943,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>>>       if (ctx)
>>>>           gem_context_destroy(dst_fb->fd, ctx);
>>>>       put_ahnd(ahnd);
>>>> +    intel_ctx_destroy(src_fb->fd, ictx);
>>>>   }
>>>>   static void free_linear_mapping(struct fb_blit_upload *blit)
>>

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Karolina Stolarek]

On 29.06.2023 18:04, Juha-Pekka Heikkila wrote:
<big snip>

>>>>> +            blt_set_copy_object(&blt.src, src);
>>>>> +            blt_set_copy_object(&blt.dst, dst);
>>>>> +
>>>>> +            if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
>>>>
>>>> This check might not be correct on some platforms. To check if we 
>>>> need to fill in ext part, you could do a similar check as in commit 
>>>> 45da871dd268 ("tests/gem_ccs: Check for extended block-copy and 
>>>> compression support").
>>>>
>>>> +Zbigniew, what is the status of HAS_FLATCCS? How is it useful in 
>>>> the context of blitter copy? I believe we want to switch to using 
>>>> command flags, like BLT_CMD_EXTENDED? Or am I misremembering something?
>>>>
>>>
>>> This is bit double edged situation. Even if for MTL there would be 
>>> added support for compression into intel_blt, all the related 
>>> handling for aux ccs would still not be here on igt_fb.c. For flat 
>>> ccs everything that is needed is now in place and for time being it 
>>> seems correct, everything matches. Do note this in not only 
>>> controlled by HAS_FLATCCS() but also by modifiers which actually 
>>> arrive onto this part of code.
>>
>> Hmm, I see, let's leave it for now and we can revisit it in the future.
>>
>> Thanks for answering my questions. Like I said, there are two nits 
>> that would be good to tidy up, but everything else looks good to me:
>>
>> Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
> 
> Thanks Karolina. In the mean time this patch was separated into two 
> parts, one where there were couple of more Xe related changes and other 
> where these blitting related changes. May I use this R-b here
> 
> https://patchwork.freedesktop.org/patch/544642/?series=119886&rev=4

Yes, please do

> ?
> 
> Those few alignment fixes and small adjustments I'll apply before 
> pushing if I will not need another ci round.

I think you're good to go, the reported regressions seem unrelated to 
your patches.

Many thanks,
Karolina

> 
> /Juha-Pekka

[igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: On blitter path take clear color modifier into account

[Juha-Pekka Heikkila]

On blitter path take clear color modifier into account so rc ccs cc will
pass correctly.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index d8f2cc640..ebebe86cd 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2841,9 +2841,12 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
 	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
 			   ? REGION_LMEM(0) : REGION_SMEM;
+	/* To ignore CC plane */
+	uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+	uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
-	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
+	igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
 
 	src_tiling = igt_fb_mod_to_tiling(src_fb->modifier);
 	dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier);
@@ -2860,7 +2863,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 							  mem_region) == 0);
 	}
 
-	for (int i = 0; i < dst_fb->num_planes; i++) {
+	for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: On blitter path take clear color modifier into account

[Modem, Bhanuprakash]

On Tue-27-06-2023 10:52 pm, Juha-Pekka Heikkila wrote:
> On blitter path take clear color modifier into account so rc ccs cc will
> pass correctly.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Reviewed-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>

> ---
>   lib/igt_fb.c | 7 +++++--
>   1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index d8f2cc640..ebebe86cd 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -2841,9 +2841,12 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>   	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>   			   ? REGION_LMEM(0) : REGION_SMEM;
> +	/* To ignore CC plane */
> +	uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
> +	uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
>   
>   	igt_assert_eq(dst_fb->fd, src_fb->fd);
> -	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
> +	igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
>   
>   	src_tiling = igt_fb_mod_to_tiling(src_fb->modifier);
>   	dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier);
> @@ -2860,7 +2863,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>   							  mem_region) == 0);
>   	}
>   
> -	for (int i = 0; i < dst_fb->num_planes; i++) {
> +	for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
>   		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>   		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>   		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);

[igt-dev] ✗ GitLab.Pipeline: warning for Include intel_blt funtions to blitter path for igt_fb.c (rev2)

[Patchwork]

== Series Details ==

Series: Include intel_blt funtions to blitter path for igt_fb.c (rev2)
URL   : https://patchwork.freedesktop.org/series/119886/
State : warning

== Summary ==

Pipeline status: FAILED.

see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/920302 for the overview.

build-containers:build-debian has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44528801):
  time="2023-06-27T18:04:01Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)" 
  Building!
  STEP 1: FROM debian:buster
  Getting image source signatures
  Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
  Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
  Writing manifest to image destination
  Storing signatures
  STEP 2: RUN apt-get update
  error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-27T18:04:04Z" level=warning msg="signal: killed"
  time="2023-06-27T18:04:04Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
  container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
  : exit status 1
  Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
  section_end:1687889045:step_script
  section_start:1687889045:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1687889047:cleanup_file_variables
  ERROR: Job failed: exit code 1
  

build-containers:build-debian-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44528803):
  time="2023-06-27T18:04:03Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)" 
  Building!
  STEP 1: FROM debian:buster
  Getting image source signatures
  Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
  Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
  Writing manifest to image destination
  Storing signatures
  STEP 2: RUN apt-get update
  error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-27T18:04:07Z" level=warning msg="signal: killed"
  time="2023-06-27T18:04:07Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
  container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
  : exit status 1
  Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
  section_end:1687889047:step_script
  section_start:1687889047:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1687889050:cleanup_file_variables
  ERROR: Job failed: exit code 1
  

build-containers:build-debian-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44528802):
  time="2023-06-27T18:04:01Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)" 
  Building!
  STEP 1: FROM debian:buster
  Getting image source signatures
  Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
  Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
  Writing manifest to image destination
  Storing signatures
  STEP 2: RUN apt-get update
  error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-27T18:04:05Z" level=warning msg="signal: killed"
  time="2023-06-27T18:04:05Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
  container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
  : exit status 1
  Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
  section_end:1687889046:step_script
  section_start:1687889046:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1687889048:cleanup_file_variables
  ERROR: Job failed: exit code 1
  

build-containers:build-debian-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44528804):
  time="2023-06-27T18:04:05Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)" 
  Building!
  STEP 1: FROM debian:buster
  Getting image source signatures
  Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
  Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
  Writing manifest to image destination
  Storing signatures
  STEP 2: RUN apt-get update
  error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-27T18:04:08Z" level=warning msg="signal: killed"
  time="2023-06-27T18:04:08Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
  container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
  : exit status 1
  Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
  section_end:1687889049:step_script
  section_start:1687889049:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1687889051:cleanup_file_variables
  ERROR: Job failed: exit code 1
  

build-containers:build-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44528805):
  time="2023-06-27T18:04:03Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)" 
  Building!
  STEP 1: FROM fedora:31
  Getting image source signatures
  Copying blob sha256:854946d575a439a894349addd141568875d7c1e673d3286b08250f3dde002e6a
  Copying config sha256:7e94ed77b448a8d2ff08b92d3ca743e4e862c744892d6886c73487581eb5863a
  Writing manifest to image destination
  Storing signatures
  STEP 2: RUN dnf install -y 	gcc flex bison libatomic meson ninja-build xdotool 	'pkgconfig(libdrm)' 	'pkgconfig(pciaccess)' 	'pkgconfig(libkmod)' 	'pkgconfig(libprocps)' 	'pkgconfig(libunwind)' 	'pkgconfig(libdw)' 	'pkgconfig(pixman-1)' 	'pkgconfig(valgrind)' 	'pkgconfig(cairo)' 	'pkgconfig(libudev)' 	'pkgconfig(glib-2.0)' 	'pkgconfig(gsl)' 	'pkgconfig(alsa)' 	'pkgconfig(xmlrpc)' 	'pkgconfig(xmlrpc_util)' 	'pkgconfig(xmlrpc_client)' 	'pkgconfig(json-c)' 	'pkgconfig(gtk-doc)' 	'pkgconfig(xv)' 	'pkgconfig(xrandr)' 	python3-docutils
  error running container: error creating container for [/bin/sh -c dnf install -y 	gcc flex bison libatomic meson ninja-build xdotool 	'pkgconfig(libdrm)' 	'pkgconfig(pciaccess)' 	'pkgconfig(libkmod)' 	'pkgconfig(libprocps)' 	'pkgconfig(libunwind)' 	'pkgconfig(libdw)' 	'pkgconfig(pixman-1)' 	'pkgconfig(valgrind)' 	'pkgconfig(cairo)' 	'pkgconfig(libudev)' 	'pkgconfig(glib-2.0)' 	'pkgconfig(gsl)' 	'pkgconfig(alsa)' 	'pkgconfig(xmlrpc)' 	'pkgconfig(xmlrpc_util)' 	'pkgconfig(xmlrpc_client)' 	'pkgconfig(json-c)' 	'pkgconfig(gtk-doc)' 	'pkgconfig(xv)' 	'pkgconfig(xrandr)' 	python3-docutils]: time="2023-06-27T18:04:07Z" level=warning msg="signal: killed"
  time="2023-06-27T18:04:07Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
  container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
  : exit status 1
  Error: error building at STEP "RUN dnf install -y 	gcc flex bison libatomic meson ninja-build xdotool 	'pkgconfig(libdrm)' 	'pkgconfig(pciaccess)' 	'pkgconfig(libkmod)' 	'pkgconfig(libprocps)' 	'pkgconfig(libunwind)' 	'pkgconfig(libdw)' 	'pkgconfig(pixman-1)' 	'pkgconfig(valgrind)' 	'pkgconfig(cairo)' 	'pkgconfig(libudev)' 	'pkgconfig(glib-2.0)' 	'pkgconfig(gsl)' 	'pkgconfig(alsa)' 	'pkgconfig(xmlrpc)' 	'pkgconfig(xmlrpc_util)' 	'pkgconfig(xmlrpc_client)' 	'pkgconfig(json-c)' 	'pkgconfig(gtk-doc)' 	'pkgconfig(xv)' 	'pkgconfig(xrandr)' 	python3-docutils": error while running runtime: exit status 1
  section_end:1687889049:step_script
  section_start:1687889049:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1687889050:cleanup_file_variables
  ERROR: Job failed: exit code 1

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/920302

[igt-dev] ✓ Fi.CI.BAT: success for Include intel_blt funtions to blitter path for igt_fb.c (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 9900 bytes --]

== Series Details ==

Series: Include intel_blt funtions to blitter path for igt_fb.c (rev2)
URL   : https://patchwork.freedesktop.org/series/119886/
State : success

== Summary ==

CI Bug Log - changes from IGT_7352 -> IGTPW_9280
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html

Participating hosts (41 -> 42)
------------------------------

  Additional (2): fi-kbl-soraka bat-adlp-11 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_9280 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_auth@basic-auth:
    - bat-adlp-11:        NOTRUN -> [ABORT][1] ([i915#8011])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-adlp-11/igt@core_auth@basic-auth.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-mtlp-8:         NOTRUN -> [SKIP][4] ([i915#4613]) +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@i915_module_load@load:
    - bat-adlp-11:        NOTRUN -> [DMESG-WARN][5] ([i915#4423])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-adlp-11/igt@i915_module_load@load.html

  * igt@i915_pm_rps@basic-api:
    - bat-mtlp-8:         NOTRUN -> [SKIP][6] ([i915#6621])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][7] ([i915#5334] / [i915#7872])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_mocs:
    - bat-mtlp-8:         NOTRUN -> [DMESG-FAIL][8] ([i915#7059])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][9] ([i915#1886] / [i915#7913])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][10] -> [DMESG-WARN][11] ([i915#7699])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-mtlp-8:         NOTRUN -> [ABORT][12] ([i915#7982])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@reset:
    - bat-rpls-1:         [PASS][13] -> [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7981] / [i915#8347] / [i915#8384])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-rpls-1/igt@i915_selftest@live@reset.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-rpls-1/igt@i915_selftest@live@reset.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][15] ([fdo#109271]) +14 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence:
    - bat-adlp-9:         NOTRUN -> [SKIP][16] ([i915#3546]) +2 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-adlp-9/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4579])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-mtlp-8:         NOTRUN -> [SKIP][18] ([i915#3708]) +2 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-mtlp-8:         NOTRUN -> [SKIP][19] ([i915#3708] / [i915#4077]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@prime_vgem@basic-gtt.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - bat-mtlp-8:         [ABORT][20] ([i915#7077] / [i915#7977]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-mtlp-8/igt@i915_pm_rpm@basic-pci-d3-state.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-8/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_selftest@live@gt_engines:
    - bat-atsm-1:         [FAIL][22] ([i915#6268]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-atsm-1/igt@i915_selftest@live@gt_engines.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-atsm-1/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-glk-j4005:       [DMESG-FAIL][24] ([i915#5334]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_mocs:
    - bat-mtlp-6:         [DMESG-FAIL][26] ([i915#7059]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@requests:
    - bat-mtlp-6:         [DMESG-FAIL][28] ([i915#8497]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-mtlp-6/igt@i915_selftest@live@requests.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-6/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@slpc:
    - bat-mtlp-6:         [DMESG-WARN][30] ([i915#6367]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-mtlp-6/igt@i915_selftest@live@slpc.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-6/igt@i915_selftest@live@slpc.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-6:         [DMESG-FAIL][32] ([i915#6763]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/bat-mtlp-6/igt@i915_selftest@live@workarounds.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
  [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
  [i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7977]: https://gitlab.freedesktop.org/drm/intel/issues/7977
  [i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
  [i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7352 -> IGTPW_9280

  CI-20190529: 20190529
  CI_DRM_13328: 12cd6b2d321d9c034f3d4ba14788d68cb8da4eac @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9280: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html
  IGT_7352: 471bfababd070e1dac0ebb87470ac4f2ae85e663 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

-igt@xe_perf_pmu@any-engine-group-busy
-igt@xe_perf_pmu@compute-busy
-igt@xe_perf_pmu@copy-busy
-igt@xe_perf_pmu@render-busy
-igt@xe_perf_pmu@vcs-busy
-igt@xe_perf_pmu@vecs-busy

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html

[-- Attachment #2: Type: text/html, Size: 11586 bytes --]

[igt-dev] ✗ Fi.CI.IGT: failure for Include intel_blt funtions to blitter path for igt_fb.c (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 80485 bytes --]

== Series Details ==

Series: Include intel_blt funtions to blitter path for igt_fb.c (rev2)
URL   : https://patchwork.freedesktop.org/series/119886/
State : failure

== Summary ==

CI Bug Log - changes from IGT_7352_full -> IGTPW_9280_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_9280_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9280_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9280_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_ctx_persistence@engines-cleanup@vcs0:
    - shard-mtlp:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@gem_ctx_persistence@engines-cleanup@vcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@gem_ctx_persistence@engines-cleanup@vcs0.html

  * igt@gem_ctx_persistence@engines-cleanup@vcs1:
    - shard-mtlp:         [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@gem_ctx_persistence@engines-cleanup@vcs1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@gem_ctx_persistence@engines-cleanup@vcs1.html

  * igt@i915_pm_freq_api@freq-basic-api@gt0:
    - shard-mtlp:         [PASS][5] -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-1/igt@i915_pm_freq_api@freq-basic-api@gt0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@i915_pm_freq_api@freq-basic-api@gt0.html

  
New tests
---------

  New tests have been introduced between IGT_7352_full and IGTPW_9280_full:

### New IGT tests (3) ###

  * igt@kms_cursor_crc@cursor-alpha-transparent@pipe-a-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-alpha-transparent@pipe-d-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-hdmi-a-1:
    - Statuses : 3 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_9280_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][7] ([i915#8411]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#7701])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@device_reset@cold-reset-bound.html
    - shard-rkl:          NOTRUN -> [SKIP][9] ([i915#7701])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@device_reset@cold-reset-bound.html

  * igt@drm_fdinfo@busy-idle@bcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][10] ([i915#8414]) +4 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@drm_fdinfo@busy-idle@bcs0.html

  * igt@drm_fdinfo@busy-idle@ccs0:
    - shard-mtlp:         NOTRUN -> [SKIP][11] ([i915#4579] / [i915#8414])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@drm_fdinfo@busy-idle@ccs0.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][12] ([i915#7742])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@feature_discovery@chamelium:
    - shard-mtlp:         NOTRUN -> [SKIP][13] ([i915#4854])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@feature_discovery@chamelium.html

  * igt@feature_discovery@display-3x:
    - shard-rkl:          NOTRUN -> [SKIP][14] ([i915#1839])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@feature_discovery@display-3x.html

  * igt@gem_barrier_race@remote-request@rcs0:
    - shard-tglu:         NOTRUN -> [ABORT][15] ([i915#8211] / [i915#8234])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-8/igt@gem_barrier_race@remote-request@rcs0.html
    - shard-mtlp:         [PASS][16] -> [ABORT][17] ([i915#6333])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@gem_barrier_race@remote-request@rcs0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_basic@multigpu-create-close:
    - shard-mtlp:         NOTRUN -> [SKIP][18] ([i915#7697])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_basic@multigpu-create-close.html

  * igt@gem_caching@writes:
    - shard-mtlp:         NOTRUN -> [SKIP][19] ([i915#4873]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_caching@writes.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-tglu:         NOTRUN -> [SKIP][20] ([i915#6335])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-8/igt@gem_create@create-ext-cpu-access-big.html
    - shard-mtlp:         NOTRUN -> [SKIP][21] ([i915#6335])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_param@set-priority-not-supported:
    - shard-tglu:         NOTRUN -> [SKIP][22] ([fdo#109314])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@gem_ctx_param@set-priority-not-supported.html
    - shard-rkl:          NOTRUN -> [SKIP][23] ([fdo#109314])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@gem_ctx_param@set-priority-not-supported.html

  * igt@gem_ctx_persistence@saturated-hostile@vecs0:
    - shard-mtlp:         [PASS][24] -> [FAIL][25] ([i915#7816]) +2 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-3/igt@gem_ctx_persistence@saturated-hostile@vecs0.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@gem_ctx_persistence@saturated-hostile@vecs0.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          NOTRUN -> [ABORT][26] ([i915#7975] / [i915#8213])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-6/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@bonded-dual:
    - shard-mtlp:         NOTRUN -> [SKIP][27] ([i915#4771]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@gem_exec_balancer@bonded-dual.html

  * igt@gem_exec_balancer@full-pulse:
    - shard-dg2:          [PASS][28] -> [FAIL][29] ([i915#6032])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-12/igt@gem_exec_balancer@full-pulse.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@gem_exec_balancer@full-pulse.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-rkl:          NOTRUN -> [SKIP][30] ([i915#4525])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-rkl:          [PASS][31] -> [FAIL][32] ([i915#2846])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-7/igt@gem_exec_fair@basic-deadline.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share:
    - shard-mtlp:         NOTRUN -> [SKIP][33] ([i915#4473] / [i915#4771])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@gem_exec_fair@basic-none-share.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         NOTRUN -> [FAIL][34] ([i915#2842])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][35] -> [FAIL][36] ([i915#2842])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-rkl:          [PASS][37] -> [FAIL][38] ([i915#2842]) +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-4/igt@gem_exec_fair@basic-throttle@rcs0.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([fdo#109313])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
    - shard-tglu:         NOTRUN -> [SKIP][40] ([fdo#109313])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
    - shard-mtlp:         NOTRUN -> [SKIP][41] ([i915#3711])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_gttfill@multigpu-basic:
    - shard-rkl:          NOTRUN -> [SKIP][42] ([i915#7697])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@gem_exec_gttfill@multigpu-basic.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][43] ([i915#3281]) +4 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_reloc@basic-write-cpu-active:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#3281]) +3 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@gem_exec_reloc@basic-write-cpu-active.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-dg2:          NOTRUN -> [SKIP][45] ([i915#3281])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_schedule@preempt-queue-chain:
    - shard-mtlp:         NOTRUN -> [SKIP][46] ([i915#4812])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@gem_exec_schedule@preempt-queue-chain.html

  * igt@gem_exec_whisper@basic-contexts-forked-all:
    - shard-mtlp:         [PASS][47] -> [TIMEOUT][48] ([i915#8628])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@gem_exec_whisper@basic-contexts-forked-all.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@gem_exec_whisper@basic-contexts-forked-all.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          NOTRUN -> [SKIP][49] ([i915#2190])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@gem_huc_copy@huc-copy.html
    - shard-tglu:         NOTRUN -> [SKIP][50] ([i915#2190])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-mtlp:         NOTRUN -> [SKIP][51] ([i915#4613]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-rkl:          NOTRUN -> [SKIP][52] ([i915#4613]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_mmap_gtt@hang-user:
    - shard-mtlp:         NOTRUN -> [SKIP][53] ([i915#4077]) +8 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-3/igt@gem_mmap_gtt@hang-user.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-mtlp:         NOTRUN -> [SKIP][54] ([i915#4083]) +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_pwrite@basic-self:
    - shard-dg2:          NOTRUN -> [SKIP][55] ([i915#3282])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@gem_pwrite@basic-self.html

  * igt@gem_pxp@create-regular-buffer:
    - shard-rkl:          NOTRUN -> [SKIP][56] ([i915#4270])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@gem_pxp@create-regular-buffer.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
    - shard-tglu:         NOTRUN -> [SKIP][57] ([i915#4270])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-10/igt@gem_pxp@regular-baseline-src-copy-readible.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-mtlp:         NOTRUN -> [SKIP][58] ([i915#4270])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_readwrite@new-obj:
    - shard-mtlp:         NOTRUN -> [SKIP][59] ([i915#3282]) +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_readwrite@new-obj.html

  * igt@gem_render_copy@y-tiled-to-vebox-linear:
    - shard-mtlp:         NOTRUN -> [SKIP][60] ([i915#8428]) +3 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@gem_render_copy@y-tiled-to-vebox-linear.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          NOTRUN -> [SKIP][61] ([i915#8411]) +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#4079]) +1 similar issue
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_softpin@evict-snoop:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([fdo#109312])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@gem_softpin@evict-snoop.html
    - shard-tglu:         NOTRUN -> [SKIP][64] ([fdo#109312])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@gem_softpin@evict-snoop.html

  * igt@gem_tiled_blits@basic:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#4077]) +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-5/igt@gem_tiled_blits@basic.html

  * igt@gem_userptr_blits@access-control:
    - shard-mtlp:         NOTRUN -> [SKIP][66] ([i915#3297])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_userptr_blits@access-control.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-dg2:          NOTRUN -> [SKIP][67] ([i915#3297])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-11/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#3297])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gen7_exec_parse@basic-allocation:
    - shard-rkl:          NOTRUN -> [SKIP][69] ([fdo#109289])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@gen7_exec_parse@basic-allocation.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-mtlp:         NOTRUN -> [SKIP][70] ([i915#2856])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@batch-zero-length:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#2856])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@gen9_exec_parse@batch-zero-length.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-tglu:         NOTRUN -> [SKIP][72] ([i915#2527] / [i915#2856]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@gen9_exec_parse@bb-start-far.html

  * igt@i915_hangman@engine-engine-hang@vcs0:
    - shard-mtlp:         [PASS][73] -> [FAIL][74] ([i915#7069])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@i915_hangman@engine-engine-hang@vcs0.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@i915_hangman@engine-engine-hang@vcs0.html

  * igt@i915_pm_backlight@fade-with-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#7561])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@i915_pm_backlight@fade-with-dpms.html
    - shard-tglu:         NOTRUN -> [SKIP][76] ([i915#7561])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-3/igt@i915_pm_backlight@fade-with-dpms.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-rkl:          NOTRUN -> [SKIP][77] ([i915#658])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-tglu:         [PASS][78] -> [SKIP][79] ([i915#4281])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-tglu-2/igt@i915_pm_dc@dc9-dpms.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-3/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-rkl:          NOTRUN -> [SKIP][80] ([i915#8399])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-dg2:          [PASS][81] -> [FAIL][82] ([i915#8230])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-11/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [PASS][83] -> [SKIP][84] ([i915#1397]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-3/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-12/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@i915_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][85] -> [SKIP][86] ([i915#1397]) +1 similar issue
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-1/igt@i915_pm_rpm@modeset-non-lpsp.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp.html

  * igt@i915_pm_rpm@system-suspend-modeset:
    - shard-dg2:          [PASS][87] -> [FAIL][88] ([fdo#103375]) +4 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-1/igt@i915_pm_rpm@system-suspend-modeset.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-5/igt@i915_pm_rpm@system-suspend-modeset.html

  * igt@i915_pm_rps@reset:
    - shard-snb:          [PASS][89] -> [DMESG-FAIL][90] ([i915#8319])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-snb2/igt@i915_pm_rps@reset.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb4/igt@i915_pm_rps@reset.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][91] ([i915#4212])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y-rc_ccs-cc:
    - shard-tglu:         NOTRUN -> [SKIP][92] ([i915#8502]) +7 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y-rc_ccs-cc.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#404])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [PASS][94] -> [FAIL][95] ([i915#5138])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#5286]) +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
    - shard-tglu:         NOTRUN -> [SKIP][97] ([fdo#111615] / [i915#5286]) +1 similar issue
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-mtlp:         NOTRUN -> [FAIL][98] ([i915#3743]) +1 similar issue
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][99] ([fdo#111614]) +1 similar issue
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][100] ([fdo#111614])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][101] ([fdo#111614] / [i915#3638])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([i915#5190]) +2 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-mtlp:         NOTRUN -> [SKIP][103] ([fdo#111615]) +5 similar issues
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][104] ([fdo#110723]) +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
    - shard-tglu:         NOTRUN -> [SKIP][105] ([fdo#111615])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][106] ([i915#4538] / [i915#5190])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-12/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_joiner@2x-modeset:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#2705])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_big_joiner@2x-modeset.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][108] ([i915#6095]) +9 similar issues
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-3/igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-rkl:          NOTRUN -> [SKIP][109] ([i915#3886] / [i915#5354] / [i915#6095]) +1 similar issue
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][110] ([i915#3689] / [i915#5354]) +2 similar issues
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-11/igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-dg2:          NOTRUN -> [SKIP][111] ([i915#3689] / [i915#3886] / [i915#5354])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_mc_ccs:
    - shard-rkl:          NOTRUN -> [SKIP][112] ([i915#5354] / [i915#6095]) +2 similar issues
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_mc_ccs.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][113] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095]) +1 similar issue
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_mtl_mc_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#5354]) +10 similar issues
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_mtl_mc_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_mtl_rc_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#5354] / [i915#6095]) +5 similar issues
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-2/igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_mtl_rc_ccs.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs:
    - shard-rkl:          NOTRUN -> [SKIP][116] ([i915#5354]) +9 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][117] ([i915#3886] / [i915#6095]) +6 similar issues
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_mc_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][118] ([i915#3689] / [i915#5354] / [i915#6095]) +3 similar issues
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_mc_ccs.html

  * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][119] ([fdo#111615] / [i915#3689] / [i915#5354] / [i915#6095])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-4/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-tglu:         NOTRUN -> [SKIP][120] ([i915#3742])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][121] ([i915#7213]) +2 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html

  * igt@kms_cdclk@mode-transition@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][122] ([i915#4579] / [i915#7213])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_cdclk@mode-transition@pipe-d-edp-1.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][123] ([i915#4579]) +1 similar issue
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#4087]) +5 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-1.html

  * igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][125] ([i915#4087] / [i915#4579])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-rkl:          NOTRUN -> [SKIP][126] ([fdo#111827])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-tglu:         NOTRUN -> [SKIP][127] ([fdo#111827])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@kms_chamelium_color@ctm-negative.html
    - shard-mtlp:         NOTRUN -> [SKIP][128] ([fdo#111827])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#7828]) +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-tglu:         NOTRUN -> [SKIP][130] ([i915#7828]) +1 similar issue
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@vga-hpd-after-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][131] ([i915#7828]) +1 similar issue
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-11/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][132] ([i915#7828]) +2 similar issues
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@mei_interface:
    - shard-mtlp:         NOTRUN -> [SKIP][133] ([i915#8063])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@kms_content_protection@mei_interface.html

  * igt@kms_content_protection@srm:
    - shard-tglu:         NOTRUN -> [SKIP][134] ([i915#4579] / [i915#6944] / [i915#7116] / [i915#7118]) +1 similar issue
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-3/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([fdo#109279] / [i915#3359])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html
    - shard-rkl:          NOTRUN -> [SKIP][136] ([fdo#109279] / [i915#3359])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-dg2:          NOTRUN -> [SKIP][137] ([i915#3555] / [i915#4579]) +2 similar issues
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#3359])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#3555] / [i915#4579]) +5 similar issues
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
    - shard-tglu:         NOTRUN -> [SKIP][140] ([i915#3555] / [i915#4579]) +2 similar issues
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][141] ([i915#3359])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][142] ([i915#4213]) +1 similar issue
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][143] ([fdo#109274] / [i915#5354])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-11/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-tglu:         NOTRUN -> [SKIP][144] ([fdo#109274])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
    - shard-mtlp:         NOTRUN -> [SKIP][145] ([i915#3546]) +3 similar issues
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-tglu:         NOTRUN -> [SKIP][146] ([i915#4579])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-tglu:         NOTRUN -> [SKIP][147] ([i915#3840] / [i915#4579])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-rkl:          NOTRUN -> [SKIP][148] ([i915#4579])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][149] -> [FAIL][150] ([i915#4767])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][151] ([fdo#109274] / [i915#3637]) +4 similar issues
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
    - shard-mtlp:         NOTRUN -> [SKIP][152] ([i915#3637]) +5 similar issues
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([fdo#109274])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][154] -> [FAIL][155] ([i915#79])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-rkl:          NOTRUN -> [SKIP][156] ([fdo#111825]) +3 similar issues
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][157] ([i915#2587] / [i915#2672] / [i915#4579]) +1 similar issue
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][158] ([i915#2672] / [i915#4579])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-12/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][159] ([i915#2672] / [i915#4579])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-mtlp:         NOTRUN -> [SKIP][160] ([i915#5274])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-dg2:          [PASS][161] -> [FAIL][162] ([i915#6880]) +1 similar issue
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][163] ([i915#8708]) +1 similar issue
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-farfromfence-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#3458]) +4 similar issues
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-mtlp:         NOTRUN -> [SKIP][165] ([i915#1825]) +13 similar issues
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([fdo#111825] / [i915#1825]) +12 similar issues
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-tglu:         NOTRUN -> [SKIP][167] ([fdo#110189]) +9 similar issues
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][168] ([i915#3023]) +7 similar issues
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([i915#8708]) +2 similar issues
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglu:         NOTRUN -> [SKIP][170] ([fdo#109280]) +14 similar issues
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-dg2:          [PASS][171] -> [SKIP][172] ([i915#433])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-3/igt@kms_hdmi_inject@inject-audio.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          NOTRUN -> [SKIP][173] ([i915#4579] / [i915#6953] / [i915#8228])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_invalid_mode@clock-too-high@edp-1-pipe-b:
    - shard-mtlp:         NOTRUN -> [SKIP][174] ([i915#6403]) +2 similar issues
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@kms_invalid_mode@clock-too-high@edp-1-pipe-b.html

  * igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d:
    - shard-mtlp:         NOTRUN -> [SKIP][175] ([i915#4579] / [i915#6403])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][176] -> [FAIL][177] ([i915#8292])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-tglu-4/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][178] ([i915#5176]) +1 similar issue
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#4579] / [i915#5176]) +1 similar issue
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#4579] / [i915#5176]) +1 similar issue
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-5/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-d-hdmi-a-3.html

  * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-hdmi-a-1:
    - shard-snb:          NOTRUN -> [SKIP][181] ([fdo#109271] / [i915#4579]) +14 similar issues
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb1/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#5176]) +5 similar issues
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#5176]) +2 similar issues
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][184] ([i915#4579] / [i915#5176])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][185] ([i915#5235]) +5 similar issues
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([i915#4579] / [i915#5235]) +1 similar issue
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][187] ([i915#4579] / [i915#5235]) +3 similar issues
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][188] ([i915#5235]) +2 similar issues
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][189] ([i915#4579] / [i915#5235])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][190] ([i915#5235]) +3 similar issues
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25@pipe-a-vga-1:
    - shard-snb:          NOTRUN -> [SKIP][191] ([fdo#109271]) +36 similar issues
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb7/igt@kms_plane_scaling@planes-upscale-factor-0-25@pipe-a-vga-1.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-dg2:          NOTRUN -> [SKIP][192] ([i915#6524] / [i915#6805])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@cursor-plane-update-sf:
    - shard-rkl:          NOTRUN -> [SKIP][193] ([fdo#111068] / [i915#658])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_psr2_sf@cursor-plane-update-sf.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([fdo#111068] / [i915#658]) +1 similar issue
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@cursor_mmap_gtt:
    - shard-rkl:          NOTRUN -> [SKIP][195] ([i915#1072])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_psr@cursor_mmap_gtt.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-mtlp:         [PASS][196] -> [FAIL][197] ([i915#8726])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@kms_psr@psr2_primary_page_flip.html
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_psr@sprite_render:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#1072]) +1 similar issue
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@kms_psr@sprite_render.html

  * igt@kms_setmode@basic@pipe-a-vga-1:
    - shard-snb:          NOTRUN -> [FAIL][199] ([i915#5465]) +1 similar issue
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb5/igt@kms_setmode@basic@pipe-a-vga-1.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([fdo#109309])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vblank@pipe-c-wait-busy:
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#4070] / [i915#6768]) +1 similar issue
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_vblank@pipe-c-wait-busy.html

  * igt@kms_vblank@pipe-d-query-forked-busy:
    - shard-rkl:          NOTRUN -> [SKIP][202] ([i915#4070] / [i915#533] / [i915#6768]) +2 similar issues
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-1/igt@kms_vblank@pipe-d-query-forked-busy.html

  * igt@kms_vrr@flipline:
    - shard-mtlp:         NOTRUN -> [SKIP][203] ([i915#4579]) +8 similar issues
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@kms_vrr@flipline.html

  * igt@kms_writeback@writeback-check-output:
    - shard-rkl:          NOTRUN -> [SKIP][204] ([i915#2437])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-6/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-tglu:         NOTRUN -> [SKIP][205] ([i915#2437])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-7/igt@kms_writeback@writeback-fb-id.html
    - shard-mtlp:         NOTRUN -> [SKIP][206] ([i915#2437])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-tglu:         NOTRUN -> [SKIP][207] ([fdo#109289])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@busy-double-start@ccs3:
    - shard-dg2:          NOTRUN -> [FAIL][208] ([i915#4349]) +6 similar issues
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-5/igt@perf_pmu@busy-double-start@ccs3.html

  * igt@perf_pmu@busy-idle-check-all@ccs3:
    - shard-dg2:          [PASS][209] -> [FAIL][210] ([i915#4521]) +3 similar issues
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-1/igt@perf_pmu@busy-idle-check-all@ccs3.html
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@perf_pmu@busy-idle-check-all@ccs3.html

  * igt@prime_vgem@fence-read-hang:
    - shard-mtlp:         NOTRUN -> [SKIP][211] ([i915#3708]) +1 similar issue
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@prime_vgem@fence-read-hang.html

  * igt@sysfs_heartbeat_interval@mixed@ccs0:
    - shard-mtlp:         [PASS][212] -> [ABORT][213] ([i915#8552])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@sysfs_heartbeat_interval@mixed@ccs0.html
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@sysfs_heartbeat_interval@mixed@ccs0.html

  * igt@sysfs_heartbeat_interval@mixed@vecs0:
    - shard-mtlp:         [PASS][214] -> [FAIL][215] ([i915#1731])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@sysfs_heartbeat_interval@mixed@vecs0.html
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@sysfs_heartbeat_interval@mixed@vecs0.html

  * igt@sysfs_heartbeat_interval@precise@vecs0:
    - shard-dg2:          [PASS][216] -> [FAIL][217] ([i915#8332])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-1/igt@sysfs_heartbeat_interval@precise@vecs0.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-7/igt@sysfs_heartbeat_interval@precise@vecs0.html

  * igt@sysfs_preempt_timeout@timeout@vecs0:
    - shard-mtlp:         [PASS][218] -> [TIMEOUT][219] ([i915#7947])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-6/igt@sysfs_preempt_timeout@timeout@vecs0.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-8/igt@sysfs_preempt_timeout@timeout@vecs0.html

  * igt@v3d/v3d_mmap@mmap-bo:
    - shard-mtlp:         NOTRUN -> [SKIP][220] ([i915#2575]) +7 similar issues
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@v3d/v3d_mmap@mmap-bo.html

  * igt@v3d/v3d_submit_cl@bad-bo:
    - shard-dg2:          NOTRUN -> [SKIP][221] ([i915#2575]) +3 similar issues
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-10/igt@v3d/v3d_submit_cl@bad-bo.html

  * igt@v3d/v3d_submit_cl@simple-flush-cache:
    - shard-rkl:          NOTRUN -> [SKIP][222] ([fdo#109315]) +1 similar issue
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@v3d/v3d_submit_cl@simple-flush-cache.html

  * igt@v3d/v3d_submit_csd@bad-perfmon:
    - shard-tglu:         NOTRUN -> [SKIP][223] ([fdo#109315] / [i915#2575]) +3 similar issues
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-5/igt@v3d/v3d_submit_csd@bad-perfmon.html

  * igt@vc4/vc4_create_bo@create-bo-0:
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#7711]) +3 similar issues
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@vc4/vc4_create_bo@create-bo-0.html

  * igt@vc4/vc4_perfmon@create-single-perfmon:
    - shard-dg2:          NOTRUN -> [SKIP][225] ([i915#7711])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-5/igt@vc4/vc4_perfmon@create-single-perfmon.html

  * igt@vc4/vc4_wait_bo@used-bo-0ns:
    - shard-tglu:         NOTRUN -> [SKIP][226] ([i915#2575]) +3 similar issues
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-3/igt@vc4/vc4_wait_bo@used-bo-0ns.html
    - shard-mtlp:         NOTRUN -> [SKIP][227] ([i915#7711]) +3 similar issues
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-7/igt@vc4/vc4_wait_bo@used-bo-0ns.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
    - shard-rkl:          [FAIL][228] ([i915#7742]) -> [PASS][229]
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html

  * igt@gem_ctx_persistence@engines-hostile@vcs0:
    - shard-mtlp:         [FAIL][230] ([i915#2410]) -> [PASS][231] +3 similar issues
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@gem_ctx_persistence@engines-hostile@vcs0.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@gem_ctx_persistence@engines-hostile@vcs0.html

  * igt@gem_eio@context-create:
    - {shard-dg1}:        [DMESG-WARN][232] ([i915#4423]) -> [PASS][233]
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg1-17/igt@gem_eio@context-create.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg1-15/igt@gem_eio@context-create.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-mtlp:         [ABORT][234] ([i915#7941]) -> [PASS][235]
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-4/igt@gem_eio@in-flight-contexts-10ms.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_eio@in-flight-contexts-immediate:
    - shard-mtlp:         [ABORT][236] ([i915#8503]) -> [PASS][237]
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@gem_eio@in-flight-contexts-immediate.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@gem_eio@in-flight-contexts-immediate.html

  * igt@gem_eio@unwedge-stress:
    - {shard-dg1}:        [FAIL][238] ([i915#5784]) -> [PASS][239]
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg1-16/igt@gem_eio@unwedge-stress.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg1-13/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-rkl:          [FAIL][240] ([i915#2842]) -> [PASS][241]
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_suspend@basic-s0@smem:
    - shard-tglu:         [ABORT][242] ([i915#5122] / [i915#5251]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-tglu-5/igt@gem_exec_suspend@basic-s0@smem.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-9/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_exec_whisper@basic-queues-all:
    - shard-mtlp:         [FAIL][244] ([i915#6363]) -> [PASS][245] +1 similar issue
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-1/igt@gem_exec_whisper@basic-queues-all.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@gem_exec_whisper@basic-queues-all.html

  * igt@gem_mmap_gtt@fault-concurrent-y:
    - shard-snb:          [ABORT][246] ([i915#5161]) -> [PASS][247]
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-snb6/igt@gem_mmap_gtt@fault-concurrent-y.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb4/igt@gem_mmap_gtt@fault-concurrent-y.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-dg2:          [FAIL][248] ([fdo#103375]) -> [PASS][249] +4 similar issues
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-5/igt@gem_workarounds@suspend-resume-context.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-7/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [ABORT][250] ([i915#8489]) -> [PASS][251]
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
    - shard-rkl:          [SKIP][252] ([i915#1937] / [i915#4579]) -> [PASS][253]
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html

  * igt@i915_pm_rc6_residency@rc6-idle@ccs0:
    - shard-dg2:          [FAIL][254] ([i915#7747] / [i915#7894]) -> [PASS][255]
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-3/igt@i915_pm_rc6_residency@rc6-idle@ccs0.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@i915_pm_rc6_residency@rc6-idle@ccs0.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - shard-dg2:          [FAIL][256] ([i915#7747]) -> [PASS][257] +3 similar issues
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-3/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-rkl:          [SKIP][258] ([i915#1397]) -> [PASS][259] +2 similar issues
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-4/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - {shard-dg1}:        [SKIP][260] ([i915#1397]) -> [PASS][261] +1 similar issue
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg1-19/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg1-13/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@i915_selftest@live@requests:
    - shard-mtlp:         [DMESG-FAIL][262] ([i915#8497]) -> [PASS][263]
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@i915_selftest@live@requests.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [DMESG-FAIL][264] ([i915#6763]) -> [PASS][265]
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@i915_selftest@live@workarounds.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@i915_selftest@live@workarounds.html

  * igt@i915_selftest@perf@request:
    - shard-mtlp:         [DMESG-FAIL][266] ([i915#8573]) -> [PASS][267]
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-7/igt@i915_selftest@perf@request.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-5/igt@i915_selftest@perf@request.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-mtlp:         [FAIL][268] ([i915#5138]) -> [PASS][269]
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-mtlp:         [FAIL][270] ([i915#3743]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-d-edp-1:
    - shard-mtlp:         [FAIL][272] -> [PASS][273] +1 similar issue
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-1/igt@kms_cursor_crc@cursor-random-256x85@pipe-d-edp-1.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@kms_cursor_crc@cursor-random-256x85@pipe-d-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][274] ([i915#2346]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [FAIL][276] ([i915#2346]) -> [PASS][277] +1 similar issue
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary:
    - shard-dg2:          [FAIL][278] ([i915#6880]) -> [PASS][279] +3 similar issues
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary.html

  * igt@perf_pmu@busy-double-start@ccs0:
    - shard-mtlp:         [FAIL][280] ([i915#4349]) -> [PASS][281]
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-4/igt@perf_pmu@busy-double-start@ccs0.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-1/igt@perf_pmu@busy-double-start@ccs0.html

  * igt@sysfs_heartbeat_interval@nopreempt@vcs0:
    - shard-mtlp:         [FAIL][282] ([i915#6015]) -> [PASS][283] +2 similar issues
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@sysfs_heartbeat_interval@nopreempt@vcs0.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@sysfs_heartbeat_interval@nopreempt@vcs0.html

  
#### Warnings ####

  * igt@gem_exec_whisper@basic-contexts-priority-all:
    - shard-mtlp:         [TIMEOUT][284] ([i915#7392]) -> [ABORT][285] ([i915#8131])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-6/igt@gem_exec_whisper@basic-contexts-priority-all.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-2/igt@gem_exec_whisper@basic-contexts-priority-all.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2:          [WARN][286] ([i915#6596] / [i915#7356]) -> [DMESG-WARN][287] ([i915#7061])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-12/igt@i915_module_load@reload-with-fault-injection.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [SKIP][288] ([fdo#109271]) -> [FAIL][289] ([i915#4275])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-apl7/igt@i915_pm_dc@dc9-dpms.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-apl6/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - shard-tglu:         [FAIL][290] ([i915#2681] / [i915#3591]) -> [WARN][291] ([i915#2681])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@kms_async_flips@crc@pipe-d-edp-1:
    - shard-mtlp:         [DMESG-FAIL][292] ([i915#8561]) -> [FAIL][293] ([i915#8247])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-mtlp-2/igt@kms_async_flips@crc@pipe-d-edp-1.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-mtlp-6/igt@kms_async_flips@crc@pipe-d-edp-1.html

  * igt@kms_content_protection@mei_interface:
    - shard-rkl:          [SKIP][294] ([i915#4579] / [i915#7118]) -> [SKIP][295] ([fdo#109300])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-6/igt@kms_content_protection@mei_interface.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-2/igt@kms_content_protection@mei_interface.html
    - shard-snb:          [SKIP][296] ([fdo#109271] / [i915#4579]) -> [SKIP][297] ([fdo#109271])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-snb7/igt@kms_content_protection@mei_interface.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-snb1/igt@kms_content_protection@mei_interface.html
    - shard-tglu:         [SKIP][298] ([i915#4579] / [i915#6944] / [i915#7116] / [i915#7118]) -> [SKIP][299] ([fdo#109300])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-tglu-8/igt@kms_content_protection@mei_interface.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-tglu-10/igt@kms_content_protection@mei_interface.html
    - shard-apl:          [SKIP][300] ([fdo#109271] / [i915#4579]) -> [SKIP][301] ([fdo#109271])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-apl6/igt@kms_content_protection@mei_interface.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-apl6/igt@kms_content_protection@mei_interface.html
    - shard-glk:          [SKIP][302] ([fdo#109271] / [i915#4579]) -> [SKIP][303] ([fdo#109271])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-glk5/igt@kms_content_protection@mei_interface.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-glk8/igt@kms_content_protection@mei_interface.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          [SKIP][304] ([fdo#110189] / [i915#3955]) -> [SKIP][305] ([i915#3955])
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-rkl-1/igt@kms_fbcon_fbt@psr-suspend.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-rkl-7/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
    - shard-dg2:          [INCOMPLETE][306] ([i915#5493]) -> [CRASH][307] ([i915#7331])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7352/shard-dg2-1/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/shard-dg2-6/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3711]: https://gitlab.freedesktop.org/drm/intel/issues/3711
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4275]: https://gitlab.freedesktop.org/drm/intel/issues/4275
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473
  [i915#4521]: https://gitlab.freedesktop.org/drm/intel/issues/4521
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
  [i915#5161]: https://gitlab.freedesktop.org/drm/intel/issues/5161
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5251]: https://gitlab.freedesktop.org/drm/intel/issues/5251
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6015]: https://gitlab.freedesktop.org/drm/intel/issues/6015
  [i915#6032]: https://gitlab.freedesktop.org/drm/intel/issues/6032
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6333]: https://gitlab.freedesktop.org/drm/intel/issues/6333
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6363]: https://gitlab.freedesktop.org/drm/intel/issues/6363
  [i915#6403]: https://gitlab.freedesktop.org/drm/intel/issues/6403
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6596]: https://gitlab.freedesktop.org/drm/intel/issues/6596
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
  [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7061]: https://gitlab.freedesktop.org/drm/intel/issues/7061
  [i915#7069]: https://gitlab.freedesktop.org/drm/intel/issues/7069
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
  [i915#7331]: https://gitlab.freedesktop.org/drm/intel/issues/7331
  [i915#7356]: https://gitlab.freedesktop.org/drm/intel/issues/7356
  [i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7747]: https://gitlab.freedesktop.org/drm/intel/issues/7747
  [i915#7816]: https://gitlab.freedesktop.org/drm/intel/issues/7816
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7894]: https://gitlab.freedesktop.org/drm/intel/issues/7894
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#7941]: https://gitlab.freedesktop.org/drm/intel/issues/7941
  [i915#7947]: https://gitlab.freedesktop.org/drm/intel/issues/7947
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8063]: https://gitlab.freedesktop.org/drm/intel/issues/8063
  [i915#8131]: https://gitlab.freedesktop.org/drm/intel/issues/8131
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8230]: https://gitlab.freedesktop.org/drm/intel/issues/8230
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
  [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8304]: https://gitlab.freedesktop.org/drm/intel/issues/8304
  [i915#8319]: https://gitlab.freedesktop.org/drm/intel/issues/8319
  [i915#8332]: https://gitlab.freedesktop.org/drm/intel/issues/8332
  [i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
  [i915#8489]: https://gitlab.freedesktop.org/drm/intel/issues/8489
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
  [i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
  [i915#8503]: https://gitlab.freedesktop.org/drm/intel/issues/8503
  [i915#8552]: https://gitlab.freedesktop.org/drm/intel/issues/8552
  [i915#8561]: https://gitlab.freedesktop.org/drm/intel/issues/8561
  [i915#8573]: https://gitlab.freedesktop.org/drm/intel/issues/8573
  [i915#8628]: https://gitlab.freedesktop.org/drm/intel/issues/8628
  [i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8726]: https://gitlab.freedesktop.org/drm/intel/issues/8726


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7352 -> IGTPW_9280

  CI-20190529: 20190529
  CI_DRM_13328: 12cd6b2d321d9c034f3d4ba14788d68cb8da4eac @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9280: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html
  IGT_7352: 471bfababd070e1dac0ebb87470ac4f2ae85e663 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9280/index.html

[-- Attachment #2: Type: text/html, Size: 96721 bytes --]

[igt-dev] [PATCH i-g-t 0/3] Include intel_blt funtions to blitter path for igt_fb.c

[Juha-Pekka Heikkila]

Here start to use copy engine for doing rc ccs on Intel hw with flat ccs. This
will replace usage of rendercopy on framebuffer creation with i915 devices with
flat ccs.

Juha-Pekka Heikkila (3):
  lib/intel_blt: Add offset to block and fast copy
  lib/igt_fb: include lib/intel_blt functions to blitter path
  lib/igt_fb: On blitter path take clear color modifier into account

 lib/igt_fb.c    | 211 ++++++++++++++++++++++++++++++++++++++++++------
 lib/intel_blt.c |  12 ++-
 lib/intel_blt.h |   3 +
 3 files changed, 196 insertions(+), 30 deletions(-)

-- 
2.25.1

[igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: include lib/intel_blt functions to blitter path

[Juha-Pekka Heikkila]

Use intel_blt functions on blitter path and on i915 devices with
flat ccs use blitter instead of render copy.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 204 +++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 180 insertions(+), 24 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 402fadf41..fba605f89 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,8 @@
 #include "drmtest.h"
 #include "i915/gem_create.h"
 #include "i915/gem_mman.h"
+#include "intel_blt.h"
+#include "intel_mocs.h"
 #include "igt_aux.h"
 #include "igt_color_encoding.h"
 #include "igt_fb.h"
@@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 		*height_ret = 1;
 		break;
 	case I915_FORMAT_MOD_X_TILED:
-		igt_require_i915(fd);
+		igt_require_intel(fd);
 		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
 			*width_ret = 128;
 			*height_ret = 16;
@@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
-		igt_require_i915(fd);
+		igt_require_intel(fd);
 		if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
 			*width_ret = 128;
 			*height_ret = 16;
@@ -2453,29 +2455,40 @@ struct fb_blit_upload {
 	struct intel_bb *ibb;
 };
 
-static bool fast_blit_ok(const struct igt_fb *fb)
+static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
 {
-	int dev_id = intel_get_drm_devid(fb->fd);
-	int ver = intel_display_ver(dev_id);
-
-	if (ver < 9)
-		return false;
-
-	if (ver < 12)
-		return true;
-
-	if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
-		return true;
+	switch (igt_fb_mod_to_tiling(tile)) {
+	case I915_TILING_NONE:
+		return T_LINEAR;
+	case I915_TILING_X:
+		return T_XMAJOR;
+	case I915_TILING_Y:
+		return T_YMAJOR;
+	case I915_TILING_4:
+		return T_TILE4;
+	case I915_TILING_Yf:
+		return T_YFMAJOR;
+	default:
+		igt_assert_f(0, "Unknown tiling!\n");
+	}
+}
 
-	return fb->modifier != I915_FORMAT_MOD_X_TILED;
+static bool fast_blit_ok(const struct igt_fb *fb)
+{
+	return blt_has_fast_copy(fb->fd) &&
+		!is_ccs_modifier(fb->modifier) &&
+		blt_fast_copy_supports_tiling(fb->fd,
+					       fb_tile_to_blt_tile(fb->modifier));
 }
 
 static bool blitter_ok(const struct igt_fb *fb)
 {
-	if (!is_i915_device(fb->fd))
+	if (!is_intel_device(fb->fd))
 		return false;
 
-	if (is_ccs_modifier(fb->modifier))
+	if ((is_ccs_modifier(fb->modifier) &&
+	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
+	     || is_gen12_mc_ccs_modifier(fb->modifier))
 		return false;
 
 	for (int i = 0; i < fb->num_planes; i++) {
@@ -2510,8 +2523,8 @@ static bool use_enginecopy(const struct igt_fb *fb)
 		return false;
 
 	return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
-	       is_ccs_modifier(fb->modifier) ||
-	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
+	       (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) ||
+	       is_gen12_mc_ccs_modifier(fb->modifier);
 }
 
 static bool use_blitter(const struct igt_fb *fb)
@@ -2520,6 +2533,7 @@ static bool use_blitter(const struct igt_fb *fb)
 		return false;
 
 	return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+	       fb->modifier == I915_FORMAT_MOD_4_TILED ||
 	       fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
 	       (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
 }
@@ -2711,12 +2725,115 @@ static void copy_with_engine(struct fb_blit_upload *blit,
 	fini_buf(src);
 }
 
+static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
+					   uint32_t plane, uint32_t memregion)
+{
+	uint32_t name, handle;
+	struct blt_copy_object *blt;
+	enum blt_tiling_type blt_tile;
+	uint64_t stride;
+
+	blt = malloc(sizeof(*blt));
+	igt_assert(blt);
+
+	name = gem_flink(fb->fd, fb->gem_handle);
+	handle = gem_open(fb->fd, name);
+
+	blt_tile = fb_tile_to_blt_tile(fb->modifier);
+	stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4;
+
+	blt_set_object(blt, handle, fb->size, memregion,
+		       intel_get_uc_mocs(fb->fd),
+		       blt_tile,
+		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
+		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
+
+	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
+
+	blt->plane_offset = fb->offsets[plane];
+
+	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
+					     PROT_READ | PROT_WRITE);
+	return blt;
+}
+
+static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
+{
+	switch (fb->plane_bpp[0]) {
+	case 8:
+		return CD_8bit;
+	case 16:
+		return CD_16bit;
+	case 32:
+		return CD_32bit;
+	case 64:
+		return CD_64bit;
+	case 96:
+		return CD_96bit;
+	case 128:
+		return CD_128bit;
+	default:
+		igt_assert(0);
+	}
+}
+
+#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_3D)
+
+#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_MEDIA)
+
+static uint32_t blt_compression_format(struct blt_copy_data *blt,
+				       const struct igt_fb *fb)
+{
+	if (blt->src.compression == COMPRESSION_DISABLED &&
+	    blt->dst.compression == COMPRESSION_DISABLED)
+		return 0;
+
+	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
+		switch (blt->color_depth) {
+		case CD_32bit:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
+		}
+	} else if (BLT_TARGET_MC(blt->src)) {
+		switch (fb->drm_format) {
+		case DRM_FORMAT_XRGB8888:
+			return 8;
+		case DRM_FORMAT_XYUV8888:
+			return 9;
+		case DRM_FORMAT_NV12:
+			return 9;
+		case DRM_FORMAT_P010:
+		case DRM_FORMAT_P012:
+		case DRM_FORMAT_P016:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
+		}
+	} else if (BLT_TARGET_MC(blt->dst)) {
+		igt_assert_f(0, "Destination compression not supported on mc ccs\n");
+	} else {
+		igt_assert_f(0, "unknown compression\n");
+	}
+}
+
 static void blitcopy(const struct igt_fb *dst_fb,
 		     const struct igt_fb *src_fb)
 {
 	uint32_t src_tiling, dst_tiling;
 	uint32_t ctx = 0;
 	uint64_t ahnd = 0;
+	const intel_ctx_t *ictx = NULL;
+	struct intel_execution_engine2 *e;
+	uint32_t bb;
+	uint64_t bb_size = 4096;
+	struct blt_copy_data blt = {};
+	struct blt_copy_object *src, *dst;
+	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
+	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
+			   ? REGION_LMEM(0) : REGION_SMEM;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
 	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
@@ -2726,19 +2843,21 @@ static void blitcopy(const struct igt_fb *dst_fb,
 
 	if (is_i915_device(dst_fb->fd) && !gem_has_relocations(dst_fb->fd)) {
 		igt_require(gem_has_contexts(dst_fb->fd));
+		ictx = intel_ctx_create_all_physical(src_fb->fd);
 		ctx = gem_context_create(dst_fb->fd);
 		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
+
+		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
+							  &bb,
+							  &bb_size,
+							  mem_region) == 0);
 	}
 
 	for (int i = 0; i < dst_fb->num_planes; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-		/*
-		 * On GEN12+ X-tiled format support is removed from the fast
-		 * blit command, so use the XY_SRC blit command for it
-		 * instead.
-		 */
+
 		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
 			igt_blitter_fast_copy__raw(dst_fb->fd,
 						   ahnd, ctx, NULL,
@@ -2757,6 +2876,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
 						   dst_tiling,
 						   0, 0 /* dst_x, dst_y */,
 						   dst_fb->size);
+		} else if (ahnd && blt_has_block_copy(src_fb->fd)) {
+			for_each_ctx_engine(src_fb->fd, ictx, e) {
+				if (gem_engine_can_block_copy(src_fb->fd, e))
+					break;
+			}
+			igt_assert_f(e, "No block copy capable engine found!\n");
+
+			src = blt_fb_init(src_fb, i, mem_region);
+			dst = blt_fb_init(dst_fb, i, mem_region);
+
+			memset(&blt, 0, sizeof(blt));
+			blt.color_depth = blt_get_bpp(src_fb);
+			blt_set_copy_object(&blt.src, src);
+			blt_set_copy_object(&blt.dst, dst);
+
+			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
+				blt_set_object_ext(&ext.src,
+						   blt_compression_format(&blt, src_fb),
+						   src_fb->width, src_fb->height,
+						   SURFACE_TYPE_2D);
+
+				blt_set_object_ext(&ext.dst,
+						   blt_compression_format(&blt, dst_fb),
+						   dst_fb->width, dst_fb->height,
+						   SURFACE_TYPE_2D);
+
+				pext = &ext;
+			}
+
+			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
+
+			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
+			gem_sync(src_fb->fd, blt.dst.handle);
+
+			blt_destroy_object(src_fb->fd, src);
+			blt_destroy_object(dst_fb->fd, dst);
 		} else {
 			igt_blitter_src_copy(dst_fb->fd,
 					     ahnd, ctx, NULL,
@@ -2781,6 +2936,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	if (ctx)
 		gem_context_destroy(dst_fb->fd, ctx);
 	put_ahnd(ahnd);
+	intel_ctx_destroy(src_fb->fd, ictx);
 }
 
 static void free_linear_mapping(struct fb_blit_upload *blit)
-- 
2.25.1