From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Francois Dugast <francois.dugast@intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI
Date: Tue, 12 Dec 2023 13:46:43 -0500 [thread overview]
Message-ID: <ZXiqk3ogsAG_EQRc@intel.com> (raw)
In-Reply-To: <20231212173059.7-2-francois.dugast@intel.com>
On Tue, Dec 12, 2023 at 05:30:54PM +0000, Francois Dugast wrote:
> A few non functional changes from kernel commits below were missing:
> drm/xe/uapi: support pat_index selection with vm_bind
> drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 590f7b7af..313e555d2 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -129,7 +129,6 @@ struct xe_user_extension {
> * It is returned as part of the @drm_xe_engine, but it also is used as
> * the input of engine selection for both @drm_xe_exec_queue_create and
> * @drm_xe_query_engine_cycles
> - *
> */
> struct drm_xe_engine_class_instance {
> #define DRM_XE_ENGINE_CLASS_RENDER 0
> @@ -143,9 +142,11 @@ struct drm_xe_engine_class_instance {
> */
> #define DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC 5
> #define DRM_XE_ENGINE_CLASS_VM_BIND_SYNC 6
> + /** @engine_class: engine class id */
> __u16 engine_class;
> -
> + /** @engine_instance: engine instance id */
> __u16 engine_instance;
> + /** @gt_id: Unique ID of this GT within the PCI Device */
> __u16 gt_id;
> /** @pad: MBZ */
> __u16 pad;
> @@ -736,6 +737,12 @@ struct drm_xe_vm_bind_op {
> *
> * Note: For userptr and externally imported dma-buf the kernel expects
> * either 1WAY or 2WAY for the @pat_index.
> + *
> + * For DRM_XE_VM_BIND_FLAG_NULL bindings there are no KMD restrictions
> + * on the @pat_index. For such mappings there is no actual memory being
> + * mapped (the address in the PTE is invalid), so the various PAT memory
> + * attributes likely do not apply. Simply leaving as zero is one
> + * option (still a valid pat_index).
> */
> __u16 pat_index;
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-12-12 18:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
2023-12-12 18:46 ` Rodrigo Vivi [this message]
2023-12-12 17:30 ` [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure Francois Dugast
2023-12-12 21:31 ` Welty, Brian
2023-12-13 3:11 ` Bommu, Krishnaiah
2023-12-13 17:07 ` Bommu, Krishnaiah
2023-12-13 18:16 ` Welty, Brian
2023-12-14 9:50 ` Francois Dugast
2023-12-12 17:30 ` [PATCH v1 3/6] drm-uapi/xe: Don't wait on user_fence during exec queue reset Francois Dugast
2023-12-12 17:30 ` [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_* Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
2023-12-12 18:38 ` Dixit, Ashutosh
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 18:38 ` ✗ Fi.CI.BAT: failure for uAPI Alignment - More cleanup before upstream Patchwork
2023-12-12 19:05 ` ✗ CI.xeBAT: " Patchwork
2023-12-13 17:17 ` ✗ Fi.CI.BUILD: failure for uAPI Alignment - More cleanup before upstream (rev2) Patchwork
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