* [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream
@ 2023-12-12 17:30 Francois Dugast
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
` (8 more replies)
0 siblings, 9 replies; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev
This series contains changes to align on kernel series below:
https://patchwork.freedesktop.org/series/127365/
https://patchwork.freedesktop.org/series/127440/
https://patchwork.freedesktop.org/series/127593/
https://patchwork.freedesktop.org/series/127598/
Bommu Krishnaiah (2):
drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence
structure
drm-uapi/xe: Don't wait on user_fence during exec queue reset
Francois Dugast (4):
drm-uapi/xe: Align header with current kernel uAPI
drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_*
drm-uapi/xe: Remove PMU from Xe till uapi is finalized
include/drm-uapi/xe_drm.h | 81 ++++++--------------
lib/xe/xe_ioctl.c | 29 ++++----
lib/xe/xe_ioctl.h | 13 ++--
tests/intel/xe_evict.c | 4 +-
tests/intel/xe_exec_balancer.c | 15 ++--
tests/intel/xe_exec_compute_mode.c | 18 ++---
tests/intel/xe_exec_fault_mode.c | 21 +++---
tests/intel/xe_exec_reset.c | 6 +-
tests/intel/xe_exec_threads.c | 15 ++--
tests/intel/xe_waitfence.c | 114 ++++++++++++++++++++++++-----
10 files changed, 179 insertions(+), 137 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 18:46 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure Francois Dugast
` (7 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev
A few non functional changes from kernel commits below were missing:
drm/xe/uapi: support pat_index selection with vm_bind
drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/drm-uapi/xe_drm.h | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 590f7b7af..313e555d2 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -129,7 +129,6 @@ struct xe_user_extension {
* It is returned as part of the @drm_xe_engine, but it also is used as
* the input of engine selection for both @drm_xe_exec_queue_create and
* @drm_xe_query_engine_cycles
- *
*/
struct drm_xe_engine_class_instance {
#define DRM_XE_ENGINE_CLASS_RENDER 0
@@ -143,9 +142,11 @@ struct drm_xe_engine_class_instance {
*/
#define DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC 5
#define DRM_XE_ENGINE_CLASS_VM_BIND_SYNC 6
+ /** @engine_class: engine class id */
__u16 engine_class;
-
+ /** @engine_instance: engine instance id */
__u16 engine_instance;
+ /** @gt_id: Unique ID of this GT within the PCI Device */
__u16 gt_id;
/** @pad: MBZ */
__u16 pad;
@@ -736,6 +737,12 @@ struct drm_xe_vm_bind_op {
*
* Note: For userptr and externally imported dma-buf the kernel expects
* either 1WAY or 2WAY for the @pat_index.
+ *
+ * For DRM_XE_VM_BIND_FLAG_NULL bindings there are no KMD restrictions
+ * on the @pat_index. For such mappings there is no actual memory being
+ * mapped (the address in the PTE is invalid), so the various PAT memory
+ * attributes likely do not apply. Simply leaving as zero is one
+ * option (still a valid pat_index).
*/
__u16 pat_index;
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 21:31 ` Welty, Brian
2023-12-12 17:30 ` [PATCH v1 3/6] drm-uapi/xe: Don't wait on user_fence during exec queue reset Francois Dugast
` (6 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev; +Cc: Bommu Krishnaiah, Rodrigo Vivi
From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
remove the num_engines/instances members from drm_xe_wait_user_fence structure
and add a exec_queue_id member
Right now this is only checking if the engine list is sane and nothing
else. In the end every operation with this IOCTL is a soft check.
So, let's formalize that and only use this IOCTL to wait on the fence.
exec_queue_id member will help to user space to get proper error code
from kernel while in exec_queue reset
v2: Also fix test invalid_flag (Francois Dugast)
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/drm-uapi/xe_drm.h | 17 +++++-----------
lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
lib/xe/xe_ioctl.h | 11 ++++------
tests/intel/xe_evict.c | 4 ++--
tests/intel/xe_exec_balancer.c | 15 +++++++-------
tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
tests/intel/xe_exec_reset.c | 6 +++---
tests/intel/xe_exec_threads.c | 15 +++++++-------
tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
10 files changed, 79 insertions(+), 89 deletions(-)
diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 313e555d2..fd06e4920 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -1031,8 +1031,7 @@ struct drm_xe_wait_user_fence {
/** @op: wait operation (type of comparison) */
__u16 op;
-#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
-#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)
/** @flags: wait flags */
__u16 flags;
@@ -1065,17 +1064,11 @@ struct drm_xe_wait_user_fence {
*/
__s64 timeout;
- /**
- * @num_engines: number of engine instances to wait on, must be zero
- * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
- */
- __u64 num_engines;
+ /** @exec_queue_id: exec_queue_id returned from xe_exec_queue_create_ioctl */
+ __u32 exec_queue_id;
- /**
- * @instances: user pointer to array of drm_xe_engine_class_instance to
- * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
- */
- __u64 instances;
+ /** @pad2: MBZ */
+ __u32 pad2;
/** @reserved: Reserved */
__u64 reserved[2];
diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index cdad3d7e2..8f466318d 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -481,7 +481,7 @@ void xe_exec_wait(int fd, uint32_t exec_queue, uint64_t addr)
* @fd: xe device fd
* @addr: address of value to compare
* @value: expected value (equal) in @address
- * @eci: engine class instance
+ * @exec_queue: exec_queue id
* @timeout: pointer to time to wait in nanoseconds
*
* Function compares @value with memory pointed by @addr until they are equal.
@@ -490,17 +490,15 @@ void xe_exec_wait(int fd, uint32_t exec_queue, uint64_t addr)
* signalled. Returns 0 on success, -errno of ioctl on error.
*/
int __xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t *timeout)
+ uint32_t exec_queue, int64_t *timeout)
{
struct drm_xe_wait_user_fence wait = {
.addr = to_user_pointer(addr),
.op = DRM_XE_UFENCE_WAIT_OP_EQ,
- .flags = !eci ? DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP : 0,
+ .flags = 0,
.value = value,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
- .num_engines = eci ? 1 :0,
- .instances = eci ? to_user_pointer(eci) : 0,
+ .exec_queue_id = exec_queue,
};
igt_assert(timeout);
@@ -518,7 +516,7 @@ int __xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
* @fd: xe device fd
* @addr: address of value to compare
* @value: expected value (equal) in @address
- * @eci: engine class instance
+ * @exec_queue: exec_queue id
* @timeout: time to wait in nanoseconds
*
* Function compares @value with memory pointed by @addr until they are equal.
@@ -527,10 +525,9 @@ int __xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
* Returns elapsed time in nanoseconds if user fence was signalled.
*/
int64_t xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t timeout)
+ uint32_t exec_queue, int64_t timeout)
{
- igt_assert_eq(__xe_wait_ufence(fd, addr, value, eci, &timeout), 0);
+ igt_assert_eq(__xe_wait_ufence(fd, addr, value, exec_queue, &timeout), 0);
return timeout;
}
@@ -539,8 +536,9 @@ int64_t xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
* @fd: xe device fd
* @addr: address of value to compare
* @value: expected value (equal) in @address
- * @eci: engine class instance
+ * @exec_queue: exec_queue id
* @timeout: absolute time when wait expire
+ * @flag: wait flag
*
* Function compares @value with memory pointed by @addr until they are equal.
* Asserts that ioctl returned without error.
@@ -548,18 +546,17 @@ int64_t xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
* Returns elapsed time in nanoseconds if user fence was signalled.
*/
int64_t xe_wait_ufence_abstime(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t timeout)
+ uint32_t exec_queue, int64_t timeout,
+ uint16_t flag)
{
struct drm_xe_wait_user_fence wait = {
.addr = to_user_pointer(addr),
.op = DRM_XE_UFENCE_WAIT_OP_EQ,
- .flags = !eci ? DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | DRM_XE_UFENCE_WAIT_FLAG_ABSTIME : 0,
+ .flags = flag,
.value = value,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
.timeout = timeout,
- .num_engines = eci ? 1 : 0,
- .instances = eci ? to_user_pointer(eci) : 0,
+ .exec_queue_id = exec_queue,
};
struct timespec ts;
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index c8d46fb29..05480e40b 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -92,14 +92,11 @@ void xe_exec_sync(int fd, uint32_t exec_queue, uint64_t addr,
struct drm_xe_sync *sync, uint32_t num_syncs);
void xe_exec_wait(int fd, uint32_t exec_queue, uint64_t addr);
int __xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t *timeout);
+ uint32_t exec_queue, int64_t *timeout);
int64_t xe_wait_ufence(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t timeout);
-int64_t xe_wait_ufence_abstime(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t timeout);
+ uint32_t exec_queue, int64_t timeout);
+int64_t xe_wait_ufence_abstime(int fd, uint64_t *addr, uint64_t value, uint32_t
+ exec_queue, int64_t timeout, uint16_t flag);
void xe_force_gt_reset(int fd, int gt);
#endif /* XE_IOCTL_H */
diff --git a/tests/intel/xe_evict.c b/tests/intel/xe_evict.c
index 89dc46fae..0ac83a3f7 100644
--- a/tests/intel/xe_evict.c
+++ b/tests/intel/xe_evict.c
@@ -317,7 +317,7 @@ test_evict_cm(int fd, struct drm_xe_engine_class_instance *eci,
}
#define TWENTY_SEC MS_TO_NS(20000)
xe_wait_ufence(fd, &data[i].vm_sync, USER_FENCE_VALUE,
- NULL, TWENTY_SEC);
+ bind_exec_queues[0], TWENTY_SEC);
}
sync[0].addr = addr + (char *)&data[i].exec_sync -
(char *)data;
@@ -352,7 +352,7 @@ test_evict_cm(int fd, struct drm_xe_engine_class_instance *eci,
data = xe_bo_map(fd, __bo,
ALIGN(sizeof(*data) * n_execs, 0x1000));
xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
- NULL, TWENTY_SEC);
+ exec_queues[i % n_exec_queues], TWENTY_SEC);
igt_assert_eq(data[i].data, 0xc0ffee);
}
munmap(data, ALIGN(sizeof(*data) * n_execs, 0x1000));
diff --git a/tests/intel/xe_exec_balancer.c b/tests/intel/xe_exec_balancer.c
index 79ff65e89..5dded3ce4 100644
--- a/tests/intel/xe_exec_balancer.c
+++ b/tests/intel/xe_exec_balancer.c
@@ -483,7 +483,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
bo_size, sync, 1);
#define ONE_SEC MS_TO_NS(1000)
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, ONE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, ONE_SEC);
data[0].vm_sync = 0;
for (i = 0; i < n_execs; i++) {
@@ -514,7 +514,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
if (flags & REBIND && i + 1 != n_execs) {
xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
- NULL, ONE_SEC);
+ exec_queues[e], ONE_SEC);
xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, NULL,
0);
@@ -529,7 +529,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
addr, bo_size, sync,
1);
xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
- NULL, ONE_SEC);
+ 0, ONE_SEC);
data[0].vm_sync = 0;
}
@@ -542,7 +542,8 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
* an invalidate.
*/
xe_wait_ufence(fd, &data[i].exec_sync,
- USER_FENCE_VALUE, NULL, ONE_SEC);
+ USER_FENCE_VALUE, exec_queues[e],
+ ONE_SEC);
igt_assert_eq(data[i].data, 0xc0ffee);
} else if (i * 2 != n_execs) {
/*
@@ -571,8 +572,8 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
j = flags & INVALIDATE && n_execs ? n_execs - 1 : 0;
for (i = j; i < n_execs; i++)
- xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE, NULL,
- ONE_SEC);
+ xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
+ exec_queues[i % n_exec_queues], ONE_SEC);
/* Wait for all execs to complete */
if (flags & INVALIDATE)
@@ -580,7 +581,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
sync[0].addr = to_user_pointer(&data[0].vm_sync);
xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, ONE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, ONE_SEC);
for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
i < n_execs; i++)
diff --git a/tests/intel/xe_exec_compute_mode.c b/tests/intel/xe_exec_compute_mode.c
index 7d3004d65..6123d2b29 100644
--- a/tests/intel/xe_exec_compute_mode.c
+++ b/tests/intel/xe_exec_compute_mode.c
@@ -171,8 +171,8 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
fence_timeout = igt_run_in_simulation() ? HUNDRED_SEC : ONE_SEC;
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
- fence_timeout);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
+ bind_exec_queues[0], fence_timeout);
data[0].vm_sync = 0;
for (i = 0; i < n_execs; i++) {
@@ -198,7 +198,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
if (flags & REBIND && i + 1 != n_execs) {
xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
- NULL, fence_timeout);
+ exec_queues[e], fence_timeout);
xe_vm_unbind_async(fd, vm, bind_exec_queues[e], 0,
addr, bo_size, NULL, 0);
@@ -214,7 +214,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
addr, bo_size, sync,
1);
xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
- NULL, fence_timeout);
+ bind_exec_queues[e], fence_timeout);
data[0].vm_sync = 0;
}
@@ -227,7 +227,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
* an invalidate.
*/
xe_wait_ufence(fd, &data[i].exec_sync,
- USER_FENCE_VALUE, NULL,
+ USER_FENCE_VALUE, exec_queues[e],
fence_timeout);
igt_assert_eq(data[i].data, 0xc0ffee);
} else if (i * 2 != n_execs) {
@@ -257,8 +257,8 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
j = flags & INVALIDATE ? n_execs - 1 : 0;
for (i = j; i < n_execs; i++)
- xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE, NULL,
- fence_timeout);
+ xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
+ exec_queues[i % n_exec_queues], fence_timeout);
/* Wait for all execs to complete */
if (flags & INVALIDATE)
@@ -267,8 +267,8 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
sync[0].addr = to_user_pointer(&data[0].vm_sync);
xe_vm_unbind_async(fd, vm, bind_exec_queues[0], 0, addr, bo_size,
sync, 1);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
- fence_timeout);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
+ bind_exec_queues[0], fence_timeout);
for (i = j; i < n_execs; i++)
igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/intel/xe_exec_fault_mode.c b/tests/intel/xe_exec_fault_mode.c
index ee7cbb604..3dda33469 100644
--- a/tests/intel/xe_exec_fault_mode.c
+++ b/tests/intel/xe_exec_fault_mode.c
@@ -195,15 +195,16 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
}
#define ONE_SEC MS_TO_NS(1000)
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, ONE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
+ bind_exec_queues[0], ONE_SEC);
data[0].vm_sync = 0;
if (flags & PREFETCH) {
/* Should move to system memory */
xe_vm_prefetch_async(fd, vm, bind_exec_queues[0], 0, addr,
bo_size, sync, 1, 0);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
- ONE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
+ bind_exec_queues[0], ONE_SEC);
data[0].vm_sync = 0;
}
@@ -230,7 +231,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
if (flags & REBIND && i + 1 != n_execs) {
xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
- NULL, ONE_SEC);
+ exec_queues[e], ONE_SEC);
xe_vm_unbind_async(fd, vm, bind_exec_queues[e], 0,
addr, bo_size, NULL, 0);
@@ -246,7 +247,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
addr, bo_size, sync,
1);
xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
- NULL, ONE_SEC);
+ bind_exec_queues[e], ONE_SEC);
data[0].vm_sync = 0;
}
@@ -259,7 +260,8 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
* an invalidate.
*/
xe_wait_ufence(fd, &data[i].exec_sync,
- USER_FENCE_VALUE, NULL, ONE_SEC);
+ USER_FENCE_VALUE, exec_queues[e],
+ ONE_SEC);
igt_assert_eq(data[i].data, 0xc0ffee);
} else if (i * 2 != n_execs) {
/*
@@ -289,14 +291,15 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
if (!(flags & INVALID_FAULT)) {
j = flags & INVALIDATE ? n_execs - 1 : 0;
for (i = j; i < n_execs; i++)
- xe_wait_ufence(fd, &data[i].exec_sync,
- USER_FENCE_VALUE, NULL, ONE_SEC);
+ xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
+ exec_queues[i % n_exec_queues], ONE_SEC);
}
sync[0].addr = to_user_pointer(&data[0].vm_sync);
xe_vm_unbind_async(fd, vm, bind_exec_queues[0], 0, addr, bo_size,
sync, 1);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, ONE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
+ bind_exec_queues[0], ONE_SEC);
if (!(flags & INVALID_FAULT)) {
for (i = j; i < n_execs; i++)
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 094b34896..8e6c2e2e4 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -564,7 +564,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
#define THREE_SEC MS_TO_NS(3000)
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, THREE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, THREE_SEC);
data[0].vm_sync = 0;
for (i = 0; i < n_execs; i++) {
@@ -621,7 +621,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
int err;
err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
- NULL, &timeout);
+ exec_queues[i % n_exec_queues], &timeout);
if (flags & GT_RESET)
/* exec races with reset: may timeout or complete */
igt_assert(err == -ETIME || !err);
@@ -631,7 +631,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
sync[0].addr = to_user_pointer(&data[0].vm_sync);
xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, THREE_SEC);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, THREE_SEC);
if (!(flags & GT_RESET)) {
for (i = 1; i < n_execs; i++)
diff --git a/tests/intel/xe_exec_threads.c b/tests/intel/xe_exec_threads.c
index fcb926698..ca2dd421e 100644
--- a/tests/intel/xe_exec_threads.c
+++ b/tests/intel/xe_exec_threads.c
@@ -331,7 +331,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
fence_timeout = igt_run_in_simulation() ? THIRTY_SEC : THREE_SEC;
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, fence_timeout);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, fence_timeout);
data[0].vm_sync = 0;
for (i = 0; i < n_execs; i++) {
@@ -359,7 +359,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
for (j = i - 0x20; j <= i; ++j)
xe_wait_ufence(fd, &data[j].exec_sync,
USER_FENCE_VALUE,
- NULL, fence_timeout);
+ exec_queues[e], fence_timeout);
xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size,
NULL, 0);
@@ -374,7 +374,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
addr, bo_size, sync,
1);
xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE,
- NULL, fence_timeout);
+ 0, fence_timeout);
data[0].vm_sync = 0;
}
@@ -389,7 +389,8 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
for (j = i == 0x20 ? 0 : i - 0x1f; j <= i; ++j)
xe_wait_ufence(fd, &data[j].exec_sync,
USER_FENCE_VALUE,
- NULL, fence_timeout);
+ exec_queues[e],
+ fence_timeout);
igt_assert_eq(data[i].data, 0xc0ffee);
} else if (i * 2 != n_execs) {
/*
@@ -421,8 +422,8 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
j = flags & INVALIDATE ?
(flags & RACE ? n_execs / 2 + 1 : n_execs - 1) : 0;
for (i = j; i < n_execs; i++)
- xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE, NULL,
- fence_timeout);
+ xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
+ exec_queues[i % n_exec_queues], fence_timeout);
/* Wait for all execs to complete */
if (flags & INVALIDATE)
@@ -430,7 +431,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
sync[0].addr = to_user_pointer(&data[0].vm_sync);
xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
- xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, fence_timeout);
+ xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, fence_timeout);
for (i = j; i < n_execs; i++)
igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/intel/xe_waitfence.c b/tests/intel/xe_waitfence.c
index 3be987954..d7e2008c5 100644
--- a/tests/intel/xe_waitfence.c
+++ b/tests/intel/xe_waitfence.c
@@ -37,22 +37,20 @@ static void do_bind(int fd, uint32_t vm, uint32_t bo, uint64_t offset,
}
static int64_t wait_with_eci_abstime(int fd, uint64_t *addr, uint64_t value,
- struct drm_xe_engine_class_instance *eci,
- int64_t timeout)
+ uint32_t exec_queue, int64_t timeout,
+ uint16_t flag)
{
struct drm_xe_wait_user_fence wait = {
.addr = to_user_pointer(addr),
.op = DRM_XE_UFENCE_WAIT_OP_EQ,
- .flags = !eci ? 0 : DRM_XE_UFENCE_WAIT_FLAG_ABSTIME,
+ .flags = flag,
.value = value,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
.timeout = timeout,
- .num_engines = eci ? 1 : 0,
- .instances = eci ? to_user_pointer(eci) : 0,
+ .exec_queue_id = exec_queue,
};
struct timespec ts;
- igt_assert(eci);
igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_WAIT_USER_FENCE, &wait), 0);
igt_assert_eq(clock_gettime(CLOCK_MONOTONIC, &ts), 0);
@@ -82,7 +80,7 @@ enum waittype {
static void
waitfence(int fd, enum waittype wt)
{
- struct drm_xe_engine *engine = NULL;
+ uint32_t exec_queue;
struct timespec ts;
int64_t current, signalled;
uint32_t bo_1;
@@ -111,15 +109,17 @@ waitfence(int fd, enum waittype wt)
do_bind(fd, vm, bo_7, 0, 0xeffff0000, 0x10000, 7);
if (wt == RELTIME) {
- timeout = xe_wait_ufence(fd, &wait_fence, 7, NULL, MS_TO_NS(10));
+ timeout = xe_wait_ufence(fd, &wait_fence, 7, 0, MS_TO_NS(10));
igt_debug("wait type: RELTIME - timeout: %ld, timeout left: %ld\n",
MS_TO_NS(10), timeout);
} else if (wt == ENGINE) {
- engine = xe_engine(fd, 1);
+ exec_queue = xe_exec_queue_create_class(fd, vm, DRM_XE_ENGINE_CLASS_COPY);
clock_gettime(CLOCK_MONOTONIC, &ts);
current = ts.tv_sec * 1e9 + ts.tv_nsec;
timeout = current + MS_TO_NS(10);
- signalled = wait_with_eci_abstime(fd, &wait_fence, 7, &engine->instance, timeout);
+ signalled = wait_with_eci_abstime(fd, &wait_fence, 7,
+ exec_queue, timeout,
+ DRM_XE_UFENCE_WAIT_FLAG_ABSTIME);
igt_debug("wait type: ENGINE ABSTIME - timeout: %" PRId64
", signalled: %" PRId64
", elapsed: %" PRId64 "\n",
@@ -128,7 +128,8 @@ waitfence(int fd, enum waittype wt)
clock_gettime(CLOCK_MONOTONIC, &ts);
current = ts.tv_sec * 1e9 + ts.tv_nsec;
timeout = current + MS_TO_NS(10);
- signalled = xe_wait_ufence_abstime(fd, &wait_fence, 7, NULL, timeout);
+ signalled = xe_wait_ufence_abstime(fd, &wait_fence, 7, 0,
+ timeout, 0);
igt_debug("wait type: ABSTIME - timeout: %" PRId64
", signalled: %" PRId64
", elapsed: %" PRId64 "\n",
@@ -166,8 +167,7 @@ invalid_flag(int fd)
.value = 1,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
.timeout = -1,
- .num_engines = 0,
- .instances = 0,
+ .exec_queue_id = 0,
};
uint32_t vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
@@ -191,8 +191,7 @@ invalid_ops(int fd)
.value = 1,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
.timeout = 1,
- .num_engines = 0,
- .instances = 0,
+ .exec_queue_id = 0,
};
uint32_t vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
@@ -216,8 +215,7 @@ invalid_engine(int fd)
.value = 1,
.mask = DRM_XE_UFENCE_WAIT_MASK_U64,
.timeout = -1,
- .num_engines = 1,
- .instances = 0,
+ .exec_queue_id = 0,
};
uint32_t vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v1 3/6] drm-uapi/xe: Don't wait on user_fence during exec queue reset
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
2023-12-12 17:30 ` [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 17:30 ` [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY Francois Dugast
` (5 subsequent siblings)
8 siblings, 0 replies; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev; +Cc: Bommu Krishnaiah, Rodrigo Vivi
From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Don't wait till timeout on user fence when exec_queue reset is detected
and return return proper error code
v2: s/drm_xe_wait_user_fence1/drm_xe_wait_user_fence/ (Francois Dugast)
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
---
tests/intel/xe_waitfence.c | 82 ++++++++++++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/tests/intel/xe_waitfence.c b/tests/intel/xe_waitfence.c
index d7e2008c5..4421e571a 100644
--- a/tests/intel/xe_waitfence.c
+++ b/tests/intel/xe_waitfence.c
@@ -153,6 +153,9 @@ waitfence(int fd, enum waittype wt)
*
* SUBTEST: invalid-engine
* Description: Check query with invalid engine info returns expected error code
+ *
+ * SUBTEST: exec_queue-reset-wait
+ * Description: Don’t wait till timeout on user fence when exec_queue reset is detected and return return proper error
*/
static void
@@ -227,6 +230,82 @@ invalid_engine(int fd)
do_ioctl_err(fd, DRM_IOCTL_XE_WAIT_USER_FENCE, &wait, EFAULT);
}
+static void
+exec_queue_reset_wait(int fd)
+{
+ uint32_t bo, b;
+ uint64_t batch_offset;
+ uint64_t batch_addr;
+ uint64_t sdi_offset;
+ uint64_t sdi_addr;
+ uint64_t addr = 0x1a0000;
+
+ struct {
+ uint32_t batch[16];
+ uint64_t pad;
+ uint64_t vm_sync;
+ uint64_t exec_sync;
+ uint32_t data;
+ } *data;
+
+#define USER_FENCE_VALUE 0xdeadbeefdeadbeefull
+ struct drm_xe_sync sync[1] = {
+ { .flags = DRM_XE_SYNC_TYPE_USER_FENCE | DRM_XE_SYNC_FLAG_SIGNAL,
+ .timeline_value = USER_FENCE_VALUE },
+ };
+
+ struct drm_xe_exec exec = {
+ .num_batch_buffer = 1,
+ .num_syncs = 1,
+ .syncs = to_user_pointer(sync),
+ };
+
+ uint32_t vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
+ uint32_t exec_queue = xe_exec_queue_create_class(fd, vm, DRM_XE_ENGINE_CLASS_COPY);
+ struct drm_xe_wait_user_fence wait = {
+ .op = DRM_XE_UFENCE_WAIT_OP_EQ,
+ .flags = 0,
+ .value = 0xc0ffee,
+ .mask = DRM_XE_UFENCE_WAIT_MASK_U64,
+ .timeout = -1,
+ .exec_queue_id = exec_queue,
+ };
+
+ bo = xe_bo_create(fd, vm, 0x40000, vram_if_possible(fd, 0), 0);
+ data = xe_bo_map(fd, bo, 0x40000);
+
+ batch_offset = (char *)&data[0].batch - (char *)data;
+ batch_addr = addr + batch_offset;
+ sdi_offset = (char *)&data[0].data - (char *)data;
+ sdi_addr = addr + sdi_offset;
+
+ b = 0;
+ data[0].batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+ data[0].batch[b++] = sdi_addr;
+ data[0].batch[b++] = sdi_addr >> 32;
+ data[0].batch[b++] = 0xc0ffee;
+ data[0].batch[b++] = MI_BATCH_BUFFER_END;
+ igt_assert(b <= ARRAY_SIZE(data[0].batch));
+
+ wait.addr = to_user_pointer(&data[0].exec_sync);
+ exec.exec_queue_id = exec_queue;
+ exec.address = batch_addr;
+
+ xe_exec(fd, &exec);
+
+ /**
+ * Don't do the GPU mapping(vm_bind) for object, so that exec_queue
+ * reset will happen and xe_wait_ufence will return EIO not ETIME
+ */
+ do_ioctl_err(fd, DRM_IOCTL_XE_WAIT_USER_FENCE, &wait, EIO);
+
+ xe_exec_queue_destroy(fd, exec_queue);
+
+ if (bo) {
+ munmap(data, 0x40000);
+ gem_close(fd, bo);
+ }
+}
igt_main
{
@@ -253,6 +332,9 @@ igt_main
igt_subtest("invalid-engine")
invalid_engine(fd);
+ igt_subtest("exec_queue-reset-wait")
+ exec_queue_reset_wait(fd);
+
igt_fixture
drm_close_driver(fd);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (2 preceding siblings ...)
2023-12-12 17:30 ` [PATCH v1 3/6] drm-uapi/xe: Don't wait on user_fence during exec queue reset Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_* Francois Dugast
` (4 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev
Align with commit ("drm/xe/uapi: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY")
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/drm-uapi/xe_drm.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index fd06e4920..b543207bf 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -118,7 +118,6 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_*
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (3 preceding siblings ...)
2023-12-12 17:30 ` [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
` (3 subsequent siblings)
8 siblings, 1 reply; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev
Align with commit ("drm/xe/uapi: Remove DRM_XE_UFENCE_WAIT_MASK_*")
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/drm-uapi/xe_drm.h | 12 +++++++-----
lib/xe/xe_ioctl.h | 2 ++
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index b543207bf..8f09e9681 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -1040,11 +1040,13 @@ struct drm_xe_wait_user_fence {
/** @value: compare value */
__u64 value;
-#define DRM_XE_UFENCE_WAIT_MASK_U8 0xffu
-#define DRM_XE_UFENCE_WAIT_MASK_U16 0xffffu
-#define DRM_XE_UFENCE_WAIT_MASK_U32 0xffffffffu
-#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
- /** @mask: comparison mask */
+ /**
+ * @mask: comparison mask, values can be for example:
+ * - 0xffu for u8
+ * - 0xffffu for u16
+ * - 0xffffffffu for u32
+ * - 0xffffffffffffffffu for u64
+ */
__u64 mask;
/**
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index 05480e40b..7dcc20e57 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -15,6 +15,8 @@
#include <stdint.h>
#include <xe_drm.h>
+#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
+
uint32_t xe_cs_prefetch_size(int fd);
uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext);
int __xe_vm_bind(int fd, uint32_t vm, uint32_t exec_queue, uint32_t bo,
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (4 preceding siblings ...)
2023-12-12 17:30 ` [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_* Francois Dugast
@ 2023-12-12 17:30 ` Francois Dugast
2023-12-12 18:38 ` Dixit, Ashutosh
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 18:38 ` ✗ Fi.CI.BAT: failure for uAPI Alignment - More cleanup before upstream Patchwork
` (2 subsequent siblings)
8 siblings, 2 replies; 20+ messages in thread
From: Francois Dugast @ 2023-12-12 17:30 UTC (permalink / raw)
To: igt-dev
Align with commit ("drm/xe/pmu: Remove PMU from Xe till uapi is finalized")
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/drm-uapi/xe_drm.h | 40 ---------------------------------------
1 file changed, 40 deletions(-)
diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 8f09e9681..b1839df48 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -1074,46 +1074,6 @@ struct drm_xe_wait_user_fence {
/** @reserved: Reserved */
__u64 reserved[2];
};
-
-/**
- * DOC: XE PMU event config IDs
- *
- * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
- * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
- * particular event.
- *
- * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
- *
- * .. code-block:: C
- *
- * struct perf_event_attr attr;
- * long long count;
- * int cpu = 0;
- * int fd;
- *
- * memset(&attr, 0, sizeof(struct perf_event_attr));
- * attr.type = type; // eg: /sys/bus/event_source/devices/xe_0000_56_00.0/type
- * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
- * attr.use_clockid = 1;
- * attr.clockid = CLOCK_MONOTONIC;
- * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
- *
- * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
- */
-
-/*
- * Top bits of every counter are GT id.
- */
-#define __DRM_XE_PMU_GT_SHIFT (56)
-
-#define ___DRM_XE_PMU_OTHER(gt, x) \
- (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
-
-#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
-#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
-#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
-#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
-
#if defined(__cplusplus)
}
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
@ 2023-12-12 18:38 ` Dixit, Ashutosh
2023-12-12 18:47 ` Rodrigo Vivi
1 sibling, 0 replies; 20+ messages in thread
From: Dixit, Ashutosh @ 2023-12-12 18:38 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
On Tue, 12 Dec 2023 09:30:59 -0800, Francois Dugast wrote:
>
> Align with commit ("drm/xe/pmu: Remove PMU from Xe till uapi is finalized")
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 40 ---------------------------------------
> 1 file changed, 40 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 8f09e9681..b1839df48 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -1074,46 +1074,6 @@ struct drm_xe_wait_user_fence {
> /** @reserved: Reserved */
> __u64 reserved[2];
> };
> -
> -/**
> - * DOC: XE PMU event config IDs
> - *
> - * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
> - * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
> - * particular event.
> - *
> - * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
> - *
> - * .. code-block:: C
> - *
> - * struct perf_event_attr attr;
> - * long long count;
> - * int cpu = 0;
> - * int fd;
> - *
> - * memset(&attr, 0, sizeof(struct perf_event_attr));
> - * attr.type = type; // eg: /sys/bus/event_source/devices/xe_0000_56_00.0/type
> - * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
> - * attr.use_clockid = 1;
> - * attr.clockid = CLOCK_MONOTONIC;
> - * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
> - *
> - * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
> - */
> -
> -/*
> - * Top bits of every counter are GT id.
> - */
> -#define __DRM_XE_PMU_GT_SHIFT (56)
> -
> -#define ___DRM_XE_PMU_OTHER(gt, x) \
> - (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
> -
> -#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
> -#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
> -#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
> -#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
> -
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.BAT: failure for uAPI Alignment - More cleanup before upstream
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (5 preceding siblings ...)
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
@ 2023-12-12 18:38 ` Patchwork
2023-12-12 19:05 ` ✗ CI.xeBAT: " Patchwork
2023-12-13 17:17 ` ✗ Fi.CI.BUILD: failure for uAPI Alignment - More cleanup before upstream (rev2) Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-12-12 18:38 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
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== Series Details ==
Series: uAPI Alignment - More cleanup before upstream
URL : https://patchwork.freedesktop.org/series/127704/
State : failure
== Summary ==
CI Bug Log - changes from IGT_7636 -> IGTPW_10405
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_10405 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_10405, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/index.html
Participating hosts (36 -> 34)
------------------------------
Additional (1): bat-kbl-2
Missing (3): bat-dg2-8 fi-snb-2520m fi-bsw-n3050
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_10405:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-adlp-11: [PASS][1] -> [SKIP][2] +5 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_pipe_crc_basic@read-crc:
- bat-adlp-11: NOTRUN -> [SKIP][3] +8 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc.html
#### Warnings ####
* igt@kms_dsc@dsc-basic:
- bat-adlp-11: [SKIP][4] ([i915#3555] / [i915#3840]) -> [SKIP][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@kms_dsc@dsc-basic.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_dsc@dsc-basic.html
Known issues
------------
Here are the changes found in IGTPW_10405 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- bat-adlp-11: [PASS][6] -> [SKIP][7] ([i915#1849] / [i915#2582])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@fbdev@info.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@fbdev@info.html
- bat-kbl-2: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#1849])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-kbl-2/igt@fbdev@info.html
* igt@fbdev@nullptr:
- bat-adlp-11: [PASS][9] -> [SKIP][10] ([i915#2582]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@fbdev@nullptr.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@fbdev@nullptr.html
* igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9: [PASS][11] -> [INCOMPLETE][12] ([i915#9275])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-dg2-9/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_lmem_swapping@basic:
- fi-pnv-d510: NOTRUN -> [SKIP][13] ([fdo#109271]) +28 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/fi-pnv-d510/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2: NOTRUN -> [SKIP][14] ([fdo#109271]) +36 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@verify-random:
- bat-adlp-11: NOTRUN -> [SKIP][15] ([i915#4613]) +3 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@gem_lmem_swapping@verify-random.html
* igt@i915_pm_rps@basic-api:
- bat-adlp-11: NOTRUN -> [SKIP][16] ([i915#6621])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@execlists:
- fi-bsw-nick: [PASS][17] -> [ABORT][18] ([i915#7911])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/fi-bsw-nick/igt@i915_selftest@live@execlists.html
* igt@kms_flip@basic-flip-vs-dpms:
- bat-adlp-11: NOTRUN -> [SKIP][19] ([i915#3637]) +3 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_flip@basic-flip-vs-dpms.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-11: [PASS][20] -> [SKIP][21] ([i915#4342] / [i915#5354])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@kms_frontbuffer_tracking@basic.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][22] ([i915#9197]) +3 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][23] ([i915#8668])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-rplp-1/igt@kms_pm_backlight@basic-brightness@edp-1.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adlp-11: NOTRUN -> [SKIP][24] ([i915#3555])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-adlp-11: NOTRUN -> [SKIP][25] ([fdo#109295] / [i915#3708])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-read:
- bat-adlp-11: NOTRUN -> [SKIP][26] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@prime_vgem@basic-fence-read.html
#### Possible fixes ####
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][27] ([i915#8668]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- bat-adlp-11: [ABORT][29] ([i915#8668]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@kms_pm_rpm@basic-pci-d3-state.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_pm_rpm@basic-pci-d3-state.html
#### Warnings ####
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11: [SKIP][31] ([i915#4103] / [i915#5608]) -> [SKIP][32] ([i915#5608]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7636/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7636 -> IGTPW_10405
CI-20190529: 20190529
CI_DRM_14010: b4182ec1538e8cebf630083ec4296bed0061d594 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10405: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/index.html
IGT_7636: 7636
Testlist changes
----------------
+igt@xe_waitfence@exec_queue-reset-wait
-igt@xe_create@create-invalid-mbz
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/index.html
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
@ 2023-12-12 18:46 ` Rodrigo Vivi
0 siblings, 0 replies; 20+ messages in thread
From: Rodrigo Vivi @ 2023-12-12 18:46 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
On Tue, Dec 12, 2023 at 05:30:54PM +0000, Francois Dugast wrote:
> A few non functional changes from kernel commits below were missing:
> drm/xe/uapi: support pat_index selection with vm_bind
> drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 590f7b7af..313e555d2 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -129,7 +129,6 @@ struct xe_user_extension {
> * It is returned as part of the @drm_xe_engine, but it also is used as
> * the input of engine selection for both @drm_xe_exec_queue_create and
> * @drm_xe_query_engine_cycles
> - *
> */
> struct drm_xe_engine_class_instance {
> #define DRM_XE_ENGINE_CLASS_RENDER 0
> @@ -143,9 +142,11 @@ struct drm_xe_engine_class_instance {
> */
> #define DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC 5
> #define DRM_XE_ENGINE_CLASS_VM_BIND_SYNC 6
> + /** @engine_class: engine class id */
> __u16 engine_class;
> -
> + /** @engine_instance: engine instance id */
> __u16 engine_instance;
> + /** @gt_id: Unique ID of this GT within the PCI Device */
> __u16 gt_id;
> /** @pad: MBZ */
> __u16 pad;
> @@ -736,6 +737,12 @@ struct drm_xe_vm_bind_op {
> *
> * Note: For userptr and externally imported dma-buf the kernel expects
> * either 1WAY or 2WAY for the @pat_index.
> + *
> + * For DRM_XE_VM_BIND_FLAG_NULL bindings there are no KMD restrictions
> + * on the @pat_index. For such mappings there is no actual memory being
> + * mapped (the address in the PTE is invalid), so the various PAT memory
> + * attributes likely do not apply. Simply leaving as zero is one
> + * option (still a valid pat_index).
> */
> __u16 pat_index;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
2023-12-12 17:30 ` [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY Francois Dugast
@ 2023-12-12 18:47 ` Rodrigo Vivi
0 siblings, 0 replies; 20+ messages in thread
From: Rodrigo Vivi @ 2023-12-12 18:47 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
On Tue, Dec 12, 2023 at 05:30:57PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY")
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index fd06e4920..b543207bf 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -118,7 +118,6 @@ struct xe_user_extension {
> #define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> #define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
> #define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
> -#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
> #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
> #define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
> #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_*
2023-12-12 17:30 ` [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_* Francois Dugast
@ 2023-12-12 18:47 ` Rodrigo Vivi
0 siblings, 0 replies; 20+ messages in thread
From: Rodrigo Vivi @ 2023-12-12 18:47 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
On Tue, Dec 12, 2023 at 05:30:58PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove DRM_XE_UFENCE_WAIT_MASK_*")
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 12 +++++++-----
> lib/xe/xe_ioctl.h | 2 ++
> 2 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index b543207bf..8f09e9681 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -1040,11 +1040,13 @@ struct drm_xe_wait_user_fence {
> /** @value: compare value */
> __u64 value;
>
> -#define DRM_XE_UFENCE_WAIT_MASK_U8 0xffu
> -#define DRM_XE_UFENCE_WAIT_MASK_U16 0xffffu
> -#define DRM_XE_UFENCE_WAIT_MASK_U32 0xffffffffu
> -#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
> - /** @mask: comparison mask */
> + /**
> + * @mask: comparison mask, values can be for example:
> + * - 0xffu for u8
> + * - 0xffffu for u16
> + * - 0xffffffffu for u32
> + * - 0xffffffffffffffffu for u64
> + */
> __u64 mask;
>
> /**
> diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
> index 05480e40b..7dcc20e57 100644
> --- a/lib/xe/xe_ioctl.h
> +++ b/lib/xe/xe_ioctl.h
> @@ -15,6 +15,8 @@
> #include <stdint.h>
> #include <xe_drm.h>
>
> +#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
> +
> uint32_t xe_cs_prefetch_size(int fd);
> uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext);
> int __xe_vm_bind(int fd, uint32_t vm, uint32_t exec_queue, uint32_t bo,
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
2023-12-12 18:38 ` Dixit, Ashutosh
@ 2023-12-12 18:47 ` Rodrigo Vivi
1 sibling, 0 replies; 20+ messages in thread
From: Rodrigo Vivi @ 2023-12-12 18:47 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
On Tue, Dec 12, 2023 at 05:30:59PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/pmu: Remove PMU from Xe till uapi is finalized")
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 40 ---------------------------------------
> 1 file changed, 40 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 8f09e9681..b1839df48 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -1074,46 +1074,6 @@ struct drm_xe_wait_user_fence {
> /** @reserved: Reserved */
> __u64 reserved[2];
> };
> -
> -/**
> - * DOC: XE PMU event config IDs
> - *
> - * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
> - * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
> - * particular event.
> - *
> - * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
> - *
> - * .. code-block:: C
> - *
> - * struct perf_event_attr attr;
> - * long long count;
> - * int cpu = 0;
> - * int fd;
> - *
> - * memset(&attr, 0, sizeof(struct perf_event_attr));
> - * attr.type = type; // eg: /sys/bus/event_source/devices/xe_0000_56_00.0/type
> - * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
> - * attr.use_clockid = 1;
> - * attr.clockid = CLOCK_MONOTONIC;
> - * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
> - *
> - * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
> - */
> -
> -/*
> - * Top bits of every counter are GT id.
> - */
> -#define __DRM_XE_PMU_GT_SHIFT (56)
> -
> -#define ___DRM_XE_PMU_OTHER(gt, x) \
> - (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
> -
> -#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
> -#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
> -#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
> -#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
> -
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ CI.xeBAT: failure for uAPI Alignment - More cleanup before upstream
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (6 preceding siblings ...)
2023-12-12 18:38 ` ✗ Fi.CI.BAT: failure for uAPI Alignment - More cleanup before upstream Patchwork
@ 2023-12-12 19:05 ` Patchwork
2023-12-13 17:17 ` ✗ Fi.CI.BUILD: failure for uAPI Alignment - More cleanup before upstream (rev2) Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-12-12 19:05 UTC (permalink / raw)
To: Francois Dugast; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 14459 bytes --]
== Series Details ==
Series: uAPI Alignment - More cleanup before upstream
URL : https://patchwork.freedesktop.org/series/127704/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_7636_BAT -> XEIGTPW_10405_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_10405_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_10405_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (1 -> 4)
------------------------------
Additional (3): bat-pvc-2 bat-dg2-oem2 bat-atsm-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_10405_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_evict@evict-mixed-threads-small:
- bat-atsm-2: NOTRUN -> [TIMEOUT][1] +2 other tests timeout
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_evict@evict-mixed-threads-small.html
* igt@xe_evict@evict-mixed-threads-small-multi-vm:
- bat-pvc-2: NOTRUN -> [TIMEOUT][2] +2 other tests timeout
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_evict@evict-mixed-threads-small-multi-vm.html
- bat-dg2-oem2: NOTRUN -> [TIMEOUT][3] +2 other tests timeout
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-dg2-oem2/igt@xe_evict@evict-mixed-threads-small-multi-vm.html
* igt@xe_exec_balancer@twice-cm-virtual-rebind:
- bat-pvc-2: NOTRUN -> [FAIL][4] +31 other tests fail
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_exec_balancer@twice-cm-virtual-rebind.html
* igt@xe_exec_compute_mode@twice-preempt-fence-early:
- bat-dg2-oem2: NOTRUN -> [FAIL][5] +20 other tests fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-dg2-oem2/igt@xe_exec_compute_mode@twice-preempt-fence-early.html
* igt@xe_exec_compute_mode@twice-userptr-invalidate:
- bat-atsm-2: NOTRUN -> [FAIL][6] +30 other tests fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
* igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race:
- bat-adlp-7: [PASS][7] -> [FAIL][8] +19 other tests fail
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7636/bat-adlp-7/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-adlp-7/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate-race.html
* igt@xe_live_ktest@dmabuf:
- bat-pvc-2: NOTRUN -> [INCOMPLETE][9]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_live_ktest@dmabuf.html
Known issues
------------
Here are the changes found in XEIGTPW_10405_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- bat-pvc-2: NOTRUN -> [SKIP][10] ([i915#6077]) +30 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
* igt@kms_addfb_basic@invalid-set-prop-any:
- bat-atsm-2: NOTRUN -> [SKIP][11] ([i915#6077]) +30 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_addfb_basic@invalid-set-prop-any.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-pvc-2: NOTRUN -> [SKIP][12] ([Intel XE#1024] / [Intel XE#782]) +5 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- bat-atsm-2: NOTRUN -> [SKIP][13] ([Intel XE#1024] / [Intel XE#782]) +5 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-atsm-2: NOTRUN -> [SKIP][14] ([Intel XE#1024] / [Intel XE#784])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_dsc@dsc-basic.html
- bat-pvc-2: NOTRUN -> [SKIP][15] ([Intel XE#1024] / [Intel XE#784])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@basic-flip-vs-dpms:
- bat-pvc-2: NOTRUN -> [SKIP][16] ([Intel XE#1024] / [Intel XE#947]) +3 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_flip@basic-flip-vs-dpms.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-atsm-2: NOTRUN -> [SKIP][17] ([Intel XE#1024] / [Intel XE#947]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [PASS][18] -> [FAIL][19] ([Intel XE#480])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7636/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-pvc-2: NOTRUN -> [SKIP][20] ([Intel XE#540]) +3 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_force_connector_basic@force-connector-state.html
- bat-atsm-2: NOTRUN -> [SKIP][21] ([Intel XE#540]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-pvc-2: NOTRUN -> [SKIP][22] ([Intel XE#1024] / [Intel XE#783])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_frontbuffer_tracking@basic.html
- bat-atsm-2: NOTRUN -> [SKIP][23] ([Intel XE#1024] / [Intel XE#783])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24:
- bat-atsm-2: NOTRUN -> [SKIP][24] ([i915#1836]) +6 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-pvc-2: NOTRUN -> [SKIP][25] ([Intel XE#829]) +6 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_prop_blob@basic:
- bat-pvc-2: NOTRUN -> [SKIP][26] ([Intel XE#780])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@kms_prop_blob@basic.html
- bat-atsm-2: NOTRUN -> [SKIP][27] ([Intel XE#780])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@kms_prop_blob@basic.html
* igt@xe_compute@compute-square:
- bat-atsm-2: NOTRUN -> [SKIP][28] ([Intel XE#672])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_compute@compute-square.html
- bat-dg2-oem2: NOTRUN -> [SKIP][29] ([Intel XE#672])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-dg2-oem2/igt@xe_compute@compute-square.html
* igt@xe_create@create-execqueues-leak:
- bat-atsm-2: NOTRUN -> [FAIL][30] ([Intel XE#524]) +1 other test fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
* igt@xe_evict@evict-beng-small-external:
- bat-pvc-2: NOTRUN -> [FAIL][31] ([Intel XE#1000]) +3 other tests fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_evict@evict-beng-small-external.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
- bat-pvc-2: NOTRUN -> [INCOMPLETE][32] ([Intel XE#392])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
* igt@xe_huc_copy@huc_copy:
- bat-pvc-2: NOTRUN -> [SKIP][33] ([Intel XE#255])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_huc_copy@huc_copy.html
- bat-atsm-2: NOTRUN -> [SKIP][34] ([Intel XE#255])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_huc_copy@huc_copy.html
* igt@xe_intel_bb@render:
- bat-pvc-2: NOTRUN -> [SKIP][35] ([Intel XE#532])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_intel_bb@render.html
* igt@xe_module_load@load:
- bat-pvc-2: NOTRUN -> [SKIP][36] ([Intel XE#378])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_module_load@load.html
* igt@xe_pat@pat-index-xe2:
- bat-pvc-2: NOTRUN -> [SKIP][37] ([Intel XE#977]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_pat@pat-index-xe2.html
- bat-atsm-2: NOTRUN -> [SKIP][38] ([Intel XE#977])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xelpg:
- bat-atsm-2: NOTRUN -> [SKIP][39] ([Intel XE#979]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_pat@pat-index-xelpg.html
- bat-pvc-2: NOTRUN -> [SKIP][40] ([Intel XE#979])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_pm_residency@gt-c6-on-idle:
- bat-pvc-2: NOTRUN -> [SKIP][41] ([Intel XE#531])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_pm_residency@gt-c6-on-idle.html
* igt@xe_prime_self_import@basic-with_one_bo:
- bat-atsm-2: NOTRUN -> [FAIL][42] ([Intel XE#999])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_prime_self_import@basic-with_one_bo.html
- bat-pvc-2: NOTRUN -> [FAIL][43] ([Intel XE#999]) +1 other test fail
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-pvc-2/igt@xe_prime_self_import@basic-with_one_bo.html
* igt@xe_waitfence@abstime:
- bat-atsm-2: NOTRUN -> [FAIL][44] ([Intel XE#826])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-atsm-2/igt@xe_waitfence@abstime.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1:
- bat-adlp-7: [FAIL][45] ([Intel XE#480]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7636/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@a-edp1.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-7: [DMESG-WARN][47] ([Intel XE#282] / [i915#2017]) -> [DMESG-FAIL][48] ([Intel XE#1033] / [i915#2017])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7636/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1000]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1000
[Intel XE#1021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1021
[Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/392
[Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480
[Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524
[Intel XE#531]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/531
[Intel XE#532]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/532
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/672
[Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
[Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
[Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
[Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
[Intel XE#826]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/826
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947
[Intel XE#976]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/976
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[Intel XE#999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/999
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
Build changes
-------------
* IGT: IGT_7636 -> IGTPW_10405
* Linux: xe-570-0c30a1b58ce6096e5d6a6c9ba32961c345fab7c8 -> xe-572-7cebdf49fe98ed47972e2c20ef3ef7d04fdd8ec8
IGTPW_10405: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10405/index.html
IGT_7636: 7636
xe-570-0c30a1b58ce6096e5d6a6c9ba32961c345fab7c8: 0c30a1b58ce6096e5d6a6c9ba32961c345fab7c8
xe-572-7cebdf49fe98ed47972e2c20ef3ef7d04fdd8ec8: 7cebdf49fe98ed47972e2c20ef3ef7d04fdd8ec8
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10405/index.html
[-- Attachment #2: Type: text/html, Size: 17400 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-12 17:30 ` [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure Francois Dugast
@ 2023-12-12 21:31 ` Welty, Brian
2023-12-13 3:11 ` Bommu, Krishnaiah
0 siblings, 1 reply; 20+ messages in thread
From: Welty, Brian @ 2023-12-12 21:31 UTC (permalink / raw)
To: Francois Dugast, igt-dev; +Cc: Bommu Krishnaiah, Rodrigo Vivi
On 12/12/2023 9:30 AM, Francois Dugast wrote:
> From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>
> remove the num_engines/instances members from drm_xe_wait_user_fence structure
> and add a exec_queue_id member
>
> Right now this is only checking if the engine list is sane and nothing
> else. In the end every operation with this IOCTL is a soft check.
> So, let's formalize that and only use this IOCTL to wait on the fence.
>
> exec_queue_id member will help to user space to get proper error code
> from kernel while in exec_queue reset
>
> v2: Also fix test invalid_flag (Francois Dugast)
>
> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Francois Dugast <francois.dugast@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/drm-uapi/xe_drm.h | 17 +++++-----------
> lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
> lib/xe/xe_ioctl.h | 11 ++++------
> tests/intel/xe_evict.c | 4 ++--
> tests/intel/xe_exec_balancer.c | 15 +++++++-------
> tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
> tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
> tests/intel/xe_exec_reset.c | 6 +++---
> tests/intel/xe_exec_threads.c | 15 +++++++-------
> tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
> 10 files changed, 79 insertions(+), 89 deletions(-)
>
[snip]
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 094b34896..8e6c2e2e4 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -564,7 +564,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
>
> #define THREE_SEC MS_TO_NS(3000)
> - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, THREE_SEC);
> + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, THREE_SEC);
> data[0].vm_sync = 0;
>
> for (i = 0; i < n_execs; i++) {
> @@ -621,7 +621,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> int err;
>
> err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> - NULL, &timeout);
> + exec_queues[i % n_exec_queues], &timeout);
> if (flags & GT_RESET)
> /* exec races with reset: may timeout or complete */
> igt_assert(err == -ETIME || !err);
I believe driver now returns EIO instead of ETIME, if I understand the
driver changes from Krishnaiah.
So seems igt_assert above needs to replace -ETIME with -EIO.
-Brian
> @@ -631,7 +631,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> sync[0].addr = to_user_pointer(&data[0].vm_sync);
> xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL, THREE_SEC);
> + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, THREE_SEC);
>
> if (!(flags & GT_RESET)) {
> for (i = 1; i < n_execs; i++)
[snip]
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-12 21:31 ` Welty, Brian
@ 2023-12-13 3:11 ` Bommu, Krishnaiah
2023-12-13 17:07 ` Bommu, Krishnaiah
0 siblings, 1 reply; 20+ messages in thread
From: Bommu, Krishnaiah @ 2023-12-13 3:11 UTC (permalink / raw)
To: Welty, Brian, Dugast, Francois, igt-dev@lists.freedesktop.org
Cc: Vivi, Rodrigo
> -----Original Message-----
> From: Welty, Brian <brian.welty@intel.com>
> Sent: Wednesday, December 13, 2023 3:01 AM
> To: Dugast, Francois <francois.dugast@intel.com>; igt-
> dev@lists.freedesktop.org
> Cc: Bommu, Krishnaiah <krishnaiah.bommu@intel.com>; Vivi, Rodrigo
> <rodrigo.vivi@intel.com>
> Subject: Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
> drm_xe_wait_user_fence structure
>
>
> On 12/12/2023 9:30 AM, Francois Dugast wrote:
> > From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> >
> > remove the num_engines/instances members from
> drm_xe_wait_user_fence
> > structure and add a exec_queue_id member
> >
> > Right now this is only checking if the engine list is sane and nothing
> > else. In the end every operation with this IOCTL is a soft check.
> > So, let's formalize that and only use this IOCTL to wait on the fence.
> >
> > exec_queue_id member will help to user space to get proper error code
> > from kernel while in exec_queue reset
> >
> > v2: Also fix test invalid_flag (Francois Dugast)
> >
> > Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Francois Dugast <francois.dugast@intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > include/drm-uapi/xe_drm.h | 17 +++++-----------
> > lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
> > lib/xe/xe_ioctl.h | 11 ++++------
> > tests/intel/xe_evict.c | 4 ++--
> > tests/intel/xe_exec_balancer.c | 15 +++++++-------
> > tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
> > tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
> > tests/intel/xe_exec_reset.c | 6 +++---
> > tests/intel/xe_exec_threads.c | 15 +++++++-------
> > tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
> > 10 files changed, 79 insertions(+), 89 deletions(-)
> >
> [snip]
> > diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> > index 094b34896..8e6c2e2e4 100644
> > --- a/tests/intel/xe_exec_reset.c
> > +++ b/tests/intel/xe_exec_reset.c
> > @@ -564,7 +564,7 @@ test_compute_mode(int fd, struct
> drm_xe_engine_class_instance *eci,
> > xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
> >
> > #define THREE_SEC MS_TO_NS(3000)
> > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> THREE_SEC);
> > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > +THREE_SEC);
> > data[0].vm_sync = 0;
> >
> > for (i = 0; i < n_execs; i++) {
> > @@ -621,7 +621,7 @@ test_compute_mode(int fd, struct
> drm_xe_engine_class_instance *eci,
> > int err;
> >
> > err = __xe_wait_ufence(fd, &data[i].exec_sync,
> USER_FENCE_VALUE,
> > - NULL, &timeout);
> > + exec_queues[i % n_exec_queues],
> &timeout);
> > if (flags & GT_RESET)
> > /* exec races with reset: may timeout or complete */
> > igt_assert(err == -ETIME || !err);
>
> I believe driver now returns EIO instead of ETIME, if I understand the driver
> changes from Krishnaiah.
> So seems igt_assert above needs to replace -ETIME with -EIO.
>
> -Brian
Yes I agree, we need to change -ETIME to -EIO.
Thank you for pointing out
Regards,
Krishna.
>
>
> > @@ -631,7 +631,7 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >
> > sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> THREE_SEC);
> > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > +THREE_SEC);
> >
> > if (!(flags & GT_RESET)) {
> > for (i = 1; i < n_execs; i++)
> [snip]
^ permalink raw reply [flat|nested] 20+ messages in thread
* RE: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-13 3:11 ` Bommu, Krishnaiah
@ 2023-12-13 17:07 ` Bommu, Krishnaiah
2023-12-13 18:16 ` Welty, Brian
0 siblings, 1 reply; 20+ messages in thread
From: Bommu, Krishnaiah @ 2023-12-13 17:07 UTC (permalink / raw)
To: Welty, Brian, Dugast, Francois, igt-dev@lists.freedesktop.org
Cc: Vivi, Rodrigo
> -----Original Message-----
> From: Bommu, Krishnaiah
> Sent: Wednesday, December 13, 2023 8:41 AM
> To: Welty, Brian <brian.welty@intel.com>; Dugast, Francois
> <Francois.Dugast@intel.com>; igt-dev@lists.freedesktop.org
> Cc: Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: RE: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
> drm_xe_wait_user_fence structure
>
>
>
> > -----Original Message-----
> > From: Welty, Brian <brian.welty@intel.com>
> > Sent: Wednesday, December 13, 2023 3:01 AM
> > To: Dugast, Francois <francois.dugast@intel.com>; igt-
> > dev@lists.freedesktop.org
> > Cc: Bommu, Krishnaiah <krishnaiah.bommu@intel.com>; Vivi, Rodrigo
> > <rodrigo.vivi@intel.com>
> > Subject: Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
> > drm_xe_wait_user_fence structure
> >
> >
> > On 12/12/2023 9:30 AM, Francois Dugast wrote:
> > > From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> > >
> > > remove the num_engines/instances members from
> > drm_xe_wait_user_fence
> > > structure and add a exec_queue_id member
> > >
> > > Right now this is only checking if the engine list is sane and
> > > nothing else. In the end every operation with this IOCTL is a soft check.
> > > So, let's formalize that and only use this IOCTL to wait on the fence.
> > >
> > > exec_queue_id member will help to user space to get proper error
> > > code from kernel while in exec_queue reset
> > >
> > > v2: Also fix test invalid_flag (Francois Dugast)
> > >
> > > Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Cc: Francois Dugast <francois.dugast@intel.com>
> > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > ---
> > > include/drm-uapi/xe_drm.h | 17 +++++-----------
> > > lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
> > > lib/xe/xe_ioctl.h | 11 ++++------
> > > tests/intel/xe_evict.c | 4 ++--
> > > tests/intel/xe_exec_balancer.c | 15 +++++++-------
> > > tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
> > > tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
> > > tests/intel/xe_exec_reset.c | 6 +++---
> > > tests/intel/xe_exec_threads.c | 15 +++++++-------
> > > tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
> > > 10 files changed, 79 insertions(+), 89 deletions(-)
> > >
> > [snip]
> > > diff --git a/tests/intel/xe_exec_reset.c
> > > b/tests/intel/xe_exec_reset.c index 094b34896..8e6c2e2e4 100644
> > > --- a/tests/intel/xe_exec_reset.c
> > > +++ b/tests/intel/xe_exec_reset.c
> > > @@ -564,7 +564,7 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > > xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
> > >
> > > #define THREE_SEC MS_TO_NS(3000)
> > > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> > THREE_SEC);
> > > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > > +THREE_SEC);
> > > data[0].vm_sync = 0;
> > >
> > > for (i = 0; i < n_execs; i++) {
> > > @@ -621,7 +621,7 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > > int err;
> > >
> > > err = __xe_wait_ufence(fd, &data[i].exec_sync,
> > USER_FENCE_VALUE,
> > > - NULL, &timeout);
> > > + exec_queues[i % n_exec_queues],
> > &timeout);
> > > if (flags & GT_RESET)
> > > /* exec races with reset: may timeout or complete */
> > > igt_assert(err == -ETIME || !err);
> >
> > I believe driver now returns EIO instead of ETIME, if I understand the
> > driver changes from Krishnaiah.
> > So seems igt_assert above needs to replace -ETIME with -EIO.
> >
> > -Brian
>
> Yes I agree, we need to change -ETIME to -EIO.
> Thank you for pointing out
>
> Regards,
> Krishna.
@Dugast, Francois please add below code while merging the changes
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 8e6c2e2e4..9d0c7658b 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -623,8 +623,8 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
exec_queues[i % n_exec_queues], &timeout);
if (flags & GT_RESET)
- /* exec races with reset: may timeout or complete */
- igt_assert(err == -ETIME || !err);
+ /* exec races with reset: may return -EIO or complete */
+ igt_assert(err == -EIO || !err);
else
igt_assert_eq(err, 0);
}
root@kbommu-desk:/home/kbommu/xe_public/igt-gpu-tools#
@Welty, Brian this is fine or do you wants to send new patch ?
Regards,
Krishna.
> >
> >
> > > @@ -631,7 +631,7 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >
> > > sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > > xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> > > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> > THREE_SEC);
> > > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > > +THREE_SEC);
> > >
> > > if (!(flags & GT_RESET)) {
> > > for (i = 1; i < n_execs; i++)
> > [snip]
^ permalink raw reply related [flat|nested] 20+ messages in thread
* ✗ Fi.CI.BUILD: failure for uAPI Alignment - More cleanup before upstream (rev2)
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
` (7 preceding siblings ...)
2023-12-12 19:05 ` ✗ CI.xeBAT: " Patchwork
@ 2023-12-13 17:17 ` Patchwork
8 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-12-13 17:17 UTC (permalink / raw)
To: Bommu, Krishnaiah; +Cc: igt-dev
== Series Details ==
Series: uAPI Alignment - More cleanup before upstream (rev2)
URL : https://patchwork.freedesktop.org/series/127704/
State : failure
== Summary ==
Applying: drm-uapi/xe: Align header with current kernel uAPI
Applying: drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
Using index info to reconstruct a base tree...
M tests/intel/xe_exec_reset.c
Patch failed at 0002 drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-13 17:07 ` Bommu, Krishnaiah
@ 2023-12-13 18:16 ` Welty, Brian
2023-12-14 9:50 ` Francois Dugast
0 siblings, 1 reply; 20+ messages in thread
From: Welty, Brian @ 2023-12-13 18:16 UTC (permalink / raw)
To: Bommu, Krishnaiah, Dugast, Francois,
igt-dev@lists.freedesktop.org
Cc: Vivi, Rodrigo
On 12/13/2023 9:07 AM, Bommu, Krishnaiah wrote:
>
>
>> -----Original Message-----
>> From: Bommu, Krishnaiah
>> Sent: Wednesday, December 13, 2023 8:41 AM
>> To: Welty, Brian <brian.welty@intel.com>; Dugast, Francois
>> <Francois.Dugast@intel.com>; igt-dev@lists.freedesktop.org
>> Cc: Vivi, Rodrigo <rodrigo.vivi@intel.com>
>> Subject: RE: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
>> drm_xe_wait_user_fence structure
>>
>>
>>
>>> -----Original Message-----
>>> From: Welty, Brian <brian.welty@intel.com>
>>> Sent: Wednesday, December 13, 2023 3:01 AM
>>> To: Dugast, Francois <francois.dugast@intel.com>; igt-
>>> dev@lists.freedesktop.org
>>> Cc: Bommu, Krishnaiah <krishnaiah.bommu@intel.com>; Vivi, Rodrigo
>>> <rodrigo.vivi@intel.com>
>>> Subject: Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
>>> drm_xe_wait_user_fence structure
>>>
>>>
>>> On 12/12/2023 9:30 AM, Francois Dugast wrote:
>>>> From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>>>>
>>>> remove the num_engines/instances members from
>>> drm_xe_wait_user_fence
>>>> structure and add a exec_queue_id member
>>>>
>>>> Right now this is only checking if the engine list is sane and
>>>> nothing else. In the end every operation with this IOCTL is a soft check.
>>>> So, let's formalize that and only use this IOCTL to wait on the fence.
>>>>
>>>> exec_queue_id member will help to user space to get proper error
>>>> code from kernel while in exec_queue reset
>>>>
>>>> v2: Also fix test invalid_flag (Francois Dugast)
>>>>
>>>> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>>>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>> Cc: Francois Dugast <francois.dugast@intel.com>
>>>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>>> ---
>>>> include/drm-uapi/xe_drm.h | 17 +++++-----------
>>>> lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
>>>> lib/xe/xe_ioctl.h | 11 ++++------
>>>> tests/intel/xe_evict.c | 4 ++--
>>>> tests/intel/xe_exec_balancer.c | 15 +++++++-------
>>>> tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
>>>> tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
>>>> tests/intel/xe_exec_reset.c | 6 +++---
>>>> tests/intel/xe_exec_threads.c | 15 +++++++-------
>>>> tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
>>>> 10 files changed, 79 insertions(+), 89 deletions(-)
>>>>
>>> [snip]
>>>> diff --git a/tests/intel/xe_exec_reset.c
>>>> b/tests/intel/xe_exec_reset.c index 094b34896..8e6c2e2e4 100644
>>>> --- a/tests/intel/xe_exec_reset.c
>>>> +++ b/tests/intel/xe_exec_reset.c
>>>> @@ -564,7 +564,7 @@ test_compute_mode(int fd, struct
>>> drm_xe_engine_class_instance *eci,
>>>> xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
>>>>
>>>> #define THREE_SEC MS_TO_NS(3000)
>>>> - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
>>> THREE_SEC);
>>>> + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
>>>> +THREE_SEC);
>>>> data[0].vm_sync = 0;
>>>>
>>>> for (i = 0; i < n_execs; i++) {
>>>> @@ -621,7 +621,7 @@ test_compute_mode(int fd, struct
>>> drm_xe_engine_class_instance *eci,
>>>> int err;
>>>>
>>>> err = __xe_wait_ufence(fd, &data[i].exec_sync,
>>> USER_FENCE_VALUE,
>>>> - NULL, &timeout);
>>>> + exec_queues[i % n_exec_queues],
>>> &timeout);
>>>> if (flags & GT_RESET)
>>>> /* exec races with reset: may timeout or complete */
>>>> igt_assert(err == -ETIME || !err);
>>>
>>> I believe driver now returns EIO instead of ETIME, if I understand the
>>> driver changes from Krishnaiah.
>>> So seems igt_assert above needs to replace -ETIME with -EIO.
>>>
>>> -Brian
>>
>> Yes I agree, we need to change -ETIME to -EIO.
>> Thank you for pointing out
>>
>> Regards,
>> Krishna.
>
> @Dugast, Francois please add below code while merging the changes
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 8e6c2e2e4..9d0c7658b 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -623,8 +623,8 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> exec_queues[i % n_exec_queues], &timeout);
> if (flags & GT_RESET)
> - /* exec races with reset: may timeout or complete */
> - igt_assert(err == -ETIME || !err);
> + /* exec races with reset: may return -EIO or complete */
> + igt_assert(err == -EIO || !err);
> else
> igt_assert_eq(err, 0);
> }
> root@kbommu-desk:/home/kbommu/xe_public/igt-gpu-tools#
>
> @Welty, Brian this is fine or do you wants to send new patch ?
>
Looks fine to me. No need to resend. Thanks.
> Regards,
> Krishna.
>>>
>>>
>>>> @@ -631,7 +631,7 @@ test_compute_mode(int fd, struct
>>>> drm_xe_engine_class_instance *eci,
>>>>
>>>> sync[0].addr = to_user_pointer(&data[0].vm_sync);
>>>> xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
>>>> - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
>>> THREE_SEC);
>>>> + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
>>>> +THREE_SEC);
>>>>
>>>> if (!(flags & GT_RESET)) {
>>>> for (i = 1; i < n_execs; i++)
>>> [snip]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure
2023-12-13 18:16 ` Welty, Brian
@ 2023-12-14 9:50 ` Francois Dugast
0 siblings, 0 replies; 20+ messages in thread
From: Francois Dugast @ 2023-12-14 9:50 UTC (permalink / raw)
To: Welty, Brian
Cc: igt-dev@lists.freedesktop.org, Bommu, Krishnaiah, Vivi, Rodrigo
On Wed, Dec 13, 2023 at 10:16:17AM -0800, Welty, Brian wrote:
>
> On 12/13/2023 9:07 AM, Bommu, Krishnaiah wrote:
> >
> >
> > > -----Original Message-----
> > > From: Bommu, Krishnaiah
> > > Sent: Wednesday, December 13, 2023 8:41 AM
> > > To: Welty, Brian <brian.welty@intel.com>; Dugast, Francois
> > > <Francois.Dugast@intel.com>; igt-dev@lists.freedesktop.org
> > > Cc: Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > Subject: RE: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
> > > drm_xe_wait_user_fence structure
> > >
> > >
> > >
> > > > -----Original Message-----
> > > > From: Welty, Brian <brian.welty@intel.com>
> > > > Sent: Wednesday, December 13, 2023 3:01 AM
> > > > To: Dugast, Francois <francois.dugast@intel.com>; igt-
> > > > dev@lists.freedesktop.org
> > > > Cc: Bommu, Krishnaiah <krishnaiah.bommu@intel.com>; Vivi, Rodrigo
> > > > <rodrigo.vivi@intel.com>
> > > > Subject: Re: [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to
> > > > drm_xe_wait_user_fence structure
> > > >
> > > >
> > > > On 12/12/2023 9:30 AM, Francois Dugast wrote:
> > > > > From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> > > > >
> > > > > remove the num_engines/instances members from
> > > > drm_xe_wait_user_fence
> > > > > structure and add a exec_queue_id member
> > > > >
> > > > > Right now this is only checking if the engine list is sane and
> > > > > nothing else. In the end every operation with this IOCTL is a soft check.
> > > > > So, let's formalize that and only use this IOCTL to wait on the fence.
> > > > >
> > > > > exec_queue_id member will help to user space to get proper error
> > > > > code from kernel while in exec_queue reset
> > > > >
> > > > > v2: Also fix test invalid_flag (Francois Dugast)
> > > > >
> > > > > Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> > > > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > Cc: Francois Dugast <francois.dugast@intel.com>
> > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > ---
> > > > > include/drm-uapi/xe_drm.h | 17 +++++-----------
> > > > > lib/xe/xe_ioctl.c | 29 ++++++++++++---------------
> > > > > lib/xe/xe_ioctl.h | 11 ++++------
> > > > > tests/intel/xe_evict.c | 4 ++--
> > > > > tests/intel/xe_exec_balancer.c | 15 +++++++-------
> > > > > tests/intel/xe_exec_compute_mode.c | 18 ++++++++---------
> > > > > tests/intel/xe_exec_fault_mode.c | 21 +++++++++++---------
> > > > > tests/intel/xe_exec_reset.c | 6 +++---
> > > > > tests/intel/xe_exec_threads.c | 15 +++++++-------
> > > > > tests/intel/xe_waitfence.c | 32 ++++++++++++++----------------
> > > > > 10 files changed, 79 insertions(+), 89 deletions(-)
> > > > >
> > > > [snip]
> > > > > diff --git a/tests/intel/xe_exec_reset.c
> > > > > b/tests/intel/xe_exec_reset.c index 094b34896..8e6c2e2e4 100644
> > > > > --- a/tests/intel/xe_exec_reset.c
> > > > > +++ b/tests/intel/xe_exec_reset.c
> > > > > @@ -564,7 +564,7 @@ test_compute_mode(int fd, struct
> > > > drm_xe_engine_class_instance *eci,
> > > > > xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
> > > > >
> > > > > #define THREE_SEC MS_TO_NS(3000)
> > > > > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> > > > THREE_SEC);
> > > > > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > > > > +THREE_SEC);
> > > > > data[0].vm_sync = 0;
> > > > >
> > > > > for (i = 0; i < n_execs; i++) {
> > > > > @@ -621,7 +621,7 @@ test_compute_mode(int fd, struct
> > > > drm_xe_engine_class_instance *eci,
> > > > > int err;
> > > > >
> > > > > err = __xe_wait_ufence(fd, &data[i].exec_sync,
> > > > USER_FENCE_VALUE,
> > > > > - NULL, &timeout);
> > > > > + exec_queues[i % n_exec_queues],
> > > > &timeout);
> > > > > if (flags & GT_RESET)
> > > > > /* exec races with reset: may timeout or complete */
> > > > > igt_assert(err == -ETIME || !err);
> > > >
> > > > I believe driver now returns EIO instead of ETIME, if I understand the
> > > > driver changes from Krishnaiah.
> > > > So seems igt_assert above needs to replace -ETIME with -EIO.
> > > >
> > > > -Brian
> > >
> > > Yes I agree, we need to change -ETIME to -EIO.
> > > Thank you for pointing out
> > >
> > > Regards,
> > > Krishna.
> >
> > @Dugast, Francois please add below code while merging the changes
> > diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> > index 8e6c2e2e4..9d0c7658b 100644
> > --- a/tests/intel/xe_exec_reset.c
> > +++ b/tests/intel/xe_exec_reset.c
> > @@ -623,8 +623,8 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> > err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> > exec_queues[i % n_exec_queues], &timeout);
> > if (flags & GT_RESET)
> > - /* exec races with reset: may timeout or complete */
> > - igt_assert(err == -ETIME || !err);
> > + /* exec races with reset: may return -EIO or complete */
> > + igt_assert(err == -EIO || !err);
> > else
> > igt_assert_eq(err, 0);
> > }
> > root@kbommu-desk:/home/kbommu/xe_public/igt-gpu-tools#
> >
> > @Welty, Brian this is fine or do you wants to send new patch ?
> >
>
> Looks fine to me. No need to resend. Thanks.
Alright, I will make update before pushing.
Francois
>
>
> > Regards,
> > Krishna.
> > > >
> > > >
> > > > > @@ -631,7 +631,7 @@ test_compute_mode(int fd, struct
> > > > > drm_xe_engine_class_instance *eci,
> > > > >
> > > > > sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > > > > xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> > > > > - xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, NULL,
> > > > THREE_SEC);
> > > > > + xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0,
> > > > > +THREE_SEC);
> > > > >
> > > > > if (!(flags & GT_RESET)) {
> > > > > for (i = 1; i < n_execs; i++)
> > > > [snip]
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2023-12-14 9:50 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-12-12 17:30 [PATCH v1 0/6] uAPI Alignment - More cleanup before upstream Francois Dugast
2023-12-12 17:30 ` [PATCH v1 1/6] drm-uapi/xe: Align header with current kernel uAPI Francois Dugast
2023-12-12 18:46 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 2/6] drm-uapi/xe: add exec_queue_id member to drm_xe_wait_user_fence structure Francois Dugast
2023-12-12 21:31 ` Welty, Brian
2023-12-13 3:11 ` Bommu, Krishnaiah
2023-12-13 17:07 ` Bommu, Krishnaiah
2023-12-13 18:16 ` Welty, Brian
2023-12-14 9:50 ` Francois Dugast
2023-12-12 17:30 ` [PATCH v1 3/6] drm-uapi/xe: Don't wait on user_fence during exec queue reset Francois Dugast
2023-12-12 17:30 ` [PATCH v1 4/6] drm-uapi/xe: Remove DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 5/6] drm-uapi/xe: Remove DRM_XE_UFENCE_WAIT_MASK_* Francois Dugast
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 17:30 ` [PATCH v1 6/6] drm-uapi/xe: Remove PMU from Xe till uapi is finalized Francois Dugast
2023-12-12 18:38 ` Dixit, Ashutosh
2023-12-12 18:47 ` Rodrigo Vivi
2023-12-12 18:38 ` ✗ Fi.CI.BAT: failure for uAPI Alignment - More cleanup before upstream Patchwork
2023-12-12 19:05 ` ✗ CI.xeBAT: " Patchwork
2023-12-13 17:17 ` ✗ Fi.CI.BUILD: failure for uAPI Alignment - More cleanup before upstream (rev2) Patchwork
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