[PATCH i-g-t 00/10] lib: sync i915_pciids.h and _local.h with kernel

[PATCH i-g-t 00/10] lib: sync i915_pciids.h and _local.h with kernel

[Jani Nikula]

Bring in the PCI ID macro changes from kernel, one commit at a time for
ease of review. There should not be functional changes. This is just to
not ambush the innocent person who is next tasked to update some PCI IDs
from kernel.

BR,
Jani.

Jani Nikula (10):
  lib: sync i915_pciids.h with kernel commit 432ed92bfb55
  lib: sync i915_pciids.h with kernel commit 41c0f8a36f15
  lib: sync i915_pciids.h with kernel commit 7b43a37348b7
  lib: sync i915_pciids.h with kernel commit 5c8c22adc802
  lib: sync i915_pciids.h with kernel commit aa3d586e1624
  lib: sync i915_pciids.h with kernel commit bfbda4722767
  lib: sync i915_pciids.h with kernel commit 7858cc0b55e3
  lib: sync i915_pciids.h with kernel commit d2c4b1db1c4f
  lib: sync i915_pciids.h with kernel commit cfa7772880f8
  lib: switch i915_pciids_local.h to xe driver style PCI ID macros

 lib/i915/perf.c         |   33 +-
 lib/i915_pciids.h       | 1337 ++++++++++++++++++++-------------------
 lib/i915_pciids_local.h |   44 +-
 lib/intel_device_info.c |  149 ++---
 4 files changed, 785 insertions(+), 778 deletions(-)

-- 
2.39.2

[PATCH i-g-t 01/10] lib: sync i915_pciids.h with kernel commit 432ed92bfb55

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

432ed92bfb55 ("drm/i915/pciids: add INTEL_PNV_IDS(), use acronym")

and update the references in intel_device_info.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h       | 8 ++++++--
 lib/intel_device_info.c | 4 ++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 85ce33ad6e26..21942a3c823b 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -108,12 +108,16 @@
 	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
 	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
 
-#define INTEL_PINEVIEW_G_IDS(info) \
+#define INTEL_PNV_G_IDS(info) \
 	INTEL_VGA_DEVICE(0xa001, info)
 
-#define INTEL_PINEVIEW_M_IDS(info) \
+#define INTEL_PNV_M_IDS(info) \
 	INTEL_VGA_DEVICE(0xa011, info)
 
+#define INTEL_PNV_IDS(info) \
+	INTEL_PNV_G_IDS(info), \
+	INTEL_PNV_M_IDS(info)
+
 #define INTEL_IRONLAKE_D_IDS(info) \
 	INTEL_VGA_DEVICE(0x0042, info)
 
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 64b5246b7783..88b160ae2d69 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -530,8 +530,8 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_I945GM_IDS(&intel_i945m_info),
 
 	INTEL_G33_IDS(&intel_g33_info),
-	INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
-	INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
+	INTEL_PNV_G_IDS(&intel_pineview_g_info),
+	INTEL_PNV_M_IDS(&intel_pineview_m_info),
 
 	INTEL_I965G_IDS(&intel_i965_info),
 	INTEL_I965GM_IDS(&intel_i965m_info),
-- 
2.39.2

[PATCH i-g-t 02/10] lib: sync i915_pciids.h with kernel commit 41c0f8a36f15

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

41c0f8a36f15 ("drm/i915/pciids: add INTEL_ILK_IDS(), use acronym")

and update the references in intel_device_info.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h       | 8 ++++++--
 lib/intel_device_info.c | 4 ++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 21942a3c823b..05f466ca8ce2 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -118,12 +118,16 @@
 	INTEL_PNV_G_IDS(info), \
 	INTEL_PNV_M_IDS(info)
 
-#define INTEL_IRONLAKE_D_IDS(info) \
+#define INTEL_ILK_D_IDS(info) \
 	INTEL_VGA_DEVICE(0x0042, info)
 
-#define INTEL_IRONLAKE_M_IDS(info) \
+#define INTEL_ILK_M_IDS(info) \
 	INTEL_VGA_DEVICE(0x0046, info)
 
+#define INTEL_ILK_IDS(info) \
+	INTEL_ILK_D_IDS(info), \
+	INTEL_ILK_M_IDS(info)
+
 #define INTEL_SNB_D_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0102, info), \
 	INTEL_VGA_DEVICE(0x010A, info)
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 88b160ae2d69..0bff1ab4ee95 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -539,8 +539,8 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_G45_IDS(&intel_g45_info),
 	INTEL_GM45_IDS(&intel_gm45_info),
 
-	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
-	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
+	INTEL_ILK_D_IDS(&intel_ironlake_info),
+	INTEL_ILK_M_IDS(&intel_ironlake_m_info),
 
 	INTEL_SNB_D_IDS(&intel_sandybridge_info),
 	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),
-- 
2.39.2

[PATCH i-g-t 03/10] lib: sync i915_pciids.h with kernel commit 7b43a37348b7

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

7b43a37348b7 ("drm/i915/pciids: add INTEL_SNB_IDS()")

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 05f466ca8ce2..0d48c493dcce 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -151,6 +151,10 @@
 	INTEL_SNB_M_GT1_IDS(info), \
 	INTEL_SNB_M_GT2_IDS(info)
 
+#define INTEL_SNB_IDS(info) \
+	INTEL_SNB_D_IDS(info), \
+	INTEL_SNB_M_IDS(info)
+
 #define INTEL_IVB_M_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
 
-- 
2.39.2

[PATCH i-g-t 04/10] lib: sync i915_pciids.h with kernel commit 5c8c22adc802

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

5c8c22adc802 ("drm/i915/pciids: add INTEL_IVB_IDS()")

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 0d48c493dcce..16778d92346b 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -177,6 +177,10 @@
 	INTEL_IVB_D_GT1_IDS(info), \
 	INTEL_IVB_D_GT2_IDS(info)
 
+#define INTEL_IVB_IDS(info) \
+	INTEL_IVB_M_IDS(info), \
+	INTEL_IVB_D_IDS(info)
+
 #define INTEL_IVB_Q_IDS(info) \
 	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
 
-- 
2.39.2

[PATCH i-g-t 05/10] lib: sync i915_pciids.h with kernel commit aa3d586e1624

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

aa3d586e1624 ("drm/i915/pciids: don't include WHL/CML PCI IDs in CFL")

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 16778d92346b..0c5a20d59801 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -488,6 +488,12 @@
 	INTEL_VGA_DEVICE(0x9BCA, info), \
 	INTEL_VGA_DEVICE(0x9BCC, info)
 
+#define INTEL_CML_IDS(info) \
+	INTEL_CML_GT1_IDS(info), \
+	INTEL_CML_GT2_IDS(info), \
+	INTEL_CML_U_GT1_IDS(info), \
+	INTEL_CML_U_GT2_IDS(info)
+
 #define INTEL_KBL_IDS(info) \
 	INTEL_KBL_GT1_IDS(info), \
 	INTEL_KBL_GT2_IDS(info), \
@@ -527,6 +533,15 @@
 	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
 
+#define INTEL_CFL_IDS(info)	   \
+	INTEL_CFL_S_GT1_IDS(info), \
+	INTEL_CFL_S_GT2_IDS(info), \
+	INTEL_CFL_H_GT1_IDS(info), \
+	INTEL_CFL_H_GT2_IDS(info), \
+	INTEL_CFL_U_GT2_IDS(info), \
+	INTEL_CFL_U_GT3_IDS(info), \
+	INTEL_AML_CFL_GT2_IDS(info)
+
 /* WHL/CFL U GT1 */
 #define INTEL_WHL_U_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x3EA1, info), \
@@ -541,21 +556,10 @@
 #define INTEL_WHL_U_GT3_IDS(info) \
 	INTEL_VGA_DEVICE(0x3EA2, info)
 
-#define INTEL_CFL_IDS(info)	   \
-	INTEL_CFL_S_GT1_IDS(info), \
-	INTEL_CFL_S_GT2_IDS(info), \
-	INTEL_CFL_H_GT1_IDS(info), \
-	INTEL_CFL_H_GT2_IDS(info), \
-	INTEL_CFL_U_GT2_IDS(info), \
-	INTEL_CFL_U_GT3_IDS(info), \
+#define INTEL_WHL_IDS(info) \
 	INTEL_WHL_U_GT1_IDS(info), \
 	INTEL_WHL_U_GT2_IDS(info), \
-	INTEL_WHL_U_GT3_IDS(info), \
-	INTEL_AML_CFL_GT2_IDS(info), \
-	INTEL_CML_GT1_IDS(info), \
-	INTEL_CML_GT2_IDS(info), \
-	INTEL_CML_U_GT1_IDS(info), \
-	INTEL_CML_U_GT2_IDS(info)
+	INTEL_WHL_U_GT3_IDS(info)
 
 /* CNL */
 #define INTEL_CNL_PORT_F_IDS(info) \
-- 
2.39.2

[PATCH i-g-t 06/10] lib: sync i915_pciids.h with kernel commit bfbda4722767

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

bfbda4722767 ("drm/i915/pciids: remove 11 from INTEL_ICL_IDS()")

and update the references in intel_device_info.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h       | 2 +-
 lib/intel_device_info.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 0c5a20d59801..ecfd7f71e2e7 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -597,7 +597,7 @@
 	INTEL_VGA_DEVICE(0x8A70, info), \
 	INTEL_VGA_DEVICE(0x8A71, info)
 
-#define INTEL_ICL_11_IDS(info) \
+#define INTEL_ICL_IDS(info) \
 	INTEL_ICL_PORT_F_IDS(info), \
 	INTEL_VGA_DEVICE(0x8A51, info), \
 	INTEL_VGA_DEVICE(0x8A5D, info)
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 0bff1ab4ee95..79e3796dbefe 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -594,7 +594,7 @@ static const struct pci_id_match intel_device_match[] = {
 
 	INTEL_CNL_IDS(&intel_cannonlake_info),
 
-	INTEL_ICL_11_IDS(&intel_icelake_info),
+	INTEL_ICL_IDS(&intel_icelake_info),
 
 	INTEL_EHL_IDS(&intel_elkhartlake_info),
 	INTEL_JSL_IDS(&intel_jasperlake_info),
-- 
2.39.2

[PATCH i-g-t 07/10] lib: sync i915_pciids.h with kernel commit 7858cc0b55e3

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

7858cc0b55e3 ("drm/i915/pciids: remove 12 from INTEL_TGL_IDS()")

and update the references in intel_device_info.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h       | 10 +++++-----
 lib/intel_device_info.c |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index ecfd7f71e2e7..42913d2eb655 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -620,12 +620,12 @@
 	INTEL_VGA_DEVICE(0x4E71, info)
 
 /* TGL */
-#define INTEL_TGL_12_GT1_IDS(info) \
+#define INTEL_TGL_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x9A60, info), \
 	INTEL_VGA_DEVICE(0x9A68, info), \
 	INTEL_VGA_DEVICE(0x9A70, info)
 
-#define INTEL_TGL_12_GT2_IDS(info) \
+#define INTEL_TGL_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x9A40, info), \
 	INTEL_VGA_DEVICE(0x9A49, info), \
 	INTEL_VGA_DEVICE(0x9A59, info), \
@@ -635,9 +635,9 @@
 	INTEL_VGA_DEVICE(0x9AD9, info), \
 	INTEL_VGA_DEVICE(0x9AF8, info)
 
-#define INTEL_TGL_12_IDS(info) \
-	INTEL_TGL_12_GT1_IDS(info), \
-	INTEL_TGL_12_GT2_IDS(info)
+#define INTEL_TGL_IDS(info) \
+	INTEL_TGL_GT1_IDS(info), \
+	INTEL_TGL_GT2_IDS(info)
 
 /* RKL */
 #define INTEL_RKL_IDS(info) \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 79e3796dbefe..b1eec572dd82 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -599,8 +599,8 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_EHL_IDS(&intel_elkhartlake_info),
 	INTEL_JSL_IDS(&intel_jasperlake_info),
 
-	INTEL_TGL_12_GT1_IDS(&intel_tigerlake_gt1_info),
-	INTEL_TGL_12_GT2_IDS(&intel_tigerlake_gt2_info),
+	INTEL_TGL_GT1_IDS(&intel_tigerlake_gt1_info),
+	INTEL_TGL_GT2_IDS(&intel_tigerlake_gt2_info),
 	INTEL_RKL_IDS(&intel_rocketlake_info),
 
 	INTEL_DG1_IDS(&intel_dg1_info),
-- 
2.39.2

[PATCH i-g-t 08/10] lib: sync i915_pciids.h with kernel commit d2c4b1db1c4f

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

d2c4b1db1c4f ("drm/i915/pciids: don't include RPL-U PCI IDs in RPL-P")

and handle RPL-U separately in intel_device_info.c.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915_pciids.h       | 1 -
 lib/intel_device_info.c | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 42913d2eb655..04f6ca3dc5c1 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -717,7 +717,6 @@
 
 /* RPL-P */
 #define INTEL_RPLP_IDS(info) \
-	INTEL_RPLU_IDS(info), \
 	INTEL_VGA_DEVICE(0xA720, info), \
 	INTEL_VGA_DEVICE(0xA7A0, info), \
 	INTEL_VGA_DEVICE(0xA7A8, info), \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index b1eec572dd82..4d05307ce3d7 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -609,6 +609,7 @@ static const struct pci_id_match intel_device_match[] = {
 	INTEL_ADLS_IDS(&intel_alderlake_s_info),
 	INTEL_RPLS_IDS(&intel_raptorlake_s_info),
 	INTEL_ADLP_IDS(&intel_alderlake_p_info),
+	INTEL_RPLU_IDS(&intel_alderlake_p_info),
 	INTEL_RPLP_IDS(&intel_alderlake_p_info),
 	INTEL_ADLN_IDS(&intel_alderlake_n_info),
 
-- 
2.39.2

[PATCH i-g-t 09/10] lib: sync i915_pciids.h with kernel commit cfa7772880f8

[Jani Nikula]

Synchronize i915_pciids.h with kernel commit:

cfa7772880f8 ("drm/i915/pciids: switch to xe driver style PCI ID macros")

and update the macro usage in intel_device_info.c and perf.c. In the
latter, directly take advantage of the possibility to pass in the macro
to use.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915/perf.c         |   21 +-
 lib/i915_pciids.h       | 1348 +++++++++++++++++++--------------------
 lib/intel_device_info.c |  148 ++---
 3 files changed, 755 insertions(+), 762 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 9333edfebb5b..4b00ba5de9d4 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -155,16 +155,15 @@ unsupported_i915_perf_platform(struct intel_perf *perf)
 	return NULL;
 }
 
+#define ID(id) (id)
+
 static bool
 is_acm_gt1(const struct intel_perf_devinfo *devinfo)
 {
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(_id, _info) _id
 	static const uint32_t devids[] = {
-		INTEL_DG2_G11_IDS(NULL),
-		INTEL_ATS_M75_IDS(NULL),
+		INTEL_DG2_G11_IDS(ID),
+		INTEL_ATS_M75_IDS(ID),
 	};
-#undef INTEL_VGA_DEVICE
 	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
 		if (devids[i] == devinfo->devid)
 			return true;
@@ -176,12 +175,9 @@ is_acm_gt1(const struct intel_perf_devinfo *devinfo)
 static bool
 is_acm_gt2(const struct intel_perf_devinfo *devinfo)
 {
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(_id, _info) _id
 	static const uint32_t devids[] = {
-		INTEL_DG2_G12_IDS(NULL),
+		INTEL_DG2_G12_IDS(ID),
 	};
-#undef INTEL_VGA_DEVICE
 	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
 		if (devids[i] == devinfo->devid)
 			return true;
@@ -193,13 +189,10 @@ is_acm_gt2(const struct intel_perf_devinfo *devinfo)
 static bool
 is_acm_gt3(const struct intel_perf_devinfo *devinfo)
 {
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(_id, _info) _id
 	static const uint32_t devids[] = {
-		INTEL_DG2_G10_IDS(NULL),
-		INTEL_ATS_M150_IDS(NULL),
+		INTEL_DG2_G10_IDS(ID),
+		INTEL_ATS_M150_IDS(ID),
 	};
-#undef INTEL_VGA_DEVICE
 	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
 		if (devids[i] == devinfo->devid)
 			return true;
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 04f6ca3dc5c1..3e39d644ebaa 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -35,752 +35,752 @@
  * Don't use C99 here because "class" is reserved and we want to
  * give userspace flexibility.
  */
-#define INTEL_VGA_DEVICE(id, info) {		\
-	0x8086,	id,				\
-	~0, ~0,					\
-	0x030000, 0xff0000,			\
+#define INTEL_VGA_DEVICE(id, info) { \
+	0x8086,	id, \
+	~0, ~0, \
+	0x030000, 0xff0000, \
 	(unsigned long) info }
 
-#define INTEL_QUANTA_VGA_DEVICE(info) {		\
-	0x8086,	0x16a,				\
-	0x152d,	0x8990,				\
-	0x030000, 0xff0000,			\
+#define INTEL_QUANTA_VGA_DEVICE(info) { \
+	0x8086,	0x16a, \
+	0x152d,	0x8990, \
+	0x030000, 0xff0000, \
 	(unsigned long) info }
 
-#define INTEL_I810_IDS(info)					\
-	INTEL_VGA_DEVICE(0x7121, info), /* I810 */		\
-	INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */	\
-	INTEL_VGA_DEVICE(0x7125, info)  /* I810_E */
+#define INTEL_I810_IDS(MACRO__, ...) \
+	MACRO__(0x7121, ## __VA_ARGS__), /* I810 */ \
+	MACRO__(0x7123, ## __VA_ARGS__), /* I810_DC100 */ \
+	MACRO__(0x7125, ## __VA_ARGS__)  /* I810_E */
 
-#define INTEL_I815_IDS(info)					\
-	INTEL_VGA_DEVICE(0x1132, info)  /* I815*/
+#define INTEL_I815_IDS(MACRO__, ...) \
+	MACRO__(0x1132, ## __VA_ARGS__)  /* I815*/
 
-#define INTEL_I830_IDS(info)				\
-	INTEL_VGA_DEVICE(0x3577, info)
+#define INTEL_I830_IDS(MACRO__, ...) \
+	MACRO__(0x3577, ## __VA_ARGS__)
 
-#define INTEL_I845G_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2562, info)
+#define INTEL_I845G_IDS(MACRO__, ...) \
+	MACRO__(0x2562, ## __VA_ARGS__)
 
-#define INTEL_I85X_IDS(info)				\
-	INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
-	INTEL_VGA_DEVICE(0x358e, info)
+#define INTEL_I85X_IDS(MACRO__, ...) \
+	MACRO__(0x3582, ## __VA_ARGS__), /* I855_GM */ \
+	MACRO__(0x358e, ## __VA_ARGS__)
 
-#define INTEL_I865G_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2572, info) /* I865_G */
+#define INTEL_I865G_IDS(MACRO__, ...) \
+	MACRO__(0x2572, ## __VA_ARGS__) /* I865_G */
 
-#define INTEL_I915G_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
-	INTEL_VGA_DEVICE(0x258a, info)  /* E7221_G */
+#define INTEL_I915G_IDS(MACRO__, ...) \
+	MACRO__(0x2582, ## __VA_ARGS__), /* I915_G */ \
+	MACRO__(0x258a, ## __VA_ARGS__)  /* E7221_G */
 
-#define INTEL_I915GM_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */
+#define INTEL_I915GM_IDS(MACRO__, ...) \
+	MACRO__(0x2592, ## __VA_ARGS__) /* I915_GM */
 
-#define INTEL_I945G_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2772, info) /* I945_G */
+#define INTEL_I945G_IDS(MACRO__, ...) \
+	MACRO__(0x2772, ## __VA_ARGS__) /* I945_G */
 
-#define INTEL_I945GM_IDS(info)				\
-	INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
-	INTEL_VGA_DEVICE(0x27ae, info)  /* I945_GME */
+#define INTEL_I945GM_IDS(MACRO__, ...) \
+	MACRO__(0x27a2, ## __VA_ARGS__), /* I945_GM */ \
+	MACRO__(0x27ae, ## __VA_ARGS__)  /* I945_GME */
 
-#define INTEL_I965G_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */	\
-	INTEL_VGA_DEVICE(0x2982, info),	/* G35_G */	\
-	INTEL_VGA_DEVICE(0x2992, info),	/* I965_Q */	\
-	INTEL_VGA_DEVICE(0x29a2, info)	/* I965_G */
+#define INTEL_I965G_IDS(MACRO__, ...) \
+	MACRO__(0x2972, ## __VA_ARGS__), /* I946_GZ */ \
+	MACRO__(0x2982, ## __VA_ARGS__),	/* G35_G */ \
+	MACRO__(0x2992, ## __VA_ARGS__),	/* I965_Q */ \
+	MACRO__(0x29a2, ## __VA_ARGS__)	/* I965_G */
 
-#define INTEL_G33_IDS(info)				\
-	INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
-	INTEL_VGA_DEVICE(0x29c2, info),	/* G33_G */ \
-	INTEL_VGA_DEVICE(0x29d2, info)	/* Q33_G */
+#define INTEL_G33_IDS(MACRO__, ...) \
+	MACRO__(0x29b2, ## __VA_ARGS__), /* Q35_G */ \
+	MACRO__(0x29c2, ## __VA_ARGS__),	/* G33_G */ \
+	MACRO__(0x29d2, ## __VA_ARGS__)	/* Q33_G */
 
-#define INTEL_I965GM_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2a02, info),	/* I965_GM */ \
-	INTEL_VGA_DEVICE(0x2a12, info)  /* I965_GME */
+#define INTEL_I965GM_IDS(MACRO__, ...) \
+	MACRO__(0x2a02, ## __VA_ARGS__),	/* I965_GM */ \
+	MACRO__(0x2a12, ## __VA_ARGS__)  /* I965_GME */
 
-#define INTEL_GM45_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */
+#define INTEL_GM45_IDS(MACRO__, ...) \
+	MACRO__(0x2a42, ## __VA_ARGS__) /* GM45_G */
 
-#define INTEL_G45_IDS(info)				\
-	INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
-	INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
-	INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
-	INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
-	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
-	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
-
-#define INTEL_PNV_G_IDS(info) \
-	INTEL_VGA_DEVICE(0xa001, info)
-
-#define INTEL_PNV_M_IDS(info) \
-	INTEL_VGA_DEVICE(0xa011, info)
-
-#define INTEL_PNV_IDS(info) \
-	INTEL_PNV_G_IDS(info), \
-	INTEL_PNV_M_IDS(info)
-
-#define INTEL_ILK_D_IDS(info) \
-	INTEL_VGA_DEVICE(0x0042, info)
-
-#define INTEL_ILK_M_IDS(info) \
-	INTEL_VGA_DEVICE(0x0046, info)
-
-#define INTEL_ILK_IDS(info) \
-	INTEL_ILK_D_IDS(info), \
-	INTEL_ILK_M_IDS(info)
-
-#define INTEL_SNB_D_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0102, info), \
-	INTEL_VGA_DEVICE(0x010A, info)
-
-#define INTEL_SNB_D_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0112, info), \
-	INTEL_VGA_DEVICE(0x0122, info)
-
-#define INTEL_SNB_D_IDS(info) \
-	INTEL_SNB_D_GT1_IDS(info), \
-	INTEL_SNB_D_GT2_IDS(info)
-
-#define INTEL_SNB_M_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0106, info)
-
-#define INTEL_SNB_M_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0116, info), \
-	INTEL_VGA_DEVICE(0x0126, info)
-
-#define INTEL_SNB_M_IDS(info) \
-	INTEL_SNB_M_GT1_IDS(info), \
-	INTEL_SNB_M_GT2_IDS(info)
-
-#define INTEL_SNB_IDS(info) \
-	INTEL_SNB_D_IDS(info), \
-	INTEL_SNB_M_IDS(info)
-
-#define INTEL_IVB_M_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
-
-#define INTEL_IVB_M_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */
-
-#define INTEL_IVB_M_IDS(info) \
-	INTEL_IVB_M_GT1_IDS(info), \
-	INTEL_IVB_M_GT2_IDS(info)
-
-#define INTEL_IVB_D_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x015a, info)  /* GT1 server */
-
-#define INTEL_IVB_D_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x016a, info)  /* GT2 server */
-
-#define INTEL_IVB_D_IDS(info) \
-	INTEL_IVB_D_GT1_IDS(info), \
-	INTEL_IVB_D_GT2_IDS(info)
-
-#define INTEL_IVB_IDS(info) \
-	INTEL_IVB_M_IDS(info), \
-	INTEL_IVB_D_IDS(info)
-
-#define INTEL_IVB_Q_IDS(info) \
-	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
-
-#define INTEL_HSW_ULT_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
-	INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
-
-#define INTEL_HSW_ULX_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
-
-#define INTEL_HSW_GT1_IDS(info) \
-	INTEL_HSW_ULT_GT1_IDS(info), \
-	INTEL_HSW_ULX_GT1_IDS(info), \
-	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
-	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
-	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */	\
-	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
-	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
-
-#define INTEL_HSW_ULT_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */	\
-	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
-	INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
-
-#define INTEL_HSW_ULX_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
-
-#define INTEL_HSW_GT2_IDS(info) \
-	INTEL_HSW_ULT_GT2_IDS(info), \
-	INTEL_HSW_ULX_GT2_IDS(info), \
-	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
-	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
-	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
-	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
-
-#define INTEL_HSW_ULT_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
-	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
-	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
-
-#define INTEL_HSW_GT3_IDS(info) \
-	INTEL_HSW_ULT_GT3_IDS(info), \
-	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
-	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
-	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
-	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
-	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
-	INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
-	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
-
-#define INTEL_HSW_IDS(info) \
-	INTEL_HSW_GT1_IDS(info), \
-	INTEL_HSW_GT2_IDS(info), \
-	INTEL_HSW_GT3_IDS(info)
-
-#define INTEL_VLV_IDS(info) \
-	INTEL_VGA_DEVICE(0x0f30, info), \
-	INTEL_VGA_DEVICE(0x0f31, info), \
-	INTEL_VGA_DEVICE(0x0f32, info), \
-	INTEL_VGA_DEVICE(0x0f33, info)
-
-#define INTEL_BDW_ULT_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
-	INTEL_VGA_DEVICE(0x160B, info)  /* GT1 Iris */
-
-#define INTEL_BDW_ULX_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
-
-#define INTEL_BDW_GT1_IDS(info) \
-	INTEL_BDW_ULT_GT1_IDS(info), \
-	INTEL_BDW_ULX_GT1_IDS(info), \
-	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
-	INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
-	INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */
-
-#define INTEL_BDW_ULT_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
-	INTEL_VGA_DEVICE(0x161B, info)  /* GT2 ULT */
-
-#define INTEL_BDW_ULX_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
-
-#define INTEL_BDW_GT2_IDS(info) \
-	INTEL_BDW_ULT_GT2_IDS(info), \
-	INTEL_BDW_ULX_GT2_IDS(info), \
-	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */	\
-	INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
-	INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */
-
-#define INTEL_BDW_ULT_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
-	INTEL_VGA_DEVICE(0x162B, info)  /* Iris */ \
-
-#define INTEL_BDW_ULX_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x162E, info)  /* ULX */
-
-#define INTEL_BDW_GT3_IDS(info) \
-	INTEL_BDW_ULT_GT3_IDS(info), \
-	INTEL_BDW_ULX_GT3_IDS(info), \
-	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
-	INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
-	INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */
-
-#define INTEL_BDW_ULT_RSVD_IDS(info) \
-	INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
-	INTEL_VGA_DEVICE(0x163B, info)  /* Iris */
-
-#define INTEL_BDW_ULX_RSVD_IDS(info) \
-	INTEL_VGA_DEVICE(0x163E, info) /* ULX */
-
-#define INTEL_BDW_RSVD_IDS(info) \
-	INTEL_BDW_ULT_RSVD_IDS(info), \
-	INTEL_BDW_ULX_RSVD_IDS(info), \
-	INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
-	INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
-	INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */
-
-#define INTEL_BDW_IDS(info) \
-	INTEL_BDW_GT1_IDS(info), \
-	INTEL_BDW_GT2_IDS(info), \
-	INTEL_BDW_GT3_IDS(info), \
-	INTEL_BDW_RSVD_IDS(info)
-
-#define INTEL_CHV_IDS(info) \
-	INTEL_VGA_DEVICE(0x22b0, info), \
-	INTEL_VGA_DEVICE(0x22b1, info), \
-	INTEL_VGA_DEVICE(0x22b2, info), \
-	INTEL_VGA_DEVICE(0x22b3, info)
-
-#define INTEL_SKL_ULT_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
-	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
-
-#define INTEL_SKL_ULX_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
-	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
-
-#define INTEL_SKL_GT1_IDS(info)	\
-	INTEL_SKL_ULT_GT1_IDS(info), \
-	INTEL_SKL_ULX_GT1_IDS(info), \
-	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
-	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
-	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
-	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
-
-#define INTEL_SKL_ULT_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
-	INTEL_VGA_DEVICE(0x1921, info)  /* ULT GT2F */
-
-#define INTEL_SKL_ULX_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
-
-#define INTEL_SKL_GT2_IDS(info)	\
-	INTEL_SKL_ULT_GT2_IDS(info), \
-	INTEL_SKL_ULX_GT2_IDS(info), \
-	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
-	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
-	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
-
-#define INTEL_SKL_ULT_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \
-	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3e */
-
-#define INTEL_SKL_GT3_IDS(info) \
-	INTEL_SKL_ULT_GT3_IDS(info), \
-	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
-	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \
-	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3e */
-
-#define INTEL_SKL_GT4_IDS(info) \
-	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
-	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
-	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
-	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
-
-#define INTEL_SKL_IDS(info)	 \
-	INTEL_SKL_GT1_IDS(info), \
-	INTEL_SKL_GT2_IDS(info), \
-	INTEL_SKL_GT3_IDS(info), \
-	INTEL_SKL_GT4_IDS(info)
-
-#define INTEL_BXT_IDS(info) \
-	INTEL_VGA_DEVICE(0x0A84, info), \
-	INTEL_VGA_DEVICE(0x1A84, info), \
-	INTEL_VGA_DEVICE(0x1A85, info), \
-	INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
-	INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
-
-#define INTEL_GLK_IDS(info) \
-	INTEL_VGA_DEVICE(0x3184, info), \
-	INTEL_VGA_DEVICE(0x3185, info)
-
-#define INTEL_KBL_ULT_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
-	INTEL_VGA_DEVICE(0x5913, info)  /* ULT GT1.5 */
-
-#define INTEL_KBL_ULX_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
-	INTEL_VGA_DEVICE(0x5915, info)  /* ULX GT1.5 */
-
-#define INTEL_KBL_GT1_IDS(info)	\
-	INTEL_KBL_ULT_GT1_IDS(info), \
-	INTEL_KBL_ULX_GT1_IDS(info), \
-	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
-	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
-	INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \
-	INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */
-
-#define INTEL_KBL_ULT_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
-	INTEL_VGA_DEVICE(0x5921, info)  /* ULT GT2F */
-
-#define INTEL_KBL_ULX_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x591E, info)  /* ULX GT2 */
-
-#define INTEL_KBL_GT2_IDS(info)	\
-	INTEL_KBL_ULT_GT2_IDS(info), \
-	INTEL_KBL_ULX_GT2_IDS(info), \
-	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
-	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
-	INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
-	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
-
-#define INTEL_KBL_ULT_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
-
-#define INTEL_KBL_GT3_IDS(info) \
-	INTEL_KBL_ULT_GT3_IDS(info), \
-	INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
-
-#define INTEL_KBL_GT4_IDS(info) \
-	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
+#define INTEL_G45_IDS(MACRO__, ...) \
+	MACRO__(0x2e02, ## __VA_ARGS__), /* IGD_E_G */ \
+	MACRO__(0x2e12, ## __VA_ARGS__), /* Q45_G */ \
+	MACRO__(0x2e22, ## __VA_ARGS__), /* G45_G */ \
+	MACRO__(0x2e32, ## __VA_ARGS__), /* G41_G */ \
+	MACRO__(0x2e42, ## __VA_ARGS__), /* B43_G */ \
+	MACRO__(0x2e92, ## __VA_ARGS__)	/* B43_G.1 */
+
+#define INTEL_PNV_G_IDS(MACRO__, ...) \
+	MACRO__(0xa001, ## __VA_ARGS__)
+
+#define INTEL_PNV_M_IDS(MACRO__, ...) \
+	MACRO__(0xa011, ## __VA_ARGS__)
+
+#define INTEL_PNV_IDS(MACRO__, ...) \
+	INTEL_PNV_G_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_PNV_M_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_ILK_D_IDS(MACRO__, ...) \
+	MACRO__(0x0042, ## __VA_ARGS__)
+
+#define INTEL_ILK_M_IDS(MACRO__, ...) \
+	MACRO__(0x0046, ## __VA_ARGS__)
+
+#define INTEL_ILK_IDS(MACRO__, ...) \
+	INTEL_ILK_D_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_ILK_M_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_SNB_D_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0102, ## __VA_ARGS__), \
+	MACRO__(0x010A, ## __VA_ARGS__)
+
+#define INTEL_SNB_D_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0112, ## __VA_ARGS__), \
+	MACRO__(0x0122, ## __VA_ARGS__)
+
+#define INTEL_SNB_D_IDS(MACRO__, ...) \
+	INTEL_SNB_D_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SNB_D_GT2_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_SNB_M_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0106, ## __VA_ARGS__)
+
+#define INTEL_SNB_M_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0116, ## __VA_ARGS__), \
+	MACRO__(0x0126, ## __VA_ARGS__)
+
+#define INTEL_SNB_M_IDS(MACRO__, ...) \
+	INTEL_SNB_M_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SNB_M_GT2_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_SNB_IDS(MACRO__, ...) \
+	INTEL_SNB_D_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SNB_M_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_IVB_M_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0156, ## __VA_ARGS__) /* GT1 mobile */
+
+#define INTEL_IVB_M_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0166, ## __VA_ARGS__) /* GT2 mobile */
+
+#define INTEL_IVB_M_IDS(MACRO__, ...) \
+	INTEL_IVB_M_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_IVB_M_GT2_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_IVB_D_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0152, ## __VA_ARGS__), /* GT1 desktop */ \
+	MACRO__(0x015a, ## __VA_ARGS__)  /* GT1 server */
+
+#define INTEL_IVB_D_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0162, ## __VA_ARGS__), /* GT2 desktop */ \
+	MACRO__(0x016a, ## __VA_ARGS__)  /* GT2 server */
+
+#define INTEL_IVB_D_IDS(MACRO__, ...) \
+	INTEL_IVB_D_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_IVB_D_GT2_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_IVB_IDS(MACRO__, ...) \
+	INTEL_IVB_M_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_IVB_D_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_IVB_Q_IDS(MACRO__, ...) \
+	INTEL_QUANTA_VGA_DEVICE(__VA_ARGS__) /* Quanta transcode */
+
+#define INTEL_HSW_ULT_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0A02, ## __VA_ARGS__), /* ULT GT1 desktop */ \
+	MACRO__(0x0A06, ## __VA_ARGS__), /* ULT GT1 mobile */ \
+	MACRO__(0x0A0A, ## __VA_ARGS__), /* ULT GT1 server */ \
+	MACRO__(0x0A0B, ## __VA_ARGS__)  /* ULT GT1 reserved */
+
+#define INTEL_HSW_ULX_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x0A0E, ## __VA_ARGS__) /* ULX GT1 mobile */
+
+#define INTEL_HSW_GT1_IDS(MACRO__, ...) \
+	INTEL_HSW_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_HSW_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x0402, ## __VA_ARGS__), /* GT1 desktop */ \
+	MACRO__(0x0406, ## __VA_ARGS__), /* GT1 mobile */ \
+	MACRO__(0x040A, ## __VA_ARGS__), /* GT1 server */ \
+	MACRO__(0x040B, ## __VA_ARGS__), /* GT1 reserved */ \
+	MACRO__(0x040E, ## __VA_ARGS__), /* GT1 reserved */ \
+	MACRO__(0x0C02, ## __VA_ARGS__), /* SDV GT1 desktop */ \
+	MACRO__(0x0C06, ## __VA_ARGS__), /* SDV GT1 mobile */ \
+	MACRO__(0x0C0A, ## __VA_ARGS__), /* SDV GT1 server */ \
+	MACRO__(0x0C0B, ## __VA_ARGS__), /* SDV GT1 reserved */ \
+	MACRO__(0x0C0E, ## __VA_ARGS__), /* SDV GT1 reserved */ \
+	MACRO__(0x0D02, ## __VA_ARGS__), /* CRW GT1 desktop */ \
+	MACRO__(0x0D06, ## __VA_ARGS__), /* CRW GT1 mobile */ \
+	MACRO__(0x0D0A, ## __VA_ARGS__), /* CRW GT1 server */ \
+	MACRO__(0x0D0B, ## __VA_ARGS__), /* CRW GT1 reserved */ \
+	MACRO__(0x0D0E, ## __VA_ARGS__)  /* CRW GT1 reserved */
+
+#define INTEL_HSW_ULT_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0A12, ## __VA_ARGS__), /* ULT GT2 desktop */ \
+	MACRO__(0x0A16, ## __VA_ARGS__), /* ULT GT2 mobile */ \
+	MACRO__(0x0A1A, ## __VA_ARGS__), /* ULT GT2 server */ \
+	MACRO__(0x0A1B, ## __VA_ARGS__)  /* ULT GT2 reserved */ \
+
+#define INTEL_HSW_ULX_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x0A1E, ## __VA_ARGS__) /* ULX GT2 mobile */ \
+
+#define INTEL_HSW_GT2_IDS(MACRO__, ...) \
+	INTEL_HSW_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_HSW_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x0412, ## __VA_ARGS__), /* GT2 desktop */ \
+	MACRO__(0x0416, ## __VA_ARGS__), /* GT2 mobile */ \
+	MACRO__(0x041A, ## __VA_ARGS__), /* GT2 server */ \
+	MACRO__(0x041B, ## __VA_ARGS__), /* GT2 reserved */ \
+	MACRO__(0x041E, ## __VA_ARGS__), /* GT2 reserved */ \
+	MACRO__(0x0C12, ## __VA_ARGS__), /* SDV GT2 desktop */ \
+	MACRO__(0x0C16, ## __VA_ARGS__), /* SDV GT2 mobile */ \
+	MACRO__(0x0C1A, ## __VA_ARGS__), /* SDV GT2 server */ \
+	MACRO__(0x0C1B, ## __VA_ARGS__), /* SDV GT2 reserved */ \
+	MACRO__(0x0C1E, ## __VA_ARGS__), /* SDV GT2 reserved */ \
+	MACRO__(0x0D12, ## __VA_ARGS__), /* CRW GT2 desktop */ \
+	MACRO__(0x0D16, ## __VA_ARGS__), /* CRW GT2 mobile */ \
+	MACRO__(0x0D1A, ## __VA_ARGS__), /* CRW GT2 server */ \
+	MACRO__(0x0D1B, ## __VA_ARGS__), /* CRW GT2 reserved */ \
+	MACRO__(0x0D1E, ## __VA_ARGS__)  /* CRW GT2 reserved */
+
+#define INTEL_HSW_ULT_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x0A22, ## __VA_ARGS__), /* ULT GT3 desktop */ \
+	MACRO__(0x0A26, ## __VA_ARGS__), /* ULT GT3 mobile */ \
+	MACRO__(0x0A2A, ## __VA_ARGS__), /* ULT GT3 server */ \
+	MACRO__(0x0A2B, ## __VA_ARGS__), /* ULT GT3 reserved */ \
+	MACRO__(0x0A2E, ## __VA_ARGS__)  /* ULT GT3 reserved */
+
+#define INTEL_HSW_GT3_IDS(MACRO__, ...) \
+	INTEL_HSW_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x0422, ## __VA_ARGS__), /* GT3 desktop */ \
+	MACRO__(0x0426, ## __VA_ARGS__), /* GT3 mobile */ \
+	MACRO__(0x042A, ## __VA_ARGS__), /* GT3 server */ \
+	MACRO__(0x042B, ## __VA_ARGS__), /* GT3 reserved */ \
+	MACRO__(0x042E, ## __VA_ARGS__), /* GT3 reserved */ \
+	MACRO__(0x0C22, ## __VA_ARGS__), /* SDV GT3 desktop */ \
+	MACRO__(0x0C26, ## __VA_ARGS__), /* SDV GT3 mobile */ \
+	MACRO__(0x0C2A, ## __VA_ARGS__), /* SDV GT3 server */ \
+	MACRO__(0x0C2B, ## __VA_ARGS__), /* SDV GT3 reserved */ \
+	MACRO__(0x0C2E, ## __VA_ARGS__), /* SDV GT3 reserved */ \
+	MACRO__(0x0D22, ## __VA_ARGS__), /* CRW GT3 desktop */ \
+	MACRO__(0x0D26, ## __VA_ARGS__), /* CRW GT3 mobile */ \
+	MACRO__(0x0D2A, ## __VA_ARGS__), /* CRW GT3 server */ \
+	MACRO__(0x0D2B, ## __VA_ARGS__), /* CRW GT3 reserved */ \
+	MACRO__(0x0D2E, ## __VA_ARGS__)  /* CRW GT3 reserved */
+
+#define INTEL_HSW_IDS(MACRO__, ...) \
+	INTEL_HSW_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_HSW_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_HSW_GT3_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_VLV_IDS(MACRO__, ...) \
+	MACRO__(0x0f30, ## __VA_ARGS__), \
+	MACRO__(0x0f31, ## __VA_ARGS__), \
+	MACRO__(0x0f32, ## __VA_ARGS__), \
+	MACRO__(0x0f33, ## __VA_ARGS__)
+
+#define INTEL_BDW_ULT_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x1606, ## __VA_ARGS__), /* GT1 ULT */ \
+	MACRO__(0x160B, ## __VA_ARGS__)  /* GT1 Iris */
+
+#define INTEL_BDW_ULX_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x160E, ## __VA_ARGS__) /* GT1 ULX */
+
+#define INTEL_BDW_GT1_IDS(MACRO__, ...) \
+	INTEL_BDW_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1602, ## __VA_ARGS__), /* GT1 ULT */ \
+	MACRO__(0x160A, ## __VA_ARGS__), /* GT1 Server */ \
+	MACRO__(0x160D, ## __VA_ARGS__)  /* GT1 Workstation */
+
+#define INTEL_BDW_ULT_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x1616, ## __VA_ARGS__), /* GT2 ULT */ \
+	MACRO__(0x161B, ## __VA_ARGS__)  /* GT2 ULT */
+
+#define INTEL_BDW_ULX_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x161E, ## __VA_ARGS__) /* GT2 ULX */
+
+#define INTEL_BDW_GT2_IDS(MACRO__, ...) \
+	INTEL_BDW_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1612, ## __VA_ARGS__), /* GT2 Halo */ \
+	MACRO__(0x161A, ## __VA_ARGS__), /* GT2 Server */ \
+	MACRO__(0x161D, ## __VA_ARGS__)  /* GT2 Workstation */
+
+#define INTEL_BDW_ULT_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x1626, ## __VA_ARGS__), /* ULT */ \
+	MACRO__(0x162B, ## __VA_ARGS__)  /* Iris */ \
+
+#define INTEL_BDW_ULX_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x162E, ## __VA_ARGS__)  /* ULX */
+
+#define INTEL_BDW_GT3_IDS(MACRO__, ...) \
+	INTEL_BDW_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_ULX_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1622, ## __VA_ARGS__), /* ULT */ \
+	MACRO__(0x162A, ## __VA_ARGS__), /* Server */ \
+	MACRO__(0x162D, ## __VA_ARGS__)  /* Workstation */
+
+#define INTEL_BDW_ULT_RSVD_IDS(MACRO__, ...) \
+	MACRO__(0x1636, ## __VA_ARGS__), /* ULT */ \
+	MACRO__(0x163B, ## __VA_ARGS__)  /* Iris */
+
+#define INTEL_BDW_ULX_RSVD_IDS(MACRO__, ...) \
+	MACRO__(0x163E, ## __VA_ARGS__) /* ULX */
+
+#define INTEL_BDW_RSVD_IDS(MACRO__, ...) \
+	INTEL_BDW_ULT_RSVD_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_ULX_RSVD_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1632, ## __VA_ARGS__), /* ULT */ \
+	MACRO__(0x163A, ## __VA_ARGS__), /* Server */ \
+	MACRO__(0x163D, ## __VA_ARGS__)  /* Workstation */
+
+#define INTEL_BDW_IDS(MACRO__, ...) \
+	INTEL_BDW_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_BDW_RSVD_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_CHV_IDS(MACRO__, ...) \
+	MACRO__(0x22b0, ## __VA_ARGS__), \
+	MACRO__(0x22b1, ## __VA_ARGS__), \
+	MACRO__(0x22b2, ## __VA_ARGS__), \
+	MACRO__(0x22b3, ## __VA_ARGS__)
+
+#define INTEL_SKL_ULT_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x1906, ## __VA_ARGS__), /* ULT GT1 */ \
+	MACRO__(0x1913, ## __VA_ARGS__)  /* ULT GT1.5 */
+
+#define INTEL_SKL_ULX_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x190E, ## __VA_ARGS__), /* ULX GT1 */ \
+	MACRO__(0x1915, ## __VA_ARGS__)  /* ULX GT1.5 */
+
+#define INTEL_SKL_GT1_IDS(MACRO__, ...) \
+	INTEL_SKL_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SKL_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1902, ## __VA_ARGS__), /* DT  GT1 */ \
+	MACRO__(0x190A, ## __VA_ARGS__), /* SRV GT1 */ \
+	MACRO__(0x190B, ## __VA_ARGS__), /* Halo GT1 */ \
+	MACRO__(0x1917, ## __VA_ARGS__)  /* DT  GT1.5 */
+
+#define INTEL_SKL_ULT_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x1916, ## __VA_ARGS__), /* ULT GT2 */ \
+	MACRO__(0x1921, ## __VA_ARGS__)  /* ULT GT2F */
+
+#define INTEL_SKL_ULX_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x191E, ## __VA_ARGS__) /* ULX GT2 */
+
+#define INTEL_SKL_GT2_IDS(MACRO__, ...) \
+	INTEL_SKL_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SKL_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x1912, ## __VA_ARGS__), /* DT  GT2 */ \
+	MACRO__(0x191A, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x191B, ## __VA_ARGS__), /* Halo GT2 */ \
+	MACRO__(0x191D, ## __VA_ARGS__)  /* WKS GT2 */
+
+#define INTEL_SKL_ULT_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x1923, ## __VA_ARGS__), /* ULT GT3 */ \
+	MACRO__(0x1926, ## __VA_ARGS__), /* ULT GT3e */ \
+	MACRO__(0x1927, ## __VA_ARGS__)  /* ULT GT3e */
+
+#define INTEL_SKL_GT3_IDS(MACRO__, ...) \
+	INTEL_SKL_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x192A, ## __VA_ARGS__), /* SRV GT3 */ \
+	MACRO__(0x192B, ## __VA_ARGS__), /* Halo GT3e */ \
+	MACRO__(0x192D, ## __VA_ARGS__)  /* SRV GT3e */
+
+#define INTEL_SKL_GT4_IDS(MACRO__, ...) \
+	MACRO__(0x1932, ## __VA_ARGS__), /* DT GT4 */ \
+	MACRO__(0x193A, ## __VA_ARGS__), /* SRV GT4e */ \
+	MACRO__(0x193B, ## __VA_ARGS__), /* Halo GT4e */ \
+	MACRO__(0x193D, ## __VA_ARGS__) /* WKS GT4e */
+
+#define INTEL_SKL_IDS(MACRO__, ...) \
+	INTEL_SKL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SKL_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SKL_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_SKL_GT4_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_BXT_IDS(MACRO__, ...) \
+	MACRO__(0x0A84, ## __VA_ARGS__), \
+	MACRO__(0x1A84, ## __VA_ARGS__), \
+	MACRO__(0x1A85, ## __VA_ARGS__), \
+	MACRO__(0x5A84, ## __VA_ARGS__), /* APL HD Graphics 505 */ \
+	MACRO__(0x5A85, ## __VA_ARGS__)  /* APL HD Graphics 500 */
+
+#define INTEL_GLK_IDS(MACRO__, ...) \
+	MACRO__(0x3184, ## __VA_ARGS__), \
+	MACRO__(0x3185, ## __VA_ARGS__)
+
+#define INTEL_KBL_ULT_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x5906, ## __VA_ARGS__), /* ULT GT1 */ \
+	MACRO__(0x5913, ## __VA_ARGS__)  /* ULT GT1.5 */
+
+#define INTEL_KBL_ULX_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x590E, ## __VA_ARGS__), /* ULX GT1 */ \
+	MACRO__(0x5915, ## __VA_ARGS__)  /* ULX GT1.5 */
+
+#define INTEL_KBL_GT1_IDS(MACRO__, ...) \
+	INTEL_KBL_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_KBL_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x5902, ## __VA_ARGS__), /* DT  GT1 */ \
+	MACRO__(0x5908, ## __VA_ARGS__), /* Halo GT1 */ \
+	MACRO__(0x590A, ## __VA_ARGS__), /* SRV GT1 */ \
+	MACRO__(0x590B, ## __VA_ARGS__) /* Halo GT1 */
+
+#define INTEL_KBL_ULT_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x5916, ## __VA_ARGS__), /* ULT GT2 */ \
+	MACRO__(0x5921, ## __VA_ARGS__)  /* ULT GT2F */
+
+#define INTEL_KBL_ULX_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x591E, ## __VA_ARGS__)  /* ULX GT2 */
+
+#define INTEL_KBL_GT2_IDS(MACRO__, ...) \
+	INTEL_KBL_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_KBL_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x5912, ## __VA_ARGS__), /* DT  GT2 */ \
+	MACRO__(0x5917, ## __VA_ARGS__), /* Mobile GT2 */ \
+	MACRO__(0x591A, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x591B, ## __VA_ARGS__), /* Halo GT2 */ \
+	MACRO__(0x591D, ## __VA_ARGS__) /* WKS GT2 */
+
+#define INTEL_KBL_ULT_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x5926, ## __VA_ARGS__) /* ULT GT3 */
+
+#define INTEL_KBL_GT3_IDS(MACRO__, ...) \
+	INTEL_KBL_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x5923, ## __VA_ARGS__), /* ULT GT3 */ \
+	MACRO__(0x5927, ## __VA_ARGS__) /* ULT GT3 */
+
+#define INTEL_KBL_GT4_IDS(MACRO__, ...) \
+	MACRO__(0x593B, ## __VA_ARGS__) /* Halo GT4 */
 
 /* AML/KBL Y GT2 */
-#define INTEL_AML_KBL_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
-	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
+#define INTEL_AML_KBL_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x591C, ## __VA_ARGS__),  /* ULX GT2 */ \
+	MACRO__(0x87C0, ## __VA_ARGS__) /* ULX GT2 */
 
 /* AML/CFL Y GT2 */
-#define INTEL_AML_CFL_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x87CA, info)
+#define INTEL_AML_CFL_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x87CA, ## __VA_ARGS__)
 
 /* CML GT1 */
-#define INTEL_CML_GT1_IDS(info)	\
-	INTEL_VGA_DEVICE(0x9BA2, info), \
-	INTEL_VGA_DEVICE(0x9BA4, info), \
-	INTEL_VGA_DEVICE(0x9BA5, info), \
-	INTEL_VGA_DEVICE(0x9BA8, info)
+#define INTEL_CML_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x9BA2, ## __VA_ARGS__), \
+	MACRO__(0x9BA4, ## __VA_ARGS__), \
+	MACRO__(0x9BA5, ## __VA_ARGS__), \
+	MACRO__(0x9BA8, ## __VA_ARGS__)
 
-#define INTEL_CML_U_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x9B21, info), \
-	INTEL_VGA_DEVICE(0x9BAA, info), \
-	INTEL_VGA_DEVICE(0x9BAC, info)
+#define INTEL_CML_U_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x9B21, ## __VA_ARGS__), \
+	MACRO__(0x9BAA, ## __VA_ARGS__), \
+	MACRO__(0x9BAC, ## __VA_ARGS__)
 
 /* CML GT2 */
-#define INTEL_CML_GT2_IDS(info)	\
-	INTEL_VGA_DEVICE(0x9BC2, info), \
-	INTEL_VGA_DEVICE(0x9BC4, info), \
-	INTEL_VGA_DEVICE(0x9BC5, info), \
-	INTEL_VGA_DEVICE(0x9BC6, info), \
-	INTEL_VGA_DEVICE(0x9BC8, info), \
-	INTEL_VGA_DEVICE(0x9BE6, info), \
-	INTEL_VGA_DEVICE(0x9BF6, info)
-
-#define INTEL_CML_U_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x9B41, info), \
-	INTEL_VGA_DEVICE(0x9BCA, info), \
-	INTEL_VGA_DEVICE(0x9BCC, info)
-
-#define INTEL_CML_IDS(info) \
-	INTEL_CML_GT1_IDS(info), \
-	INTEL_CML_GT2_IDS(info), \
-	INTEL_CML_U_GT1_IDS(info), \
-	INTEL_CML_U_GT2_IDS(info)
-
-#define INTEL_KBL_IDS(info) \
-	INTEL_KBL_GT1_IDS(info), \
-	INTEL_KBL_GT2_IDS(info), \
-	INTEL_KBL_GT3_IDS(info), \
-	INTEL_KBL_GT4_IDS(info), \
-	INTEL_AML_KBL_GT2_IDS(info)
+#define INTEL_CML_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x9BC2, ## __VA_ARGS__), \
+	MACRO__(0x9BC4, ## __VA_ARGS__), \
+	MACRO__(0x9BC5, ## __VA_ARGS__), \
+	MACRO__(0x9BC6, ## __VA_ARGS__), \
+	MACRO__(0x9BC8, ## __VA_ARGS__), \
+	MACRO__(0x9BE6, ## __VA_ARGS__), \
+	MACRO__(0x9BF6, ## __VA_ARGS__)
+
+#define INTEL_CML_U_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x9B41, ## __VA_ARGS__), \
+	MACRO__(0x9BCA, ## __VA_ARGS__), \
+	MACRO__(0x9BCC, ## __VA_ARGS__)
+
+#define INTEL_CML_IDS(MACRO__, ...) \
+	INTEL_CML_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CML_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CML_U_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CML_U_GT2_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_KBL_IDS(MACRO__, ...) \
+	INTEL_KBL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_KBL_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_KBL_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_KBL_GT4_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_AML_KBL_GT2_IDS(MACRO__, ## __VA_ARGS__)
 
 /* CFL S */
-#define INTEL_CFL_S_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
-	INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
-	INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */
-
-#define INTEL_CFL_S_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
+#define INTEL_CFL_S_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x3E90, ## __VA_ARGS__), /* SRV GT1 */ \
+	MACRO__(0x3E93, ## __VA_ARGS__), /* SRV GT1 */ \
+	MACRO__(0x3E99, ## __VA_ARGS__)  /* SRV GT1 */
+
+#define INTEL_CFL_S_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x3E91, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x3E92, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x3E96, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x3E98, ## __VA_ARGS__), /* SRV GT2 */ \
+	MACRO__(0x3E9A, ## __VA_ARGS__)  /* SRV GT2 */
 
 /* CFL H */
-#define INTEL_CFL_H_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x3E9C, info)
+#define INTEL_CFL_H_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x3E9C, ## __VA_ARGS__)
 
-#define INTEL_CFL_H_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3E94, info),  /* Halo GT2 */ \
-	INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */
+#define INTEL_CFL_H_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x3E94, ## __VA_ARGS__),  /* Halo GT2 */ \
+	MACRO__(0x3E9B, ## __VA_ARGS__) /* Halo GT2 */
 
 /* CFL U GT2 */
-#define INTEL_CFL_U_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA9, info)
+#define INTEL_CFL_U_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x3EA9, ## __VA_ARGS__)
 
 /* CFL U GT3 */
-#define INTEL_CFL_U_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
-
-#define INTEL_CFL_IDS(info)	   \
-	INTEL_CFL_S_GT1_IDS(info), \
-	INTEL_CFL_S_GT2_IDS(info), \
-	INTEL_CFL_H_GT1_IDS(info), \
-	INTEL_CFL_H_GT2_IDS(info), \
-	INTEL_CFL_U_GT2_IDS(info), \
-	INTEL_CFL_U_GT3_IDS(info), \
-	INTEL_AML_CFL_GT2_IDS(info)
+#define INTEL_CFL_U_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x3EA5, ## __VA_ARGS__), /* ULT GT3 */ \
+	MACRO__(0x3EA6, ## __VA_ARGS__), /* ULT GT3 */ \
+	MACRO__(0x3EA7, ## __VA_ARGS__), /* ULT GT3 */ \
+	MACRO__(0x3EA8, ## __VA_ARGS__)  /* ULT GT3 */
+
+#define INTEL_CFL_IDS(MACRO__, ...) \
+	INTEL_CFL_S_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CFL_S_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CFL_H_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CFL_H_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CFL_U_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_CFL_U_GT3_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_AML_CFL_GT2_IDS(MACRO__, ## __VA_ARGS__)
 
 /* WHL/CFL U GT1 */
-#define INTEL_WHL_U_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA1, info), \
-	INTEL_VGA_DEVICE(0x3EA4, info)
+#define INTEL_WHL_U_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x3EA1, ## __VA_ARGS__), \
+	MACRO__(0x3EA4, ## __VA_ARGS__)
 
 /* WHL/CFL U GT2 */
-#define INTEL_WHL_U_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA0, info), \
-	INTEL_VGA_DEVICE(0x3EA3, info)
+#define INTEL_WHL_U_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x3EA0, ## __VA_ARGS__), \
+	MACRO__(0x3EA3, ## __VA_ARGS__)
 
 /* WHL/CFL U GT3 */
-#define INTEL_WHL_U_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA2, info)
+#define INTEL_WHL_U_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x3EA2, ## __VA_ARGS__)
 
-#define INTEL_WHL_IDS(info) \
-	INTEL_WHL_U_GT1_IDS(info), \
-	INTEL_WHL_U_GT2_IDS(info), \
-	INTEL_WHL_U_GT3_IDS(info)
+#define INTEL_WHL_IDS(MACRO__, ...) \
+	INTEL_WHL_U_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_WHL_U_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_WHL_U_GT3_IDS(MACRO__, ## __VA_ARGS__)
 
 /* CNL */
-#define INTEL_CNL_PORT_F_IDS(info) \
-	INTEL_VGA_DEVICE(0x5A44, info), \
-	INTEL_VGA_DEVICE(0x5A4C, info), \
-	INTEL_VGA_DEVICE(0x5A54, info), \
-	INTEL_VGA_DEVICE(0x5A5C, info)
-
-#define INTEL_CNL_IDS(info) \
-	INTEL_CNL_PORT_F_IDS(info), \
-	INTEL_VGA_DEVICE(0x5A40, info), \
-	INTEL_VGA_DEVICE(0x5A41, info), \
-	INTEL_VGA_DEVICE(0x5A42, info), \
-	INTEL_VGA_DEVICE(0x5A49, info), \
-	INTEL_VGA_DEVICE(0x5A4A, info), \
-	INTEL_VGA_DEVICE(0x5A50, info), \
-	INTEL_VGA_DEVICE(0x5A51, info), \
-	INTEL_VGA_DEVICE(0x5A52, info), \
-	INTEL_VGA_DEVICE(0x5A59, info), \
-	INTEL_VGA_DEVICE(0x5A5A, info)
+#define INTEL_CNL_PORT_F_IDS(MACRO__, ...) \
+	MACRO__(0x5A44, ## __VA_ARGS__), \
+	MACRO__(0x5A4C, ## __VA_ARGS__), \
+	MACRO__(0x5A54, ## __VA_ARGS__), \
+	MACRO__(0x5A5C, ## __VA_ARGS__)
+
+#define INTEL_CNL_IDS(MACRO__, ...) \
+	INTEL_CNL_PORT_F_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x5A40, ## __VA_ARGS__), \
+	MACRO__(0x5A41, ## __VA_ARGS__), \
+	MACRO__(0x5A42, ## __VA_ARGS__), \
+	MACRO__(0x5A49, ## __VA_ARGS__), \
+	MACRO__(0x5A4A, ## __VA_ARGS__), \
+	MACRO__(0x5A50, ## __VA_ARGS__), \
+	MACRO__(0x5A51, ## __VA_ARGS__), \
+	MACRO__(0x5A52, ## __VA_ARGS__), \
+	MACRO__(0x5A59, ## __VA_ARGS__), \
+	MACRO__(0x5A5A, ## __VA_ARGS__)
 
 /* ICL */
-#define INTEL_ICL_PORT_F_IDS(info) \
-	INTEL_VGA_DEVICE(0x8A50, info), \
-	INTEL_VGA_DEVICE(0x8A52, info), \
-	INTEL_VGA_DEVICE(0x8A53, info), \
-	INTEL_VGA_DEVICE(0x8A54, info), \
-	INTEL_VGA_DEVICE(0x8A56, info), \
-	INTEL_VGA_DEVICE(0x8A57, info), \
-	INTEL_VGA_DEVICE(0x8A58, info),	\
-	INTEL_VGA_DEVICE(0x8A59, info),	\
-	INTEL_VGA_DEVICE(0x8A5A, info), \
-	INTEL_VGA_DEVICE(0x8A5B, info), \
-	INTEL_VGA_DEVICE(0x8A5C, info), \
-	INTEL_VGA_DEVICE(0x8A70, info), \
-	INTEL_VGA_DEVICE(0x8A71, info)
-
-#define INTEL_ICL_IDS(info) \
-	INTEL_ICL_PORT_F_IDS(info), \
-	INTEL_VGA_DEVICE(0x8A51, info), \
-	INTEL_VGA_DEVICE(0x8A5D, info)
+#define INTEL_ICL_PORT_F_IDS(MACRO__, ...) \
+	MACRO__(0x8A50, ## __VA_ARGS__), \
+	MACRO__(0x8A52, ## __VA_ARGS__), \
+	MACRO__(0x8A53, ## __VA_ARGS__), \
+	MACRO__(0x8A54, ## __VA_ARGS__), \
+	MACRO__(0x8A56, ## __VA_ARGS__), \
+	MACRO__(0x8A57, ## __VA_ARGS__), \
+	MACRO__(0x8A58, ## __VA_ARGS__), \
+	MACRO__(0x8A59, ## __VA_ARGS__), \
+	MACRO__(0x8A5A, ## __VA_ARGS__), \
+	MACRO__(0x8A5B, ## __VA_ARGS__), \
+	MACRO__(0x8A5C, ## __VA_ARGS__), \
+	MACRO__(0x8A70, ## __VA_ARGS__), \
+	MACRO__(0x8A71, ## __VA_ARGS__)
+
+#define INTEL_ICL_IDS(MACRO__, ...) \
+	INTEL_ICL_PORT_F_IDS(MACRO__, ## __VA_ARGS__), \
+	MACRO__(0x8A51, ## __VA_ARGS__), \
+	MACRO__(0x8A5D, ## __VA_ARGS__)
 
 /* EHL */
-#define INTEL_EHL_IDS(info) \
-	INTEL_VGA_DEVICE(0x4541, info), \
-	INTEL_VGA_DEVICE(0x4551, info), \
-	INTEL_VGA_DEVICE(0x4555, info), \
-	INTEL_VGA_DEVICE(0x4557, info), \
-	INTEL_VGA_DEVICE(0x4570, info), \
-	INTEL_VGA_DEVICE(0x4571, info)
+#define INTEL_EHL_IDS(MACRO__, ...) \
+	MACRO__(0x4541, ## __VA_ARGS__), \
+	MACRO__(0x4551, ## __VA_ARGS__), \
+	MACRO__(0x4555, ## __VA_ARGS__), \
+	MACRO__(0x4557, ## __VA_ARGS__), \
+	MACRO__(0x4570, ## __VA_ARGS__), \
+	MACRO__(0x4571, ## __VA_ARGS__)
 
 /* JSL */
-#define INTEL_JSL_IDS(info) \
-	INTEL_VGA_DEVICE(0x4E51, info), \
-	INTEL_VGA_DEVICE(0x4E55, info), \
-	INTEL_VGA_DEVICE(0x4E57, info), \
-	INTEL_VGA_DEVICE(0x4E61, info), \
-	INTEL_VGA_DEVICE(0x4E71, info)
+#define INTEL_JSL_IDS(MACRO__, ...) \
+	MACRO__(0x4E51, ## __VA_ARGS__), \
+	MACRO__(0x4E55, ## __VA_ARGS__), \
+	MACRO__(0x4E57, ## __VA_ARGS__), \
+	MACRO__(0x4E61, ## __VA_ARGS__), \
+	MACRO__(0x4E71, ## __VA_ARGS__)
 
 /* TGL */
-#define INTEL_TGL_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x9A60, info), \
-	INTEL_VGA_DEVICE(0x9A68, info), \
-	INTEL_VGA_DEVICE(0x9A70, info)
-
-#define INTEL_TGL_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x9A40, info), \
-	INTEL_VGA_DEVICE(0x9A49, info), \
-	INTEL_VGA_DEVICE(0x9A59, info), \
-	INTEL_VGA_DEVICE(0x9A78, info), \
-	INTEL_VGA_DEVICE(0x9AC0, info), \
-	INTEL_VGA_DEVICE(0x9AC9, info), \
-	INTEL_VGA_DEVICE(0x9AD9, info), \
-	INTEL_VGA_DEVICE(0x9AF8, info)
-
-#define INTEL_TGL_IDS(info) \
-	INTEL_TGL_GT1_IDS(info), \
-	INTEL_TGL_GT2_IDS(info)
+#define INTEL_TGL_GT1_IDS(MACRO__, ...) \
+	MACRO__(0x9A60, ## __VA_ARGS__), \
+	MACRO__(0x9A68, ## __VA_ARGS__), \
+	MACRO__(0x9A70, ## __VA_ARGS__)
+
+#define INTEL_TGL_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x9A40, ## __VA_ARGS__), \
+	MACRO__(0x9A49, ## __VA_ARGS__), \
+	MACRO__(0x9A59, ## __VA_ARGS__), \
+	MACRO__(0x9A78, ## __VA_ARGS__), \
+	MACRO__(0x9AC0, ## __VA_ARGS__), \
+	MACRO__(0x9AC9, ## __VA_ARGS__), \
+	MACRO__(0x9AD9, ## __VA_ARGS__), \
+	MACRO__(0x9AF8, ## __VA_ARGS__)
+
+#define INTEL_TGL_IDS(MACRO__, ...) \
+	INTEL_TGL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_TGL_GT2_IDS(MACRO__, ## __VA_ARGS__)
 
 /* RKL */
-#define INTEL_RKL_IDS(info) \
-	INTEL_VGA_DEVICE(0x4C80, info), \
-	INTEL_VGA_DEVICE(0x4C8A, info), \
-	INTEL_VGA_DEVICE(0x4C8B, info), \
-	INTEL_VGA_DEVICE(0x4C8C, info), \
-	INTEL_VGA_DEVICE(0x4C90, info), \
-	INTEL_VGA_DEVICE(0x4C9A, info)
+#define INTEL_RKL_IDS(MACRO__, ...) \
+	MACRO__(0x4C80, ## __VA_ARGS__), \
+	MACRO__(0x4C8A, ## __VA_ARGS__), \
+	MACRO__(0x4C8B, ## __VA_ARGS__), \
+	MACRO__(0x4C8C, ## __VA_ARGS__), \
+	MACRO__(0x4C90, ## __VA_ARGS__), \
+	MACRO__(0x4C9A, ## __VA_ARGS__)
 
 /* DG1 */
-#define INTEL_DG1_IDS(info) \
-	INTEL_VGA_DEVICE(0x4905, info), \
-	INTEL_VGA_DEVICE(0x4906, info), \
-	INTEL_VGA_DEVICE(0x4907, info), \
-	INTEL_VGA_DEVICE(0x4908, info), \
-	INTEL_VGA_DEVICE(0x4909, info)
+#define INTEL_DG1_IDS(MACRO__, ...) \
+	MACRO__(0x4905, ## __VA_ARGS__), \
+	MACRO__(0x4906, ## __VA_ARGS__), \
+	MACRO__(0x4907, ## __VA_ARGS__), \
+	MACRO__(0x4908, ## __VA_ARGS__), \
+	MACRO__(0x4909, ## __VA_ARGS__)
 
 /* ADL-S */
-#define INTEL_ADLS_IDS(info) \
-	INTEL_VGA_DEVICE(0x4680, info), \
-	INTEL_VGA_DEVICE(0x4682, info), \
-	INTEL_VGA_DEVICE(0x4688, info), \
-	INTEL_VGA_DEVICE(0x468A, info), \
-	INTEL_VGA_DEVICE(0x468B, info), \
-	INTEL_VGA_DEVICE(0x4690, info), \
-	INTEL_VGA_DEVICE(0x4692, info), \
-	INTEL_VGA_DEVICE(0x4693, info)
+#define INTEL_ADLS_IDS(MACRO__, ...) \
+	MACRO__(0x4680, ## __VA_ARGS__), \
+	MACRO__(0x4682, ## __VA_ARGS__), \
+	MACRO__(0x4688, ## __VA_ARGS__), \
+	MACRO__(0x468A, ## __VA_ARGS__), \
+	MACRO__(0x468B, ## __VA_ARGS__), \
+	MACRO__(0x4690, ## __VA_ARGS__), \
+	MACRO__(0x4692, ## __VA_ARGS__), \
+	MACRO__(0x4693, ## __VA_ARGS__)
 
 /* ADL-P */
-#define INTEL_ADLP_IDS(info) \
-	INTEL_VGA_DEVICE(0x46A0, info), \
-	INTEL_VGA_DEVICE(0x46A1, info), \
-	INTEL_VGA_DEVICE(0x46A2, info), \
-	INTEL_VGA_DEVICE(0x46A3, info), \
-	INTEL_VGA_DEVICE(0x46A6, info), \
-	INTEL_VGA_DEVICE(0x46A8, info), \
-	INTEL_VGA_DEVICE(0x46AA, info), \
-	INTEL_VGA_DEVICE(0x462A, info), \
-	INTEL_VGA_DEVICE(0x4626, info), \
-	INTEL_VGA_DEVICE(0x4628, info), \
-	INTEL_VGA_DEVICE(0x46B0, info), \
-	INTEL_VGA_DEVICE(0x46B1, info), \
-	INTEL_VGA_DEVICE(0x46B2, info), \
-	INTEL_VGA_DEVICE(0x46B3, info), \
-	INTEL_VGA_DEVICE(0x46C0, info), \
-	INTEL_VGA_DEVICE(0x46C1, info), \
-	INTEL_VGA_DEVICE(0x46C2, info), \
-	INTEL_VGA_DEVICE(0x46C3, info)
+#define INTEL_ADLP_IDS(MACRO__, ...) \
+	MACRO__(0x46A0, ## __VA_ARGS__), \
+	MACRO__(0x46A1, ## __VA_ARGS__), \
+	MACRO__(0x46A2, ## __VA_ARGS__), \
+	MACRO__(0x46A3, ## __VA_ARGS__), \
+	MACRO__(0x46A6, ## __VA_ARGS__), \
+	MACRO__(0x46A8, ## __VA_ARGS__), \
+	MACRO__(0x46AA, ## __VA_ARGS__), \
+	MACRO__(0x462A, ## __VA_ARGS__), \
+	MACRO__(0x4626, ## __VA_ARGS__), \
+	MACRO__(0x4628, ## __VA_ARGS__), \
+	MACRO__(0x46B0, ## __VA_ARGS__), \
+	MACRO__(0x46B1, ## __VA_ARGS__), \
+	MACRO__(0x46B2, ## __VA_ARGS__), \
+	MACRO__(0x46B3, ## __VA_ARGS__), \
+	MACRO__(0x46C0, ## __VA_ARGS__), \
+	MACRO__(0x46C1, ## __VA_ARGS__), \
+	MACRO__(0x46C2, ## __VA_ARGS__), \
+	MACRO__(0x46C3, ## __VA_ARGS__)
 
 /* ADL-N */
-#define INTEL_ADLN_IDS(info) \
-	INTEL_VGA_DEVICE(0x46D0, info), \
-	INTEL_VGA_DEVICE(0x46D1, info), \
-	INTEL_VGA_DEVICE(0x46D2, info), \
-	INTEL_VGA_DEVICE(0x46D3, info), \
-	INTEL_VGA_DEVICE(0x46D4, info)
+#define INTEL_ADLN_IDS(MACRO__, ...) \
+	MACRO__(0x46D0, ## __VA_ARGS__), \
+	MACRO__(0x46D1, ## __VA_ARGS__), \
+	MACRO__(0x46D2, ## __VA_ARGS__), \
+	MACRO__(0x46D3, ## __VA_ARGS__), \
+	MACRO__(0x46D4, ## __VA_ARGS__)
 
 /* RPL-S */
-#define INTEL_RPLS_IDS(info) \
-	INTEL_VGA_DEVICE(0xA780, info), \
-	INTEL_VGA_DEVICE(0xA781, info), \
-	INTEL_VGA_DEVICE(0xA782, info), \
-	INTEL_VGA_DEVICE(0xA783, info), \
-	INTEL_VGA_DEVICE(0xA788, info), \
-	INTEL_VGA_DEVICE(0xA789, info), \
-	INTEL_VGA_DEVICE(0xA78A, info), \
-	INTEL_VGA_DEVICE(0xA78B, info)
+#define INTEL_RPLS_IDS(MACRO__, ...) \
+	MACRO__(0xA780, ## __VA_ARGS__), \
+	MACRO__(0xA781, ## __VA_ARGS__), \
+	MACRO__(0xA782, ## __VA_ARGS__), \
+	MACRO__(0xA783, ## __VA_ARGS__), \
+	MACRO__(0xA788, ## __VA_ARGS__), \
+	MACRO__(0xA789, ## __VA_ARGS__), \
+	MACRO__(0xA78A, ## __VA_ARGS__), \
+	MACRO__(0xA78B, ## __VA_ARGS__)
 
 /* RPL-U */
-#define INTEL_RPLU_IDS(info) \
-	INTEL_VGA_DEVICE(0xA721, info), \
-	INTEL_VGA_DEVICE(0xA7A1, info), \
-	INTEL_VGA_DEVICE(0xA7A9, info), \
-	INTEL_VGA_DEVICE(0xA7AC, info), \
-	INTEL_VGA_DEVICE(0xA7AD, info)
+#define INTEL_RPLU_IDS(MACRO__, ...) \
+	MACRO__(0xA721, ## __VA_ARGS__), \
+	MACRO__(0xA7A1, ## __VA_ARGS__), \
+	MACRO__(0xA7A9, ## __VA_ARGS__), \
+	MACRO__(0xA7AC, ## __VA_ARGS__), \
+	MACRO__(0xA7AD, ## __VA_ARGS__)
 
 /* RPL-P */
-#define INTEL_RPLP_IDS(info) \
-	INTEL_VGA_DEVICE(0xA720, info), \
-	INTEL_VGA_DEVICE(0xA7A0, info), \
-	INTEL_VGA_DEVICE(0xA7A8, info), \
-	INTEL_VGA_DEVICE(0xA7AA, info), \
-	INTEL_VGA_DEVICE(0xA7AB, info)
+#define INTEL_RPLP_IDS(MACRO__, ...) \
+	MACRO__(0xA720, ## __VA_ARGS__), \
+	MACRO__(0xA7A0, ## __VA_ARGS__), \
+	MACRO__(0xA7A8, ## __VA_ARGS__), \
+	MACRO__(0xA7AA, ## __VA_ARGS__), \
+	MACRO__(0xA7AB, ## __VA_ARGS__)
 
 /* DG2 */
-#define INTEL_DG2_G10_IDS(info) \
-	INTEL_VGA_DEVICE(0x5690, info), \
-	INTEL_VGA_DEVICE(0x5691, info), \
-	INTEL_VGA_DEVICE(0x5692, info), \
-	INTEL_VGA_DEVICE(0x56A0, info), \
-	INTEL_VGA_DEVICE(0x56A1, info), \
-	INTEL_VGA_DEVICE(0x56A2, info), \
-	INTEL_VGA_DEVICE(0x56BE, info), \
-	INTEL_VGA_DEVICE(0x56BF, info)
-
-#define INTEL_DG2_G11_IDS(info) \
-	INTEL_VGA_DEVICE(0x5693, info), \
-	INTEL_VGA_DEVICE(0x5694, info), \
-	INTEL_VGA_DEVICE(0x5695, info), \
-	INTEL_VGA_DEVICE(0x56A5, info), \
-	INTEL_VGA_DEVICE(0x56A6, info), \
-	INTEL_VGA_DEVICE(0x56B0, info), \
-	INTEL_VGA_DEVICE(0x56B1, info), \
-	INTEL_VGA_DEVICE(0x56BA, info), \
-	INTEL_VGA_DEVICE(0x56BB, info), \
-	INTEL_VGA_DEVICE(0x56BC, info), \
-	INTEL_VGA_DEVICE(0x56BD, info)
-
-#define INTEL_DG2_G12_IDS(info) \
-	INTEL_VGA_DEVICE(0x5696, info), \
-	INTEL_VGA_DEVICE(0x5697, info), \
-	INTEL_VGA_DEVICE(0x56A3, info), \
-	INTEL_VGA_DEVICE(0x56A4, info), \
-	INTEL_VGA_DEVICE(0x56B2, info), \
-	INTEL_VGA_DEVICE(0x56B3, info)
-
-#define INTEL_DG2_IDS(info) \
-	INTEL_DG2_G10_IDS(info), \
-	INTEL_DG2_G11_IDS(info), \
-	INTEL_DG2_G12_IDS(info)
-
-#define INTEL_ATS_M150_IDS(info) \
-	INTEL_VGA_DEVICE(0x56C0, info), \
-	INTEL_VGA_DEVICE(0x56C2, info)
-
-#define INTEL_ATS_M75_IDS(info) \
-	INTEL_VGA_DEVICE(0x56C1, info)
-
-#define INTEL_ATS_M_IDS(info) \
-	INTEL_ATS_M150_IDS(info), \
-	INTEL_ATS_M75_IDS(info)
+#define INTEL_DG2_G10_IDS(MACRO__, ...) \
+	MACRO__(0x5690, ## __VA_ARGS__), \
+	MACRO__(0x5691, ## __VA_ARGS__), \
+	MACRO__(0x5692, ## __VA_ARGS__), \
+	MACRO__(0x56A0, ## __VA_ARGS__), \
+	MACRO__(0x56A1, ## __VA_ARGS__), \
+	MACRO__(0x56A2, ## __VA_ARGS__), \
+	MACRO__(0x56BE, ## __VA_ARGS__), \
+	MACRO__(0x56BF, ## __VA_ARGS__)
+
+#define INTEL_DG2_G11_IDS(MACRO__, ...) \
+	MACRO__(0x5693, ## __VA_ARGS__), \
+	MACRO__(0x5694, ## __VA_ARGS__), \
+	MACRO__(0x5695, ## __VA_ARGS__), \
+	MACRO__(0x56A5, ## __VA_ARGS__), \
+	MACRO__(0x56A6, ## __VA_ARGS__), \
+	MACRO__(0x56B0, ## __VA_ARGS__), \
+	MACRO__(0x56B1, ## __VA_ARGS__), \
+	MACRO__(0x56BA, ## __VA_ARGS__), \
+	MACRO__(0x56BB, ## __VA_ARGS__), \
+	MACRO__(0x56BC, ## __VA_ARGS__), \
+	MACRO__(0x56BD, ## __VA_ARGS__)
+
+#define INTEL_DG2_G12_IDS(MACRO__, ...) \
+	MACRO__(0x5696, ## __VA_ARGS__), \
+	MACRO__(0x5697, ## __VA_ARGS__), \
+	MACRO__(0x56A3, ## __VA_ARGS__), \
+	MACRO__(0x56A4, ## __VA_ARGS__), \
+	MACRO__(0x56B2, ## __VA_ARGS__), \
+	MACRO__(0x56B3, ## __VA_ARGS__)
+
+#define INTEL_DG2_IDS(MACRO__, ...) \
+	INTEL_DG2_G10_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_DG2_G11_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_DG2_G12_IDS(MACRO__, ## __VA_ARGS__)
+
+#define INTEL_ATS_M150_IDS(MACRO__, ...) \
+	MACRO__(0x56C0, ## __VA_ARGS__), \
+	MACRO__(0x56C2, ## __VA_ARGS__)
+
+#define INTEL_ATS_M75_IDS(MACRO__, ...) \
+	MACRO__(0x56C1, ## __VA_ARGS__)
+
+#define INTEL_ATS_M_IDS(MACRO__, ...) \
+	INTEL_ATS_M150_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
 
 /* MTL */
-#define INTEL_MTL_IDS(info) \
-	INTEL_VGA_DEVICE(0x7D40, info), \
-	INTEL_VGA_DEVICE(0x7D41, info), \
-	INTEL_VGA_DEVICE(0x7D45, info), \
-	INTEL_VGA_DEVICE(0x7D51, info), \
-	INTEL_VGA_DEVICE(0x7D55, info), \
-	INTEL_VGA_DEVICE(0x7D60, info), \
-	INTEL_VGA_DEVICE(0x7D67, info), \
-	INTEL_VGA_DEVICE(0x7DD1, info), \
-	INTEL_VGA_DEVICE(0x7DD5, info)
+#define INTEL_MTL_IDS(MACRO__, ...) \
+	MACRO__(0x7D40, ## __VA_ARGS__), \
+	MACRO__(0x7D41, ## __VA_ARGS__), \
+	MACRO__(0x7D45, ## __VA_ARGS__), \
+	MACRO__(0x7D51, ## __VA_ARGS__), \
+	MACRO__(0x7D55, ## __VA_ARGS__), \
+	MACRO__(0x7D60, ## __VA_ARGS__), \
+	MACRO__(0x7D67, ## __VA_ARGS__), \
+	MACRO__(0x7DD1, ## __VA_ARGS__), \
+	MACRO__(0x7DD5, ## __VA_ARGS__)
 
 #endif /* _I915_PCIIDS_H */
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 4d05307ce3d7..30aca2abd7be 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -516,106 +516,106 @@ static const struct intel_device_info intel_lunarlake_info = {
 };
 
 static const struct pci_id_match intel_device_match[] = {
-	INTEL_I810_IDS(&intel_i810_info),
-	INTEL_I815_IDS(&intel_i815_info),
+	INTEL_I810_IDS(INTEL_VGA_DEVICE, &intel_i810_info),
+	INTEL_I815_IDS(INTEL_VGA_DEVICE, &intel_i815_info),
 
-	INTEL_I830_IDS(&intel_i830_info),
-	INTEL_I845G_IDS(&intel_i845_info),
-	INTEL_I85X_IDS(&intel_i855_info),
-	INTEL_I865G_IDS(&intel_i865_info),
+	INTEL_I830_IDS(INTEL_VGA_DEVICE, &intel_i830_info),
+	INTEL_I845G_IDS(INTEL_VGA_DEVICE, &intel_i845_info),
+	INTEL_I85X_IDS(INTEL_VGA_DEVICE, &intel_i855_info),
+	INTEL_I865G_IDS(INTEL_VGA_DEVICE, &intel_i865_info),
 
-	INTEL_I915G_IDS(&intel_i915_info),
-	INTEL_I915GM_IDS(&intel_i915m_info),
-	INTEL_I945G_IDS(&intel_i945_info),
-	INTEL_I945GM_IDS(&intel_i945m_info),
+	INTEL_I915G_IDS(INTEL_VGA_DEVICE, &intel_i915_info),
+	INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &intel_i915m_info),
+	INTEL_I945G_IDS(INTEL_VGA_DEVICE, &intel_i945_info),
+	INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &intel_i945m_info),
 
-	INTEL_G33_IDS(&intel_g33_info),
-	INTEL_PNV_G_IDS(&intel_pineview_g_info),
-	INTEL_PNV_M_IDS(&intel_pineview_m_info),
+	INTEL_G33_IDS(INTEL_VGA_DEVICE, &intel_g33_info),
+	INTEL_PNV_G_IDS(INTEL_VGA_DEVICE, &intel_pineview_g_info),
+	INTEL_PNV_M_IDS(INTEL_VGA_DEVICE, &intel_pineview_m_info),
 
-	INTEL_I965G_IDS(&intel_i965_info),
-	INTEL_I965GM_IDS(&intel_i965m_info),
+	INTEL_I965G_IDS(INTEL_VGA_DEVICE, &intel_i965_info),
+	INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &intel_i965m_info),
 
-	INTEL_G45_IDS(&intel_g45_info),
-	INTEL_GM45_IDS(&intel_gm45_info),
+	INTEL_G45_IDS(INTEL_VGA_DEVICE, &intel_g45_info),
+	INTEL_GM45_IDS(INTEL_VGA_DEVICE, &intel_gm45_info),
 
-	INTEL_ILK_D_IDS(&intel_ironlake_info),
-	INTEL_ILK_M_IDS(&intel_ironlake_m_info),
+	INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &intel_ironlake_info),
+	INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &intel_ironlake_m_info),
 
-	INTEL_SNB_D_IDS(&intel_sandybridge_info),
-	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),
+	INTEL_SNB_D_IDS(INTEL_VGA_DEVICE, &intel_sandybridge_info),
+	INTEL_SNB_M_IDS(INTEL_VGA_DEVICE, &intel_sandybridge_m_info),
 
-	INTEL_IVB_D_IDS(&intel_ivybridge_info),
-	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),
+	INTEL_IVB_D_IDS(INTEL_VGA_DEVICE, &intel_ivybridge_info),
+	INTEL_IVB_M_IDS(INTEL_VGA_DEVICE, &intel_ivybridge_m_info),
 
-	INTEL_HSW_GT1_IDS(&intel_haswell_gt1_info),
-	INTEL_HSW_GT2_IDS(&intel_haswell_gt2_info),
-	INTEL_HSW_GT3_IDS(&intel_haswell_gt3_info),
+	INTEL_HSW_GT1_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt1_info),
+	INTEL_HSW_GT2_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt2_info),
+	INTEL_HSW_GT3_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt3_info),
 
-	INTEL_VLV_IDS(&intel_valleyview_info),
+	INTEL_VLV_IDS(INTEL_VGA_DEVICE, &intel_valleyview_info),
 
-	INTEL_BDW_GT1_IDS(&intel_broadwell_gt1_info),
-	INTEL_BDW_GT2_IDS(&intel_broadwell_gt2_info),
-	INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
-	INTEL_BDW_RSVD_IDS(&intel_broadwell_unknown_info),
+	INTEL_BDW_GT1_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt1_info),
+	INTEL_BDW_GT2_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt2_info),
+	INTEL_BDW_GT3_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt3_info),
+	INTEL_BDW_RSVD_IDS(INTEL_VGA_DEVICE, &intel_broadwell_unknown_info),
 
-	INTEL_CHV_IDS(&intel_cherryview_info),
+	INTEL_CHV_IDS(INTEL_VGA_DEVICE, &intel_cherryview_info),
 
-	INTEL_SKL_GT1_IDS(&intel_skylake_gt1_info),
-	INTEL_SKL_GT2_IDS(&intel_skylake_gt2_info),
-	INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info),
-	INTEL_SKL_GT4_IDS(&intel_skylake_gt4_info),
+	INTEL_SKL_GT1_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt1_info),
+	INTEL_SKL_GT2_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt2_info),
+	INTEL_SKL_GT3_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt3_info),
+	INTEL_SKL_GT4_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt4_info),
 
-	INTEL_BXT_IDS(&intel_broxton_info),
+	INTEL_BXT_IDS(INTEL_VGA_DEVICE, &intel_broxton_info),
 
-	INTEL_KBL_GT1_IDS(&intel_kabylake_gt1_info),
-	INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
-	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
-	INTEL_KBL_GT4_IDS(&intel_kabylake_gt4_info),
-	INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
+	INTEL_KBL_GT1_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt1_info),
+	INTEL_KBL_GT2_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt2_info),
+	INTEL_KBL_GT3_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt3_info),
+	INTEL_KBL_GT4_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt4_info),
+	INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt2_info),
 
-	INTEL_GLK_IDS(&intel_geminilake_info),
+	INTEL_GLK_IDS(INTEL_VGA_DEVICE, &intel_geminilake_info),
 
-	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
-	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_CFL_H_GT1_IDS(&intel_coffeelake_gt1_info),
-	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
-	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
-	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
-	INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
+	INTEL_CFL_S_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
+	INTEL_CFL_S_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
+	INTEL_CFL_H_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
+	INTEL_CFL_H_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
+	INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
+	INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt3_info),
+	INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
+	INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
+	INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt3_info),
+	INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
 
-	INTEL_CML_GT1_IDS(&intel_cometlake_gt1_info),
-	INTEL_CML_GT2_IDS(&intel_cometlake_gt2_info),
-	INTEL_CML_U_GT1_IDS(&intel_cometlake_gt1_info),
-	INTEL_CML_U_GT2_IDS(&intel_cometlake_gt2_info),
+	INTEL_CML_GT1_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt1_info),
+	INTEL_CML_GT2_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt2_info),
+	INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt1_info),
+	INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt2_info),
 
-	INTEL_CNL_IDS(&intel_cannonlake_info),
+	INTEL_CNL_IDS(INTEL_VGA_DEVICE, &intel_cannonlake_info),
 
-	INTEL_ICL_IDS(&intel_icelake_info),
+	INTEL_ICL_IDS(INTEL_VGA_DEVICE, &intel_icelake_info),
 
-	INTEL_EHL_IDS(&intel_elkhartlake_info),
-	INTEL_JSL_IDS(&intel_jasperlake_info),
+	INTEL_EHL_IDS(INTEL_VGA_DEVICE, &intel_elkhartlake_info),
+	INTEL_JSL_IDS(INTEL_VGA_DEVICE, &intel_jasperlake_info),
 
-	INTEL_TGL_GT1_IDS(&intel_tigerlake_gt1_info),
-	INTEL_TGL_GT2_IDS(&intel_tigerlake_gt2_info),
-	INTEL_RKL_IDS(&intel_rocketlake_info),
+	INTEL_TGL_GT1_IDS(INTEL_VGA_DEVICE, &intel_tigerlake_gt1_info),
+	INTEL_TGL_GT2_IDS(INTEL_VGA_DEVICE, &intel_tigerlake_gt2_info),
+	INTEL_RKL_IDS(INTEL_VGA_DEVICE, &intel_rocketlake_info),
 
-	INTEL_DG1_IDS(&intel_dg1_info),
-	INTEL_DG2_IDS(&intel_dg2_info),
+	INTEL_DG1_IDS(INTEL_VGA_DEVICE, &intel_dg1_info),
+	INTEL_DG2_IDS(INTEL_VGA_DEVICE, &intel_dg2_info),
 
-	INTEL_ADLS_IDS(&intel_alderlake_s_info),
-	INTEL_RPLS_IDS(&intel_raptorlake_s_info),
-	INTEL_ADLP_IDS(&intel_alderlake_p_info),
-	INTEL_RPLU_IDS(&intel_alderlake_p_info),
-	INTEL_RPLP_IDS(&intel_alderlake_p_info),
-	INTEL_ADLN_IDS(&intel_alderlake_n_info),
+	INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &intel_alderlake_s_info),
+	INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &intel_raptorlake_s_info),
+	INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
+	INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
+	INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
+	INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &intel_alderlake_n_info),
 
-	INTEL_ATS_M_IDS(&intel_ats_m_info),
+	INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &intel_ats_m_info),
 
-	INTEL_MTL_IDS(&intel_meteorlake_info),
+	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
 
 	INTEL_PVC_IDS(&intel_pontevecchio_info),
 
-- 
2.39.2

[PATCH i-g-t 10/10] lib: switch i915_pciids_local.h to xe driver style PCI ID macros

[Jani Nikula]

Follow-up the kernel i915_pciids.h switching to xe driver style PCI ID
macros, and do the same for i915_pciids_local.h. This is a clear
improvement in the perf code, for example.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 lib/i915/perf.c         | 12 +++--------
 lib/i915_pciids_local.h | 44 ++++++++++++++++++++---------------------
 lib/intel_device_info.c |  2 +-
 3 files changed, 26 insertions(+), 32 deletions(-)

diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index 4b00ba5de9d4..ee950b3c03e4 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -204,13 +204,10 @@ is_acm_gt3(const struct intel_perf_devinfo *devinfo)
 static bool
 is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
 {
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(_id, _info) _id
 	static const uint32_t devids[] = {
-		INTEL_MTL_M_IDS(NULL),
-		INTEL_MTL_P_GT2_IDS(NULL),
+		INTEL_MTL_M_IDS(ID),
+		INTEL_MTL_P_GT2_IDS(ID),
 	};
-#undef INTEL_VGA_DEVICE
 	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
 		if (devids[i] == devinfo->devid)
 			return true;
@@ -222,12 +219,9 @@ is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
 static bool
 is_mtl_gt3(const struct intel_perf_devinfo *devinfo)
 {
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(_id, _info) _id
 	static const uint32_t devids[] = {
-		INTEL_MTL_P_GT3_IDS(NULL),
+		INTEL_MTL_P_GT3_IDS(ID),
 	};
-#undef INTEL_VGA_DEVICE
 	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
 		if (devids[i] == devinfo->devid)
 			return true;
diff --git a/lib/i915_pciids_local.h b/lib/i915_pciids_local.h
index 0043b0cd9b34..92879704aa8e 100644
--- a/lib/i915_pciids_local.h
+++ b/lib/i915_pciids_local.h
@@ -9,41 +9,41 @@
 
 /* MTL perf */
 #ifndef INTEL_MTL_M_IDS
-#define INTEL_MTL_M_IDS(info) \
-	INTEL_VGA_DEVICE(0x7D60, info), \
-	INTEL_VGA_DEVICE(0x7D67, info)
+#define INTEL_MTL_M_IDS(MACRO__, ...) \
+	MACRO__(0x7D60, ## __VA_ARGS__), \
+	MACRO__(0x7D67, ## __VA_ARGS__)
 #endif
 
 #ifndef INTEL_MTL_P_GT2_IDS
-#define INTEL_MTL_P_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x7D45, info)
+#define INTEL_MTL_P_GT2_IDS(MACRO__, ...) \
+	MACRO__(0x7D45, ## __VA_ARGS__)
 #endif
 
 #ifndef INTEL_MTL_P_GT3_IDS
-#define INTEL_MTL_P_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x7D55, info), \
-	INTEL_VGA_DEVICE(0x7DD5, info)
+#define INTEL_MTL_P_GT3_IDS(MACRO__, ...) \
+	MACRO__(0x7D55, ## __VA_ARGS__), \
+	MACRO__(0x7DD5, ## __VA_ARGS__)
 #endif
 
 #ifndef INTEL_MTL_P_IDS
-#define INTEL_MTL_P_IDS(info) \
-	INTEL_MTL_P_GT2_IDS(info), \
-	INTEL_MTL_P_GT3_IDS(info)
+#define INTEL_MTL_P_IDS(MACRO__, ...) \
+	INTEL_MTL_P_GT2_IDS(MACRO__, ## __VA_ARGS__), \
+	INTEL_MTL_P_GT3_IDS(MACRO__, ## __VA_ARGS__)
 #endif
 
 /* PVC */
 #ifndef INTEL_PVC_IDS
-#define INTEL_PVC_IDS(info) \
-	INTEL_VGA_DEVICE(0x0BD0, info), \
-	INTEL_VGA_DEVICE(0x0BD1, info), \
-	INTEL_VGA_DEVICE(0x0BD2, info), \
-	INTEL_VGA_DEVICE(0x0BD5, info), \
-	INTEL_VGA_DEVICE(0x0BD6, info), \
-	INTEL_VGA_DEVICE(0x0BD7, info), \
-	INTEL_VGA_DEVICE(0x0BD8, info), \
-	INTEL_VGA_DEVICE(0x0BD9, info), \
-	INTEL_VGA_DEVICE(0x0BDA, info), \
-	INTEL_VGA_DEVICE(0x0BDB, info)
+#define INTEL_PVC_IDS(MACRO__, ...) \
+	MACRO__(0x0BD0, ## __VA_ARGS__), \
+	MACRO__(0x0BD1, ## __VA_ARGS__), \
+	MACRO__(0x0BD2, ## __VA_ARGS__), \
+	MACRO__(0x0BD5, ## __VA_ARGS__), \
+	MACRO__(0x0BD6, ## __VA_ARGS__), \
+	MACRO__(0x0BD7, ## __VA_ARGS__), \
+	MACRO__(0x0BD8, ## __VA_ARGS__), \
+	MACRO__(0x0BD9, ## __VA_ARGS__), \
+	MACRO__(0x0BDA, ## __VA_ARGS__), \
+	MACRO__(0x0BDB, ## __VA_ARGS__)
 #endif
 
 #endif /* _I915_PCIIDS_LOCAL_H */
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 30aca2abd7be..e80ea54707de 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -617,7 +617,7 @@ static const struct pci_id_match intel_device_match[] = {
 
 	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
 
-	INTEL_PVC_IDS(&intel_pontevecchio_info),
+	INTEL_PVC_IDS(INTEL_VGA_DEVICE, &intel_pontevecchio_info),
 
 	XE_LNL_IDS(INTEL_VGA_DEVICE, &intel_lunarlake_info),
 
-- 
2.39.2

✓ Fi.CI.BAT: success for lib: sync i915_pciids.h and _local.h with kernel

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10465 bytes --]

== Series Details ==

Series: lib: sync i915_pciids.h and _local.h with kernel
URL   : https://patchwork.freedesktop.org/series/133915/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14801 -> IGTPW_11177
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html

Participating hosts (43 -> 41)
------------------------------

  Additional (1): bat-mtlp-6 
  Missing    (3): fi-bsw-n3050 fi-snb-2520m bat-arls-3 

Known issues
------------

  Here are the changes found in IGTPW_11177 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-mtlp-6:         NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@debugfs_test@basic-hwmon.html

  * igt@fbdev@info:
    - bat-mtlp-6:         NOTRUN -> [SKIP][2] ([i915#1849] / [i915#2582])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@fbdev@info.html

  * igt@fbdev@write:
    - bat-mtlp-6:         NOTRUN -> [SKIP][3] ([i915#2582]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@fbdev@write.html

  * igt@gem_lmem_swapping@verify-random:
    - bat-mtlp-6:         NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_mmap@basic:
    - bat-mtlp-6:         NOTRUN -> [SKIP][5] ([i915#4083])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@gem_mmap@basic.html

  * igt@gem_tiled_blits@basic:
    - bat-mtlp-6:         NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@gem_tiled_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-mtlp-6:         NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-mtlp-6:         NOTRUN -> [SKIP][8] ([i915#6621])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@i915_pm_rps@basic-api.html

  * igt@kms_addfb_basic@addfb25-x-tiled-legacy:
    - bat-mtlp-6:         NOTRUN -> [SKIP][9] ([i915#4212] / [i915#9792]) +8 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-mtlp-6:         NOTRUN -> [SKIP][10] ([i915#5190] / [i915#9792])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-mtlp-6:         NOTRUN -> [SKIP][11] ([i915#9792]) +17 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - bat-mtlp-6:         NOTRUN -> [SKIP][12] ([i915#3637] / [i915#9792]) +3 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-mtlp-6:         NOTRUN -> [SKIP][13] ([i915#5274] / [i915#9792])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-mtlp-6:         NOTRUN -> [SKIP][14] ([i915#4342] / [i915#5354] / [i915#9792])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-mtlp-6:         NOTRUN -> [SKIP][15] ([i915#5354] / [i915#9792])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-mtlp-6:         NOTRUN -> [SKIP][16] ([i915#1072] / [i915#9673] / [i915#9732] / [i915#9792]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_psr@psr-cursor-plane-move.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-mtlp-6:         NOTRUN -> [SKIP][17] ([i915#3555] / [i915#8809] / [i915#9792])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-mtlp-6:         NOTRUN -> [SKIP][18] ([i915#3708] / [i915#9792])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
    - bat-mtlp-6:         NOTRUN -> [SKIP][19] ([i915#3708] / [i915#4077]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-read:
    - bat-mtlp-6:         NOTRUN -> [SKIP][20] ([i915#3708]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@basic-write:
    - bat-mtlp-6:         NOTRUN -> [SKIP][21] ([i915#10216] / [i915#3708])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-6/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@active:
    - fi-bsw-nick:        [DMESG-FAIL][22] ([i915#11170]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/fi-bsw-nick/igt@i915_selftest@live@active.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/fi-bsw-nick/igt@i915_selftest@live@active.html

  * igt@kms_busy@basic@flip:
    - {bat-mtlp-9}:       [DMESG-WARN][24] ([i915#10435] / [i915#9157]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/bat-mtlp-9/igt@kms_busy@basic@flip.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-9/igt@kms_busy@basic@flip.html

  * igt@kms_flip@basic-flip-vs-dpms@a-dp6:
    - {bat-mtlp-9}:       [DMESG-FAIL][26] ([i915#11009]) -> [PASS][27] +1 other test pass
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@a-dp6.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@a-dp6.html

  * igt@kms_flip@basic-flip-vs-dpms@b-dp7:
    - {bat-mtlp-9}:       [FAIL][28] ([i915#6121]) -> [PASS][29] +6 other tests pass
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@b-dp7.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@b-dp7.html

  * igt@kms_pipe_crc_basic@hang-read-crc@pipe-c-dp-6:
    - {bat-mtlp-9}:       [FAIL][30] ([i915#10979]) -> [PASS][31] +2 other tests pass
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/bat-mtlp-9/igt@kms_pipe_crc_basic@hang-read-crc@pipe-c-dp-6.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/bat-mtlp-9/igt@kms_pipe_crc_basic@hang-read-crc@pipe-c-dp-6.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
  [i915#10262]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10262
  [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
  [i915#10435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10435
  [i915#10580]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10580
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10979
  [i915#11009]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11009
  [i915#11060]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11060
  [i915#11170]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11170
  [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
  [i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4342
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#6121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6121
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
  [i915#9157]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9157
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9792]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9792


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7867 -> IGTPW_11177

  CI-20190529: 20190529
  CI_DRM_14801: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html

[-- Attachment #2: Type: text/html, Size: 12515 bytes --]

✓ CI.xeBAT: success for lib: sync i915_pciids.h and _local.h with kernel

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4549 bytes --]

== Series Details ==

Series: lib: sync i915_pciids.h and _local.h with kernel
URL   : https://patchwork.freedesktop.org/series/133915/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_7867_BAT -> XEIGTPW_11177_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (5 -> 4)
------------------------------

  Missing    (1): bat-pvc-2 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_11177_BAT:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@xe_exec_threads@threads-basic:
    - {bat-lnl-1}:        [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/bat-lnl-1/igt@xe_exec_threads@threads-basic.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-lnl-1/igt@xe_exec_threads@threads-basic.html

  
Known issues
------------

  Here are the changes found in XEIGTPW_11177_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_exec_fault_mode@twice-userptr-invalidate-imm:
    - bat-atsm-2:         NOTRUN -> [SKIP][3] ([Intel XE#288]) +32 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html

  * igt@xe_exec_threads@threads-mixed-fd-basic:
    - bat-adlp-7:         [PASS][4] -> [ABORT][5] ([Intel XE#1908])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/bat-adlp-7/igt@xe_exec_threads@threads-mixed-fd-basic.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-adlp-7/igt@xe_exec_threads@threads-mixed-fd-basic.html

  * igt@xe_huc_copy@huc_copy:
    - bat-atsm-2:         NOTRUN -> [SKIP][6] ([Intel XE#255])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-atsm-2/igt@xe_huc_copy@huc_copy.html

  * igt@xe_pat@pat-index-xe2:
    - bat-atsm-2:         NOTRUN -> [SKIP][7] ([Intel XE#977])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-atsm-2/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-atsm-2:         NOTRUN -> [SKIP][8] ([Intel XE#979]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-atsm-2/igt@xe_pat@pat-index-xehpc.html

  
#### Possible fixes ####

  * igt@xe_exec_compute_mode@twice-bindexecqueue-userptr:
    - bat-atsm-2:         [DMESG-WARN][9] ([Intel XE#1908]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr.html

  * igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-invalidate:
    - {bat-lnl-1}:        [FAIL][11] ([Intel XE#1069]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/bat-lnl-1/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-invalidate.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/bat-lnl-1/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-invalidate.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1069
  [Intel XE#1908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1908
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979


Build changes
-------------

  * IGT: IGT_7867 -> IGTPW_11177
  * Linux: xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd -> xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf

  IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd: b134db8544f8d5b8a960b368afe12820c3cbe8cd
  xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/index.html

[-- Attachment #2: Type: text/html, Size: 5401 bytes --]

Re: [PATCH i-g-t 01/10] lib: sync i915_pciids.h with kernel commit 432ed92bfb55

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:14PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> 432ed92bfb55 ("drm/i915/pciids: add INTEL_PNV_IDS(), use acronym")
> 
> and update the references in intel_device_info.c.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h       | 8 ++++++--
>  lib/intel_device_info.c | 4 ++--
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 85ce33ad6e26..21942a3c823b 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -108,12 +108,16 @@
>  	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
>  	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
>  
> -#define INTEL_PINEVIEW_G_IDS(info) \
> +#define INTEL_PNV_G_IDS(info) \
>  	INTEL_VGA_DEVICE(0xa001, info)
>  
> -#define INTEL_PINEVIEW_M_IDS(info) \
> +#define INTEL_PNV_M_IDS(info) \
>  	INTEL_VGA_DEVICE(0xa011, info)
>  
> +#define INTEL_PNV_IDS(info) \
> +	INTEL_PNV_G_IDS(info), \
> +	INTEL_PNV_M_IDS(info)
> +
>  #define INTEL_IRONLAKE_D_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0042, info)
>  
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 64b5246b7783..88b160ae2d69 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -530,8 +530,8 @@ static const struct pci_id_match intel_device_match[] = {
>  	INTEL_I945GM_IDS(&intel_i945m_info),
>  
>  	INTEL_G33_IDS(&intel_g33_info),
> -	INTEL_PINEVIEW_G_IDS(&intel_pineview_g_info),
> -	INTEL_PINEVIEW_M_IDS(&intel_pineview_m_info),
> +	INTEL_PNV_G_IDS(&intel_pineview_g_info),
> +	INTEL_PNV_M_IDS(&intel_pineview_m_info),

when I saw this series my first thought was it would be good
to squash them all with a single shot, but when I got here
I understood why... it is not just the header...

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>  
>  	INTEL_I965G_IDS(&intel_i965_info),
>  	INTEL_I965GM_IDS(&intel_i965m_info),
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 02/10] lib: sync i915_pciids.h with kernel commit 41c0f8a36f15

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:15PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> 41c0f8a36f15 ("drm/i915/pciids: add INTEL_ILK_IDS(), use acronym")
> 
> and update the references in intel_device_info.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h       | 8 ++++++--
>  lib/intel_device_info.c | 4 ++--
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 21942a3c823b..05f466ca8ce2 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -118,12 +118,16 @@
>  	INTEL_PNV_G_IDS(info), \
>  	INTEL_PNV_M_IDS(info)
>  
> -#define INTEL_IRONLAKE_D_IDS(info) \
> +#define INTEL_ILK_D_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0042, info)
>  
> -#define INTEL_IRONLAKE_M_IDS(info) \
> +#define INTEL_ILK_M_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0046, info)
>  
> +#define INTEL_ILK_IDS(info) \
> +	INTEL_ILK_D_IDS(info), \
> +	INTEL_ILK_M_IDS(info)
> +
>  #define INTEL_SNB_D_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0102, info), \
>  	INTEL_VGA_DEVICE(0x010A, info)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 88b160ae2d69..0bff1ab4ee95 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -539,8 +539,8 @@ static const struct pci_id_match intel_device_match[] = {
>  	INTEL_G45_IDS(&intel_g45_info),
>  	INTEL_GM45_IDS(&intel_gm45_info),
>  
> -	INTEL_IRONLAKE_D_IDS(&intel_ironlake_info),
> -	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
> +	INTEL_ILK_D_IDS(&intel_ironlake_info),
> +	INTEL_ILK_M_IDS(&intel_ironlake_m_info),
>  
>  	INTEL_SNB_D_IDS(&intel_sandybridge_info),
>  	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 03/10] lib: sync i915_pciids.h with kernel commit 7b43a37348b7

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:16PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> 7b43a37348b7 ("drm/i915/pciids: add INTEL_SNB_IDS()")
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 05f466ca8ce2..0d48c493dcce 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -151,6 +151,10 @@
>  	INTEL_SNB_M_GT1_IDS(info), \
>  	INTEL_SNB_M_GT2_IDS(info)
>  
> +#define INTEL_SNB_IDS(info) \
> +	INTEL_SNB_D_IDS(info), \
> +	INTEL_SNB_M_IDS(info)
> +

I thought we were missing the change in lib/intel_device_info.c,
but then I noticed they use 2 different structs for these platforms.

But a good thing to fully align the header itself

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>  #define INTEL_IVB_M_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
>  
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 04/10] lib: sync i915_pciids.h with kernel commit 5c8c22adc802

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:17PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> 5c8c22adc802 ("drm/i915/pciids: add INTEL_IVB_IDS()")

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 0d48c493dcce..16778d92346b 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -177,6 +177,10 @@
>  	INTEL_IVB_D_GT1_IDS(info), \
>  	INTEL_IVB_D_GT2_IDS(info)
>  
> +#define INTEL_IVB_IDS(info) \
> +	INTEL_IVB_M_IDS(info), \
> +	INTEL_IVB_D_IDS(info)
> +
>  #define INTEL_IVB_Q_IDS(info) \
>  	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
>  
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 05/10] lib: sync i915_pciids.h with kernel commit aa3d586e1624

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:18PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> aa3d586e1624 ("drm/i915/pciids: don't include WHL/CML PCI IDs in CFL")

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h | 30 +++++++++++++++++-------------
>  1 file changed, 17 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 16778d92346b..0c5a20d59801 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -488,6 +488,12 @@
>  	INTEL_VGA_DEVICE(0x9BCA, info), \
>  	INTEL_VGA_DEVICE(0x9BCC, info)
>  
> +#define INTEL_CML_IDS(info) \
> +	INTEL_CML_GT1_IDS(info), \
> +	INTEL_CML_GT2_IDS(info), \
> +	INTEL_CML_U_GT1_IDS(info), \
> +	INTEL_CML_U_GT2_IDS(info)
> +
>  #define INTEL_KBL_IDS(info) \
>  	INTEL_KBL_GT1_IDS(info), \
>  	INTEL_KBL_GT2_IDS(info), \
> @@ -527,6 +533,15 @@
>  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
>  
> +#define INTEL_CFL_IDS(info)	   \
> +	INTEL_CFL_S_GT1_IDS(info), \
> +	INTEL_CFL_S_GT2_IDS(info), \
> +	INTEL_CFL_H_GT1_IDS(info), \
> +	INTEL_CFL_H_GT2_IDS(info), \
> +	INTEL_CFL_U_GT2_IDS(info), \
> +	INTEL_CFL_U_GT3_IDS(info), \
> +	INTEL_AML_CFL_GT2_IDS(info)
> +
>  /* WHL/CFL U GT1 */
>  #define INTEL_WHL_U_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x3EA1, info), \
> @@ -541,21 +556,10 @@
>  #define INTEL_WHL_U_GT3_IDS(info) \
>  	INTEL_VGA_DEVICE(0x3EA2, info)
>  
> -#define INTEL_CFL_IDS(info)	   \
> -	INTEL_CFL_S_GT1_IDS(info), \
> -	INTEL_CFL_S_GT2_IDS(info), \
> -	INTEL_CFL_H_GT1_IDS(info), \
> -	INTEL_CFL_H_GT2_IDS(info), \
> -	INTEL_CFL_U_GT2_IDS(info), \
> -	INTEL_CFL_U_GT3_IDS(info), \
> +#define INTEL_WHL_IDS(info) \
>  	INTEL_WHL_U_GT1_IDS(info), \
>  	INTEL_WHL_U_GT2_IDS(info), \
> -	INTEL_WHL_U_GT3_IDS(info), \
> -	INTEL_AML_CFL_GT2_IDS(info), \
> -	INTEL_CML_GT1_IDS(info), \
> -	INTEL_CML_GT2_IDS(info), \
> -	INTEL_CML_U_GT1_IDS(info), \
> -	INTEL_CML_U_GT2_IDS(info)
> +	INTEL_WHL_U_GT3_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_PORT_F_IDS(info) \
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 06/10] lib: sync i915_pciids.h with kernel commit bfbda4722767

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:19PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> bfbda4722767 ("drm/i915/pciids: remove 11 from INTEL_ICL_IDS()")
> 
> and update the references in intel_device_info.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h       | 2 +-
>  lib/intel_device_info.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 0c5a20d59801..ecfd7f71e2e7 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -597,7 +597,7 @@
>  	INTEL_VGA_DEVICE(0x8A70, info), \
>  	INTEL_VGA_DEVICE(0x8A71, info)
>  
> -#define INTEL_ICL_11_IDS(info) \
> +#define INTEL_ICL_IDS(info) \
>  	INTEL_ICL_PORT_F_IDS(info), \
>  	INTEL_VGA_DEVICE(0x8A51, info), \
>  	INTEL_VGA_DEVICE(0x8A5D, info)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 0bff1ab4ee95..79e3796dbefe 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -594,7 +594,7 @@ static const struct pci_id_match intel_device_match[] = {
>  
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  
> -	INTEL_ICL_11_IDS(&intel_icelake_info),
> +	INTEL_ICL_IDS(&intel_icelake_info),
>  
>  	INTEL_EHL_IDS(&intel_elkhartlake_info),
>  	INTEL_JSL_IDS(&intel_jasperlake_info),
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 07/10] lib: sync i915_pciids.h with kernel commit 7858cc0b55e3

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:20PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> 7858cc0b55e3 ("drm/i915/pciids: remove 12 from INTEL_TGL_IDS()")
> 
> and update the references in intel_device_info.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h       | 10 +++++-----
>  lib/intel_device_info.c |  4 ++--
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index ecfd7f71e2e7..42913d2eb655 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -620,12 +620,12 @@
>  	INTEL_VGA_DEVICE(0x4E71, info)
>  
>  /* TGL */
> -#define INTEL_TGL_12_GT1_IDS(info) \
> +#define INTEL_TGL_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x9A60, info), \
>  	INTEL_VGA_DEVICE(0x9A68, info), \
>  	INTEL_VGA_DEVICE(0x9A70, info)
>  
> -#define INTEL_TGL_12_GT2_IDS(info) \
> +#define INTEL_TGL_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x9A40, info), \
>  	INTEL_VGA_DEVICE(0x9A49, info), \
>  	INTEL_VGA_DEVICE(0x9A59, info), \
> @@ -635,9 +635,9 @@
>  	INTEL_VGA_DEVICE(0x9AD9, info), \
>  	INTEL_VGA_DEVICE(0x9AF8, info)
>  
> -#define INTEL_TGL_12_IDS(info) \
> -	INTEL_TGL_12_GT1_IDS(info), \
> -	INTEL_TGL_12_GT2_IDS(info)
> +#define INTEL_TGL_IDS(info) \
> +	INTEL_TGL_GT1_IDS(info), \
> +	INTEL_TGL_GT2_IDS(info)
>  
>  /* RKL */
>  #define INTEL_RKL_IDS(info) \
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 79e3796dbefe..b1eec572dd82 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -599,8 +599,8 @@ static const struct pci_id_match intel_device_match[] = {
>  	INTEL_EHL_IDS(&intel_elkhartlake_info),
>  	INTEL_JSL_IDS(&intel_jasperlake_info),
>  
> -	INTEL_TGL_12_GT1_IDS(&intel_tigerlake_gt1_info),
> -	INTEL_TGL_12_GT2_IDS(&intel_tigerlake_gt2_info),
> +	INTEL_TGL_GT1_IDS(&intel_tigerlake_gt1_info),
> +	INTEL_TGL_GT2_IDS(&intel_tigerlake_gt2_info),
>  	INTEL_RKL_IDS(&intel_rocketlake_info),
>  
>  	INTEL_DG1_IDS(&intel_dg1_info),
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 08/10] lib: sync i915_pciids.h with kernel commit d2c4b1db1c4f

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:21PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> d2c4b1db1c4f ("drm/i915/pciids: don't include RPL-U PCI IDs in RPL-P")
> 
> and handle RPL-U separately in intel_device_info.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915_pciids.h       | 1 -
>  lib/intel_device_info.c | 1 +
>  2 files changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 42913d2eb655..04f6ca3dc5c1 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -717,7 +717,6 @@
>  
>  /* RPL-P */
>  #define INTEL_RPLP_IDS(info) \
> -	INTEL_RPLU_IDS(info), \
>  	INTEL_VGA_DEVICE(0xA720, info), \
>  	INTEL_VGA_DEVICE(0xA7A0, info), \
>  	INTEL_VGA_DEVICE(0xA7A8, info), \
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index b1eec572dd82..4d05307ce3d7 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -609,6 +609,7 @@ static const struct pci_id_match intel_device_match[] = {
>  	INTEL_ADLS_IDS(&intel_alderlake_s_info),
>  	INTEL_RPLS_IDS(&intel_raptorlake_s_info),
>  	INTEL_ADLP_IDS(&intel_alderlake_p_info),
> +	INTEL_RPLU_IDS(&intel_alderlake_p_info),
>  	INTEL_RPLP_IDS(&intel_alderlake_p_info),
>  	INTEL_ADLN_IDS(&intel_alderlake_n_info),
>  
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 09/10] lib: sync i915_pciids.h with kernel commit cfa7772880f8

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:22PM +0300, Jani Nikula wrote:
> Synchronize i915_pciids.h with kernel commit:
> 
> cfa7772880f8 ("drm/i915/pciids: switch to xe driver style PCI ID macros")
> 
> and update the macro usage in intel_device_info.c and perf.c. In the
> latter, directly take advantage of the possibility to pass in the macro
> to use.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915/perf.c         |   21 +-
>  lib/i915_pciids.h       | 1348 +++++++++++++++++++--------------------
>  lib/intel_device_info.c |  148 ++---
>  3 files changed, 755 insertions(+), 762 deletions(-)
> 
> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
> index 9333edfebb5b..4b00ba5de9d4 100644
> --- a/lib/i915/perf.c
> +++ b/lib/i915/perf.c
> @@ -155,16 +155,15 @@ unsupported_i915_perf_platform(struct intel_perf *perf)
>  	return NULL;
>  }
>  
> +#define ID(id) (id)
> +
>  static bool
>  is_acm_gt1(const struct intel_perf_devinfo *devinfo)
>  {
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(_id, _info) _id
>  	static const uint32_t devids[] = {
> -		INTEL_DG2_G11_IDS(NULL),
> -		INTEL_ATS_M75_IDS(NULL),
> +		INTEL_DG2_G11_IDS(ID),
> +		INTEL_ATS_M75_IDS(ID),
>  	};
> -#undef INTEL_VGA_DEVICE
>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>  		if (devids[i] == devinfo->devid)
>  			return true;
> @@ -176,12 +175,9 @@ is_acm_gt1(const struct intel_perf_devinfo *devinfo)
>  static bool
>  is_acm_gt2(const struct intel_perf_devinfo *devinfo)
>  {
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(_id, _info) _id
>  	static const uint32_t devids[] = {
> -		INTEL_DG2_G12_IDS(NULL),
> +		INTEL_DG2_G12_IDS(ID),
>  	};
> -#undef INTEL_VGA_DEVICE
>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>  		if (devids[i] == devinfo->devid)
>  			return true;
> @@ -193,13 +189,10 @@ is_acm_gt2(const struct intel_perf_devinfo *devinfo)
>  static bool
>  is_acm_gt3(const struct intel_perf_devinfo *devinfo)
>  {
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(_id, _info) _id
>  	static const uint32_t devids[] = {
> -		INTEL_DG2_G10_IDS(NULL),
> -		INTEL_ATS_M150_IDS(NULL),
> +		INTEL_DG2_G10_IDS(ID),
> +		INTEL_ATS_M150_IDS(ID),
>  	};
> -#undef INTEL_VGA_DEVICE

nice clean-up

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>  		if (devids[i] == devinfo->devid)
>  			return true;
> diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
> index 04f6ca3dc5c1..3e39d644ebaa 100644
> --- a/lib/i915_pciids.h
> +++ b/lib/i915_pciids.h
> @@ -35,752 +35,752 @@
>   * Don't use C99 here because "class" is reserved and we want to
>   * give userspace flexibility.
>   */
> -#define INTEL_VGA_DEVICE(id, info) {		\
> -	0x8086,	id,				\
> -	~0, ~0,					\
> -	0x030000, 0xff0000,			\
> +#define INTEL_VGA_DEVICE(id, info) { \
> +	0x8086,	id, \
> +	~0, ~0, \
> +	0x030000, 0xff0000, \
>  	(unsigned long) info }
>  
> -#define INTEL_QUANTA_VGA_DEVICE(info) {		\
> -	0x8086,	0x16a,				\
> -	0x152d,	0x8990,				\
> -	0x030000, 0xff0000,			\
> +#define INTEL_QUANTA_VGA_DEVICE(info) { \
> +	0x8086,	0x16a, \
> +	0x152d,	0x8990, \
> +	0x030000, 0xff0000, \
>  	(unsigned long) info }
>  
> -#define INTEL_I810_IDS(info)					\
> -	INTEL_VGA_DEVICE(0x7121, info), /* I810 */		\
> -	INTEL_VGA_DEVICE(0x7123, info), /* I810_DC100 */	\
> -	INTEL_VGA_DEVICE(0x7125, info)  /* I810_E */
> +#define INTEL_I810_IDS(MACRO__, ...) \
> +	MACRO__(0x7121, ## __VA_ARGS__), /* I810 */ \
> +	MACRO__(0x7123, ## __VA_ARGS__), /* I810_DC100 */ \
> +	MACRO__(0x7125, ## __VA_ARGS__)  /* I810_E */
>  
> -#define INTEL_I815_IDS(info)					\
> -	INTEL_VGA_DEVICE(0x1132, info)  /* I815*/
> +#define INTEL_I815_IDS(MACRO__, ...) \
> +	MACRO__(0x1132, ## __VA_ARGS__)  /* I815*/
>  
> -#define INTEL_I830_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x3577, info)
> +#define INTEL_I830_IDS(MACRO__, ...) \
> +	MACRO__(0x3577, ## __VA_ARGS__)
>  
> -#define INTEL_I845G_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2562, info)
> +#define INTEL_I845G_IDS(MACRO__, ...) \
> +	MACRO__(0x2562, ## __VA_ARGS__)
>  
> -#define INTEL_I85X_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
> -	INTEL_VGA_DEVICE(0x358e, info)
> +#define INTEL_I85X_IDS(MACRO__, ...) \
> +	MACRO__(0x3582, ## __VA_ARGS__), /* I855_GM */ \
> +	MACRO__(0x358e, ## __VA_ARGS__)
>  
> -#define INTEL_I865G_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2572, info) /* I865_G */
> +#define INTEL_I865G_IDS(MACRO__, ...) \
> +	MACRO__(0x2572, ## __VA_ARGS__) /* I865_G */
>  
> -#define INTEL_I915G_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
> -	INTEL_VGA_DEVICE(0x258a, info)  /* E7221_G */
> +#define INTEL_I915G_IDS(MACRO__, ...) \
> +	MACRO__(0x2582, ## __VA_ARGS__), /* I915_G */ \
> +	MACRO__(0x258a, ## __VA_ARGS__)  /* E7221_G */
>  
> -#define INTEL_I915GM_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */
> +#define INTEL_I915GM_IDS(MACRO__, ...) \
> +	MACRO__(0x2592, ## __VA_ARGS__) /* I915_GM */
>  
> -#define INTEL_I945G_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2772, info) /* I945_G */
> +#define INTEL_I945G_IDS(MACRO__, ...) \
> +	MACRO__(0x2772, ## __VA_ARGS__) /* I945_G */
>  
> -#define INTEL_I945GM_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
> -	INTEL_VGA_DEVICE(0x27ae, info)  /* I945_GME */
> +#define INTEL_I945GM_IDS(MACRO__, ...) \
> +	MACRO__(0x27a2, ## __VA_ARGS__), /* I945_GM */ \
> +	MACRO__(0x27ae, ## __VA_ARGS__)  /* I945_GME */
>  
> -#define INTEL_I965G_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */	\
> -	INTEL_VGA_DEVICE(0x2982, info),	/* G35_G */	\
> -	INTEL_VGA_DEVICE(0x2992, info),	/* I965_Q */	\
> -	INTEL_VGA_DEVICE(0x29a2, info)	/* I965_G */
> +#define INTEL_I965G_IDS(MACRO__, ...) \
> +	MACRO__(0x2972, ## __VA_ARGS__), /* I946_GZ */ \
> +	MACRO__(0x2982, ## __VA_ARGS__),	/* G35_G */ \
> +	MACRO__(0x2992, ## __VA_ARGS__),	/* I965_Q */ \
> +	MACRO__(0x29a2, ## __VA_ARGS__)	/* I965_G */
>  
> -#define INTEL_G33_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
> -	INTEL_VGA_DEVICE(0x29c2, info),	/* G33_G */ \
> -	INTEL_VGA_DEVICE(0x29d2, info)	/* Q33_G */
> +#define INTEL_G33_IDS(MACRO__, ...) \
> +	MACRO__(0x29b2, ## __VA_ARGS__), /* Q35_G */ \
> +	MACRO__(0x29c2, ## __VA_ARGS__),	/* G33_G */ \
> +	MACRO__(0x29d2, ## __VA_ARGS__)	/* Q33_G */
>  
> -#define INTEL_I965GM_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2a02, info),	/* I965_GM */ \
> -	INTEL_VGA_DEVICE(0x2a12, info)  /* I965_GME */
> +#define INTEL_I965GM_IDS(MACRO__, ...) \
> +	MACRO__(0x2a02, ## __VA_ARGS__),	/* I965_GM */ \
> +	MACRO__(0x2a12, ## __VA_ARGS__)  /* I965_GME */
>  
> -#define INTEL_GM45_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */
> +#define INTEL_GM45_IDS(MACRO__, ...) \
> +	MACRO__(0x2a42, ## __VA_ARGS__) /* GM45_G */
>  
> -#define INTEL_G45_IDS(info)				\
> -	INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
> -	INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
> -	INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
> -	INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
> -	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
> -	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
> -
> -#define INTEL_PNV_G_IDS(info) \
> -	INTEL_VGA_DEVICE(0xa001, info)
> -
> -#define INTEL_PNV_M_IDS(info) \
> -	INTEL_VGA_DEVICE(0xa011, info)
> -
> -#define INTEL_PNV_IDS(info) \
> -	INTEL_PNV_G_IDS(info), \
> -	INTEL_PNV_M_IDS(info)
> -
> -#define INTEL_ILK_D_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0042, info)
> -
> -#define INTEL_ILK_M_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0046, info)
> -
> -#define INTEL_ILK_IDS(info) \
> -	INTEL_ILK_D_IDS(info), \
> -	INTEL_ILK_M_IDS(info)
> -
> -#define INTEL_SNB_D_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0102, info), \
> -	INTEL_VGA_DEVICE(0x010A, info)
> -
> -#define INTEL_SNB_D_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0112, info), \
> -	INTEL_VGA_DEVICE(0x0122, info)
> -
> -#define INTEL_SNB_D_IDS(info) \
> -	INTEL_SNB_D_GT1_IDS(info), \
> -	INTEL_SNB_D_GT2_IDS(info)
> -
> -#define INTEL_SNB_M_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0106, info)
> -
> -#define INTEL_SNB_M_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0116, info), \
> -	INTEL_VGA_DEVICE(0x0126, info)
> -
> -#define INTEL_SNB_M_IDS(info) \
> -	INTEL_SNB_M_GT1_IDS(info), \
> -	INTEL_SNB_M_GT2_IDS(info)
> -
> -#define INTEL_SNB_IDS(info) \
> -	INTEL_SNB_D_IDS(info), \
> -	INTEL_SNB_M_IDS(info)
> -
> -#define INTEL_IVB_M_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0156, info) /* GT1 mobile */
> -
> -#define INTEL_IVB_M_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */
> -
> -#define INTEL_IVB_M_IDS(info) \
> -	INTEL_IVB_M_GT1_IDS(info), \
> -	INTEL_IVB_M_GT2_IDS(info)
> -
> -#define INTEL_IVB_D_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x015a, info)  /* GT1 server */
> -
> -#define INTEL_IVB_D_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x016a, info)  /* GT2 server */
> -
> -#define INTEL_IVB_D_IDS(info) \
> -	INTEL_IVB_D_GT1_IDS(info), \
> -	INTEL_IVB_D_GT2_IDS(info)
> -
> -#define INTEL_IVB_IDS(info) \
> -	INTEL_IVB_M_IDS(info), \
> -	INTEL_IVB_D_IDS(info)
> -
> -#define INTEL_IVB_Q_IDS(info) \
> -	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
> -
> -#define INTEL_HSW_ULT_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
> -	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
> -	INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
> -
> -#define INTEL_HSW_ULX_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
> -
> -#define INTEL_HSW_GT1_IDS(info) \
> -	INTEL_HSW_ULT_GT1_IDS(info), \
> -	INTEL_HSW_ULX_GT1_IDS(info), \
> -	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
> -	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
> -	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
> -	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */	\
> -	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
> -	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
> -
> -#define INTEL_HSW_ULT_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */	\
> -	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
> -	INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
> -
> -#define INTEL_HSW_ULX_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
> -
> -#define INTEL_HSW_GT2_IDS(info) \
> -	INTEL_HSW_ULT_GT2_IDS(info), \
> -	INTEL_HSW_ULX_GT2_IDS(info), \
> -	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
> -	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
> -	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
> -	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
> -
> -#define INTEL_HSW_ULT_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
> -	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
> -	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
> -
> -#define INTEL_HSW_GT3_IDS(info) \
> -	INTEL_HSW_ULT_GT3_IDS(info), \
> -	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
> -	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
> -	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
> -	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
> -	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
> -	INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
> -	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
> -
> -#define INTEL_HSW_IDS(info) \
> -	INTEL_HSW_GT1_IDS(info), \
> -	INTEL_HSW_GT2_IDS(info), \
> -	INTEL_HSW_GT3_IDS(info)
> -
> -#define INTEL_VLV_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0f30, info), \
> -	INTEL_VGA_DEVICE(0x0f31, info), \
> -	INTEL_VGA_DEVICE(0x0f32, info), \
> -	INTEL_VGA_DEVICE(0x0f33, info)
> -
> -#define INTEL_BDW_ULT_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
> -	INTEL_VGA_DEVICE(0x160B, info)  /* GT1 Iris */
> -
> -#define INTEL_BDW_ULX_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x160E, info) /* GT1 ULX */
> -
> -#define INTEL_BDW_GT1_IDS(info) \
> -	INTEL_BDW_ULT_GT1_IDS(info), \
> -	INTEL_BDW_ULX_GT1_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
> -	INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
> -	INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */
> -
> -#define INTEL_BDW_ULT_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
> -	INTEL_VGA_DEVICE(0x161B, info)  /* GT2 ULT */
> -
> -#define INTEL_BDW_ULX_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
> -
> -#define INTEL_BDW_GT2_IDS(info) \
> -	INTEL_BDW_ULT_GT2_IDS(info), \
> -	INTEL_BDW_ULX_GT2_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */	\
> -	INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
> -	INTEL_VGA_DEVICE(0x161D, info)  /* GT2 Workstation */
> -
> -#define INTEL_BDW_ULT_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
> -	INTEL_VGA_DEVICE(0x162B, info)  /* Iris */ \
> -
> -#define INTEL_BDW_ULX_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x162E, info)  /* ULX */
> -
> -#define INTEL_BDW_GT3_IDS(info) \
> -	INTEL_BDW_ULT_GT3_IDS(info), \
> -	INTEL_BDW_ULX_GT3_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
> -	INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
> -	INTEL_VGA_DEVICE(0x162D, info)  /* Workstation */
> -
> -#define INTEL_BDW_ULT_RSVD_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
> -	INTEL_VGA_DEVICE(0x163B, info)  /* Iris */
> -
> -#define INTEL_BDW_ULX_RSVD_IDS(info) \
> -	INTEL_VGA_DEVICE(0x163E, info) /* ULX */
> -
> -#define INTEL_BDW_RSVD_IDS(info) \
> -	INTEL_BDW_ULT_RSVD_IDS(info), \
> -	INTEL_BDW_ULX_RSVD_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
> -	INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
> -	INTEL_VGA_DEVICE(0x163D, info)  /* Workstation */
> -
> -#define INTEL_BDW_IDS(info) \
> -	INTEL_BDW_GT1_IDS(info), \
> -	INTEL_BDW_GT2_IDS(info), \
> -	INTEL_BDW_GT3_IDS(info), \
> -	INTEL_BDW_RSVD_IDS(info)
> -
> -#define INTEL_CHV_IDS(info) \
> -	INTEL_VGA_DEVICE(0x22b0, info), \
> -	INTEL_VGA_DEVICE(0x22b1, info), \
> -	INTEL_VGA_DEVICE(0x22b2, info), \
> -	INTEL_VGA_DEVICE(0x22b3, info)
> -
> -#define INTEL_SKL_ULT_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> -	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
> -
> -#define INTEL_SKL_ULX_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> -	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
> -
> -#define INTEL_SKL_GT1_IDS(info)	\
> -	INTEL_SKL_ULT_GT1_IDS(info), \
> -	INTEL_SKL_ULX_GT1_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> -	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> -	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> -	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> -
> -#define INTEL_SKL_ULT_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> -	INTEL_VGA_DEVICE(0x1921, info)  /* ULT GT2F */
> -
> -#define INTEL_SKL_ULX_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x191E, info) /* ULX GT2 */
> -
> -#define INTEL_SKL_GT2_IDS(info)	\
> -	INTEL_SKL_ULT_GT2_IDS(info), \
> -	INTEL_SKL_ULX_GT2_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
> -	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> -	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
> -
> -#define INTEL_SKL_ULT_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \
> -	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3e */
> -
> -#define INTEL_SKL_GT3_IDS(info) \
> -	INTEL_SKL_ULT_GT3_IDS(info), \
> -	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
> -	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \
> -	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3e */
> -
> -#define INTEL_SKL_GT4_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
> -	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
> -	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
> -	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
> -
> -#define INTEL_SKL_IDS(info)	 \
> -	INTEL_SKL_GT1_IDS(info), \
> -	INTEL_SKL_GT2_IDS(info), \
> -	INTEL_SKL_GT3_IDS(info), \
> -	INTEL_SKL_GT4_IDS(info)
> -
> -#define INTEL_BXT_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0A84, info), \
> -	INTEL_VGA_DEVICE(0x1A84, info), \
> -	INTEL_VGA_DEVICE(0x1A85, info), \
> -	INTEL_VGA_DEVICE(0x5A84, info), /* APL HD Graphics 505 */ \
> -	INTEL_VGA_DEVICE(0x5A85, info)  /* APL HD Graphics 500 */
> -
> -#define INTEL_GLK_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3184, info), \
> -	INTEL_VGA_DEVICE(0x3185, info)
> -
> -#define INTEL_KBL_ULT_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \
> -	INTEL_VGA_DEVICE(0x5913, info)  /* ULT GT1.5 */
> -
> -#define INTEL_KBL_ULX_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \
> -	INTEL_VGA_DEVICE(0x5915, info)  /* ULX GT1.5 */
> -
> -#define INTEL_KBL_GT1_IDS(info)	\
> -	INTEL_KBL_ULT_GT1_IDS(info), \
> -	INTEL_KBL_ULX_GT1_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
> -	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
> -	INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \
> -	INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */
> -
> -#define INTEL_KBL_ULT_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
> -	INTEL_VGA_DEVICE(0x5921, info)  /* ULT GT2F */
> -
> -#define INTEL_KBL_ULX_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x591E, info)  /* ULX GT2 */
> -
> -#define INTEL_KBL_GT2_IDS(info)	\
> -	INTEL_KBL_ULT_GT2_IDS(info), \
> -	INTEL_KBL_ULX_GT2_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> -	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
> -	INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
> -	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
> -
> -#define INTEL_KBL_ULT_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5926, info) /* ULT GT3 */
> -
> -#define INTEL_KBL_GT3_IDS(info) \
> -	INTEL_KBL_ULT_GT3_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */
> -
> -#define INTEL_KBL_GT4_IDS(info) \
> -	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
> +#define INTEL_G45_IDS(MACRO__, ...) \
> +	MACRO__(0x2e02, ## __VA_ARGS__), /* IGD_E_G */ \
> +	MACRO__(0x2e12, ## __VA_ARGS__), /* Q45_G */ \
> +	MACRO__(0x2e22, ## __VA_ARGS__), /* G45_G */ \
> +	MACRO__(0x2e32, ## __VA_ARGS__), /* G41_G */ \
> +	MACRO__(0x2e42, ## __VA_ARGS__), /* B43_G */ \
> +	MACRO__(0x2e92, ## __VA_ARGS__)	/* B43_G.1 */
> +
> +#define INTEL_PNV_G_IDS(MACRO__, ...) \
> +	MACRO__(0xa001, ## __VA_ARGS__)
> +
> +#define INTEL_PNV_M_IDS(MACRO__, ...) \
> +	MACRO__(0xa011, ## __VA_ARGS__)
> +
> +#define INTEL_PNV_IDS(MACRO__, ...) \
> +	INTEL_PNV_G_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_PNV_M_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_ILK_D_IDS(MACRO__, ...) \
> +	MACRO__(0x0042, ## __VA_ARGS__)
> +
> +#define INTEL_ILK_M_IDS(MACRO__, ...) \
> +	MACRO__(0x0046, ## __VA_ARGS__)
> +
> +#define INTEL_ILK_IDS(MACRO__, ...) \
> +	INTEL_ILK_D_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_ILK_M_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_D_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0102, ## __VA_ARGS__), \
> +	MACRO__(0x010A, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_D_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0112, ## __VA_ARGS__), \
> +	MACRO__(0x0122, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_D_IDS(MACRO__, ...) \
> +	INTEL_SNB_D_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SNB_D_GT2_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_M_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0106, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_M_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0116, ## __VA_ARGS__), \
> +	MACRO__(0x0126, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_M_IDS(MACRO__, ...) \
> +	INTEL_SNB_M_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SNB_M_GT2_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_SNB_IDS(MACRO__, ...) \
> +	INTEL_SNB_D_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SNB_M_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_IVB_M_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0156, ## __VA_ARGS__) /* GT1 mobile */
> +
> +#define INTEL_IVB_M_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0166, ## __VA_ARGS__) /* GT2 mobile */
> +
> +#define INTEL_IVB_M_IDS(MACRO__, ...) \
> +	INTEL_IVB_M_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_IVB_M_GT2_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_IVB_D_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0152, ## __VA_ARGS__), /* GT1 desktop */ \
> +	MACRO__(0x015a, ## __VA_ARGS__)  /* GT1 server */
> +
> +#define INTEL_IVB_D_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0162, ## __VA_ARGS__), /* GT2 desktop */ \
> +	MACRO__(0x016a, ## __VA_ARGS__)  /* GT2 server */
> +
> +#define INTEL_IVB_D_IDS(MACRO__, ...) \
> +	INTEL_IVB_D_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_IVB_D_GT2_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_IVB_IDS(MACRO__, ...) \
> +	INTEL_IVB_M_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_IVB_D_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_IVB_Q_IDS(MACRO__, ...) \
> +	INTEL_QUANTA_VGA_DEVICE(__VA_ARGS__) /* Quanta transcode */
> +
> +#define INTEL_HSW_ULT_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0A02, ## __VA_ARGS__), /* ULT GT1 desktop */ \
> +	MACRO__(0x0A06, ## __VA_ARGS__), /* ULT GT1 mobile */ \
> +	MACRO__(0x0A0A, ## __VA_ARGS__), /* ULT GT1 server */ \
> +	MACRO__(0x0A0B, ## __VA_ARGS__)  /* ULT GT1 reserved */
> +
> +#define INTEL_HSW_ULX_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x0A0E, ## __VA_ARGS__) /* ULX GT1 mobile */
> +
> +#define INTEL_HSW_GT1_IDS(MACRO__, ...) \
> +	INTEL_HSW_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_HSW_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x0402, ## __VA_ARGS__), /* GT1 desktop */ \
> +	MACRO__(0x0406, ## __VA_ARGS__), /* GT1 mobile */ \
> +	MACRO__(0x040A, ## __VA_ARGS__), /* GT1 server */ \
> +	MACRO__(0x040B, ## __VA_ARGS__), /* GT1 reserved */ \
> +	MACRO__(0x040E, ## __VA_ARGS__), /* GT1 reserved */ \
> +	MACRO__(0x0C02, ## __VA_ARGS__), /* SDV GT1 desktop */ \
> +	MACRO__(0x0C06, ## __VA_ARGS__), /* SDV GT1 mobile */ \
> +	MACRO__(0x0C0A, ## __VA_ARGS__), /* SDV GT1 server */ \
> +	MACRO__(0x0C0B, ## __VA_ARGS__), /* SDV GT1 reserved */ \
> +	MACRO__(0x0C0E, ## __VA_ARGS__), /* SDV GT1 reserved */ \
> +	MACRO__(0x0D02, ## __VA_ARGS__), /* CRW GT1 desktop */ \
> +	MACRO__(0x0D06, ## __VA_ARGS__), /* CRW GT1 mobile */ \
> +	MACRO__(0x0D0A, ## __VA_ARGS__), /* CRW GT1 server */ \
> +	MACRO__(0x0D0B, ## __VA_ARGS__), /* CRW GT1 reserved */ \
> +	MACRO__(0x0D0E, ## __VA_ARGS__)  /* CRW GT1 reserved */
> +
> +#define INTEL_HSW_ULT_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0A12, ## __VA_ARGS__), /* ULT GT2 desktop */ \
> +	MACRO__(0x0A16, ## __VA_ARGS__), /* ULT GT2 mobile */ \
> +	MACRO__(0x0A1A, ## __VA_ARGS__), /* ULT GT2 server */ \
> +	MACRO__(0x0A1B, ## __VA_ARGS__)  /* ULT GT2 reserved */ \
> +
> +#define INTEL_HSW_ULX_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x0A1E, ## __VA_ARGS__) /* ULX GT2 mobile */ \
> +
> +#define INTEL_HSW_GT2_IDS(MACRO__, ...) \
> +	INTEL_HSW_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_HSW_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x0412, ## __VA_ARGS__), /* GT2 desktop */ \
> +	MACRO__(0x0416, ## __VA_ARGS__), /* GT2 mobile */ \
> +	MACRO__(0x041A, ## __VA_ARGS__), /* GT2 server */ \
> +	MACRO__(0x041B, ## __VA_ARGS__), /* GT2 reserved */ \
> +	MACRO__(0x041E, ## __VA_ARGS__), /* GT2 reserved */ \
> +	MACRO__(0x0C12, ## __VA_ARGS__), /* SDV GT2 desktop */ \
> +	MACRO__(0x0C16, ## __VA_ARGS__), /* SDV GT2 mobile */ \
> +	MACRO__(0x0C1A, ## __VA_ARGS__), /* SDV GT2 server */ \
> +	MACRO__(0x0C1B, ## __VA_ARGS__), /* SDV GT2 reserved */ \
> +	MACRO__(0x0C1E, ## __VA_ARGS__), /* SDV GT2 reserved */ \
> +	MACRO__(0x0D12, ## __VA_ARGS__), /* CRW GT2 desktop */ \
> +	MACRO__(0x0D16, ## __VA_ARGS__), /* CRW GT2 mobile */ \
> +	MACRO__(0x0D1A, ## __VA_ARGS__), /* CRW GT2 server */ \
> +	MACRO__(0x0D1B, ## __VA_ARGS__), /* CRW GT2 reserved */ \
> +	MACRO__(0x0D1E, ## __VA_ARGS__)  /* CRW GT2 reserved */
> +
> +#define INTEL_HSW_ULT_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x0A22, ## __VA_ARGS__), /* ULT GT3 desktop */ \
> +	MACRO__(0x0A26, ## __VA_ARGS__), /* ULT GT3 mobile */ \
> +	MACRO__(0x0A2A, ## __VA_ARGS__), /* ULT GT3 server */ \
> +	MACRO__(0x0A2B, ## __VA_ARGS__), /* ULT GT3 reserved */ \
> +	MACRO__(0x0A2E, ## __VA_ARGS__)  /* ULT GT3 reserved */
> +
> +#define INTEL_HSW_GT3_IDS(MACRO__, ...) \
> +	INTEL_HSW_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x0422, ## __VA_ARGS__), /* GT3 desktop */ \
> +	MACRO__(0x0426, ## __VA_ARGS__), /* GT3 mobile */ \
> +	MACRO__(0x042A, ## __VA_ARGS__), /* GT3 server */ \
> +	MACRO__(0x042B, ## __VA_ARGS__), /* GT3 reserved */ \
> +	MACRO__(0x042E, ## __VA_ARGS__), /* GT3 reserved */ \
> +	MACRO__(0x0C22, ## __VA_ARGS__), /* SDV GT3 desktop */ \
> +	MACRO__(0x0C26, ## __VA_ARGS__), /* SDV GT3 mobile */ \
> +	MACRO__(0x0C2A, ## __VA_ARGS__), /* SDV GT3 server */ \
> +	MACRO__(0x0C2B, ## __VA_ARGS__), /* SDV GT3 reserved */ \
> +	MACRO__(0x0C2E, ## __VA_ARGS__), /* SDV GT3 reserved */ \
> +	MACRO__(0x0D22, ## __VA_ARGS__), /* CRW GT3 desktop */ \
> +	MACRO__(0x0D26, ## __VA_ARGS__), /* CRW GT3 mobile */ \
> +	MACRO__(0x0D2A, ## __VA_ARGS__), /* CRW GT3 server */ \
> +	MACRO__(0x0D2B, ## __VA_ARGS__), /* CRW GT3 reserved */ \
> +	MACRO__(0x0D2E, ## __VA_ARGS__)  /* CRW GT3 reserved */
> +
> +#define INTEL_HSW_IDS(MACRO__, ...) \
> +	INTEL_HSW_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_HSW_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_HSW_GT3_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_VLV_IDS(MACRO__, ...) \
> +	MACRO__(0x0f30, ## __VA_ARGS__), \
> +	MACRO__(0x0f31, ## __VA_ARGS__), \
> +	MACRO__(0x0f32, ## __VA_ARGS__), \
> +	MACRO__(0x0f33, ## __VA_ARGS__)
> +
> +#define INTEL_BDW_ULT_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x1606, ## __VA_ARGS__), /* GT1 ULT */ \
> +	MACRO__(0x160B, ## __VA_ARGS__)  /* GT1 Iris */
> +
> +#define INTEL_BDW_ULX_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x160E, ## __VA_ARGS__) /* GT1 ULX */
> +
> +#define INTEL_BDW_GT1_IDS(MACRO__, ...) \
> +	INTEL_BDW_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1602, ## __VA_ARGS__), /* GT1 ULT */ \
> +	MACRO__(0x160A, ## __VA_ARGS__), /* GT1 Server */ \
> +	MACRO__(0x160D, ## __VA_ARGS__)  /* GT1 Workstation */
> +
> +#define INTEL_BDW_ULT_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x1616, ## __VA_ARGS__), /* GT2 ULT */ \
> +	MACRO__(0x161B, ## __VA_ARGS__)  /* GT2 ULT */
> +
> +#define INTEL_BDW_ULX_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x161E, ## __VA_ARGS__) /* GT2 ULX */
> +
> +#define INTEL_BDW_GT2_IDS(MACRO__, ...) \
> +	INTEL_BDW_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1612, ## __VA_ARGS__), /* GT2 Halo */ \
> +	MACRO__(0x161A, ## __VA_ARGS__), /* GT2 Server */ \
> +	MACRO__(0x161D, ## __VA_ARGS__)  /* GT2 Workstation */
> +
> +#define INTEL_BDW_ULT_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x1626, ## __VA_ARGS__), /* ULT */ \
> +	MACRO__(0x162B, ## __VA_ARGS__)  /* Iris */ \
> +
> +#define INTEL_BDW_ULX_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x162E, ## __VA_ARGS__)  /* ULX */
> +
> +#define INTEL_BDW_GT3_IDS(MACRO__, ...) \
> +	INTEL_BDW_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_ULX_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1622, ## __VA_ARGS__), /* ULT */ \
> +	MACRO__(0x162A, ## __VA_ARGS__), /* Server */ \
> +	MACRO__(0x162D, ## __VA_ARGS__)  /* Workstation */
> +
> +#define INTEL_BDW_ULT_RSVD_IDS(MACRO__, ...) \
> +	MACRO__(0x1636, ## __VA_ARGS__), /* ULT */ \
> +	MACRO__(0x163B, ## __VA_ARGS__)  /* Iris */
> +
> +#define INTEL_BDW_ULX_RSVD_IDS(MACRO__, ...) \
> +	MACRO__(0x163E, ## __VA_ARGS__) /* ULX */
> +
> +#define INTEL_BDW_RSVD_IDS(MACRO__, ...) \
> +	INTEL_BDW_ULT_RSVD_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_ULX_RSVD_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1632, ## __VA_ARGS__), /* ULT */ \
> +	MACRO__(0x163A, ## __VA_ARGS__), /* Server */ \
> +	MACRO__(0x163D, ## __VA_ARGS__)  /* Workstation */
> +
> +#define INTEL_BDW_IDS(MACRO__, ...) \
> +	INTEL_BDW_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_BDW_RSVD_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_CHV_IDS(MACRO__, ...) \
> +	MACRO__(0x22b0, ## __VA_ARGS__), \
> +	MACRO__(0x22b1, ## __VA_ARGS__), \
> +	MACRO__(0x22b2, ## __VA_ARGS__), \
> +	MACRO__(0x22b3, ## __VA_ARGS__)
> +
> +#define INTEL_SKL_ULT_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x1906, ## __VA_ARGS__), /* ULT GT1 */ \
> +	MACRO__(0x1913, ## __VA_ARGS__)  /* ULT GT1.5 */
> +
> +#define INTEL_SKL_ULX_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x190E, ## __VA_ARGS__), /* ULX GT1 */ \
> +	MACRO__(0x1915, ## __VA_ARGS__)  /* ULX GT1.5 */
> +
> +#define INTEL_SKL_GT1_IDS(MACRO__, ...) \
> +	INTEL_SKL_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SKL_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1902, ## __VA_ARGS__), /* DT  GT1 */ \
> +	MACRO__(0x190A, ## __VA_ARGS__), /* SRV GT1 */ \
> +	MACRO__(0x190B, ## __VA_ARGS__), /* Halo GT1 */ \
> +	MACRO__(0x1917, ## __VA_ARGS__)  /* DT  GT1.5 */
> +
> +#define INTEL_SKL_ULT_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x1916, ## __VA_ARGS__), /* ULT GT2 */ \
> +	MACRO__(0x1921, ## __VA_ARGS__)  /* ULT GT2F */
> +
> +#define INTEL_SKL_ULX_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x191E, ## __VA_ARGS__) /* ULX GT2 */
> +
> +#define INTEL_SKL_GT2_IDS(MACRO__, ...) \
> +	INTEL_SKL_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SKL_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x1912, ## __VA_ARGS__), /* DT  GT2 */ \
> +	MACRO__(0x191A, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x191B, ## __VA_ARGS__), /* Halo GT2 */ \
> +	MACRO__(0x191D, ## __VA_ARGS__)  /* WKS GT2 */
> +
> +#define INTEL_SKL_ULT_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x1923, ## __VA_ARGS__), /* ULT GT3 */ \
> +	MACRO__(0x1926, ## __VA_ARGS__), /* ULT GT3e */ \
> +	MACRO__(0x1927, ## __VA_ARGS__)  /* ULT GT3e */
> +
> +#define INTEL_SKL_GT3_IDS(MACRO__, ...) \
> +	INTEL_SKL_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x192A, ## __VA_ARGS__), /* SRV GT3 */ \
> +	MACRO__(0x192B, ## __VA_ARGS__), /* Halo GT3e */ \
> +	MACRO__(0x192D, ## __VA_ARGS__)  /* SRV GT3e */
> +
> +#define INTEL_SKL_GT4_IDS(MACRO__, ...) \
> +	MACRO__(0x1932, ## __VA_ARGS__), /* DT GT4 */ \
> +	MACRO__(0x193A, ## __VA_ARGS__), /* SRV GT4e */ \
> +	MACRO__(0x193B, ## __VA_ARGS__), /* Halo GT4e */ \
> +	MACRO__(0x193D, ## __VA_ARGS__) /* WKS GT4e */
> +
> +#define INTEL_SKL_IDS(MACRO__, ...) \
> +	INTEL_SKL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SKL_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SKL_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_SKL_GT4_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_BXT_IDS(MACRO__, ...) \
> +	MACRO__(0x0A84, ## __VA_ARGS__), \
> +	MACRO__(0x1A84, ## __VA_ARGS__), \
> +	MACRO__(0x1A85, ## __VA_ARGS__), \
> +	MACRO__(0x5A84, ## __VA_ARGS__), /* APL HD Graphics 505 */ \
> +	MACRO__(0x5A85, ## __VA_ARGS__)  /* APL HD Graphics 500 */
> +
> +#define INTEL_GLK_IDS(MACRO__, ...) \
> +	MACRO__(0x3184, ## __VA_ARGS__), \
> +	MACRO__(0x3185, ## __VA_ARGS__)
> +
> +#define INTEL_KBL_ULT_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x5906, ## __VA_ARGS__), /* ULT GT1 */ \
> +	MACRO__(0x5913, ## __VA_ARGS__)  /* ULT GT1.5 */
> +
> +#define INTEL_KBL_ULX_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x590E, ## __VA_ARGS__), /* ULX GT1 */ \
> +	MACRO__(0x5915, ## __VA_ARGS__)  /* ULX GT1.5 */
> +
> +#define INTEL_KBL_GT1_IDS(MACRO__, ...) \
> +	INTEL_KBL_ULT_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_KBL_ULX_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x5902, ## __VA_ARGS__), /* DT  GT1 */ \
> +	MACRO__(0x5908, ## __VA_ARGS__), /* Halo GT1 */ \
> +	MACRO__(0x590A, ## __VA_ARGS__), /* SRV GT1 */ \
> +	MACRO__(0x590B, ## __VA_ARGS__) /* Halo GT1 */
> +
> +#define INTEL_KBL_ULT_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x5916, ## __VA_ARGS__), /* ULT GT2 */ \
> +	MACRO__(0x5921, ## __VA_ARGS__)  /* ULT GT2F */
> +
> +#define INTEL_KBL_ULX_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x591E, ## __VA_ARGS__)  /* ULX GT2 */
> +
> +#define INTEL_KBL_GT2_IDS(MACRO__, ...) \
> +	INTEL_KBL_ULT_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_KBL_ULX_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x5912, ## __VA_ARGS__), /* DT  GT2 */ \
> +	MACRO__(0x5917, ## __VA_ARGS__), /* Mobile GT2 */ \
> +	MACRO__(0x591A, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x591B, ## __VA_ARGS__), /* Halo GT2 */ \
> +	MACRO__(0x591D, ## __VA_ARGS__) /* WKS GT2 */
> +
> +#define INTEL_KBL_ULT_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x5926, ## __VA_ARGS__) /* ULT GT3 */
> +
> +#define INTEL_KBL_GT3_IDS(MACRO__, ...) \
> +	INTEL_KBL_ULT_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x5923, ## __VA_ARGS__), /* ULT GT3 */ \
> +	MACRO__(0x5927, ## __VA_ARGS__) /* ULT GT3 */
> +
> +#define INTEL_KBL_GT4_IDS(MACRO__, ...) \
> +	MACRO__(0x593B, ## __VA_ARGS__) /* Halo GT4 */
>  
>  /* AML/KBL Y GT2 */
> -#define INTEL_AML_KBL_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
> -	INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
> +#define INTEL_AML_KBL_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x591C, ## __VA_ARGS__),  /* ULX GT2 */ \
> +	MACRO__(0x87C0, ## __VA_ARGS__) /* ULX GT2 */
>  
>  /* AML/CFL Y GT2 */
> -#define INTEL_AML_CFL_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x87CA, info)
> +#define INTEL_AML_CFL_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x87CA, ## __VA_ARGS__)
>  
>  /* CML GT1 */
> -#define INTEL_CML_GT1_IDS(info)	\
> -	INTEL_VGA_DEVICE(0x9BA2, info), \
> -	INTEL_VGA_DEVICE(0x9BA4, info), \
> -	INTEL_VGA_DEVICE(0x9BA5, info), \
> -	INTEL_VGA_DEVICE(0x9BA8, info)
> +#define INTEL_CML_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x9BA2, ## __VA_ARGS__), \
> +	MACRO__(0x9BA4, ## __VA_ARGS__), \
> +	MACRO__(0x9BA5, ## __VA_ARGS__), \
> +	MACRO__(0x9BA8, ## __VA_ARGS__)
>  
> -#define INTEL_CML_U_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x9B21, info), \
> -	INTEL_VGA_DEVICE(0x9BAA, info), \
> -	INTEL_VGA_DEVICE(0x9BAC, info)
> +#define INTEL_CML_U_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x9B21, ## __VA_ARGS__), \
> +	MACRO__(0x9BAA, ## __VA_ARGS__), \
> +	MACRO__(0x9BAC, ## __VA_ARGS__)
>  
>  /* CML GT2 */
> -#define INTEL_CML_GT2_IDS(info)	\
> -	INTEL_VGA_DEVICE(0x9BC2, info), \
> -	INTEL_VGA_DEVICE(0x9BC4, info), \
> -	INTEL_VGA_DEVICE(0x9BC5, info), \
> -	INTEL_VGA_DEVICE(0x9BC6, info), \
> -	INTEL_VGA_DEVICE(0x9BC8, info), \
> -	INTEL_VGA_DEVICE(0x9BE6, info), \
> -	INTEL_VGA_DEVICE(0x9BF6, info)
> -
> -#define INTEL_CML_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x9B41, info), \
> -	INTEL_VGA_DEVICE(0x9BCA, info), \
> -	INTEL_VGA_DEVICE(0x9BCC, info)
> -
> -#define INTEL_CML_IDS(info) \
> -	INTEL_CML_GT1_IDS(info), \
> -	INTEL_CML_GT2_IDS(info), \
> -	INTEL_CML_U_GT1_IDS(info), \
> -	INTEL_CML_U_GT2_IDS(info)
> -
> -#define INTEL_KBL_IDS(info) \
> -	INTEL_KBL_GT1_IDS(info), \
> -	INTEL_KBL_GT2_IDS(info), \
> -	INTEL_KBL_GT3_IDS(info), \
> -	INTEL_KBL_GT4_IDS(info), \
> -	INTEL_AML_KBL_GT2_IDS(info)
> +#define INTEL_CML_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x9BC2, ## __VA_ARGS__), \
> +	MACRO__(0x9BC4, ## __VA_ARGS__), \
> +	MACRO__(0x9BC5, ## __VA_ARGS__), \
> +	MACRO__(0x9BC6, ## __VA_ARGS__), \
> +	MACRO__(0x9BC8, ## __VA_ARGS__), \
> +	MACRO__(0x9BE6, ## __VA_ARGS__), \
> +	MACRO__(0x9BF6, ## __VA_ARGS__)
> +
> +#define INTEL_CML_U_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x9B41, ## __VA_ARGS__), \
> +	MACRO__(0x9BCA, ## __VA_ARGS__), \
> +	MACRO__(0x9BCC, ## __VA_ARGS__)
> +
> +#define INTEL_CML_IDS(MACRO__, ...) \
> +	INTEL_CML_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CML_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CML_U_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CML_U_GT2_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_KBL_IDS(MACRO__, ...) \
> +	INTEL_KBL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_KBL_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_KBL_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_KBL_GT4_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_AML_KBL_GT2_IDS(MACRO__, ## __VA_ARGS__)
>  
>  /* CFL S */
> -#define INTEL_CFL_S_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
> -	INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
> -	INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */
> -
> -#define INTEL_CFL_S_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
> +#define INTEL_CFL_S_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x3E90, ## __VA_ARGS__), /* SRV GT1 */ \
> +	MACRO__(0x3E93, ## __VA_ARGS__), /* SRV GT1 */ \
> +	MACRO__(0x3E99, ## __VA_ARGS__)  /* SRV GT1 */
> +
> +#define INTEL_CFL_S_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x3E91, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x3E92, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x3E96, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x3E98, ## __VA_ARGS__), /* SRV GT2 */ \
> +	MACRO__(0x3E9A, ## __VA_ARGS__)  /* SRV GT2 */
>  
>  /* CFL H */
> -#define INTEL_CFL_H_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3E9C, info)
> +#define INTEL_CFL_H_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x3E9C, ## __VA_ARGS__)
>  
> -#define INTEL_CFL_H_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3E94, info),  /* Halo GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */
> +#define INTEL_CFL_H_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x3E94, ## __VA_ARGS__),  /* Halo GT2 */ \
> +	MACRO__(0x3E9B, ## __VA_ARGS__) /* Halo GT2 */
>  
>  /* CFL U GT2 */
> -#define INTEL_CFL_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA9, info)
> +#define INTEL_CFL_U_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x3EA9, ## __VA_ARGS__)
>  
>  /* CFL U GT3 */
> -#define INTEL_CFL_U_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
> -
> -#define INTEL_CFL_IDS(info)	   \
> -	INTEL_CFL_S_GT1_IDS(info), \
> -	INTEL_CFL_S_GT2_IDS(info), \
> -	INTEL_CFL_H_GT1_IDS(info), \
> -	INTEL_CFL_H_GT2_IDS(info), \
> -	INTEL_CFL_U_GT2_IDS(info), \
> -	INTEL_CFL_U_GT3_IDS(info), \
> -	INTEL_AML_CFL_GT2_IDS(info)
> +#define INTEL_CFL_U_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x3EA5, ## __VA_ARGS__), /* ULT GT3 */ \
> +	MACRO__(0x3EA6, ## __VA_ARGS__), /* ULT GT3 */ \
> +	MACRO__(0x3EA7, ## __VA_ARGS__), /* ULT GT3 */ \
> +	MACRO__(0x3EA8, ## __VA_ARGS__)  /* ULT GT3 */
> +
> +#define INTEL_CFL_IDS(MACRO__, ...) \
> +	INTEL_CFL_S_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CFL_S_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CFL_H_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CFL_H_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CFL_U_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_CFL_U_GT3_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_AML_CFL_GT2_IDS(MACRO__, ## __VA_ARGS__)
>  
>  /* WHL/CFL U GT1 */
> -#define INTEL_WHL_U_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA1, info), \
> -	INTEL_VGA_DEVICE(0x3EA4, info)
> +#define INTEL_WHL_U_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x3EA1, ## __VA_ARGS__), \
> +	MACRO__(0x3EA4, ## __VA_ARGS__)
>  
>  /* WHL/CFL U GT2 */
> -#define INTEL_WHL_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA0, info), \
> -	INTEL_VGA_DEVICE(0x3EA3, info)
> +#define INTEL_WHL_U_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x3EA0, ## __VA_ARGS__), \
> +	MACRO__(0x3EA3, ## __VA_ARGS__)
>  
>  /* WHL/CFL U GT3 */
> -#define INTEL_WHL_U_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA2, info)
> +#define INTEL_WHL_U_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x3EA2, ## __VA_ARGS__)
>  
> -#define INTEL_WHL_IDS(info) \
> -	INTEL_WHL_U_GT1_IDS(info), \
> -	INTEL_WHL_U_GT2_IDS(info), \
> -	INTEL_WHL_U_GT3_IDS(info)
> +#define INTEL_WHL_IDS(MACRO__, ...) \
> +	INTEL_WHL_U_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_WHL_U_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_WHL_U_GT3_IDS(MACRO__, ## __VA_ARGS__)
>  
>  /* CNL */
> -#define INTEL_CNL_PORT_F_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5A44, info), \
> -	INTEL_VGA_DEVICE(0x5A4C, info), \
> -	INTEL_VGA_DEVICE(0x5A54, info), \
> -	INTEL_VGA_DEVICE(0x5A5C, info)
> -
> -#define INTEL_CNL_IDS(info) \
> -	INTEL_CNL_PORT_F_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5A40, info), \
> -	INTEL_VGA_DEVICE(0x5A41, info), \
> -	INTEL_VGA_DEVICE(0x5A42, info), \
> -	INTEL_VGA_DEVICE(0x5A49, info), \
> -	INTEL_VGA_DEVICE(0x5A4A, info), \
> -	INTEL_VGA_DEVICE(0x5A50, info), \
> -	INTEL_VGA_DEVICE(0x5A51, info), \
> -	INTEL_VGA_DEVICE(0x5A52, info), \
> -	INTEL_VGA_DEVICE(0x5A59, info), \
> -	INTEL_VGA_DEVICE(0x5A5A, info)
> +#define INTEL_CNL_PORT_F_IDS(MACRO__, ...) \
> +	MACRO__(0x5A44, ## __VA_ARGS__), \
> +	MACRO__(0x5A4C, ## __VA_ARGS__), \
> +	MACRO__(0x5A54, ## __VA_ARGS__), \
> +	MACRO__(0x5A5C, ## __VA_ARGS__)
> +
> +#define INTEL_CNL_IDS(MACRO__, ...) \
> +	INTEL_CNL_PORT_F_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x5A40, ## __VA_ARGS__), \
> +	MACRO__(0x5A41, ## __VA_ARGS__), \
> +	MACRO__(0x5A42, ## __VA_ARGS__), \
> +	MACRO__(0x5A49, ## __VA_ARGS__), \
> +	MACRO__(0x5A4A, ## __VA_ARGS__), \
> +	MACRO__(0x5A50, ## __VA_ARGS__), \
> +	MACRO__(0x5A51, ## __VA_ARGS__), \
> +	MACRO__(0x5A52, ## __VA_ARGS__), \
> +	MACRO__(0x5A59, ## __VA_ARGS__), \
> +	MACRO__(0x5A5A, ## __VA_ARGS__)
>  
>  /* ICL */
> -#define INTEL_ICL_PORT_F_IDS(info) \
> -	INTEL_VGA_DEVICE(0x8A50, info), \
> -	INTEL_VGA_DEVICE(0x8A52, info), \
> -	INTEL_VGA_DEVICE(0x8A53, info), \
> -	INTEL_VGA_DEVICE(0x8A54, info), \
> -	INTEL_VGA_DEVICE(0x8A56, info), \
> -	INTEL_VGA_DEVICE(0x8A57, info), \
> -	INTEL_VGA_DEVICE(0x8A58, info),	\
> -	INTEL_VGA_DEVICE(0x8A59, info),	\
> -	INTEL_VGA_DEVICE(0x8A5A, info), \
> -	INTEL_VGA_DEVICE(0x8A5B, info), \
> -	INTEL_VGA_DEVICE(0x8A5C, info), \
> -	INTEL_VGA_DEVICE(0x8A70, info), \
> -	INTEL_VGA_DEVICE(0x8A71, info)
> -
> -#define INTEL_ICL_IDS(info) \
> -	INTEL_ICL_PORT_F_IDS(info), \
> -	INTEL_VGA_DEVICE(0x8A51, info), \
> -	INTEL_VGA_DEVICE(0x8A5D, info)
> +#define INTEL_ICL_PORT_F_IDS(MACRO__, ...) \
> +	MACRO__(0x8A50, ## __VA_ARGS__), \
> +	MACRO__(0x8A52, ## __VA_ARGS__), \
> +	MACRO__(0x8A53, ## __VA_ARGS__), \
> +	MACRO__(0x8A54, ## __VA_ARGS__), \
> +	MACRO__(0x8A56, ## __VA_ARGS__), \
> +	MACRO__(0x8A57, ## __VA_ARGS__), \
> +	MACRO__(0x8A58, ## __VA_ARGS__), \
> +	MACRO__(0x8A59, ## __VA_ARGS__), \
> +	MACRO__(0x8A5A, ## __VA_ARGS__), \
> +	MACRO__(0x8A5B, ## __VA_ARGS__), \
> +	MACRO__(0x8A5C, ## __VA_ARGS__), \
> +	MACRO__(0x8A70, ## __VA_ARGS__), \
> +	MACRO__(0x8A71, ## __VA_ARGS__)
> +
> +#define INTEL_ICL_IDS(MACRO__, ...) \
> +	INTEL_ICL_PORT_F_IDS(MACRO__, ## __VA_ARGS__), \
> +	MACRO__(0x8A51, ## __VA_ARGS__), \
> +	MACRO__(0x8A5D, ## __VA_ARGS__)
>  
>  /* EHL */
> -#define INTEL_EHL_IDS(info) \
> -	INTEL_VGA_DEVICE(0x4541, info), \
> -	INTEL_VGA_DEVICE(0x4551, info), \
> -	INTEL_VGA_DEVICE(0x4555, info), \
> -	INTEL_VGA_DEVICE(0x4557, info), \
> -	INTEL_VGA_DEVICE(0x4570, info), \
> -	INTEL_VGA_DEVICE(0x4571, info)
> +#define INTEL_EHL_IDS(MACRO__, ...) \
> +	MACRO__(0x4541, ## __VA_ARGS__), \
> +	MACRO__(0x4551, ## __VA_ARGS__), \
> +	MACRO__(0x4555, ## __VA_ARGS__), \
> +	MACRO__(0x4557, ## __VA_ARGS__), \
> +	MACRO__(0x4570, ## __VA_ARGS__), \
> +	MACRO__(0x4571, ## __VA_ARGS__)
>  
>  /* JSL */
> -#define INTEL_JSL_IDS(info) \
> -	INTEL_VGA_DEVICE(0x4E51, info), \
> -	INTEL_VGA_DEVICE(0x4E55, info), \
> -	INTEL_VGA_DEVICE(0x4E57, info), \
> -	INTEL_VGA_DEVICE(0x4E61, info), \
> -	INTEL_VGA_DEVICE(0x4E71, info)
> +#define INTEL_JSL_IDS(MACRO__, ...) \
> +	MACRO__(0x4E51, ## __VA_ARGS__), \
> +	MACRO__(0x4E55, ## __VA_ARGS__), \
> +	MACRO__(0x4E57, ## __VA_ARGS__), \
> +	MACRO__(0x4E61, ## __VA_ARGS__), \
> +	MACRO__(0x4E71, ## __VA_ARGS__)
>  
>  /* TGL */
> -#define INTEL_TGL_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x9A60, info), \
> -	INTEL_VGA_DEVICE(0x9A68, info), \
> -	INTEL_VGA_DEVICE(0x9A70, info)
> -
> -#define INTEL_TGL_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x9A40, info), \
> -	INTEL_VGA_DEVICE(0x9A49, info), \
> -	INTEL_VGA_DEVICE(0x9A59, info), \
> -	INTEL_VGA_DEVICE(0x9A78, info), \
> -	INTEL_VGA_DEVICE(0x9AC0, info), \
> -	INTEL_VGA_DEVICE(0x9AC9, info), \
> -	INTEL_VGA_DEVICE(0x9AD9, info), \
> -	INTEL_VGA_DEVICE(0x9AF8, info)
> -
> -#define INTEL_TGL_IDS(info) \
> -	INTEL_TGL_GT1_IDS(info), \
> -	INTEL_TGL_GT2_IDS(info)
> +#define INTEL_TGL_GT1_IDS(MACRO__, ...) \
> +	MACRO__(0x9A60, ## __VA_ARGS__), \
> +	MACRO__(0x9A68, ## __VA_ARGS__), \
> +	MACRO__(0x9A70, ## __VA_ARGS__)
> +
> +#define INTEL_TGL_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x9A40, ## __VA_ARGS__), \
> +	MACRO__(0x9A49, ## __VA_ARGS__), \
> +	MACRO__(0x9A59, ## __VA_ARGS__), \
> +	MACRO__(0x9A78, ## __VA_ARGS__), \
> +	MACRO__(0x9AC0, ## __VA_ARGS__), \
> +	MACRO__(0x9AC9, ## __VA_ARGS__), \
> +	MACRO__(0x9AD9, ## __VA_ARGS__), \
> +	MACRO__(0x9AF8, ## __VA_ARGS__)
> +
> +#define INTEL_TGL_IDS(MACRO__, ...) \
> +	INTEL_TGL_GT1_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_TGL_GT2_IDS(MACRO__, ## __VA_ARGS__)
>  
>  /* RKL */
> -#define INTEL_RKL_IDS(info) \
> -	INTEL_VGA_DEVICE(0x4C80, info), \
> -	INTEL_VGA_DEVICE(0x4C8A, info), \
> -	INTEL_VGA_DEVICE(0x4C8B, info), \
> -	INTEL_VGA_DEVICE(0x4C8C, info), \
> -	INTEL_VGA_DEVICE(0x4C90, info), \
> -	INTEL_VGA_DEVICE(0x4C9A, info)
> +#define INTEL_RKL_IDS(MACRO__, ...) \
> +	MACRO__(0x4C80, ## __VA_ARGS__), \
> +	MACRO__(0x4C8A, ## __VA_ARGS__), \
> +	MACRO__(0x4C8B, ## __VA_ARGS__), \
> +	MACRO__(0x4C8C, ## __VA_ARGS__), \
> +	MACRO__(0x4C90, ## __VA_ARGS__), \
> +	MACRO__(0x4C9A, ## __VA_ARGS__)
>  
>  /* DG1 */
> -#define INTEL_DG1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x4905, info), \
> -	INTEL_VGA_DEVICE(0x4906, info), \
> -	INTEL_VGA_DEVICE(0x4907, info), \
> -	INTEL_VGA_DEVICE(0x4908, info), \
> -	INTEL_VGA_DEVICE(0x4909, info)
> +#define INTEL_DG1_IDS(MACRO__, ...) \
> +	MACRO__(0x4905, ## __VA_ARGS__), \
> +	MACRO__(0x4906, ## __VA_ARGS__), \
> +	MACRO__(0x4907, ## __VA_ARGS__), \
> +	MACRO__(0x4908, ## __VA_ARGS__), \
> +	MACRO__(0x4909, ## __VA_ARGS__)
>  
>  /* ADL-S */
> -#define INTEL_ADLS_IDS(info) \
> -	INTEL_VGA_DEVICE(0x4680, info), \
> -	INTEL_VGA_DEVICE(0x4682, info), \
> -	INTEL_VGA_DEVICE(0x4688, info), \
> -	INTEL_VGA_DEVICE(0x468A, info), \
> -	INTEL_VGA_DEVICE(0x468B, info), \
> -	INTEL_VGA_DEVICE(0x4690, info), \
> -	INTEL_VGA_DEVICE(0x4692, info), \
> -	INTEL_VGA_DEVICE(0x4693, info)
> +#define INTEL_ADLS_IDS(MACRO__, ...) \
> +	MACRO__(0x4680, ## __VA_ARGS__), \
> +	MACRO__(0x4682, ## __VA_ARGS__), \
> +	MACRO__(0x4688, ## __VA_ARGS__), \
> +	MACRO__(0x468A, ## __VA_ARGS__), \
> +	MACRO__(0x468B, ## __VA_ARGS__), \
> +	MACRO__(0x4690, ## __VA_ARGS__), \
> +	MACRO__(0x4692, ## __VA_ARGS__), \
> +	MACRO__(0x4693, ## __VA_ARGS__)
>  
>  /* ADL-P */
> -#define INTEL_ADLP_IDS(info) \
> -	INTEL_VGA_DEVICE(0x46A0, info), \
> -	INTEL_VGA_DEVICE(0x46A1, info), \
> -	INTEL_VGA_DEVICE(0x46A2, info), \
> -	INTEL_VGA_DEVICE(0x46A3, info), \
> -	INTEL_VGA_DEVICE(0x46A6, info), \
> -	INTEL_VGA_DEVICE(0x46A8, info), \
> -	INTEL_VGA_DEVICE(0x46AA, info), \
> -	INTEL_VGA_DEVICE(0x462A, info), \
> -	INTEL_VGA_DEVICE(0x4626, info), \
> -	INTEL_VGA_DEVICE(0x4628, info), \
> -	INTEL_VGA_DEVICE(0x46B0, info), \
> -	INTEL_VGA_DEVICE(0x46B1, info), \
> -	INTEL_VGA_DEVICE(0x46B2, info), \
> -	INTEL_VGA_DEVICE(0x46B3, info), \
> -	INTEL_VGA_DEVICE(0x46C0, info), \
> -	INTEL_VGA_DEVICE(0x46C1, info), \
> -	INTEL_VGA_DEVICE(0x46C2, info), \
> -	INTEL_VGA_DEVICE(0x46C3, info)
> +#define INTEL_ADLP_IDS(MACRO__, ...) \
> +	MACRO__(0x46A0, ## __VA_ARGS__), \
> +	MACRO__(0x46A1, ## __VA_ARGS__), \
> +	MACRO__(0x46A2, ## __VA_ARGS__), \
> +	MACRO__(0x46A3, ## __VA_ARGS__), \
> +	MACRO__(0x46A6, ## __VA_ARGS__), \
> +	MACRO__(0x46A8, ## __VA_ARGS__), \
> +	MACRO__(0x46AA, ## __VA_ARGS__), \
> +	MACRO__(0x462A, ## __VA_ARGS__), \
> +	MACRO__(0x4626, ## __VA_ARGS__), \
> +	MACRO__(0x4628, ## __VA_ARGS__), \
> +	MACRO__(0x46B0, ## __VA_ARGS__), \
> +	MACRO__(0x46B1, ## __VA_ARGS__), \
> +	MACRO__(0x46B2, ## __VA_ARGS__), \
> +	MACRO__(0x46B3, ## __VA_ARGS__), \
> +	MACRO__(0x46C0, ## __VA_ARGS__), \
> +	MACRO__(0x46C1, ## __VA_ARGS__), \
> +	MACRO__(0x46C2, ## __VA_ARGS__), \
> +	MACRO__(0x46C3, ## __VA_ARGS__)
>  
>  /* ADL-N */
> -#define INTEL_ADLN_IDS(info) \
> -	INTEL_VGA_DEVICE(0x46D0, info), \
> -	INTEL_VGA_DEVICE(0x46D1, info), \
> -	INTEL_VGA_DEVICE(0x46D2, info), \
> -	INTEL_VGA_DEVICE(0x46D3, info), \
> -	INTEL_VGA_DEVICE(0x46D4, info)
> +#define INTEL_ADLN_IDS(MACRO__, ...) \
> +	MACRO__(0x46D0, ## __VA_ARGS__), \
> +	MACRO__(0x46D1, ## __VA_ARGS__), \
> +	MACRO__(0x46D2, ## __VA_ARGS__), \
> +	MACRO__(0x46D3, ## __VA_ARGS__), \
> +	MACRO__(0x46D4, ## __VA_ARGS__)
>  
>  /* RPL-S */
> -#define INTEL_RPLS_IDS(info) \
> -	INTEL_VGA_DEVICE(0xA780, info), \
> -	INTEL_VGA_DEVICE(0xA781, info), \
> -	INTEL_VGA_DEVICE(0xA782, info), \
> -	INTEL_VGA_DEVICE(0xA783, info), \
> -	INTEL_VGA_DEVICE(0xA788, info), \
> -	INTEL_VGA_DEVICE(0xA789, info), \
> -	INTEL_VGA_DEVICE(0xA78A, info), \
> -	INTEL_VGA_DEVICE(0xA78B, info)
> +#define INTEL_RPLS_IDS(MACRO__, ...) \
> +	MACRO__(0xA780, ## __VA_ARGS__), \
> +	MACRO__(0xA781, ## __VA_ARGS__), \
> +	MACRO__(0xA782, ## __VA_ARGS__), \
> +	MACRO__(0xA783, ## __VA_ARGS__), \
> +	MACRO__(0xA788, ## __VA_ARGS__), \
> +	MACRO__(0xA789, ## __VA_ARGS__), \
> +	MACRO__(0xA78A, ## __VA_ARGS__), \
> +	MACRO__(0xA78B, ## __VA_ARGS__)
>  
>  /* RPL-U */
> -#define INTEL_RPLU_IDS(info) \
> -	INTEL_VGA_DEVICE(0xA721, info), \
> -	INTEL_VGA_DEVICE(0xA7A1, info), \
> -	INTEL_VGA_DEVICE(0xA7A9, info), \
> -	INTEL_VGA_DEVICE(0xA7AC, info), \
> -	INTEL_VGA_DEVICE(0xA7AD, info)
> +#define INTEL_RPLU_IDS(MACRO__, ...) \
> +	MACRO__(0xA721, ## __VA_ARGS__), \
> +	MACRO__(0xA7A1, ## __VA_ARGS__), \
> +	MACRO__(0xA7A9, ## __VA_ARGS__), \
> +	MACRO__(0xA7AC, ## __VA_ARGS__), \
> +	MACRO__(0xA7AD, ## __VA_ARGS__)
>  
>  /* RPL-P */
> -#define INTEL_RPLP_IDS(info) \
> -	INTEL_VGA_DEVICE(0xA720, info), \
> -	INTEL_VGA_DEVICE(0xA7A0, info), \
> -	INTEL_VGA_DEVICE(0xA7A8, info), \
> -	INTEL_VGA_DEVICE(0xA7AA, info), \
> -	INTEL_VGA_DEVICE(0xA7AB, info)
> +#define INTEL_RPLP_IDS(MACRO__, ...) \
> +	MACRO__(0xA720, ## __VA_ARGS__), \
> +	MACRO__(0xA7A0, ## __VA_ARGS__), \
> +	MACRO__(0xA7A8, ## __VA_ARGS__), \
> +	MACRO__(0xA7AA, ## __VA_ARGS__), \
> +	MACRO__(0xA7AB, ## __VA_ARGS__)
>  
>  /* DG2 */
> -#define INTEL_DG2_G10_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5690, info), \
> -	INTEL_VGA_DEVICE(0x5691, info), \
> -	INTEL_VGA_DEVICE(0x5692, info), \
> -	INTEL_VGA_DEVICE(0x56A0, info), \
> -	INTEL_VGA_DEVICE(0x56A1, info), \
> -	INTEL_VGA_DEVICE(0x56A2, info), \
> -	INTEL_VGA_DEVICE(0x56BE, info), \
> -	INTEL_VGA_DEVICE(0x56BF, info)
> -
> -#define INTEL_DG2_G11_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5693, info), \
> -	INTEL_VGA_DEVICE(0x5694, info), \
> -	INTEL_VGA_DEVICE(0x5695, info), \
> -	INTEL_VGA_DEVICE(0x56A5, info), \
> -	INTEL_VGA_DEVICE(0x56A6, info), \
> -	INTEL_VGA_DEVICE(0x56B0, info), \
> -	INTEL_VGA_DEVICE(0x56B1, info), \
> -	INTEL_VGA_DEVICE(0x56BA, info), \
> -	INTEL_VGA_DEVICE(0x56BB, info), \
> -	INTEL_VGA_DEVICE(0x56BC, info), \
> -	INTEL_VGA_DEVICE(0x56BD, info)
> -
> -#define INTEL_DG2_G12_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5696, info), \
> -	INTEL_VGA_DEVICE(0x5697, info), \
> -	INTEL_VGA_DEVICE(0x56A3, info), \
> -	INTEL_VGA_DEVICE(0x56A4, info), \
> -	INTEL_VGA_DEVICE(0x56B2, info), \
> -	INTEL_VGA_DEVICE(0x56B3, info)
> -
> -#define INTEL_DG2_IDS(info) \
> -	INTEL_DG2_G10_IDS(info), \
> -	INTEL_DG2_G11_IDS(info), \
> -	INTEL_DG2_G12_IDS(info)
> -
> -#define INTEL_ATS_M150_IDS(info) \
> -	INTEL_VGA_DEVICE(0x56C0, info), \
> -	INTEL_VGA_DEVICE(0x56C2, info)
> -
> -#define INTEL_ATS_M75_IDS(info) \
> -	INTEL_VGA_DEVICE(0x56C1, info)
> -
> -#define INTEL_ATS_M_IDS(info) \
> -	INTEL_ATS_M150_IDS(info), \
> -	INTEL_ATS_M75_IDS(info)
> +#define INTEL_DG2_G10_IDS(MACRO__, ...) \
> +	MACRO__(0x5690, ## __VA_ARGS__), \
> +	MACRO__(0x5691, ## __VA_ARGS__), \
> +	MACRO__(0x5692, ## __VA_ARGS__), \
> +	MACRO__(0x56A0, ## __VA_ARGS__), \
> +	MACRO__(0x56A1, ## __VA_ARGS__), \
> +	MACRO__(0x56A2, ## __VA_ARGS__), \
> +	MACRO__(0x56BE, ## __VA_ARGS__), \
> +	MACRO__(0x56BF, ## __VA_ARGS__)
> +
> +#define INTEL_DG2_G11_IDS(MACRO__, ...) \
> +	MACRO__(0x5693, ## __VA_ARGS__), \
> +	MACRO__(0x5694, ## __VA_ARGS__), \
> +	MACRO__(0x5695, ## __VA_ARGS__), \
> +	MACRO__(0x56A5, ## __VA_ARGS__), \
> +	MACRO__(0x56A6, ## __VA_ARGS__), \
> +	MACRO__(0x56B0, ## __VA_ARGS__), \
> +	MACRO__(0x56B1, ## __VA_ARGS__), \
> +	MACRO__(0x56BA, ## __VA_ARGS__), \
> +	MACRO__(0x56BB, ## __VA_ARGS__), \
> +	MACRO__(0x56BC, ## __VA_ARGS__), \
> +	MACRO__(0x56BD, ## __VA_ARGS__)
> +
> +#define INTEL_DG2_G12_IDS(MACRO__, ...) \
> +	MACRO__(0x5696, ## __VA_ARGS__), \
> +	MACRO__(0x5697, ## __VA_ARGS__), \
> +	MACRO__(0x56A3, ## __VA_ARGS__), \
> +	MACRO__(0x56A4, ## __VA_ARGS__), \
> +	MACRO__(0x56B2, ## __VA_ARGS__), \
> +	MACRO__(0x56B3, ## __VA_ARGS__)
> +
> +#define INTEL_DG2_IDS(MACRO__, ...) \
> +	INTEL_DG2_G10_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_DG2_G11_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_DG2_G12_IDS(MACRO__, ## __VA_ARGS__)
> +
> +#define INTEL_ATS_M150_IDS(MACRO__, ...) \
> +	MACRO__(0x56C0, ## __VA_ARGS__), \
> +	MACRO__(0x56C2, ## __VA_ARGS__)
> +
> +#define INTEL_ATS_M75_IDS(MACRO__, ...) \
> +	MACRO__(0x56C1, ## __VA_ARGS__)
> +
> +#define INTEL_ATS_M_IDS(MACRO__, ...) \
> +	INTEL_ATS_M150_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
>  
>  /* MTL */
> -#define INTEL_MTL_IDS(info) \
> -	INTEL_VGA_DEVICE(0x7D40, info), \
> -	INTEL_VGA_DEVICE(0x7D41, info), \
> -	INTEL_VGA_DEVICE(0x7D45, info), \
> -	INTEL_VGA_DEVICE(0x7D51, info), \
> -	INTEL_VGA_DEVICE(0x7D55, info), \
> -	INTEL_VGA_DEVICE(0x7D60, info), \
> -	INTEL_VGA_DEVICE(0x7D67, info), \
> -	INTEL_VGA_DEVICE(0x7DD1, info), \
> -	INTEL_VGA_DEVICE(0x7DD5, info)
> +#define INTEL_MTL_IDS(MACRO__, ...) \
> +	MACRO__(0x7D40, ## __VA_ARGS__), \
> +	MACRO__(0x7D41, ## __VA_ARGS__), \
> +	MACRO__(0x7D45, ## __VA_ARGS__), \
> +	MACRO__(0x7D51, ## __VA_ARGS__), \
> +	MACRO__(0x7D55, ## __VA_ARGS__), \
> +	MACRO__(0x7D60, ## __VA_ARGS__), \
> +	MACRO__(0x7D67, ## __VA_ARGS__), \
> +	MACRO__(0x7DD1, ## __VA_ARGS__), \
> +	MACRO__(0x7DD5, ## __VA_ARGS__)
>  
>  #endif /* _I915_PCIIDS_H */
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 4d05307ce3d7..30aca2abd7be 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -516,106 +516,106 @@ static const struct intel_device_info intel_lunarlake_info = {
>  };
>  
>  static const struct pci_id_match intel_device_match[] = {
> -	INTEL_I810_IDS(&intel_i810_info),
> -	INTEL_I815_IDS(&intel_i815_info),
> +	INTEL_I810_IDS(INTEL_VGA_DEVICE, &intel_i810_info),
> +	INTEL_I815_IDS(INTEL_VGA_DEVICE, &intel_i815_info),
>  
> -	INTEL_I830_IDS(&intel_i830_info),
> -	INTEL_I845G_IDS(&intel_i845_info),
> -	INTEL_I85X_IDS(&intel_i855_info),
> -	INTEL_I865G_IDS(&intel_i865_info),
> +	INTEL_I830_IDS(INTEL_VGA_DEVICE, &intel_i830_info),
> +	INTEL_I845G_IDS(INTEL_VGA_DEVICE, &intel_i845_info),
> +	INTEL_I85X_IDS(INTEL_VGA_DEVICE, &intel_i855_info),
> +	INTEL_I865G_IDS(INTEL_VGA_DEVICE, &intel_i865_info),
>  
> -	INTEL_I915G_IDS(&intel_i915_info),
> -	INTEL_I915GM_IDS(&intel_i915m_info),
> -	INTEL_I945G_IDS(&intel_i945_info),
> -	INTEL_I945GM_IDS(&intel_i945m_info),
> +	INTEL_I915G_IDS(INTEL_VGA_DEVICE, &intel_i915_info),
> +	INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &intel_i915m_info),
> +	INTEL_I945G_IDS(INTEL_VGA_DEVICE, &intel_i945_info),
> +	INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &intel_i945m_info),
>  
> -	INTEL_G33_IDS(&intel_g33_info),
> -	INTEL_PNV_G_IDS(&intel_pineview_g_info),
> -	INTEL_PNV_M_IDS(&intel_pineview_m_info),
> +	INTEL_G33_IDS(INTEL_VGA_DEVICE, &intel_g33_info),
> +	INTEL_PNV_G_IDS(INTEL_VGA_DEVICE, &intel_pineview_g_info),
> +	INTEL_PNV_M_IDS(INTEL_VGA_DEVICE, &intel_pineview_m_info),
>  
> -	INTEL_I965G_IDS(&intel_i965_info),
> -	INTEL_I965GM_IDS(&intel_i965m_info),
> +	INTEL_I965G_IDS(INTEL_VGA_DEVICE, &intel_i965_info),
> +	INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &intel_i965m_info),
>  
> -	INTEL_G45_IDS(&intel_g45_info),
> -	INTEL_GM45_IDS(&intel_gm45_info),
> +	INTEL_G45_IDS(INTEL_VGA_DEVICE, &intel_g45_info),
> +	INTEL_GM45_IDS(INTEL_VGA_DEVICE, &intel_gm45_info),
>  
> -	INTEL_ILK_D_IDS(&intel_ironlake_info),
> -	INTEL_ILK_M_IDS(&intel_ironlake_m_info),
> +	INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &intel_ironlake_info),
> +	INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &intel_ironlake_m_info),
>  
> -	INTEL_SNB_D_IDS(&intel_sandybridge_info),
> -	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),
> +	INTEL_SNB_D_IDS(INTEL_VGA_DEVICE, &intel_sandybridge_info),
> +	INTEL_SNB_M_IDS(INTEL_VGA_DEVICE, &intel_sandybridge_m_info),
>  
> -	INTEL_IVB_D_IDS(&intel_ivybridge_info),
> -	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),
> +	INTEL_IVB_D_IDS(INTEL_VGA_DEVICE, &intel_ivybridge_info),
> +	INTEL_IVB_M_IDS(INTEL_VGA_DEVICE, &intel_ivybridge_m_info),
>  
> -	INTEL_HSW_GT1_IDS(&intel_haswell_gt1_info),
> -	INTEL_HSW_GT2_IDS(&intel_haswell_gt2_info),
> -	INTEL_HSW_GT3_IDS(&intel_haswell_gt3_info),
> +	INTEL_HSW_GT1_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt1_info),
> +	INTEL_HSW_GT2_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt2_info),
> +	INTEL_HSW_GT3_IDS(INTEL_VGA_DEVICE, &intel_haswell_gt3_info),
>  
> -	INTEL_VLV_IDS(&intel_valleyview_info),
> +	INTEL_VLV_IDS(INTEL_VGA_DEVICE, &intel_valleyview_info),
>  
> -	INTEL_BDW_GT1_IDS(&intel_broadwell_gt1_info),
> -	INTEL_BDW_GT2_IDS(&intel_broadwell_gt2_info),
> -	INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info),
> -	INTEL_BDW_RSVD_IDS(&intel_broadwell_unknown_info),
> +	INTEL_BDW_GT1_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt1_info),
> +	INTEL_BDW_GT2_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt2_info),
> +	INTEL_BDW_GT3_IDS(INTEL_VGA_DEVICE, &intel_broadwell_gt3_info),
> +	INTEL_BDW_RSVD_IDS(INTEL_VGA_DEVICE, &intel_broadwell_unknown_info),
>  
> -	INTEL_CHV_IDS(&intel_cherryview_info),
> +	INTEL_CHV_IDS(INTEL_VGA_DEVICE, &intel_cherryview_info),
>  
> -	INTEL_SKL_GT1_IDS(&intel_skylake_gt1_info),
> -	INTEL_SKL_GT2_IDS(&intel_skylake_gt2_info),
> -	INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info),
> -	INTEL_SKL_GT4_IDS(&intel_skylake_gt4_info),
> +	INTEL_SKL_GT1_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt1_info),
> +	INTEL_SKL_GT2_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt2_info),
> +	INTEL_SKL_GT3_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt3_info),
> +	INTEL_SKL_GT4_IDS(INTEL_VGA_DEVICE, &intel_skylake_gt4_info),
>  
> -	INTEL_BXT_IDS(&intel_broxton_info),
> +	INTEL_BXT_IDS(INTEL_VGA_DEVICE, &intel_broxton_info),
>  
> -	INTEL_KBL_GT1_IDS(&intel_kabylake_gt1_info),
> -	INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
> -	INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
> -	INTEL_KBL_GT4_IDS(&intel_kabylake_gt4_info),
> -	INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
> +	INTEL_KBL_GT1_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt1_info),
> +	INTEL_KBL_GT2_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt2_info),
> +	INTEL_KBL_GT3_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt3_info),
> +	INTEL_KBL_GT4_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt4_info),
> +	INTEL_AML_KBL_GT2_IDS(INTEL_VGA_DEVICE, &intel_kabylake_gt2_info),
>  
> -	INTEL_GLK_IDS(&intel_geminilake_info),
> +	INTEL_GLK_IDS(INTEL_VGA_DEVICE, &intel_geminilake_info),
>  
> -	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
> -	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_CFL_H_GT1_IDS(&intel_coffeelake_gt1_info),
> -	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> -	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> -	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> -	INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
> +	INTEL_CFL_S_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
> +	INTEL_CFL_S_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
> +	INTEL_CFL_H_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
> +	INTEL_CFL_H_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
> +	INTEL_CFL_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
> +	INTEL_CFL_U_GT3_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt3_info),
> +	INTEL_WHL_U_GT1_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt1_info),
> +	INTEL_WHL_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
> +	INTEL_WHL_U_GT3_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt3_info),
> +	INTEL_AML_CFL_GT2_IDS(INTEL_VGA_DEVICE, &intel_coffeelake_gt2_info),
>  
> -	INTEL_CML_GT1_IDS(&intel_cometlake_gt1_info),
> -	INTEL_CML_GT2_IDS(&intel_cometlake_gt2_info),
> -	INTEL_CML_U_GT1_IDS(&intel_cometlake_gt1_info),
> -	INTEL_CML_U_GT2_IDS(&intel_cometlake_gt2_info),
> +	INTEL_CML_GT1_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt1_info),
> +	INTEL_CML_GT2_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt2_info),
> +	INTEL_CML_U_GT1_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt1_info),
> +	INTEL_CML_U_GT2_IDS(INTEL_VGA_DEVICE, &intel_cometlake_gt2_info),
>  
> -	INTEL_CNL_IDS(&intel_cannonlake_info),
> +	INTEL_CNL_IDS(INTEL_VGA_DEVICE, &intel_cannonlake_info),
>  
> -	INTEL_ICL_IDS(&intel_icelake_info),
> +	INTEL_ICL_IDS(INTEL_VGA_DEVICE, &intel_icelake_info),
>  
> -	INTEL_EHL_IDS(&intel_elkhartlake_info),
> -	INTEL_JSL_IDS(&intel_jasperlake_info),
> +	INTEL_EHL_IDS(INTEL_VGA_DEVICE, &intel_elkhartlake_info),
> +	INTEL_JSL_IDS(INTEL_VGA_DEVICE, &intel_jasperlake_info),
>  
> -	INTEL_TGL_GT1_IDS(&intel_tigerlake_gt1_info),
> -	INTEL_TGL_GT2_IDS(&intel_tigerlake_gt2_info),
> -	INTEL_RKL_IDS(&intel_rocketlake_info),
> +	INTEL_TGL_GT1_IDS(INTEL_VGA_DEVICE, &intel_tigerlake_gt1_info),
> +	INTEL_TGL_GT2_IDS(INTEL_VGA_DEVICE, &intel_tigerlake_gt2_info),
> +	INTEL_RKL_IDS(INTEL_VGA_DEVICE, &intel_rocketlake_info),
>  
> -	INTEL_DG1_IDS(&intel_dg1_info),
> -	INTEL_DG2_IDS(&intel_dg2_info),
> +	INTEL_DG1_IDS(INTEL_VGA_DEVICE, &intel_dg1_info),
> +	INTEL_DG2_IDS(INTEL_VGA_DEVICE, &intel_dg2_info),
>  
> -	INTEL_ADLS_IDS(&intel_alderlake_s_info),
> -	INTEL_RPLS_IDS(&intel_raptorlake_s_info),
> -	INTEL_ADLP_IDS(&intel_alderlake_p_info),
> -	INTEL_RPLU_IDS(&intel_alderlake_p_info),
> -	INTEL_RPLP_IDS(&intel_alderlake_p_info),
> -	INTEL_ADLN_IDS(&intel_alderlake_n_info),
> +	INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &intel_alderlake_s_info),
> +	INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &intel_raptorlake_s_info),
> +	INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
> +	INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
> +	INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &intel_alderlake_p_info),
> +	INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &intel_alderlake_n_info),
>  
> -	INTEL_ATS_M_IDS(&intel_ats_m_info),
> +	INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &intel_ats_m_info),
>  
> -	INTEL_MTL_IDS(&intel_meteorlake_info),
> +	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
>  
>  	INTEL_PVC_IDS(&intel_pontevecchio_info),
>  
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 10/10] lib: switch i915_pciids_local.h to xe driver style PCI ID macros

[Rodrigo Vivi]

On Wed, May 22, 2024 at 01:35:23PM +0300, Jani Nikula wrote:
> Follow-up the kernel i915_pciids.h switching to xe driver style PCI ID
> macros, and do the same for i915_pciids_local.h. This is a clear
> improvement in the perf code, for example.

I'm confused now on why do we need this i915_pciids_local.h o.O
but anyway, the change is good and right:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  lib/i915/perf.c         | 12 +++--------
>  lib/i915_pciids_local.h | 44 ++++++++++++++++++++---------------------
>  lib/intel_device_info.c |  2 +-
>  3 files changed, 26 insertions(+), 32 deletions(-)
> 
> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
> index 4b00ba5de9d4..ee950b3c03e4 100644
> --- a/lib/i915/perf.c
> +++ b/lib/i915/perf.c
> @@ -204,13 +204,10 @@ is_acm_gt3(const struct intel_perf_devinfo *devinfo)
>  static bool
>  is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
>  {
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(_id, _info) _id
>  	static const uint32_t devids[] = {
> -		INTEL_MTL_M_IDS(NULL),
> -		INTEL_MTL_P_GT2_IDS(NULL),
> +		INTEL_MTL_M_IDS(ID),
> +		INTEL_MTL_P_GT2_IDS(ID),
>  	};
> -#undef INTEL_VGA_DEVICE
>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>  		if (devids[i] == devinfo->devid)
>  			return true;
> @@ -222,12 +219,9 @@ is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
>  static bool
>  is_mtl_gt3(const struct intel_perf_devinfo *devinfo)
>  {
> -#undef INTEL_VGA_DEVICE
> -#define INTEL_VGA_DEVICE(_id, _info) _id
>  	static const uint32_t devids[] = {
> -		INTEL_MTL_P_GT3_IDS(NULL),
> +		INTEL_MTL_P_GT3_IDS(ID),
>  	};
> -#undef INTEL_VGA_DEVICE
>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>  		if (devids[i] == devinfo->devid)
>  			return true;
> diff --git a/lib/i915_pciids_local.h b/lib/i915_pciids_local.h
> index 0043b0cd9b34..92879704aa8e 100644
> --- a/lib/i915_pciids_local.h
> +++ b/lib/i915_pciids_local.h
> @@ -9,41 +9,41 @@
>  
>  /* MTL perf */
>  #ifndef INTEL_MTL_M_IDS
> -#define INTEL_MTL_M_IDS(info) \
> -	INTEL_VGA_DEVICE(0x7D60, info), \
> -	INTEL_VGA_DEVICE(0x7D67, info)
> +#define INTEL_MTL_M_IDS(MACRO__, ...) \
> +	MACRO__(0x7D60, ## __VA_ARGS__), \
> +	MACRO__(0x7D67, ## __VA_ARGS__)
>  #endif
>  
>  #ifndef INTEL_MTL_P_GT2_IDS
> -#define INTEL_MTL_P_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x7D45, info)
> +#define INTEL_MTL_P_GT2_IDS(MACRO__, ...) \
> +	MACRO__(0x7D45, ## __VA_ARGS__)
>  #endif
>  
>  #ifndef INTEL_MTL_P_GT3_IDS
> -#define INTEL_MTL_P_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x7D55, info), \
> -	INTEL_VGA_DEVICE(0x7DD5, info)
> +#define INTEL_MTL_P_GT3_IDS(MACRO__, ...) \
> +	MACRO__(0x7D55, ## __VA_ARGS__), \
> +	MACRO__(0x7DD5, ## __VA_ARGS__)
>  #endif
>  
>  #ifndef INTEL_MTL_P_IDS
> -#define INTEL_MTL_P_IDS(info) \
> -	INTEL_MTL_P_GT2_IDS(info), \
> -	INTEL_MTL_P_GT3_IDS(info)
> +#define INTEL_MTL_P_IDS(MACRO__, ...) \
> +	INTEL_MTL_P_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> +	INTEL_MTL_P_GT3_IDS(MACRO__, ## __VA_ARGS__)
>  #endif
>  
>  /* PVC */
>  #ifndef INTEL_PVC_IDS
> -#define INTEL_PVC_IDS(info) \
> -	INTEL_VGA_DEVICE(0x0BD0, info), \
> -	INTEL_VGA_DEVICE(0x0BD1, info), \
> -	INTEL_VGA_DEVICE(0x0BD2, info), \
> -	INTEL_VGA_DEVICE(0x0BD5, info), \
> -	INTEL_VGA_DEVICE(0x0BD6, info), \
> -	INTEL_VGA_DEVICE(0x0BD7, info), \
> -	INTEL_VGA_DEVICE(0x0BD8, info), \
> -	INTEL_VGA_DEVICE(0x0BD9, info), \
> -	INTEL_VGA_DEVICE(0x0BDA, info), \
> -	INTEL_VGA_DEVICE(0x0BDB, info)
> +#define INTEL_PVC_IDS(MACRO__, ...) \
> +	MACRO__(0x0BD0, ## __VA_ARGS__), \
> +	MACRO__(0x0BD1, ## __VA_ARGS__), \
> +	MACRO__(0x0BD2, ## __VA_ARGS__), \
> +	MACRO__(0x0BD5, ## __VA_ARGS__), \
> +	MACRO__(0x0BD6, ## __VA_ARGS__), \
> +	MACRO__(0x0BD7, ## __VA_ARGS__), \
> +	MACRO__(0x0BD8, ## __VA_ARGS__), \
> +	MACRO__(0x0BD9, ## __VA_ARGS__), \
> +	MACRO__(0x0BDA, ## __VA_ARGS__), \
> +	MACRO__(0x0BDB, ## __VA_ARGS__)
>  #endif
>  
>  #endif /* _I915_PCIIDS_LOCAL_H */
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 30aca2abd7be..e80ea54707de 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -617,7 +617,7 @@ static const struct pci_id_match intel_device_match[] = {
>  
>  	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
>  
> -	INTEL_PVC_IDS(&intel_pontevecchio_info),
> +	INTEL_PVC_IDS(INTEL_VGA_DEVICE, &intel_pontevecchio_info),
>  
>  	XE_LNL_IDS(INTEL_VGA_DEVICE, &intel_lunarlake_info),
>  
> -- 
> 2.39.2
> 

Re: [PATCH i-g-t 10/10] lib: switch i915_pciids_local.h to xe driver style PCI ID macros

[Jani Nikula]

On Wed, 22 May 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Wed, May 22, 2024 at 01:35:23PM +0300, Jani Nikula wrote:
>> Follow-up the kernel i915_pciids.h switching to xe driver style PCI ID
>> macros, and do the same for i915_pciids_local.h. This is a clear
>> improvement in the perf code, for example.
>
> I'm confused now on why do we need this i915_pciids_local.h o.O
> but anyway, the change is good and right:

We'd need to split the MTL macros up kernel side to match IGT perf.c
needs, even if we don't need that kernel side. But might as well do it
for Single Point of Truth.

Ditto for PVC, we should use XE_PVC_IDS from xe_pciids.h, but there's a
diff between those and what's in i915_pciids_local.h. Needs some
analysis why.

Anyway, all this can come as follow-up.

Thanks for the review,
Jani.


>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  lib/i915/perf.c         | 12 +++--------
>>  lib/i915_pciids_local.h | 44 ++++++++++++++++++++---------------------
>>  lib/intel_device_info.c |  2 +-
>>  3 files changed, 26 insertions(+), 32 deletions(-)
>> 
>> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
>> index 4b00ba5de9d4..ee950b3c03e4 100644
>> --- a/lib/i915/perf.c
>> +++ b/lib/i915/perf.c
>> @@ -204,13 +204,10 @@ is_acm_gt3(const struct intel_perf_devinfo *devinfo)
>>  static bool
>>  is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
>>  {
>> -#undef INTEL_VGA_DEVICE
>> -#define INTEL_VGA_DEVICE(_id, _info) _id
>>  	static const uint32_t devids[] = {
>> -		INTEL_MTL_M_IDS(NULL),
>> -		INTEL_MTL_P_GT2_IDS(NULL),
>> +		INTEL_MTL_M_IDS(ID),
>> +		INTEL_MTL_P_GT2_IDS(ID),
>>  	};
>> -#undef INTEL_VGA_DEVICE
>>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>>  		if (devids[i] == devinfo->devid)
>>  			return true;
>> @@ -222,12 +219,9 @@ is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
>>  static bool
>>  is_mtl_gt3(const struct intel_perf_devinfo *devinfo)
>>  {
>> -#undef INTEL_VGA_DEVICE
>> -#define INTEL_VGA_DEVICE(_id, _info) _id
>>  	static const uint32_t devids[] = {
>> -		INTEL_MTL_P_GT3_IDS(NULL),
>> +		INTEL_MTL_P_GT3_IDS(ID),
>>  	};
>> -#undef INTEL_VGA_DEVICE
>>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
>>  		if (devids[i] == devinfo->devid)
>>  			return true;
>> diff --git a/lib/i915_pciids_local.h b/lib/i915_pciids_local.h
>> index 0043b0cd9b34..92879704aa8e 100644
>> --- a/lib/i915_pciids_local.h
>> +++ b/lib/i915_pciids_local.h
>> @@ -9,41 +9,41 @@
>>  
>>  /* MTL perf */
>>  #ifndef INTEL_MTL_M_IDS
>> -#define INTEL_MTL_M_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x7D60, info), \
>> -	INTEL_VGA_DEVICE(0x7D67, info)
>> +#define INTEL_MTL_M_IDS(MACRO__, ...) \
>> +	MACRO__(0x7D60, ## __VA_ARGS__), \
>> +	MACRO__(0x7D67, ## __VA_ARGS__)
>>  #endif
>>  
>>  #ifndef INTEL_MTL_P_GT2_IDS
>> -#define INTEL_MTL_P_GT2_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x7D45, info)
>> +#define INTEL_MTL_P_GT2_IDS(MACRO__, ...) \
>> +	MACRO__(0x7D45, ## __VA_ARGS__)
>>  #endif
>>  
>>  #ifndef INTEL_MTL_P_GT3_IDS
>> -#define INTEL_MTL_P_GT3_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x7D55, info), \
>> -	INTEL_VGA_DEVICE(0x7DD5, info)
>> +#define INTEL_MTL_P_GT3_IDS(MACRO__, ...) \
>> +	MACRO__(0x7D55, ## __VA_ARGS__), \
>> +	MACRO__(0x7DD5, ## __VA_ARGS__)
>>  #endif
>>  
>>  #ifndef INTEL_MTL_P_IDS
>> -#define INTEL_MTL_P_IDS(info) \
>> -	INTEL_MTL_P_GT2_IDS(info), \
>> -	INTEL_MTL_P_GT3_IDS(info)
>> +#define INTEL_MTL_P_IDS(MACRO__, ...) \
>> +	INTEL_MTL_P_GT2_IDS(MACRO__, ## __VA_ARGS__), \
>> +	INTEL_MTL_P_GT3_IDS(MACRO__, ## __VA_ARGS__)
>>  #endif
>>  
>>  /* PVC */
>>  #ifndef INTEL_PVC_IDS
>> -#define INTEL_PVC_IDS(info) \
>> -	INTEL_VGA_DEVICE(0x0BD0, info), \
>> -	INTEL_VGA_DEVICE(0x0BD1, info), \
>> -	INTEL_VGA_DEVICE(0x0BD2, info), \
>> -	INTEL_VGA_DEVICE(0x0BD5, info), \
>> -	INTEL_VGA_DEVICE(0x0BD6, info), \
>> -	INTEL_VGA_DEVICE(0x0BD7, info), \
>> -	INTEL_VGA_DEVICE(0x0BD8, info), \
>> -	INTEL_VGA_DEVICE(0x0BD9, info), \
>> -	INTEL_VGA_DEVICE(0x0BDA, info), \
>> -	INTEL_VGA_DEVICE(0x0BDB, info)
>> +#define INTEL_PVC_IDS(MACRO__, ...) \
>> +	MACRO__(0x0BD0, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD1, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD2, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD5, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD6, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD7, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD8, ## __VA_ARGS__), \
>> +	MACRO__(0x0BD9, ## __VA_ARGS__), \
>> +	MACRO__(0x0BDA, ## __VA_ARGS__), \
>> +	MACRO__(0x0BDB, ## __VA_ARGS__)
>>  #endif
>>  
>>  #endif /* _I915_PCIIDS_LOCAL_H */
>> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
>> index 30aca2abd7be..e80ea54707de 100644
>> --- a/lib/intel_device_info.c
>> +++ b/lib/intel_device_info.c
>> @@ -617,7 +617,7 @@ static const struct pci_id_match intel_device_match[] = {
>>  
>>  	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
>>  
>> -	INTEL_PVC_IDS(&intel_pontevecchio_info),
>> +	INTEL_PVC_IDS(INTEL_VGA_DEVICE, &intel_pontevecchio_info),
>>  
>>  	XE_LNL_IDS(INTEL_VGA_DEVICE, &intel_lunarlake_info),
>>  
>> -- 
>> 2.39.2
>> 

-- 
Jani Nikula, Intel

Re: [PATCH i-g-t 10/10] lib: switch i915_pciids_local.h to xe driver style PCI ID macros

[Rodrigo Vivi]

On Wed, May 22, 2024 at 08:13:24PM +0300, Jani Nikula wrote:
> On Wed, 22 May 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Wed, May 22, 2024 at 01:35:23PM +0300, Jani Nikula wrote:
> >> Follow-up the kernel i915_pciids.h switching to xe driver style PCI ID
> >> macros, and do the same for i915_pciids_local.h. This is a clear
> >> improvement in the perf code, for example.
> >
> > I'm confused now on why do we need this i915_pciids_local.h o.O
> > but anyway, the change is good and right:
> 
> We'd need to split the MTL macros up kernel side to match IGT perf.c
> needs, even if we don't need that kernel side. But might as well do it
> for Single Point of Truth.

hmmm I see...  yeap, we should probably do this.

> 
> Ditto for PVC, we should use XE_PVC_IDS from xe_pciids.h, but there's a
> diff between those and what's in i915_pciids_local.h. Needs some
> analysis why.

This case is different... PVC IDs are not fully merged upstream.
They are part of a drm-tip's topic branch.

> 
> Anyway, all this can come as follow-up.

Agreed!

> 
> Thanks for the review,
> Jani.
> 
> 
> >
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> >> 
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  lib/i915/perf.c         | 12 +++--------
> >>  lib/i915_pciids_local.h | 44 ++++++++++++++++++++---------------------
> >>  lib/intel_device_info.c |  2 +-
> >>  3 files changed, 26 insertions(+), 32 deletions(-)
> >> 
> >> diff --git a/lib/i915/perf.c b/lib/i915/perf.c
> >> index 4b00ba5de9d4..ee950b3c03e4 100644
> >> --- a/lib/i915/perf.c
> >> +++ b/lib/i915/perf.c
> >> @@ -204,13 +204,10 @@ is_acm_gt3(const struct intel_perf_devinfo *devinfo)
> >>  static bool
> >>  is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
> >>  {
> >> -#undef INTEL_VGA_DEVICE
> >> -#define INTEL_VGA_DEVICE(_id, _info) _id
> >>  	static const uint32_t devids[] = {
> >> -		INTEL_MTL_M_IDS(NULL),
> >> -		INTEL_MTL_P_GT2_IDS(NULL),
> >> +		INTEL_MTL_M_IDS(ID),
> >> +		INTEL_MTL_P_GT2_IDS(ID),
> >>  	};
> >> -#undef INTEL_VGA_DEVICE
> >>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
> >>  		if (devids[i] == devinfo->devid)
> >>  			return true;
> >> @@ -222,12 +219,9 @@ is_mtl_gt2(const struct intel_perf_devinfo *devinfo)
> >>  static bool
> >>  is_mtl_gt3(const struct intel_perf_devinfo *devinfo)
> >>  {
> >> -#undef INTEL_VGA_DEVICE
> >> -#define INTEL_VGA_DEVICE(_id, _info) _id
> >>  	static const uint32_t devids[] = {
> >> -		INTEL_MTL_P_GT3_IDS(NULL),
> >> +		INTEL_MTL_P_GT3_IDS(ID),
> >>  	};
> >> -#undef INTEL_VGA_DEVICE
> >>  	for (uint32_t i = 0; i < ARRAY_SIZE(devids); i++) {
> >>  		if (devids[i] == devinfo->devid)
> >>  			return true;
> >> diff --git a/lib/i915_pciids_local.h b/lib/i915_pciids_local.h
> >> index 0043b0cd9b34..92879704aa8e 100644
> >> --- a/lib/i915_pciids_local.h
> >> +++ b/lib/i915_pciids_local.h
> >> @@ -9,41 +9,41 @@
> >>  
> >>  /* MTL perf */
> >>  #ifndef INTEL_MTL_M_IDS
> >> -#define INTEL_MTL_M_IDS(info) \
> >> -	INTEL_VGA_DEVICE(0x7D60, info), \
> >> -	INTEL_VGA_DEVICE(0x7D67, info)
> >> +#define INTEL_MTL_M_IDS(MACRO__, ...) \
> >> +	MACRO__(0x7D60, ## __VA_ARGS__), \
> >> +	MACRO__(0x7D67, ## __VA_ARGS__)
> >>  #endif
> >>  
> >>  #ifndef INTEL_MTL_P_GT2_IDS
> >> -#define INTEL_MTL_P_GT2_IDS(info) \
> >> -	INTEL_VGA_DEVICE(0x7D45, info)
> >> +#define INTEL_MTL_P_GT2_IDS(MACRO__, ...) \
> >> +	MACRO__(0x7D45, ## __VA_ARGS__)
> >>  #endif
> >>  
> >>  #ifndef INTEL_MTL_P_GT3_IDS
> >> -#define INTEL_MTL_P_GT3_IDS(info) \
> >> -	INTEL_VGA_DEVICE(0x7D55, info), \
> >> -	INTEL_VGA_DEVICE(0x7DD5, info)
> >> +#define INTEL_MTL_P_GT3_IDS(MACRO__, ...) \
> >> +	MACRO__(0x7D55, ## __VA_ARGS__), \
> >> +	MACRO__(0x7DD5, ## __VA_ARGS__)
> >>  #endif
> >>  
> >>  #ifndef INTEL_MTL_P_IDS
> >> -#define INTEL_MTL_P_IDS(info) \
> >> -	INTEL_MTL_P_GT2_IDS(info), \
> >> -	INTEL_MTL_P_GT3_IDS(info)
> >> +#define INTEL_MTL_P_IDS(MACRO__, ...) \
> >> +	INTEL_MTL_P_GT2_IDS(MACRO__, ## __VA_ARGS__), \
> >> +	INTEL_MTL_P_GT3_IDS(MACRO__, ## __VA_ARGS__)
> >>  #endif
> >>  
> >>  /* PVC */
> >>  #ifndef INTEL_PVC_IDS
> >> -#define INTEL_PVC_IDS(info) \
> >> -	INTEL_VGA_DEVICE(0x0BD0, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD1, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD2, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD5, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD6, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD7, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD8, info), \
> >> -	INTEL_VGA_DEVICE(0x0BD9, info), \
> >> -	INTEL_VGA_DEVICE(0x0BDA, info), \
> >> -	INTEL_VGA_DEVICE(0x0BDB, info)
> >> +#define INTEL_PVC_IDS(MACRO__, ...) \
> >> +	MACRO__(0x0BD0, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD1, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD2, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD5, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD6, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD7, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD8, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BD9, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BDA, ## __VA_ARGS__), \
> >> +	MACRO__(0x0BDB, ## __VA_ARGS__)
> >>  #endif
> >>  
> >>  #endif /* _I915_PCIIDS_LOCAL_H */
> >> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> >> index 30aca2abd7be..e80ea54707de 100644
> >> --- a/lib/intel_device_info.c
> >> +++ b/lib/intel_device_info.c
> >> @@ -617,7 +617,7 @@ static const struct pci_id_match intel_device_match[] = {
> >>  
> >>  	INTEL_MTL_IDS(INTEL_VGA_DEVICE, &intel_meteorlake_info),
> >>  
> >> -	INTEL_PVC_IDS(&intel_pontevecchio_info),
> >> +	INTEL_PVC_IDS(INTEL_VGA_DEVICE, &intel_pontevecchio_info),
> >>  
> >>  	XE_LNL_IDS(INTEL_VGA_DEVICE, &intel_lunarlake_info),
> >>  
> >> -- 
> >> 2.39.2
> >> 
> 
> -- 
> Jani Nikula, Intel

✗ CI.xeFULL: failure for lib: sync i915_pciids.h and _local.h with kernel

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 77269 bytes --]

== Series Details ==

Series: lib: sync i915_pciids.h and _local.h with kernel
URL   : https://patchwork.freedesktop.org/series/133915/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_7867_full -> XEIGTPW_11177_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_11177_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_11177_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 2)
------------------------------

  Missing    (1): shard-adlp 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_11177_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6:
    - shard-dg2-set2:     [PASS][1] -> [ABORT][2] +5 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@cursor-offscreen-256x256:
    - {shard-lnl}:        [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-5/igt@kms_cursor_crc@cursor-offscreen-256x256.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@kms_cursor_crc@cursor-offscreen-256x256.html

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1:
    - {shard-lnl}:        [PASS][5] -> [DMESG-WARN][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-7/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-7/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
    - {shard-lnl}:        NOTRUN -> [ABORT][7] +1 other test abort
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
    - {shard-lnl}:        NOTRUN -> [FAIL][8]
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_plane@plane-panning-bottom-right@pipe-b:
    - {shard-lnl}:        [PASS][9] -> [ABORT][10] +3 other tests abort
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@kms_plane@plane-panning-bottom-right@pipe-b.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-5/igt@kms_plane@plane-panning-bottom-right@pipe-b.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-lnl}:        NOTRUN -> [SKIP][11]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  
Known issues
------------

  Here are the changes found in XEIGTPW_11177_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#1201] / [Intel XE#623])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#316])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#1201] / [Intel XE#316]) +4 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-dg2-set2:     NOTRUN -> [SKIP][15] ([Intel XE#1201] / [Intel XE#610])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#1124] / [Intel XE#1201]) +8 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#1201] / [Intel XE#367])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#1201] / [Intel XE#787]) +83 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-6.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][19] ([Intel XE#787]) +27 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@bad-rotation-90-y-tiled-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +21 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][21] ([Intel XE#1201] / [Intel XE#1252])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][22] ([Intel XE#1850])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][23] ([Intel XE#1713])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-d-dp-4.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-dg2-set2:     NOTRUN -> [SKIP][25] ([Intel XE#1201] / [Intel XE#306]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_frames@vga-frame-dump:
    - shard-dg2-set2:     NOTRUN -> [SKIP][26] ([Intel XE#1201] / [Intel XE#373]) +8 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_chamelium_frames@vga-frame-dump.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][27] ([Intel XE#373]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#1201] / [Intel XE#308]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_edge_walk@256x256-top-bottom:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][29] ([Intel XE#1214] / [Intel XE#282]) +6 other tests dmesg-warn
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_cursor_edge_walk@256x256-top-bottom.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][30] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#910])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][31] ([Intel XE#1201] / [Intel XE#323])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@forked-move@pipe-b:
    - shard-dg2-set2:     [PASS][32] -> [DMESG-WARN][33] ([Intel XE#282]) +4 other tests dmesg-warn
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@kms_cursor_legacy@forked-move@pipe-b.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_cursor_legacy@forked-move@pipe-b.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-dg2-set2:     [PASS][34] -> [DMESG-WARN][35] ([Intel XE#877]) +1 other test dmesg-warn
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_cursor_legacy@torture-move@pipe-a.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_feature_discovery@display-3x:
    - shard-dg2-set2:     NOTRUN -> [SKIP][36] ([Intel XE#1201] / [Intel XE#703])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_feature_discovery@display-3x.html

  * igt@kms_flip@flip-vs-suspend-interruptible@d-dp4:
    - shard-dg2-set2:     [PASS][37] -> [INCOMPLETE][38] ([Intel XE#1195])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible@d-dp4.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_flip@flip-vs-suspend-interruptible@d-dp4.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][39] ([Intel XE#455]) +3 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#1201] / [Intel XE#651]) +23 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-dg2-set2:     [PASS][41] -> [SKIP][42] ([Intel XE#1201] / [Intel XE#1234])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     [PASS][43] -> [SKIP][44] ([Intel XE#1201]) +5 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][45] ([Intel XE#651]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][46] ([Intel XE#653]) +4 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][47] ([Intel XE#1201]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][48] ([Intel XE#1201] / [Intel XE#653]) +21 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-dg2-set2:     NOTRUN -> [SKIP][49] ([Intel XE#1201] / [Intel XE#417])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_plane@planar-pixel-format-settings:
    - shard-dg2-set2:     [PASS][50] -> [SKIP][51] ([Intel XE#1201] / [Intel XE#829])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@kms_plane@planar-pixel-format-settings.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane@planar-pixel-format-settings.html

  * igt@kms_plane@plane-panning-bottom-right:
    - shard-dg2-set2:     [PASS][52] -> [ABORT][53] ([Intel XE#1035])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_plane@plane-panning-bottom-right.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_plane@plane-panning-bottom-right.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-pixel-format@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][54] ([Intel XE#1195] / [Intel XE#904] / [Intel XE#909]) +1 other test incomplete
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-pixel-format@pipe-a-hdmi-a-6.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][55] ([Intel XE#295] / [Intel XE#380] / [Intel XE#909])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][56] ([Intel XE#904] / [Intel XE#909])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-a-hdmi-a-6.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][57] ([Intel XE#1201] / [Intel XE#305] / [Intel XE#455]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-6.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][58] ([Intel XE#1201] / [Intel XE#305]) +8 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-6.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][59] ([Intel XE#1201] / [Intel XE#455]) +14 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-hdmi-a-6.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-dg2-set2:     NOTRUN -> [SKIP][60] ([Intel XE#1201] / [Intel XE#870])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_prop_blob@invalid-get-prop:
    - shard-dg2-set2:     NOTRUN -> [SKIP][61] ([Intel XE#1201] / [Intel XE#780])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_prop_blob@invalid-get-prop.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2-set2:     NOTRUN -> [SKIP][62] ([Intel XE#1122] / [Intel XE#1201])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-psr-sprite-plane-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][63] ([Intel XE#929]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_psr@fbc-psr-sprite-plane-move.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][64] ([Intel XE#1201] / [Intel XE#929]) +17 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#1127] / [Intel XE#1201])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][66] ([Intel XE#327])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][67] ([Intel XE#1201] / [Intel XE#327]) +3 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][68] ([Intel XE#1162] / [Intel XE#1214]) +2 other tests dmesg-warn
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_vblank@ts-continuation-dpms-suspend.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#1201] / [Intel XE#756]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each:
    - shard-dg2-set2:     NOTRUN -> [SKIP][70] ([Intel XE#1091])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@sriov_basic@enable-vfs-bind-unbind-each.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-dg2-set2:     NOTRUN -> [FAIL][71] ([Intel XE#1050])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_copy_basic@mem-copy-linear-0xfffe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][72] ([Intel XE#1123] / [Intel XE#1201])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@xe_copy_basic@mem-copy-linear-0xfffe.html

  * igt@xe_evict@evict-beng-cm-threads-large:
    - shard-dg2-set2:     [PASS][73] -> [TIMEOUT][74] ([Intel XE#1473] / [Intel XE#392]) +1 other test timeout
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@xe_evict@evict-beng-cm-threads-large.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@xe_evict@evict-beng-cm-threads-large.html

  * igt@xe_evict@evict-cm-threads-large:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][75] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@xe_evict@evict-cm-threads-large.html

  * igt@xe_evict@evict-mixed-many-threads-large:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][76] ([Intel XE#1041] / [Intel XE#1473] / [Intel XE#392])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-large.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-dg2-set2:     [PASS][77] -> [INCOMPLETE][78] ([Intel XE#1195] / [Intel XE#1473])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-small.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_fault_mode@once-userptr-imm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][79] ([Intel XE#288]) +2 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_exec_fault_mode@once-userptr-imm.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-rebind-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][80] ([Intel XE#1201] / [Intel XE#288]) +14 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@xe_exec_fault_mode@twice-bindexecqueue-rebind-prefetch.html

  * igt@xe_gt_freq@freq_low_max:
    - shard-dg2-set2:     NOTRUN -> [FAIL][81] ([Intel XE#1045] / [Intel XE#1204])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_gt_freq@freq_low_max.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][82] ([Intel XE#1201] / [Intel XE#979])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@s2idle-basic:
    - shard-dg2-set2:     [PASS][83] -> [DMESG-WARN][84] ([Intel XE#1214])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@xe_pm@s2idle-basic.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@xe_pm@s2idle-basic.html

  * igt@xe_pm@s3-basic-exec:
    - shard-dg2-set2:     [PASS][85] -> [DMESG-WARN][86] ([Intel XE#1162] / [Intel XE#1214]) +4 other tests dmesg-warn
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@xe_pm@s3-basic-exec.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@xe_pm@s3-basic-exec.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-dg2-set2:     NOTRUN -> [SKIP][87] ([Intel XE#579])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-dg2-set2:     NOTRUN -> [SKIP][88] ([Intel XE#944])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-dg2-set2:     NOTRUN -> [SKIP][89] ([Intel XE#1201] / [Intel XE#944]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_wedged@basic-wedged:
    - shard-dg2-set2:     NOTRUN -> [DMESG-WARN][90] ([Intel XE#1214] / [Intel XE#1760])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@xe_wedged@basic-wedged.html

  
#### Possible fixes ####

  * igt@kms_addfb_basic@unused-handle:
    - shard-dg2-set2:     [SKIP][91] ([Intel XE#1201] / [i915#6077]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_addfb_basic@unused-handle.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_addfb_basic@unused-handle.html

  * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing:
    - {shard-lnl}:        [SKIP][93] ([Intel XE#1733]) -> [PASS][94] +6 other tests pass
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-4/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - {shard-lnl}:        [SKIP][95] ([Intel XE#829]) -> [PASS][96] +1 other test pass
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-dg2-set2:     [SKIP][97] ([Intel XE#1201]) -> [PASS][98] +5 other tests pass
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-dg2-set2:     [DMESG-WARN][99] ([Intel XE#282]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
    - shard-dg2-set2:     [SKIP][101] ([Intel XE#1201] / [Intel XE#1234]) -> [PASS][102] +1 other test pass
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
    - {shard-lnl}:        [SKIP][103] ([Intel XE#1646] / [Intel XE#1650] / [Intel XE#1663]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html

  * igt@kms_cursor_legacy@single-bo@pipe-b:
    - shard-dg2-set2:     [DMESG-WARN][105] ([Intel XE#1214] / [Intel XE#282]) -> [PASS][106] +3 other tests pass
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@kms_cursor_legacy@single-bo@pipe-b.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_cursor_legacy@single-bo@pipe-b.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a6:
    - shard-dg2-set2:     [ABORT][107] -> [PASS][108] +6 other tests pass
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a6.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a6.html

  * igt@kms_flip@flip-vs-suspend:
    - {shard-lnl}:        [DMESG-WARN][109] ([Intel XE#1830]) -> [PASS][110] +1 other test pass
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-4/igt@kms_flip@flip-vs-suspend.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - {shard-lnl}:        [SKIP][111] ([Intel XE#1646] / [Intel XE#1650]) -> [PASS][112] +4 other tests pass
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-5/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
    - shard-dg2-set2:     [SKIP][113] ([Intel XE#1201] / [Intel XE#1235]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - {shard-lnl}:        [SKIP][115] ([Intel XE#1134]) -> [PASS][116] +2 other tests pass
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant:
    - shard-dg2-set2:     [SKIP][117] ([Intel XE#1201] / [Intel XE#829]) -> [PASS][118] +4 other tests pass
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_plane_alpha_blend@coverage-vs-premult-vs-constant.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4:
    - shard-dg2-set2:     [FAIL][119] ([Intel XE#361]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-4.html

  * igt@kms_pm_dc@dc5-psr:
    - {shard-lnl}:        [FAIL][121] ([Intel XE#718]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@kms_pm_dc@dc5-psr.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_psr@psr-suspend@edp-1:
    - {shard-lnl}:        [ABORT][123] -> [PASS][124] +1 other test pass
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-5/igt@kms_psr@psr-suspend@edp-1.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@kms_psr@psr-suspend@edp-1.html

  * igt@xe_evict@evict-mixed-threads-large:
    - shard-dg2-set2:     [TIMEOUT][125] ([Intel XE#1473] / [Intel XE#392]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@xe_evict@evict-mixed-threads-large.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@xe_evict@evict-mixed-threads-large.html

  * igt@xe_evict@evict-small-cm:
    - shard-dg2-set2:     [INCOMPLETE][127] ([Intel XE#1195] / [Intel XE#1473]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@xe_evict@evict-small-cm.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@xe_evict@evict-small-cm.html

  * igt@xe_exec_basic@many-execqueues-basic:
    - {shard-lnl}:        [INCOMPLETE][129] ([Intel XE#1330] / [Intel XE#1602]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@xe_exec_basic@many-execqueues-basic.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@xe_exec_basic@many-execqueues-basic.html

  * igt@xe_exec_compute_mode@non-blocking:
    - {shard-lnl}:        [INCOMPLETE][131] ([Intel XE#1330] / [Intel XE#1602] / [Intel XE#1760]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@xe_exec_compute_mode@non-blocking.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-4/igt@xe_exec_compute_mode@non-blocking.html

  * igt@xe_exec_fault_mode@many-basic-imm:
    - {shard-lnl}:        [SKIP][133] ([Intel XE#1699]) -> [PASS][134] +7 other tests pass
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@xe_exec_fault_mode@many-basic-imm.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@xe_exec_fault_mode@many-basic-imm.html

  * igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race:
    - {shard-lnl}:        [ABORT][135] ([Intel XE#1761]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-5/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-bal-fd-userptr-rebind:
    - {shard-lnl}:        [INCOMPLETE][137] ([Intel XE#1169]) -> [PASS][138]
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@xe_exec_threads@threads-bal-fd-userptr-rebind.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@xe_exec_threads@threads-bal-fd-userptr-rebind.html

  * igt@xe_exec_threads@threads-bal-shared-vm-rebind:
    - shard-dg2-set2:     [ABORT][139] ([Intel XE#1908]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@xe_exec_threads@threads-bal-shared-vm-rebind.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_exec_threads@threads-bal-shared-vm-rebind.html

  * igt@xe_live_ktest@xe_migrate:
    - shard-dg2-set2:     [SKIP][141] ([Intel XE#1192] / [Intel XE#1201]) -> [PASS][142]
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@xe_live_ktest@xe_migrate.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_live_ktest@xe_migrate.html

  * igt@xe_pat@prime-self-import-coh:
    - {shard-lnl}:        [SKIP][143] ([Intel XE#1130] / [Intel XE#1699]) -> [PASS][144] +2 other tests pass
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-8/igt@xe_pat@prime-self-import-coh.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@xe_pat@prime-self-import-coh.html

  * igt@xe_pm@s3-multiple-execs:
    - shard-dg2-set2:     [DMESG-WARN][145] ([Intel XE#1162] / [Intel XE#1214]) -> [PASS][146]
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@xe_pm@s3-multiple-execs.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@xe_pm@s3-multiple-execs.html

  * igt@xe_pm@s4-multiple-execs:
    - shard-dg2-set2:     [ABORT][147] ([Intel XE#1358]) -> [PASS][148]
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@xe_pm@s4-multiple-execs.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@xe_pm@s4-multiple-execs.html

  * igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer:
    - {shard-lnl}:        [FAIL][149] ([Intel XE#1081]) -> [PASS][150]
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-7/igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-8/igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer.html

  * igt@xe_wedged@wedged-mode-toggle:
    - {shard-lnl}:        [ABORT][151] ([Intel XE#1441] / [Intel XE#1620] / [Intel XE#1760]) -> [PASS][152]
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-2/igt@xe_wedged@wedged-mode-toggle.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@xe_wedged@wedged-mode-toggle.html

  
#### Warnings ####

  * igt@core_hotunplug@hotreplug-lateclose:
    - shard-dg2-set2:     [DMESG-FAIL][153] ([Intel XE#1548]) -> [DMESG-FAIL][154] ([Intel XE#1162] / [Intel XE#1548])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@core_hotunplug@hotreplug-lateclose.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@core_hotunplug@hotreplug-lateclose.html

  * igt@core_hotunplug@hotunplug-rescan:
    - shard-dg2-set2:     [DMESG-WARN][155] ([Intel XE#1214]) -> [DMESG-FAIL][156] ([Intel XE#1162] / [Intel XE#1345] / [Intel XE#1548])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@core_hotunplug@hotunplug-rescan.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@core_hotunplug@hotunplug-rescan.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-dg2-set2:     [SKIP][157] ([Intel XE#1201] / [Intel XE#455]) -> [SKIP][158] ([Intel XE#1201])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][159] ([Intel XE#1201] / [Intel XE#316]) -> [SKIP][160] ([Intel XE#1201] / [Intel XE#829])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][161] ([Intel XE#316]) -> [SKIP][162] ([Intel XE#1201] / [Intel XE#316])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-dg2-set2:     [SKIP][163] ([Intel XE#1124]) -> [SKIP][164] ([Intel XE#1124] / [Intel XE#1201]) +3 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-0:
    - shard-dg2-set2:     [SKIP][165] ([Intel XE#1124] / [Intel XE#1201]) -> [SKIP][166] ([Intel XE#1201] / [Intel XE#829])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg2-set2:     [SKIP][167] ([Intel XE#1124] / [Intel XE#1201]) -> [SKIP][168] ([Intel XE#1124]) +5 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-dg2-set2:     [SKIP][169] ([Intel XE#1201] / [Intel XE#610]) -> [SKIP][170] ([Intel XE#610])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-dg2-set2:     [SKIP][171] ([Intel XE#1201]) -> [SKIP][172] ([Intel XE#346])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_big_joiner@invalid-modeset.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_bw@linear-tiling-1-displays-3840x2160p:
    - shard-dg2-set2:     [SKIP][173] ([Intel XE#1201]) -> [SKIP][174] ([Intel XE#1201] / [Intel XE#367])
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-dg2-set2:     [SKIP][175] ([Intel XE#367]) -> [SKIP][176] ([Intel XE#1201] / [Intel XE#367]) +2 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     [SKIP][177] ([Intel XE#787]) -> [SKIP][178] ([Intel XE#1201] / [Intel XE#787]) +34 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-a-dp-4.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     [SKIP][179] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) -> [SKIP][180] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [SKIP][181] ([Intel XE#1201] / [Intel XE#787]) -> [SKIP][182] ([Intel XE#787]) +41 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     [SKIP][183] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][184] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +9 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs-cc:
    - shard-dg2-set2:     [SKIP][185] ([Intel XE#1201] / [Intel XE#829]) -> [SKIP][186] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs-cc.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs:
    - shard-dg2-set2:     [SKIP][187] ([Intel XE#1201] / [Intel XE#1252]) -> [SKIP][188] ([Intel XE#1252])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-xe2-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs:
    - shard-dg2-set2:     [SKIP][189] ([Intel XE#1201] / [Intel XE#829]) -> [SKIP][190] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +1 other test skip
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
    - shard-dg2-set2:     [SKIP][191] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) -> [SKIP][192] ([Intel XE#1201] / [Intel XE#829])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_audio@dp-audio-edid:
    - shard-dg2-set2:     [SKIP][193] ([Intel XE#373]) -> [SKIP][194] ([Intel XE#1201] / [Intel XE#373]) +5 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_chamelium_audio@dp-audio-edid.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_chamelium_audio@dp-audio-edid.html

  * igt@kms_chamelium_color@gamma:
    - shard-dg2-set2:     [SKIP][195] ([Intel XE#1201] / [Intel XE#306]) -> [SKIP][196] ([Intel XE#306])
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_chamelium_color@gamma.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
    - shard-dg2-set2:     [SKIP][197] ([Intel XE#1201] / [Intel XE#373]) -> [SKIP][198] ([Intel XE#373]) +2 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-dg2-set2:     [SKIP][199] ([Intel XE#1201] / [Intel XE#373]) -> [SKIP][200] ([Intel XE#1201])
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg2-set2:     [SKIP][201] ([Intel XE#1201]) -> [SKIP][202] ([Intel XE#1201] / [Intel XE#373])
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_chamelium_hpd@hdmi-hpd.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg2-set2:     [SKIP][203] ([Intel XE#1201]) -> [SKIP][204] ([Intel XE#1201] / [Intel XE#455]) +3 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [FAIL][205] ([Intel XE#616]) -> [DMESG-FAIL][206] ([Intel XE#1162]) +1 other test dmesg-fail
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-6.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_cursor_crc@cursor-suspend@pipe-d-hdmi-a-6.html

  * igt@kms_cursor_edge_walk@256x256-left-edge:
    - shard-dg2-set2:     [DMESG-WARN][207] ([Intel XE#1214] / [Intel XE#282]) -> [FAIL][208] ([Intel XE#581])
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@kms_cursor_edge_walk@256x256-left-edge.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_cursor_edge_walk@256x256-left-edge.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-dg2-set2:     [SKIP][209] ([Intel XE#323]) -> [SKIP][210] ([Intel XE#1201] / [Intel XE#323])
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-dg2-set2:     [DMESG-WARN][211] ([Intel XE#282]) -> [DMESG-WARN][212] ([Intel XE#1214] / [Intel XE#282]) +3 other tests dmesg-warn
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@torture-bo@pipe-b:
    - shard-dg2-set2:     [DMESG-WARN][213] ([Intel XE#1214] / [Intel XE#282]) -> [DMESG-WARN][214] ([Intel XE#282]) +1 other test dmesg-warn
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_cursor_legacy@torture-bo@pipe-b.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_cursor_legacy@torture-bo@pipe-b.html

  * igt@kms_feature_discovery@display-4x:
    - shard-dg2-set2:     [SKIP][215] ([Intel XE#1138]) -> [SKIP][216] ([Intel XE#1138] / [Intel XE#1201])
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_feature_discovery@display-4x.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg2-set2:     [SKIP][217] ([Intel XE#1137] / [Intel XE#1201]) -> [SKIP][218] ([Intel XE#1137])
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@kms_feature_discovery@dp-mst.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [DMESG-WARN][219] ([Intel XE#1162] / [Intel XE#1214]) -> [INCOMPLETE][220] ([Intel XE#1195])
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
    - shard-dg2-set2:     [SKIP][221] ([Intel XE#455]) -> [SKIP][222] ([Intel XE#1201] / [Intel XE#455]) +5 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move:
    - shard-dg2-set2:     [SKIP][223] ([Intel XE#1201] / [Intel XE#1234]) -> [SKIP][224] ([Intel XE#1201] / [Intel XE#651])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-plflip-blt:
    - shard-dg2-set2:     [SKIP][225] ([Intel XE#1201] / [Intel XE#651]) -> [SKIP][226] ([Intel XE#1201]) +2 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-plflip-blt.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [SKIP][227] ([Intel XE#1201] / [Intel XE#651]) -> [SKIP][228] ([Intel XE#651]) +12 other tests skip
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][229] ([Intel XE#651]) -> [SKIP][230] ([Intel XE#1201] / [Intel XE#651]) +13 other tests skip
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [ABORT][231] -> [SKIP][232] ([Intel XE#1201] / [Intel XE#651])
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-fullscreen.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-move:
    - shard-dg2-set2:     [SKIP][233] ([Intel XE#1201]) -> [SKIP][234] ([Intel XE#1201] / [Intel XE#651]) +4 other tests skip
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-move.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][235] ([Intel XE#653]) -> [SKIP][236] ([Intel XE#1201] / [Intel XE#653]) +9 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
    - shard-dg2-set2:     [SKIP][237] ([Intel XE#1201] / [Intel XE#653]) -> [SKIP][238] ([Intel XE#653]) +14 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-dg2-set2:     [SKIP][239] ([Intel XE#1201]) -> [SKIP][240] ([Intel XE#1201] / [Intel XE#653]) +1 other test skip
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     [SKIP][241] ([Intel XE#1201] / [Intel XE#653]) -> [SKIP][242] ([Intel XE#1201] / [Intel XE#1234])
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
    - shard-dg2-set2:     [SKIP][243] ([Intel XE#1201]) -> [SKIP][244] ([Intel XE#653])
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
    - shard-dg2-set2:     [SKIP][245] ([Intel XE#1201] / [Intel XE#653]) -> [SKIP][246] ([Intel XE#1201])
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [SKIP][247] ([Intel XE#1201] / [Intel XE#455]) -> [SKIP][248] ([Intel XE#455]) +9 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_hdr@invalid-hdr.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_hdr@invalid-hdr.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
    - shard-dg2-set2:     [SKIP][249] ([Intel XE#455] / [Intel XE#498]) -> [SKIP][250] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#498]) +1 other test skip
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     [SKIP][251] ([Intel XE#498]) -> [SKIP][252] ([Intel XE#1201] / [Intel XE#498]) +2 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-b-hdmi-a-6.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-b-hdmi-a-6.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling:
    - shard-dg2-set2:     [SKIP][253] ([Intel XE#1201]) -> [SKIP][254] ([Intel XE#1201] / [Intel XE#305] / [Intel XE#455])
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
    - shard-dg2-set2:     [SKIP][255] ([Intel XE#305] / [Intel XE#455]) -> [SKIP][256] ([Intel XE#1201] / [Intel XE#305] / [Intel XE#455]) +1 other test skip
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     [SKIP][257] ([Intel XE#305]) -> [SKIP][258] ([Intel XE#1201] / [Intel XE#305]) +2 other tests skip
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-c-hdmi-a-6.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-c-hdmi-a-6.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-dg2-set2:     [SKIP][259] ([Intel XE#1201] / [Intel XE#870]) -> [SKIP][260] ([Intel XE#870])
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_pm_backlight@basic-brightness.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
    - shard-dg2-set2:     [SKIP][261] ([Intel XE#1201]) -> [SKIP][262] ([Intel XE#1201] / [Intel XE#929]) +2 other tests skip
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg2-set2:     [SKIP][263] ([Intel XE#1122] / [Intel XE#1201]) -> [SKIP][264] ([Intel XE#1122])
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_psr2_su@page_flip-nv12.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr2-suspend:
    - shard-dg2-set2:     [SKIP][265] ([Intel XE#1201] / [Intel XE#929]) -> [SKIP][266] ([Intel XE#1201]) +1 other test skip
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@kms_psr@fbc-psr2-suspend.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-435/igt@kms_psr@fbc-psr2-suspend.html

  * igt@kms_psr@psr-dpms:
    - shard-dg2-set2:     [SKIP][267] ([Intel XE#1201] / [Intel XE#929]) -> [SKIP][268] ([Intel XE#929]) +7 other tests skip
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@kms_psr@psr-dpms.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_psr@psr-dpms.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - shard-dg2-set2:     [SKIP][269] ([Intel XE#929]) -> [SKIP][270] ([Intel XE#1201] / [Intel XE#929]) +6 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_psr@psr-sprite-plane-onoff.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_psr@psr2-cursor-plane-move:
    - shard-dg2-set2:     [SKIP][271] ([Intel XE#1201]) -> [SKIP][272] ([Intel XE#929])
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_psr@psr2-cursor-plane-move.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_psr@psr2-cursor-plane-move.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-dg2-set2:     [SKIP][273] ([Intel XE#1201] / [Intel XE#327]) -> [SKIP][274] ([Intel XE#327]) +1 other test skip
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-436/igt@kms_rotation_crc@bad-tiling.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-dg2-set2:     [SKIP][275] ([Intel XE#1201] / [Intel XE#1234]) -> [DMESG-WARN][276] ([Intel XE#1162] / [Intel XE#1214])
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-466/igt@kms_vblank@ts-continuation-suspend.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-dg2-set2:     [SKIP][277] ([Intel XE#756]) -> [SKIP][278] ([Intel XE#1201] / [Intel XE#756])
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@kms_writeback@writeback-fb-id.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-464/igt@kms_writeback@writeback-fb-id.html

  * igt@xe_compute_preempt@compute-preempt:
    - shard-dg2-set2:     [SKIP][279] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][280] ([Intel XE#1201] / [Intel XE#1280] / [Intel XE#455]) +1 other test skip
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@xe_compute_preempt@compute-preempt.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-434/igt@xe_compute_preempt@compute-preempt.html

  * igt@xe_copy_basic@mem-set-linear-0xfd:
    - shard-dg2-set2:     [SKIP][281] ([Intel XE#1126] / [Intel XE#1201]) -> [SKIP][282] ([Intel XE#1126])
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-464/igt@xe_copy_basic@mem-set-linear-0xfd.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0xfd.html

  * igt@xe_exec_fault_mode@once-rebind-prefetch:
    - shard-dg2-set2:     [SKIP][283] ([Intel XE#288]) -> [SKIP][284] ([Intel XE#1201] / [Intel XE#288]) +9 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@xe_exec_fault_mode@once-rebind-prefetch.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-433/igt@xe_exec_fault_mode@once-rebind-prefetch.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-rebind-imm:
    - shard-dg2-set2:     [SKIP][285] ([Intel XE#1201] / [Intel XE#288]) -> [SKIP][286] ([Intel XE#288]) +8 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-435/igt@xe_exec_fault_mode@twice-bindexecqueue-rebind-imm.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_exec_fault_mode@twice-bindexecqueue-rebind-imm.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-dg2-set2:     [SKIP][287] ([Intel XE#979]) -> [SKIP][288] ([Intel XE#1201] / [Intel XE#979])
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@xe_pat@pat-index-xehpc.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-dg2-set2:     [SKIP][289] ([Intel XE#1201] / [Intel XE#366]) -> [SKIP][290] ([Intel XE#366])
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@xe_pm@s3-d3cold-basic-exec.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-432/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_query@multigpu-query-gt-list:
    - shard-dg2-set2:     [SKIP][291] ([Intel XE#944]) -> [SKIP][292] ([Intel XE#1201] / [Intel XE#944]) +1 other test skip
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-432/igt@xe_query@multigpu-query-gt-list.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-436/igt@xe_query@multigpu-query-gt-list.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035
  [Intel XE#1041]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1041
  [Intel XE#1045]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1045
  [Intel XE#1050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1050
  [Intel XE#1068]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1068
  [Intel XE#1069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1069
  [Intel XE#1081]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1081
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
  [Intel XE#1134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1134
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1162]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1162
  [Intel XE#1169]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1169
  [Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
  [Intel XE#1195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1195
  [Intel XE#1201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1201
  [Intel XE#1204]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1204
  [Intel XE#1214]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1214
  [Intel XE#1234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1234
  [Intel XE#1235]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1235
  [Intel XE#1252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1252
  [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
  [Intel XE#1330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1330
  [Intel XE#1339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1339
  [Intel XE#1345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1345
  [Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1399
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1413
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1437
  [Intel XE#1441]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1441
  [Intel XE#1446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1446
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
  [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
  [Intel XE#1483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1483
  [Intel XE#1488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1488
  [Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1548
  [Intel XE#1595]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1595
  [Intel XE#1602]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1602
  [Intel XE#1620]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1620
  [Intel XE#1638]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1638
  [Intel XE#1646]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1646
  [Intel XE#1650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1650
  [Intel XE#1659]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1659
  [Intel XE#1663]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1663
  [Intel XE#1667]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1667
  [Intel XE#1699]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1699
  [Intel XE#1713]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1713
  [Intel XE#1717]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1717
  [Intel XE#1725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1725
  [Intel XE#1733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1733
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1760
  [Intel XE#1761]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1761
  [Intel XE#1829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1829
  [Intel XE#1830]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1830
  [Intel XE#1850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1850
  [Intel XE#1899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1899
  [Intel XE#1908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1908
  [Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#295]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/295
  [Intel XE#305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/305
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/327
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/361
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/374
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379
  [Intel XE#380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/380
  [Intel XE#392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/392
  [Intel XE#417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/417
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480
  [Intel XE#498]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/498
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#581]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/581
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
  [Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
  [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
  [Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
  [Intel XE#904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/904
  [Intel XE#909]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/909
  [Intel XE#910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/910
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#958]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/958
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#6077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6077


Build changes
-------------

  * IGT: IGT_7867 -> IGTPW_11177
  * Linux: xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd -> xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf

  IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd: b134db8544f8d5b8a960b368afe12820c3cbe8cd
  xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/index.html

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✗ Fi.CI.IGT: failure for lib: sync i915_pciids.h and _local.h with kernel

[Patchwork]

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== Series Details ==

Series: lib: sync i915_pciids.h and _local.h with kernel
URL   : https://patchwork.freedesktop.org/series/133915/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14801_full -> IGTPW_11177_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_11177_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_11177_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_11177_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@dpms-off-confusion-interruptible@c-dp4:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_flip@dpms-off-confusion-interruptible@c-dp4.html

  
Known issues
------------

  Here are the changes found in IGTPW_11177_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-dg2:          NOTRUN -> [SKIP][2] ([i915#8411])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@api_intel_bb@blit-reloc-purge-cache:
    - shard-dg1:          NOTRUN -> [SKIP][3] ([i915#8411]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@api_intel_bb@blit-reloc-purge-cache.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][4] ([i915#8411]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-3/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@debugfs_test@basic-hwmon:
    - shard-rkl:          NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@debugfs_test@basic-hwmon.html

  * igt@drm_fdinfo@idle@rcs0:
    - shard-rkl:          [PASS][6] -> [FAIL][7] ([i915#7742]) +2 other tests fail
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-rkl-2/igt@drm_fdinfo@idle@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@drm_fdinfo@idle@rcs0.html

  * igt@drm_fdinfo@virtual-busy-idle-all:
    - shard-dg2:          NOTRUN -> [SKIP][8] ([i915#8414]) +9 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@drm_fdinfo@virtual-busy-idle-all.html
    - shard-dg1:          NOTRUN -> [SKIP][9] ([i915#8414])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@drm_fdinfo@virtual-busy-idle-all.html
    - shard-mtlp:         NOTRUN -> [SKIP][10] ([i915#8414])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@drm_fdinfo@virtual-busy-idle-all.html

  * igt@drm_fdinfo@virtual-idle:
    - shard-rkl:          NOTRUN -> [FAIL][11] ([i915#7742])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@drm_fdinfo@virtual-idle.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][12] ([i915#3936])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@gem_busy@semaphore.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-tglu:         NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-dg2:          NOTRUN -> [SKIP][15] ([i915#7697])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@gem_close_race@multigpu-basic-threads.html
    - shard-rkl:          NOTRUN -> [SKIP][16] ([i915#7697])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          [PASS][17] -> [INCOMPLETE][18] ([i915#9364])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-8/igt@gem_create@create-ext-cpu-access-big.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_persistence@hang:
    - shard-dg1:          NOTRUN -> [SKIP][19] ([i915#8555])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_persistence@heartbeat-many:
    - shard-dg2:          NOTRUN -> [SKIP][20] ([i915#8555])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-3/igt@gem_ctx_persistence@heartbeat-many.html

  * igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
    - shard-snb:          NOTRUN -> [SKIP][21] ([i915#1099])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb2/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-dg2:          NOTRUN -> [SKIP][22] ([i915#280])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@gem_ctx_sseu@mmap-args.html
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#280])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@hibernate:
    - shard-rkl:          NOTRUN -> [ABORT][24] ([i915#7975] / [i915#8213])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-dg1:          NOTRUN -> [FAIL][25] ([i915#5784])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@bonded-false-hang:
    - shard-dg2:          NOTRUN -> [SKIP][26] ([i915#4812]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@gem_exec_balancer@bonded-false-hang.html

  * igt@gem_exec_balancer@invalid-bonds:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#4036])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@gem_exec_balancer@invalid-bonds.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-rkl:          NOTRUN -> [SKIP][28] ([i915#4525]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-tglu:         NOTRUN -> [FAIL][29] ([i915#6117])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-3/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_capture@capture-recoverable:
    - shard-tglu:         NOTRUN -> [SKIP][30] ([i915#6344])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-3/igt@gem_exec_capture@capture-recoverable.html

  * igt@gem_exec_capture@many-4k-zero:
    - shard-tglu:         NOTRUN -> [FAIL][31] ([i915#9606])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@gem_exec_capture@many-4k-zero.html
    - shard-rkl:          NOTRUN -> [FAIL][32] ([i915#9606])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@gem_exec_capture@many-4k-zero.html

  * igt@gem_exec_fair@basic-none-vip:
    - shard-dg1:          NOTRUN -> [SKIP][33] ([i915#3539] / [i915#4852])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@gem_exec_fair@basic-none-vip.html

  * igt@gem_exec_fair@basic-none@bcs0:
    - shard-rkl:          NOTRUN -> [FAIL][34] ([i915#2842]) +7 other tests fail
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@gem_exec_fair@basic-none@bcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-rkl:          [PASS][35] -> [FAIL][36] ([i915#2842]) +1 other test fail
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-rkl-5/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo:
    - shard-dg2:          NOTRUN -> [SKIP][37] ([i915#3539])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@gem_exec_fair@basic-pace-solo.html
    - shard-dg1:          NOTRUN -> [SKIP][38] ([i915#3539])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@gem_exec_fair@basic-pace-solo.html
    - shard-mtlp:         NOTRUN -> [SKIP][39] ([i915#4473])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-5/igt@gem_exec_fair@basic-pace-solo.html

  * igt@gem_exec_flush@basic-wb-ro-before-default:
    - shard-dg2:          NOTRUN -> [SKIP][40] ([i915#3539] / [i915#4852]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@gem_exec_flush@basic-wb-ro-before-default.html

  * igt@gem_exec_reloc@basic-wc-read-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][41] ([i915#3281]) +10 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@gem_exec_reloc@basic-wc-read-noreloc.html
    - shard-dg1:          NOTRUN -> [SKIP][42] ([i915#3281]) +6 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@gem_exec_reloc@basic-wc-read-noreloc.html

  * igt@gem_exec_reloc@basic-write-cpu-noreloc:
    - shard-mtlp:         NOTRUN -> [SKIP][43] ([i915#3281]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-7/igt@gem_exec_reloc@basic-write-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-dg2:          NOTRUN -> [SKIP][44] ([i915#3281]) +6 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@preempt-queue:
    - shard-dg1:          NOTRUN -> [SKIP][45] ([i915#4812]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@gem_exec_schedule@preempt-queue.html
    - shard-mtlp:         NOTRUN -> [SKIP][46] ([i915#4537] / [i915#4812])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-1/igt@gem_exec_schedule@preempt-queue.html
    - shard-dg2:          NOTRUN -> [SKIP][47] ([i915#4537] / [i915#4812])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@gem_exec_schedule@preempt-queue.html

  * igt@gem_fenced_exec_thrash@2-spare-fences:
    - shard-dg2:          NOTRUN -> [SKIP][48] ([i915#4860]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@gem_fenced_exec_thrash@2-spare-fences.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          NOTRUN -> [SKIP][49] ([i915#4613] / [i915#7582])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@basic:
    - shard-mtlp:         NOTRUN -> [SKIP][50] ([i915#4613]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@heavy-verify-random@lmem0:
    - shard-dg1:          [PASS][51] -> [FAIL][52] ([i915#10378])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-14/igt@gem_lmem_swapping@heavy-verify-random@lmem0.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@gem_lmem_swapping@heavy-verify-random@lmem0.html

  * igt@gem_lmem_swapping@massive:
    - shard-tglu:         NOTRUN -> [SKIP][53] ([i915#4613]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@gem_lmem_swapping@massive.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-rkl:          NOTRUN -> [SKIP][54] ([i915#4613]) +5 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [PASS][55] -> [TIMEOUT][56] ([i915#5493])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-13/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][57] ([i915#4613]) +5 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk5/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_lmem_swapping@verify-ccs@lmem0:
    - shard-dg2:          NOTRUN -> [FAIL][58] ([i915#10378]) +2 other tests fail
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@gem_lmem_swapping@verify-ccs@lmem0.html

  * igt@gem_mmap_wc@bad-offset:
    - shard-dg1:          NOTRUN -> [SKIP][59] ([i915#4083])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@gem_mmap_wc@bad-offset.html

  * igt@gem_mmap_wc@invalid-flags:
    - shard-dg2:          NOTRUN -> [SKIP][60] ([i915#4083]) +4 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@gem_mmap_wc@invalid-flags.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#3282]) +4 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_pread@exhaustion:
    - shard-tglu:         NOTRUN -> [WARN][62] ([i915#2658]) +1 other test warn
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-7/igt@gem_pread@exhaustion.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-dg1:          NOTRUN -> [SKIP][63] ([i915#3282]) +4 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@gem_pwrite@basic-exhaustion.html
    - shard-snb:          NOTRUN -> [WARN][64] ([i915#2658])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb4/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-protected-buffer:
    - shard-rkl:          NOTRUN -> [SKIP][65] ([i915#4270]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@gem_pxp@create-protected-buffer.html

  * igt@gem_pxp@create-regular-buffer:
    - shard-dg2:          NOTRUN -> [SKIP][66] ([i915#4270]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@gem_pxp@create-regular-buffer.html

  * igt@gem_pxp@fail-invalid-protected-context:
    - shard-tglu:         NOTRUN -> [SKIP][67] ([i915#4270]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@gem_pxp@fail-invalid-protected-context.html

  * igt@gem_readwrite@read-write:
    - shard-mtlp:         NOTRUN -> [SKIP][68] ([i915#3282]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@gem_readwrite@read-write.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#5190] / [i915#8428]) +8 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html

  * igt@gem_render_copy@y-tiled-to-vebox-x-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][70] ([i915#8428]) +2 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@gem_render_copy@y-tiled-to-vebox-x-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-mtlp:         NOTRUN -> [SKIP][71] ([i915#4079])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-7/igt@gem_render_tiled_blits@basic.html

  * igt@gem_set_tiling_vs_blt@tiled-to-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][72] ([i915#4079]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#8411]) +2 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_set_tiling_vs_blt@untiled-to-tiled:
    - shard-dg1:          NOTRUN -> [SKIP][74] ([i915#4079]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#3282]) +4 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_tiled_partial_pwrite_pread@writes-after-reads:
    - shard-dg1:          NOTRUN -> [SKIP][76] ([i915#4077]) +7 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][77] ([i915#3297]) +2 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-tglu:         NOTRUN -> [SKIP][78] ([i915#3323])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-5/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-dg1:          NOTRUN -> [SKIP][79] ([i915#3282] / [i915#3297])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg2:          NOTRUN -> [SKIP][80] ([i915#3297] / [i915#4880])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg1:          NOTRUN -> [SKIP][81] ([i915#3297] / [i915#4880]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][82] ([i915#3297]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@gem_userptr_blits@readonly-pwrite-unsync.html
    - shard-mtlp:         NOTRUN -> [SKIP][83] ([i915#3297]) +4 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-4/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#3297]) +2 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gem_userptr_blits@unsync-unmap:
    - shard-rkl:          NOTRUN -> [SKIP][85] ([i915#3297]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@gem_userptr_blits@unsync-unmap.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-mtlp:         NOTRUN -> [SKIP][86] ([i915#2856]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@bb-large:
    - shard-dg1:          NOTRUN -> [SKIP][87] ([i915#2527]) +3 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@cmd-crossing-page:
    - shard-tglu:         NOTRUN -> [SKIP][88] ([i915#2527] / [i915#2856])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@gen9_exec_parse@cmd-crossing-page.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#2856]) +4 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@gen9_exec_parse@unaligned-access.html
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#2527]) +3 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@gen9_exec_parse@unaligned-access.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-glk:          NOTRUN -> [ABORT][91] ([i915#9849])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#8399]) +1 other test skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
    - shard-dg1:          [PASS][93] -> [FAIL][94] ([i915#3591]) +1 other test fail
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html

  * igt@i915_pm_rps@basic-api:
    - shard-dg2:          NOTRUN -> [SKIP][95] ([i915#6621])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_rps@thresholds-idle@gt0:
    - shard-dg2:          NOTRUN -> [SKIP][96] ([i915#8925])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@i915_pm_rps@thresholds-idle@gt0.html

  * igt@i915_power@sanity:
    - shard-rkl:          NOTRUN -> [SKIP][97] ([i915#7984])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@i915_power@sanity.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][98] ([i915#5723])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_selftest@mock@memory_region:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][99] ([i915#9311])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@i915_selftest@mock@memory_region.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          NOTRUN -> [SKIP][100] ([i915#7707])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@intel_hwmon@hwmon-read.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#5190]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][102] ([i915#4212]) +1 other test skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-dg1:          NOTRUN -> [SKIP][103] ([i915#9531])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][104] ([i915#1769] / [i915#3555])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#5286]) +5 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][106] ([i915#4538] / [i915#5286]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-tglu:         NOTRUN -> [SKIP][107] ([i915#5286]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#3638])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#3638]) +3 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
    - shard-mtlp:         NOTRUN -> [SKIP][110] +8 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-3/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-180:
    - shard-snb:          NOTRUN -> [SKIP][111] +43 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb2/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#4538] / [i915#5190]) +11 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-mtlp:         NOTRUN -> [SKIP][113] ([i915#6187])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][114] ([i915#4538]) +2 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][115] +59 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_joiner@basic:
    - shard-rkl:          NOTRUN -> [SKIP][116] ([i915#10656])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_big_joiner@basic.html
    - shard-tglu:         NOTRUN -> [SKIP][117] ([i915#10656])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-3/igt@kms_big_joiner@basic.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-dg1:          NOTRUN -> [SKIP][118] ([i915#10656]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][119] ([i915#10307] / [i915#6095]) +173 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#6095]) +75 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#10278])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-xe2-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][122] ([i915#6095]) +15 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-7/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-c-edp-1.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][123] ([i915#10307] / [i915#10434] / [i915#6095]) +5 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][124] ([i915#6095]) +79 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-3.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][125] ([i915#6095]) +15 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#7213]) +3 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
    - shard-tglu:         NOTRUN -> [SKIP][127] ([i915#7828]) +5 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-2/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#7828]) +8 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
    - shard-mtlp:         NOTRUN -> [SKIP][129] ([i915#7828]) +4 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@kms_chamelium_hpd@dp-hpd-fast.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-dg1:          NOTRUN -> [SKIP][130] ([i915#7828]) +5 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@vga-hpd-after-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][131] ([i915#7828]) +9 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html

  * igt@kms_content_protection@atomic:
    - shard-dg2:          NOTRUN -> [SKIP][132] ([i915#7118] / [i915#9424])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-dg2:          NOTRUN -> [SKIP][133] ([i915#3299])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#3116]) +2 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#9424])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@lic-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#6944] / [i915#9424])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@kms_content_protection@lic-type-1.html
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#9424])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#7118])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][139] ([i915#3359]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-32x10:
    - shard-tglu:         NOTRUN -> [SKIP][140] ([i915#3555]) +3 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_cursor_crc@cursor-random-32x10.html
    - shard-mtlp:         NOTRUN -> [SKIP][141] ([i915#3555] / [i915#8814])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-7/igt@kms_cursor_crc@cursor-random-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][142] ([i915#3359]) +1 other test skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@kms_cursor_crc@cursor-random-512x170.html
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#3359]) +2 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#3555]) +4 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-mtlp:         NOTRUN -> [SKIP][145] ([i915#9809])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-3/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][146] ([i915#5354]) +30 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-dg1:          NOTRUN -> [SKIP][147] ([i915#4103] / [i915#4213])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-mtlp:         NOTRUN -> [SKIP][148] ([i915#4213])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-snb:          [PASS][149] -> [SKIP][150]
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-snb7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          NOTRUN -> [FAIL][151] ([i915#2346])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([i915#4103] / [i915#4213]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-rkl:          NOTRUN -> [SKIP][153] ([i915#4103])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#9227])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][155] ([i915#9723])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-3/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#8588])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][157] ([i915#3804])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-rkl:          NOTRUN -> [SKIP][158] ([i915#1257])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_dp_aux_dev.html

  * igt@kms_draw_crc@draw-method-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#8812])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_draw_crc@draw-method-mmap-wc.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-dg2:          NOTRUN -> [SKIP][160] ([i915#3840])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#3840])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#3555] / [i915#3840])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_dsc@dsc-with-bpc-formats.html
    - shard-rkl:          NOTRUN -> [SKIP][163] ([i915#3555] / [i915#3840])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-tglu:         NOTRUN -> [SKIP][164] ([i915#3555] / [i915#3840])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-5/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][165] ([i915#3555] / [i915#3840])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-2/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#3840] / [i915#9053])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@psr:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#3469]) +1 other test skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_fbcon_fbt@psr.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][168] ([i915#3955]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-rkl:          NOTRUN -> [SKIP][169] ([i915#4854])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_feature_discovery@chamelium.html
    - shard-dg1:          NOTRUN -> [SKIP][170] ([i915#4854])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-4x:
    - shard-tglu:         NOTRUN -> [SKIP][171] ([i915#1839])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@psr1:
    - shard-dg2:          NOTRUN -> [SKIP][172] ([i915#658])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@kms_feature_discovery@psr1.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][173] ([i915#4881])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][174] +57 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-fences:
    - shard-dg2:          NOTRUN -> [SKIP][175] ([i915#8381])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_flip@2x-flip-vs-fences.html

  * igt@kms_flip@2x-nonexisting-fb-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][176] ([i915#3637]) +2 other tests skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_flip@2x-nonexisting-fb-interruptible.html
    - shard-mtlp:         NOTRUN -> [SKIP][177] ([i915#3637])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-5/igt@kms_flip@2x-nonexisting-fb-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][178] ([i915#9934]) +6 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-fences-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][179] ([i915#8381])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_flip@flip-vs-fences-interruptible.html
    - shard-mtlp:         NOTRUN -> [SKIP][180] ([i915#8381])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-7/igt@kms_flip@flip-vs-fences-interruptible.html

  * igt@kms_flip@plain-flip-ts-check@b-vga1:
    - shard-snb:          [PASS][181] -> [FAIL][182] ([i915#2122]) +1 other test fail
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-snb5/igt@kms_flip@plain-flip-ts-check@b-vga1.html
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb7/igt@kms_flip@plain-flip-ts-check@b-vga1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][183] ([i915#2672]) +4 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#2672])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][185] ([i915#2672] / [i915#3555])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][186] ([i915#2587] / [i915#2672]) +1 other test skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][187] ([i915#3555] / [i915#8810])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][188] ([i915#2672]) +3 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][189] ([i915#2587] / [i915#2672]) +3 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][190] ([i915#8708]) +2 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          [PASS][191] -> [FAIL][192] ([i915#6880]) +1 other test fail
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu.html
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][193] +42 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][194] ([i915#8708]) +19 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][195] ([i915#5439])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-rkl:          NOTRUN -> [SKIP][196] ([i915#9766])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
    - shard-dg1:          NOTRUN -> [SKIP][197] ([i915#9766])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-rkl:          NOTRUN -> [SKIP][198] ([i915#3023]) +23 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-dg2:          NOTRUN -> [SKIP][199] ([i915#3458]) +17 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][200] ([i915#1825]) +14 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#1825]) +41 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][202] ([i915#8708]) +9 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][203] ([i915#3458]) +12 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#433])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([i915#3555] / [i915#8228]) +1 other test skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_hdr@bpc-switch-dpms.html
    - shard-tglu:         NOTRUN -> [SKIP][206] ([i915#3555] / [i915#8228]) +1 other test skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-7/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2:          NOTRUN -> [SKIP][207] ([i915#3555] / [i915#8228])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_hdr@invalid-hdr.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#6301])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@kms_panel_fitting@atomic-fastset.html
    - shard-rkl:          NOTRUN -> [SKIP][209] ([i915#6301])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-dg1:          NOTRUN -> [SKIP][210] ([i915#3555]) +4 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][211] ([i915#8292])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][212] ([i915#9423]) +11 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b-hdmi-a-3.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][213] ([i915#9423]) +7 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][214] ([i915#5176] / [i915#9423]) +1 other test skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][215] ([i915#9423]) +3 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([i915#9423]) +7 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][217] ([i915#5235]) +3 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#5235] / [i915#9423]) +19 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-dp-4.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][219] ([i915#5235]) +5 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][220] ([i915#5235]) +3 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-hdmi-a-3.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][221] ([i915#5235]) +2 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][222] ([i915#3555] / [i915#5235])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d-edp-1.html

  * igt@kms_pm_backlight@fade:
    - shard-rkl:          NOTRUN -> [SKIP][223] ([i915#5354])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][224] ([i915#5354])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg1:          NOTRUN -> [SKIP][225] ([i915#9685])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-mtlp:         NOTRUN -> [SKIP][226] ([i915#9292])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-5/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-rkl:          NOTRUN -> [SKIP][227] ([i915#9685]) +1 other test skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][228] ([i915#9340])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][229] ([i915#9519])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [PASS][230] -> [SKIP][231] ([i915#9519])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-7/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [PASS][232] -> [SKIP][233] ([i915#9519])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_pm_rpm@pm-caching:
    - shard-mtlp:         NOTRUN -> [SKIP][234] ([i915#4077]) +2 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-6/igt@kms_pm_rpm@pm-caching.html

  * igt@kms_pm_rpm@pm-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][235] ([i915#4077]) +12 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_pm_rpm@pm-tiling.html

  * igt@kms_prime@d3hot:
    - shard-dg2:          NOTRUN -> [SKIP][236] ([i915#6524] / [i915#6805])
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][237] +19 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][238] ([i915#9808]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-dg2:          NOTRUN -> [SKIP][239] ([i915#9683]) +1 other test skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-mtlp:         NOTRUN -> [SKIP][240] ([i915#4348]) +1 other test skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-dg1:          NOTRUN -> [SKIP][241] ([i915#9683])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-tglu:         NOTRUN -> [SKIP][242] ([i915#9683])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-dg1:          NOTRUN -> [SKIP][243] ([i915#1072] / [i915#9732]) +18 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_psr@pr-primary-page-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][244] ([i915#9688]) +5 other tests skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-6/igt@kms_psr@pr-primary-page-flip.html

  * igt@kms_psr@pr-primary-render:
    - shard-dg2:          NOTRUN -> [SKIP][245] ([i915#1072] / [i915#9673] / [i915#9732]) +2 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_psr@pr-primary-render.html

  * igt@kms_psr@psr-cursor-render:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#1072] / [i915#9732]) +19 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@kms_psr@psr-cursor-render.html

  * igt@kms_psr@psr2-cursor-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][247] ([i915#1072] / [i915#9732]) +24 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@kms_psr@psr2-cursor-mmap-gtt.html

  * igt@kms_psr@psr2-primary-render:
    - shard-tglu:         NOTRUN -> [SKIP][248] ([i915#9732]) +12 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr@psr2-sprite-plane-onoff:
    - shard-glk:          NOTRUN -> [SKIP][249] +240 other tests skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk8/igt@kms_psr@psr2-sprite-plane-onoff.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2:          NOTRUN -> [SKIP][250] ([i915#9685]) +1 other test skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#4235])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-6/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-mtlp:         NOTRUN -> [SKIP][252] ([i915#4235])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-rkl:          NOTRUN -> [SKIP][253] ([i915#5289])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-dg1:          NOTRUN -> [SKIP][254] ([i915#5289])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-dg2:          NOTRUN -> [SKIP][255] ([i915#3555]) +2 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_scaling_modes@scaling-mode-none.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg2:          [PASS][256] -> [FAIL][257] ([IGT#2])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-11/igt@kms_sysfs_edid_timing.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-3/igt@kms_sysfs_edid_timing.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-dg2:          NOTRUN -> [SKIP][258] ([i915#8623])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-tglu:         NOTRUN -> [SKIP][259] ([i915#8623])
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-mtlp:         NOTRUN -> [SKIP][260] ([i915#8623])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][261] -> [FAIL][262] ([i915#9196])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
    - shard-mtlp:         [PASS][263] -> [FAIL][264] ([i915#9196])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][265] ([i915#9906])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_writeback@writeback-check-output:
    - shard-dg2:          NOTRUN -> [SKIP][266] ([i915#2437]) +1 other test skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][267] ([i915#2437])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-dg2:          NOTRUN -> [SKIP][268] ([i915#2437] / [i915#9412])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
    - shard-rkl:          NOTRUN -> [SKIP][269] ([i915#2437] / [i915#9412]) +2 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-tglu:         NOTRUN -> [SKIP][270] ([i915#2437] / [i915#9412])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_writeback@writeback-pixel-formats.html
    - shard-glk:          NOTRUN -> [SKIP][271] ([i915#2437])
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk3/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@global-sseu-config-invalid:
    - shard-mtlp:         NOTRUN -> [SKIP][272] ([i915#7387])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@perf@global-sseu-config-invalid.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-dg1:          NOTRUN -> [SKIP][273] ([i915#2433])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@busy-double-start@vecs1:
    - shard-dg2:          [PASS][274] -> [FAIL][275] ([i915#4349]) +3 other tests fail
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-6/igt@perf_pmu@busy-double-start@vecs1.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-5/igt@perf_pmu@busy-double-start@vecs1.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-rkl:          NOTRUN -> [SKIP][276] ([i915#8850])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-2/igt@perf_pmu@cpu-hotplug.html
    - shard-dg1:          NOTRUN -> [SKIP][277] ([i915#8850])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-15/igt@perf_pmu@cpu-hotplug.html

  * igt@perf_pmu@enable-race@ccs0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][278] ([i915#9853])
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-2/igt@perf_pmu@enable-race@ccs0.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][279] ([i915#8516])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-4/igt@perf_pmu@rc6-all-gts.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-dg2:          NOTRUN -> [SKIP][280] ([i915#8516])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@coherency-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][281] ([i915#3708] / [i915#4077]) +1 other test skip
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@prime_vgem@coherency-gtt.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-dg1:          NOTRUN -> [SKIP][282] ([i915#3708])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@prime_vgem@fence-flip-hang.html
    - shard-rkl:          NOTRUN -> [SKIP][283] ([i915#3708])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-1/igt@prime_vgem@fence-flip-hang.html

  * igt@syncobj_timeline@invalid-wait-zero-handles:
    - shard-glk:          NOTRUN -> [FAIL][284] ([i915#9781])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-glk1/igt@syncobj_timeline@invalid-wait-zero-handles.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-dg1:          NOTRUN -> [SKIP][285] ([i915#4818])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-13/igt@tools_test@sysfs_l3_parity.html
    - shard-mtlp:         NOTRUN -> [SKIP][286] ([i915#4818])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-8/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_create_bo@create-bo-zeroed:
    - shard-tglu:         NOTRUN -> [SKIP][287] ([i915#2575]) +8 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-7/igt@v3d/v3d_create_bo@create-bo-zeroed.html

  * igt@v3d/v3d_submit_cl@bad-multisync-out-sync:
    - shard-dg2:          NOTRUN -> [SKIP][288] ([i915#2575]) +9 other tests skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-3/igt@v3d/v3d_submit_cl@bad-multisync-out-sync.html

  * igt@v3d/v3d_submit_cl@single-in-sync:
    - shard-dg1:          NOTRUN -> [SKIP][289] ([i915#2575]) +9 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@v3d/v3d_submit_cl@single-in-sync.html

  * igt@v3d/v3d_submit_csd@bad-pad:
    - shard-mtlp:         NOTRUN -> [SKIP][290] ([i915#2575]) +2 other tests skip
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-5/igt@v3d/v3d_submit_csd@bad-pad.html

  * igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
    - shard-mtlp:         NOTRUN -> [SKIP][291] ([i915#7711]) +1 other test skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-3/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html

  * igt@vc4/vc4_tiling@set-bad-handle:
    - shard-rkl:          NOTRUN -> [SKIP][292] ([i915#7711]) +8 other tests skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@vc4/vc4_tiling@set-bad-handle.html

  * igt@vc4/vc4_wait_bo@bad-bo:
    - shard-dg2:          NOTRUN -> [SKIP][293] ([i915#7711]) +6 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@vc4/vc4_wait_bo@bad-bo.html

  * igt@vc4/vc4_wait_bo@used-bo-0ns:
    - shard-dg1:          NOTRUN -> [SKIP][294] ([i915#7711]) +5 other tests skip
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-16/igt@vc4/vc4_wait_bo@used-bo-0ns.html

  
#### Possible fixes ####

  * igt@gem_eio@kms:
    - shard-tglu:         [INCOMPLETE][295] ([i915#10513]) -> [PASS][296]
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-9/igt@gem_eio@kms.html
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-6/igt@gem_eio@kms.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [FAIL][297] ([i915#5784]) -> [PASS][298]
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-16/igt@gem_eio@reset-stress.html
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-14/igt@gem_eio@reset-stress.html

  * igt@gem_lmem_swapping@heavy-random@lmem0:
    - shard-dg1:          [FAIL][299] ([i915#10378]) -> [PASS][300]
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-17/igt@gem_lmem_swapping@heavy-random@lmem0.html
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-17/igt@gem_lmem_swapping@heavy-random@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-snb:          [INCOMPLETE][301] ([i915#9849]) -> [PASS][302]
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-snb5/igt@i915_module_load@reload-with-fault-injection.html
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html
    - shard-tglu:         [INCOMPLETE][303] ([i915#10047] / [i915#10887] / [i915#9820]) -> [PASS][304]
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-tglu:         [DMESG-WARN][305] ([i915#10166] / [i915#1982]) -> [PASS][306]
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-2/igt@kms_cursor_legacy@torture-move@pipe-a.html
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [SKIP][307] ([i915#4281]) -> [PASS][308]
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-7/igt@kms_pm_dc@dc9-dpms.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-4/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg2:          [SKIP][309] ([i915#9519]) -> [PASS][310]
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-rkl:          [SKIP][311] ([i915#9519]) -> [PASS][312] +1 other test pass
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1:
    - shard-tglu:         [FAIL][313] ([i915#9196]) -> [PASS][314] +1 other test pass
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html

  
#### Warnings ####

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-tglu:         [FAIL][315] ([i915#2842]) -> [FAIL][316] ([i915#2876])
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-tglu-8/igt@gem_exec_fair@basic-pace@bcs0.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-tglu-9/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
    - shard-dg2:          [FAIL][317] ([i915#10446]) -> [FAIL][318] ([i915#10378])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-11/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-10/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg1:          [INCOMPLETE][319] ([i915#1982] / [i915#9849]) -> [INCOMPLETE][320] ([i915#1982] / [i915#9820] / [i915#9849])
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg1-16/igt@i915_module_load@reload-with-fault-injection.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg1-18/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         [ABORT][321] ([i915#10131]) -> [ABORT][322] ([i915#10131] / [i915#10887] / [i915#9820])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
    - shard-dg2:          [SKIP][323] ([i915#10433] / [i915#3458]) -> [SKIP][324] ([i915#3458])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-snb:          [SKIP][325] -> [FAIL][326] ([i915#10788])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-snb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-snb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
    - shard-dg2:          [SKIP][327] ([i915#3458]) -> [SKIP][328] ([i915#10433] / [i915#3458]) +3 other tests skip
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][329] ([i915#3361]) -> [SKIP][330] ([i915#4281])
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-rkl-2/igt@kms_pm_dc@dc9-dpms.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-dg2:          [SKIP][331] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][332] ([i915#1072] / [i915#9732]) +8 other tests skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-11/igt@kms_psr@fbc-pr-primary-page-flip.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-7/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_psr@psr-cursor-mmap-cpu:
    - shard-dg2:          [SKIP][333] ([i915#1072] / [i915#9732]) -> [SKIP][334] ([i915#1072] / [i915#9673] / [i915#9732]) +6 other tests skip
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-7/igt@kms_psr@psr-cursor-mmap-cpu.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_psr@psr-cursor-mmap-cpu.html

  * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
    - shard-dg2:          [CRASH][335] ([i915#9351]) -> [INCOMPLETE][336] ([i915#5493])
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14801/shard-dg2-4/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html

  
  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [i915#10047]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10047
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10166
  [i915#10278]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10278
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10446]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10446
  [i915#10513]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10513
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10788]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10788
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#2876]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2876
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3936
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4036]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4036
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/433
  [i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4818
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4881
  [i915#5176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6117
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8292
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8588]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8588
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8850]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8850
  [i915#8925]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8925
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9227]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9227
  [i915#9292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9292
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9351]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9351
  [i915#9364]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9364
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9606]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9606
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9781
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
  [i915#9853]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9853
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7867 -> IGTPW_11177
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_14801: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html

[-- Attachment #2: Type: text/html, Size: 113332 bytes --]

Re: ✗ CI.xeFULL: failure for lib: sync i915_pciids.h and _local.h with kernel

[Kamil Konieczny]

Hi igt-dev,
On 2024-05-22 at 17:22:01 -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: lib: sync i915_pciids.h and _local.h with kernel
> URL   : https://patchwork.freedesktop.org/series/133915/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from XEIGT_7867_full -> XEIGTPW_11177_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with XEIGTPW_11177_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in XEIGTPW_11177_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (3 -> 2)
> ------------------------------
> 
>   Missing    (1): shard-adlp 
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in XEIGTPW_11177_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6:
>     - shard-dg2-set2:     [PASS][1] -> [ABORT][2] +5 other tests abort
>    [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-dg2-433/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6.html
>    [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-dg2-466/igt@kms_flip@basic-flip-vs-modeset@b-hdmi-a6.html
> 

Unrelated to adding new pci ids.

Regards,
Kamil

>   
> #### Suppressed ####
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@kms_cursor_crc@cursor-offscreen-256x256:
>     - {shard-lnl}:        [PASS][3] -> [FAIL][4]
>    [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-5/igt@kms_cursor_crc@cursor-offscreen-256x256.html
>    [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@kms_cursor_crc@cursor-offscreen-256x256.html
> 
>   * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1:
>     - {shard-lnl}:        [PASS][5] -> [DMESG-WARN][6]
>    [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-7/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1.html
>    [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-7/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-edp1.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
>     - {shard-lnl}:        NOTRUN -> [ABORT][7] +1 other test abort
>    [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
>     - {shard-lnl}:        NOTRUN -> [FAIL][8]
>    [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
> 
>   * igt@kms_plane@plane-panning-bottom-right@pipe-b:
>     - {shard-lnl}:        [PASS][9] -> [ABORT][10] +3 other tests abort
>    [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7867/shard-lnl-6/igt@kms_plane@plane-panning-bottom-right@pipe-b.html
>    [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-5/igt@kms_plane@plane-panning-bottom-right@pipe-b.html
> 
>   * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
>     - {shard-lnl}:        NOTRUN -> [SKIP][11]
>    [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/shard-lnl-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in XEIGTPW_11177_full that come from known issues:
> 
> ### IGT changes ###
> 

...cut...

> 
> Build changes
> -------------
> 
>   * IGT: IGT_7867 -> IGTPW_11177
>   * Linux: xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd -> xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf
> 
>   IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   xe-1323-b134db8544f8d5b8a960b368afe12820c3cbe8cd: b134db8544f8d5b8a960b368afe12820c3cbe8cd
>   xe-1326-60134578b28bbd5dca007a0d8abaa6daaca9ddaf: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11177/index.html

Re: ✗ Fi.CI.IGT: failure for lib: sync i915_pciids.h and _local.h with kernel

[Kamil Konieczny]

Hi igt-dev,
On 2024-05-23 at 05:20:01 -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: lib: sync i915_pciids.h and _local.h with kernel
> URL   : https://patchwork.freedesktop.org/series/133915/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_14801_full -> IGTPW_11177_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with IGTPW_11177_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in IGTPW_11177_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html
> 
> Participating hosts (9 -> 9)
> ------------------------------
> 
>   No changes in participating hosts
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in IGTPW_11177_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@kms_flip@dpms-off-confusion-interruptible@c-dp4:
>     - shard-dg2:          NOTRUN -> [INCOMPLETE][1]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/shard-dg2-11/igt@kms_flip@dpms-off-confusion-interruptible@c-dp4.html
> 

Unrelated,

Regards,
Kamil

>   
> Known issues
> ------------
> 
>   Here are the changes found in IGTPW_11177_full that come from known issues:

...cut...

> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_7867 -> IGTPW_11177
>   * Piglit: piglit_4509 -> None
> 
>   CI-20190529: 20190529
>   CI_DRM_14801: 60134578b28bbd5dca007a0d8abaa6daaca9ddaf @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_11177: b2c2edb42403917736414e00184336a877f7cb36 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   IGT_7867: f3006a13799e3bc45d754aa8ad318394277d69ac @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11177/index.html