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* [PATCH] tests/xe: Add test waiting for ufence signaling
@ 2024-07-17 12:23 Maarten Lankhorst
  2024-07-17 13:23 ` ✓ CI.xeBAT: success for " Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Maarten Lankhorst @ 2024-07-17 12:23 UTC (permalink / raw)
  To: igt-dev; +Cc: Maarten Lankhorst

Create a single VM_BIND that signals a valid and invalid ufence,
to see what happens..

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 tests/intel/xe_vm.c | 67 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index a4f6c7a0b..aba2e1b82 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -1839,6 +1839,70 @@ static void bind_flag_invalid(int fd)
 	xe_vm_destroy(fd, vm);
 }
 
+/**
+ * SUBTEST: ufence-invalid
+ * Description:
+ *	Test what happens when trying to signal completion with read-only
+ * 	ufence address.
+ * Functionality: bind
+ * Test category: functionality test
+ */
+static void ufence_invalid(int fd)
+{
+	uint32_t bo, bo_size = xe_get_default_alignment(fd);
+	uint64_t addr = 0x1a0000;
+	uint32_t vm;
+	uint64_t *ro_ufence = mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+	uint64_t ufence = 0;
+	struct drm_xe_vm_bind bind;
+	struct drm_xe_sync sync[] = {
+		{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, },
+		{ .type = DRM_XE_SYNC_TYPE_USER_FENCE, .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+			.timeline_value = 0x1234567890abcdef,
+		}
+	};
+
+	igt_assert(ro_ufence != MAP_FAILED);
+
+	vm = xe_vm_create(fd, 0, 0);
+	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0), 0);
+	sync[0].handle = syncobj_create(fd, 0);
+
+	memset(&bind, 0, sizeof(bind));
+	bind.vm_id = vm;
+	bind.num_binds = 1;
+	bind.bind.obj = bo;
+	bind.bind.range = bo_size;
+	bind.bind.addr = addr;
+	bind.bind.op = DRM_XE_VM_BIND_OP_MAP;
+	bind.bind.pat_index = intel_get_pat_idx_wb(fd);
+	bind.num_syncs = ARRAY_SIZE(sync);
+	bind.syncs = to_user_pointer(sync);
+
+	/* Using valid with valid ufence should work */
+	sync[1].addr = (uintptr_t)&ufence;
+	bind.bind.flags = 0;
+	igt_ioctl(fd, DRM_IOCTL_XE_VM_BIND, &bind);
+	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	syncobj_reset(fd, &sync[0].handle, 1);
+	/* Small sleep to allow some time for async kernel worker to run */
+	usleep(100000);
+	igt_assert_eq_u64(ufence, sync[1].timeline_value);
+
+	/* Also with ro_ufence, but it should remain unsignaled */
+	sync[1].addr = (uintptr_t)ro_ufence;
+	bind.bind.flags = DRM_XE_VM_BIND_FLAG_READONLY;
+	igt_ioctl(fd, DRM_IOCTL_XE_VM_BIND, &bind);
+	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	syncobj_reset(fd, &sync[0].handle, 1);
+	usleep(100000);
+	igt_assert_eq_u64(*ro_ufence, 0);
+
+	syncobj_destroy(fd, sync[0].handle);
+	xe_vm_destroy(fd, vm);
+	munmap(ro_ufence, sysconf(_SC_PAGESIZE));
+}
+
 igt_main
 {
 	struct drm_xe_engine_class_instance *hwe, *hwe_non_copy = NULL;
@@ -1973,6 +2037,9 @@ igt_main
 	igt_subtest("bind-flag-invalid")
 		bind_flag_invalid(fd);
 
+	igt_subtest("ufence-invalid")
+		ufence_invalid(fd);
+
 	igt_subtest("shared-pte-page")
 		xe_for_each_engine(fd, hwe)
 			shared_pte_page(fd, hwe, 4,
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-07-18  5:19 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-07-17 12:23 [PATCH] tests/xe: Add test waiting for ufence signaling Maarten Lankhorst
2024-07-17 13:23 ` ✓ CI.xeBAT: success for " Patchwork
2024-07-17 13:30 ` ✓ Fi.CI.BAT: " Patchwork
2024-07-17 13:52 ` [PATCH] " Matthew Brost
2024-07-17 16:10 ` ✗ CI.xeFULL: failure for " Patchwork
2024-07-18  5:19 ` ✗ Fi.CI.IGT: " Patchwork

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