[igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Arjun Melkaveri]

Added __for_each_physical_engine to utilize all available engines.
Moved single, signal, preempt, poll and headless test cases
from static to dynamic group.

Cc: Dec Katarzyna <katarzyna.dec@intel.com>
Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com>
Cc: Tahvanainen Jari <jari.tahvanainen@intel.com>
Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Ursulin Tvrtko <tvrtko.ursulin@intel.com>
---
 tests/i915/gem_exec_nop.c | 162 ++++++++++++++++++++++----------------
 1 file changed, 94 insertions(+), 68 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index dbedb356..8d2c1ef3 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
 		(end->tv_nsec - start->tv_nsec)*1e-9);
 }
 
-static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
-			  int timeout, unsigned long *out)
+static double nop_on_ring(int fd, uint32_t handle,
+			  const struct intel_execution_engine2 *e, int timeout,
+			  unsigned long *out)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
@@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring_id;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	if (__gem_execbuf(fd, &execbuf)) {
-		execbuf.flags = ring_id;
+		execbuf.flags = e->flags;
 		gem_execbuf(fd, &execbuf);
 	}
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
+static void poll_ring(int fd, const struct intel_execution_engine2 *e,
+		      int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -121,9 +123,9 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	gem_require_ring(fd, engine);
-	igt_require(gem_can_store_dword(fd, engine));
-	igt_require(gem_engine_has_mutable_submission(fd, engine));
+	gem_require_ring(fd, e->flags);
+	igt_require(gem_can_store_dword(fd, e->class));
+	igt_require(gem_class_has_mutable_submission(fd, e->class));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -187,7 +189,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engine | flags;
+	execbuf.flags = e->flags | flags;
 
 	cycles = 0;
 	do {
@@ -209,7 +211,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 	gem_sync(fd, obj.handle);
 
 	igt_info("%s completed %ld cycles: %.3f us\n",
-		 name, cycles, elapsed*1e-3/cycles);
+		 e->name, cycles, elapsed*1e-3/cycles);
 
 	munmap(batch, 4096);
 	gem_close(fd, obj.handle);
@@ -218,6 +220,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 static void poll_sequential(int fd, const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
+	const struct intel_execution_engine2 *e;
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -234,13 +237,14 @@ static void poll_sequential(int fd, const char *name, int timeout)
 		flags |= I915_EXEC_SECURE;
 
 	nengine = 0;
-	for_each_physical_engine(e, fd) {
-		if (!gem_can_store_dword(fd, eb_ring(e)) ||
-		    !gem_engine_has_mutable_submission(fd, eb_ring(e)))
+	__for_each_physical_engine(fd, e) {
+		if (!gem_can_store_dword(fd, e->class) ||
+		    !gem_class_has_mutable_submission(fd, e->class))
 			continue;
 
-		engines[nengine++] = eb_ring(e);
+		engines[nengine++] = e->flags;
 	}
+
 	igt_require(nengine);
 
 	memset(obj, 0, sizeof(obj));
@@ -344,21 +348,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
 }
 
 static void single(int fd, uint32_t handle,
-		   unsigned ring_id, const char *ring_name)
+		   const struct intel_execution_engine2 *e)
 {
 	double time;
 	unsigned long count;
 
-	gem_require_ring(fd, ring_id);
+	gem_require_ring(fd, e->flags);
 
-	time = nop_on_ring(fd, handle, ring_id, 20, &count);
+	time = nop_on_ring(fd, handle, e, 20, &count);
 	igt_info("%s: %'lu cycles: %.3fus\n",
-		 ring_name, count, time*1e6 / count);
+		  e->name, count, time*1e6 / count);
 }
 
 static double
-stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
-		   int timeout, int reps)
+stable_nop_on_ring(int fd, uint32_t handle,
+		   const struct intel_execution_engine2 *e, int timeout,
+		   int reps)
 {
 	igt_stats_t s;
 	double n;
@@ -372,7 +377,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
 		unsigned long count;
 		double time;
 
-		time = nop_on_ring(fd, handle, engine, timeout, &count);
+		time = nop_on_ring(fd, handle, e, timeout, &count);
 		igt_stats_push_float(&s, time / count);
 	}
 
@@ -388,7 +393,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
                      "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
                      #x, #ref, x, tolerance * 100.0, ref)
 
-static void headless(int fd, uint32_t handle)
+static void headless(int fd, uint32_t handle,
+		     const struct intel_execution_engine2 *e)
 {
 	unsigned int nr_connected = 0;
 	drmModeConnector *connector;
@@ -411,7 +417,7 @@ static void headless(int fd, uint32_t handle)
 	kmstest_set_vt_graphics_mode();
 
 	/* benchmark nops */
-	n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
+	n_display = stable_nop_on_ring(fd, handle, e, 1, 5);
 	igt_info("With one display connected: %.2fus\n",
 		 n_display * 1e6);
 
@@ -419,7 +425,7 @@ static void headless(int fd, uint32_t handle)
 	kmstest_unset_all_crtcs(fd, res);
 
 	/* benchmark nops again */
-	n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
+	n_headless = stable_nop_on_ring(fd, handle, e, 1, 5);
 	igt_info("Without a display connected (headless): %.2fus\n",
 		 n_headless * 1e6);
 
@@ -429,6 +435,7 @@ static void headless(int fd, uint32_t handle)
 
 static void parallel(int fd, uint32_t handle, int timeout)
 {
+	const struct intel_execution_engine2 *e;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
 	unsigned engines[16];
@@ -439,12 +446,11 @@ static void parallel(int fd, uint32_t handle, int timeout)
 
 	sum = 0;
 	nengine = 0;
-	for_each_physical_engine(e, fd) {
-		engines[nengine] = eb_ring(e);
-		names[nengine] = e->name;
-		nengine++;
+	__for_each_physical_engine(fd, e) {
+		engines[nengine] = e->flags;
+		names[nengine++] = e->name;
 
-		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		sum += time;
 		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
 	}
@@ -490,6 +496,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
 
 static void series(int fd, uint32_t handle, int timeout)
 {
+	const struct intel_execution_engine2 *e;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
 	struct timespec start, now, sync;
@@ -500,8 +507,8 @@ static void series(int fd, uint32_t handle, int timeout)
 	const char *name;
 
 	nengine = 0;
-	for_each_physical_engine(e, fd) {
-		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+	__for_each_physical_engine(fd, e) {
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		if (time > max) {
 			name = e->name;
 			max = time;
@@ -509,7 +516,7 @@ static void series(int fd, uint32_t handle, int timeout)
 		if (time < min)
 			min = time;
 		sum += time;
-		engines[nengine++] = eb_ring(e);
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 	igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
@@ -580,6 +587,7 @@ static void xchg(void *array, unsigned i, unsigned j)
 static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 {
 	const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
+	const struct intel_execution_engine2 *e;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
 	unsigned engines[16];
@@ -595,14 +603,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 
 	nengine = 0;
 	sum = 0;
-	for_each_physical_engine(e, fd) {
+	__for_each_physical_engine(fd, e) {
 		unsigned long count;
 
-		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		sum += time;
 		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
 
-		engines[nengine++] = eb_ring(e);
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 	igt_info("Total (individual) execution latency %.3fus per cycle\n",
@@ -625,6 +633,7 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 
 		igt_require(__gem_context_create(fd, &id) == 0);
 		execbuf.rsvd1 = id;
+		gem_context_set_all_engines(fd, execbuf.rsvd1);
 	}
 
 	for (n = 0; n < nengine; n++) {
@@ -642,8 +651,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 		obj[0].handle = gem_create(fd, 4096);
 		gem_execbuf(fd, &execbuf);
 
-		if (flags & CONTEXT)
+		if (flags & CONTEXT) {
 			execbuf.rsvd1 = gem_context_create(fd);
+			gem_context_set_all_engines(fd, execbuf.rsvd1);
+		}
 
 		hars_petruska_f54_1_random_perturb(child);
 
@@ -716,6 +727,7 @@ static void fence_signal(int fd, uint32_t handle,
 #define NFENCES 512
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
+	struct intel_execution_engine2 *__e;
 	struct timespec start, now;
 	unsigned engines[16];
 	unsigned nengine;
@@ -726,8 +738,8 @@ static void fence_signal(int fd, uint32_t handle,
 
 	nengine = 0;
 	if (ring_id == ALL_ENGINES) {
-		for_each_physical_engine(e, fd)
-			engines[nengine++] = eb_ring(e);
+		__for_each_physical_engine(fd, __e)
+			engines[nengine++] = __e->flags;
 	} else {
 		gem_require_ring(fd, ring_id);
 		engines[nengine++] = ring_id;
@@ -781,13 +793,12 @@ static void fence_signal(int fd, uint32_t handle,
 		if (fences[n] != -1)
 			close(fences[n]);
 	free(fences);
-
 	igt_info("Signal %s: %'lu cycles (%'lu signals): %.3fus\n",
 		 ring_name, count, signal, elapsed(&start, &now) * 1e6 / count);
 }
 
 static void preempt(int fd, uint32_t handle,
-		   unsigned ring_id, const char *ring_name)
+		    const struct intel_execution_engine2 *e)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
@@ -795,13 +806,13 @@ static void preempt(int fd, uint32_t handle,
 	unsigned long count;
 	uint32_t ctx[2];
 
-	gem_require_ring(fd, ring_id);
+	gem_require_ring(fd, e->flags);
 
-	ctx[0] = gem_context_create(fd);
-	gem_context_set_priority(fd, ctx[0], MIN_PRIO);
-
-	ctx[1] = gem_context_create(fd);
-	gem_context_set_priority(fd, ctx[1], MAX_PRIO);
+	for (int i = 0; i < 2; i++) {
+		ctx[i] = gem_context_create(fd);
+		gem_context_set_all_engines(fd, ctx[i]);
+		gem_context_set_priority(fd, ctx[i], MAX_PRIO);
+	}
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = handle;
@@ -809,11 +820,11 @@ static void preempt(int fd, uint32_t handle,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring_id;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	if (__gem_execbuf(fd, &execbuf)) {
-		execbuf.flags = ring_id;
+		execbuf.flags = e->flags;
 		gem_execbuf(fd, &execbuf);
 	}
 	execbuf.rsvd1 = ctx[1];
@@ -825,7 +836,7 @@ static void preempt(int fd, uint32_t handle,
 		igt_spin_t *spin =
 			__igt_spin_new(fd,
 				       .ctx = ctx[0],
-				       .engine = ring_id);
+				       .engine = e->flags);
 
 		for (int loop = 0; loop < 1024; loop++)
 			gem_execbuf(fd, &execbuf);
@@ -841,12 +852,12 @@ static void preempt(int fd, uint32_t handle,
 	gem_context_destroy(fd, ctx[0]);
 
 	igt_info("%s: %'lu cycles: %.3fus\n",
-		 ring_name, count, elapsed(&start, &now)*1e6 / count);
+		 e->name, count, elapsed(&start, &now)*1e6 / count);
 }
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	uint32_t handle = 0;
 	int device = -1;
 
@@ -873,11 +884,19 @@ igt_main
 	igt_subtest("basic-sequential")
 		sequential(device, handle, 0, 5);
 
-	for (e = intel_execution_engines; e->name; e++) {
-		igt_subtest_f("%s", e->name)
-			single(device, handle, eb_ring(e), e->name);
-		igt_subtest_f("signal-%s", e->name)
-			fence_signal(device, handle, eb_ring(e), e->name, 5);
+	igt_subtest_with_dynamic("single") {
+		__for_each_physical_engine(device, e) {
+			igt_dynamic_f("%s", e->name)
+				single(device, handle, e);
+		}
+	}
+
+	igt_subtest_with_dynamic("signal") {
+		__for_each_physical_engine(device, e) {
+			igt_dynamic_f("%s", e->name)
+				fence_signal(device, handle, e->flags,
+					     e->name, 5);
+		}
 	}
 
 	igt_subtest("signal-all")
@@ -907,10 +926,11 @@ igt_main
 			igt_require(gem_scheduler_has_ctx_priority(device));
 			igt_require(gem_scheduler_has_preemption(device));
 		}
-
-		for (e = intel_execution_engines; e->name; e++) {
-			igt_subtest_f("preempt-%s", e->name)
-				preempt(device, handle, eb_ring(e), e->name);
+		igt_subtest_with_dynamic("preempt") {
+			__for_each_physical_engine(device, e) {
+				igt_dynamic_f("%s", e->name)
+					preempt(device, handle, e);
+			}
 		}
 	}
 
@@ -919,19 +939,25 @@ igt_main
 			igt_device_set_master(device);
 		}
 
-		for (e = intel_execution_engines; e->name; e++) {
-			/* Requires master for STORE_DWORD on gen4/5 */
-			igt_subtest_f("poll-%s", e->name)
-				poll_ring(device, eb_ring(e), e->name, 20);
+		igt_subtest_with_dynamic("poll") {
+			__for_each_physical_engine(device, e) {
+				/* Requires master for STORE_DWORD on gen4/5 */
+				igt_dynamic_f("%s", e->name)
+					poll_ring(device, e, 20);
+			}
+		}
+
+		igt_subtest_with_dynamic("headless") {
+			__for_each_physical_engine(device, e) {
+				igt_dynamic_f("%s", e->name)
+				/* Requires master for changing display modes */
+					headless(device, handle, e);
+			}
 		}
 
 		igt_subtest("poll-sequential")
 			poll_sequential(device, "Sequential", 20);
 
-		igt_subtest("headless") {
-			/* Requires master for changing display modes */
-			headless(device, handle);
-		}
 	}
 
 	igt_fixture {
-- 
2.24.0

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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Chris Wilson]

Quoting Arjun Melkaveri (2020-01-21 12:31:20)
> Added __for_each_physical_engine to utilize all available engines.
> Moved single, signal, preempt, poll and headless test cases
> from static to dynamic group.

But doesn't this prevent us from exercising the legacy ABI?
-Chris
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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Tvrtko Ursulin]

On 21/01/2020 12:40, Chris Wilson wrote:
> Quoting Arjun Melkaveri (2020-01-21 12:31:20)
>> Added __for_each_physical_engine to utilize all available engines.
>> Moved single, signal, preempt, poll and headless test cases
>> from static to dynamic group.
> 
> But doesn't this prevent us from exercising the legacy ABI?

It was my suggestion that for gem_exec_nop (measuring execution speed) 
we don't care about legacy ABI.

Regards,

Tvrtko


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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Chris Wilson]

Quoting Tvrtko Ursulin (2020-01-21 13:50:34)
> 
> On 21/01/2020 12:40, Chris Wilson wrote:
> > Quoting Arjun Melkaveri (2020-01-21 12:31:20)
> >> Added __for_each_physical_engine to utilize all available engines.
> >> Moved single, signal, preempt, poll and headless test cases
> >> from static to dynamic group.
> > 
> > But doesn't this prevent us from exercising the legacy ABI?
> 
> It was my suggestion that for gem_exec_nop (measuring execution speed) 
> we don't care about legacy ABI.

It's my glxgears, the first thing I check to get a feel of a system.
I'm particularly sensitive to it :)
-Chris
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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Chris Wilson]

Quoting Chris Wilson (2020-01-21 13:56:51)
> Quoting Tvrtko Ursulin (2020-01-21 13:50:34)
> > 
> > On 21/01/2020 12:40, Chris Wilson wrote:
> > > Quoting Arjun Melkaveri (2020-01-21 12:31:20)
> > >> Added __for_each_physical_engine to utilize all available engines.
> > >> Moved single, signal, preempt, poll and headless test cases
> > >> from static to dynamic group.
> > > 
> > > But doesn't this prevent us from exercising the legacy ABI?
> > 
> > It was my suggestion that for gem_exec_nop (measuring execution speed) 
> > we don't care about legacy ABI.
> 
> It's my glxgears, the first thing I check to get a feel of a system.
> I'm particularly sensitive to it :)

Ok, there's no requirement here for the legacy ABI at all. So long as
there is a test somewhere that sends a request along an I915_EXEC_*, we
don't care about it here.
-Chris
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[igt-dev] ✓ Fi.CI.BAT: success for i915/gem_exec_nop:Adjusted test to utilize all available engines

[Patchwork]

== Series Details ==

Series: i915/gem_exec_nop:Adjusted test to utilize all available engines
URL   : https://patchwork.freedesktop.org/series/72334/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7783 -> IGTPW_3958
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with IGTPW_3958 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3958, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3958:

### IGT changes ###

#### Warnings ####

  * igt@gem_exec_parallel@contexts:
    - fi-byt-j1900:       [INCOMPLETE][1] ([i915#45] / [i915#999]) -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-byt-j1900/igt@gem_exec_parallel@contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-byt-j1900/igt@gem_exec_parallel@contexts.html

  
Known issues
------------

  Here are the changes found in IGTPW_3958 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-lmem:        [PASS][3] -> [DMESG-WARN][4] ([i915#889])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6600u:       [PASS][5] -> [DMESG-WARN][6] ([i915#889]) +23 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][7] -> [DMESG-FAIL][8] ([i915#725])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gt_lrc:
    - fi-skl-6600u:       [PASS][9] -> [DMESG-FAIL][10] ([i915#889]) +7 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-cfl-8700k:       [DMESG-WARN][11] ([i915#889]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#889]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [INCOMPLETE][15] ([i915#151]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  
  [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
  [i915#999]: https://gitlab.freedesktop.org/drm/intel/issues/999


Participating hosts (44 -> 42)
------------------------------

  Additional (5): fi-glk-dsi fi-gdg-551 fi-bsw-kefka fi-bsw-nick fi-snb-2600 
  Missing    (7): fi-ilk-m540 fi-ehl-1 fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5376 -> IGTPW_3958

  CI-20190529: 20190529
  CI_DRM_7783: 3ee976286895f0bd54388efc16b12f62c624ff19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3958: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html
  IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_exec_nop@poll
+igt@gem_exec_nop@preempt
+igt@gem_exec_nop@signal
+igt@gem_exec_nop@single
-igt@gem_exec_nop@blt
-igt@gem_exec_nop@bsd
-igt@gem_exec_nop@bsd1
-igt@gem_exec_nop@bsd2
-igt@gem_exec_nop@default
-igt@gem_exec_nop@poll-blt
-igt@gem_exec_nop@poll-bsd
-igt@gem_exec_nop@poll-bsd1
-igt@gem_exec_nop@poll-bsd2
-igt@gem_exec_nop@poll-default
-igt@gem_exec_nop@poll-render
-igt@gem_exec_nop@poll-vebox
-igt@gem_exec_nop@preempt-blt
-igt@gem_exec_nop@preempt-bsd
-igt@gem_exec_nop@preempt-bsd1
-igt@gem_exec_nop@preempt-bsd2
-igt@gem_exec_nop@preempt-default
-igt@gem_exec_nop@preempt-render
-igt@gem_exec_nop@preempt-vebox
-igt@gem_exec_nop@render
-igt@gem_exec_nop@signal-blt
-igt@gem_exec_nop@signal-bsd
-igt@gem_exec_nop@signal-bsd1
-igt@gem_exec_nop@signal-bsd2
-igt@gem_exec_nop@signal-default
-igt@gem_exec_nop@signal-render
-igt@gem_exec_nop@signal-vebox
-igt@gem_exec_nop@vebox

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Tvrtko Ursulin]

On 21/01/2020 12:31, Arjun Melkaveri wrote:
> Added __for_each_physical_engine to utilize all available engines.
> Moved single, signal, preempt, poll and headless test cases
> from static to dynamic group.
> 
> Cc: Dec Katarzyna <katarzyna.dec@intel.com>
> Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com>
> Cc: Tahvanainen Jari <jari.tahvanainen@intel.com>
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Reviewed-by: Ursulin Tvrtko <tvrtko.ursulin@intel.com>

But you can't do this since I haven't provided an r-b yet. AFAIR in my 
last reply I only said along the lines "detail here, detail there, but 
overall looks okay".

Regards,

Tvrtko

> ---
>   tests/i915/gem_exec_nop.c | 162 ++++++++++++++++++++++----------------
>   1 file changed, 94 insertions(+), 68 deletions(-)
> 
> diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
> index dbedb356..8d2c1ef3 100644
> --- a/tests/i915/gem_exec_nop.c
> +++ b/tests/i915/gem_exec_nop.c
> @@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
>   		(end->tv_nsec - start->tv_nsec)*1e-9);
>   }
>   
> -static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
> -			  int timeout, unsigned long *out)
> +static double nop_on_ring(int fd, uint32_t handle,
> +			  const struct intel_execution_engine2 *e, int timeout,
> +			  unsigned long *out)
>   {
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> @@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = ring_id;
> +	execbuf.flags = e->flags;
>   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
>   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
>   	if (__gem_execbuf(fd, &execbuf)) {
> -		execbuf.flags = ring_id;
> +		execbuf.flags = e->flags;
>   		gem_execbuf(fd, &execbuf);
>   	}
>   	intel_detect_and_clear_missed_interrupts(fd);
> @@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
>   	return elapsed(&start, &now);
>   }
>   
> -static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> +static void poll_ring(int fd, const struct intel_execution_engine2 *e,
> +		      int timeout)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
>   	const uint32_t MI_ARB_CHK = 0x5 << 23;
> @@ -121,9 +123,9 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	if (gen == 4 || gen == 5)
>   		flags |= I915_EXEC_SECURE;
>   
> -	gem_require_ring(fd, engine);
> -	igt_require(gem_can_store_dword(fd, engine));
> -	igt_require(gem_engine_has_mutable_submission(fd, engine));
> +	gem_require_ring(fd, e->flags);
> +	igt_require(gem_can_store_dword(fd, e->class));
> +	igt_require(gem_class_has_mutable_submission(fd, e->class));
>   
>   	memset(&obj, 0, sizeof(obj));
>   	obj.handle = gem_create(fd, 4096);
> @@ -187,7 +189,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = engine | flags;
> +	execbuf.flags = e->flags | flags;
>   
>   	cycles = 0;
>   	do {
> @@ -209,7 +211,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	gem_sync(fd, obj.handle);
>   
>   	igt_info("%s completed %ld cycles: %.3f us\n",
> -		 name, cycles, elapsed*1e-3/cycles);
> +		 e->name, cycles, elapsed*1e-3/cycles);
>   
>   	munmap(batch, 4096);
>   	gem_close(fd, obj.handle);
> @@ -218,6 +220,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   static void poll_sequential(int fd, const char *name, int timeout)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
> +	const struct intel_execution_engine2 *e;
>   	const uint32_t MI_ARB_CHK = 0x5 << 23;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj[2];
> @@ -234,13 +237,14 @@ static void poll_sequential(int fd, const char *name, int timeout)
>   		flags |= I915_EXEC_SECURE;
>   
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		if (!gem_can_store_dword(fd, eb_ring(e)) ||
> -		    !gem_engine_has_mutable_submission(fd, eb_ring(e)))
> +	__for_each_physical_engine(fd, e) {
> +		if (!gem_can_store_dword(fd, e->class) ||
> +		    !gem_class_has_mutable_submission(fd, e->class))
>   			continue;
>   
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
> +
>   	igt_require(nengine);
>   
>   	memset(obj, 0, sizeof(obj));
> @@ -344,21 +348,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
>   }
>   
>   static void single(int fd, uint32_t handle,
> -		   unsigned ring_id, const char *ring_name)
> +		   const struct intel_execution_engine2 *e)
>   {
>   	double time;
>   	unsigned long count;
>   
> -	gem_require_ring(fd, ring_id);
> +	gem_require_ring(fd, e->flags);
>   
> -	time = nop_on_ring(fd, handle, ring_id, 20, &count);
> +	time = nop_on_ring(fd, handle, e, 20, &count);
>   	igt_info("%s: %'lu cycles: %.3fus\n",
> -		 ring_name, count, time*1e6 / count);
> +		  e->name, count, time*1e6 / count);
>   }
>   
>   static double
> -stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
> -		   int timeout, int reps)
> +stable_nop_on_ring(int fd, uint32_t handle,
> +		   const struct intel_execution_engine2 *e, int timeout,
> +		   int reps)
>   {
>   	igt_stats_t s;
>   	double n;
> @@ -372,7 +377,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
>   		unsigned long count;
>   		double time;
>   
> -		time = nop_on_ring(fd, handle, engine, timeout, &count);
> +		time = nop_on_ring(fd, handle, e, timeout, &count);
>   		igt_stats_push_float(&s, time / count);
>   	}
>   
> @@ -388,7 +393,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
>                        "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
>                        #x, #ref, x, tolerance * 100.0, ref)
>   
> -static void headless(int fd, uint32_t handle)
> +static void headless(int fd, uint32_t handle,
> +		     const struct intel_execution_engine2 *e)
>   {
>   	unsigned int nr_connected = 0;
>   	drmModeConnector *connector;
> @@ -411,7 +417,7 @@ static void headless(int fd, uint32_t handle)
>   	kmstest_set_vt_graphics_mode();
>   
>   	/* benchmark nops */
> -	n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> +	n_display = stable_nop_on_ring(fd, handle, e, 1, 5);
>   	igt_info("With one display connected: %.2fus\n",
>   		 n_display * 1e6);
>   
> @@ -419,7 +425,7 @@ static void headless(int fd, uint32_t handle)
>   	kmstest_unset_all_crtcs(fd, res);
>   
>   	/* benchmark nops again */
> -	n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> +	n_headless = stable_nop_on_ring(fd, handle, e, 1, 5);
>   	igt_info("Without a display connected (headless): %.2fus\n",
>   		 n_headless * 1e6);
>   
> @@ -429,6 +435,7 @@ static void headless(int fd, uint32_t handle)
>   
>   static void parallel(int fd, uint32_t handle, int timeout)
>   {
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
>   	unsigned engines[16];
> @@ -439,12 +446,11 @@ static void parallel(int fd, uint32_t handle, int timeout)
>   
>   	sum = 0;
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		engines[nengine] = eb_ring(e);
> -		names[nengine] = e->name;
> -		nengine++;
> +	__for_each_physical_engine(fd, e) {
> +		engines[nengine] = e->flags;
> +		names[nengine++] = e->name;
>   
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		sum += time;
>   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
>   	}
> @@ -490,6 +496,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
>   
>   static void series(int fd, uint32_t handle, int timeout)
>   {
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
>   	struct timespec start, now, sync;
> @@ -500,8 +507,8 @@ static void series(int fd, uint32_t handle, int timeout)
>   	const char *name;
>   
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +	__for_each_physical_engine(fd, e) {
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		if (time > max) {
>   			name = e->name;
>   			max = time;
> @@ -509,7 +516,7 @@ static void series(int fd, uint32_t handle, int timeout)
>   		if (time < min)
>   			min = time;
>   		sum += time;
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
>   	igt_require(nengine);
>   	igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
> @@ -580,6 +587,7 @@ static void xchg(void *array, unsigned i, unsigned j)
>   static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   {
>   	const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj[2];
>   	unsigned engines[16];
> @@ -595,14 +603,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   
>   	nengine = 0;
>   	sum = 0;
> -	for_each_physical_engine(e, fd) {
> +	__for_each_physical_engine(fd, e) {
>   		unsigned long count;
>   
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		sum += time;
>   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
>   
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
>   	igt_require(nengine);
>   	igt_info("Total (individual) execution latency %.3fus per cycle\n",
> @@ -625,6 +633,7 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   
>   		igt_require(__gem_context_create(fd, &id) == 0);
>   		execbuf.rsvd1 = id;
> +		gem_context_set_all_engines(fd, execbuf.rsvd1);
>   	}
>   
>   	for (n = 0; n < nengine; n++) {
> @@ -642,8 +651,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   		obj[0].handle = gem_create(fd, 4096);
>   		gem_execbuf(fd, &execbuf);
>   
> -		if (flags & CONTEXT)
> +		if (flags & CONTEXT) {
>   			execbuf.rsvd1 = gem_context_create(fd);
> +			gem_context_set_all_engines(fd, execbuf.rsvd1);
> +		}
>   
>   		hars_petruska_f54_1_random_perturb(child);
>   
> @@ -716,6 +727,7 @@ static void fence_signal(int fd, uint32_t handle,
>   #define NFENCES 512
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> +	struct intel_execution_engine2 *__e;
>   	struct timespec start, now;
>   	unsigned engines[16];
>   	unsigned nengine;
> @@ -726,8 +738,8 @@ static void fence_signal(int fd, uint32_t handle,
>   
>   	nengine = 0;
>   	if (ring_id == ALL_ENGINES) {
> -		for_each_physical_engine(e, fd)
> -			engines[nengine++] = eb_ring(e);
> +		__for_each_physical_engine(fd, __e)
> +			engines[nengine++] = __e->flags;
>   	} else {
>   		gem_require_ring(fd, ring_id);
>   		engines[nengine++] = ring_id;
> @@ -781,13 +793,12 @@ static void fence_signal(int fd, uint32_t handle,
>   		if (fences[n] != -1)
>   			close(fences[n]);
>   	free(fences);
> -
>   	igt_info("Signal %s: %'lu cycles (%'lu signals): %.3fus\n",
>   		 ring_name, count, signal, elapsed(&start, &now) * 1e6 / count);
>   }
>   
>   static void preempt(int fd, uint32_t handle,
> -		   unsigned ring_id, const char *ring_name)
> +		    const struct intel_execution_engine2 *e)
>   {
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> @@ -795,13 +806,13 @@ static void preempt(int fd, uint32_t handle,
>   	unsigned long count;
>   	uint32_t ctx[2];
>   
> -	gem_require_ring(fd, ring_id);
> +	gem_require_ring(fd, e->flags);
>   
> -	ctx[0] = gem_context_create(fd);
> -	gem_context_set_priority(fd, ctx[0], MIN_PRIO);
> -
> -	ctx[1] = gem_context_create(fd);
> -	gem_context_set_priority(fd, ctx[1], MAX_PRIO);
> +	for (int i = 0; i < 2; i++) {
> +		ctx[i] = gem_context_create(fd);
> +		gem_context_set_all_engines(fd, ctx[i]);
> +		gem_context_set_priority(fd, ctx[i], MAX_PRIO);
> +	}
>   
>   	memset(&obj, 0, sizeof(obj));
>   	obj.handle = handle;
> @@ -809,11 +820,11 @@ static void preempt(int fd, uint32_t handle,
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = ring_id;
> +	execbuf.flags = e->flags;
>   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
>   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
>   	if (__gem_execbuf(fd, &execbuf)) {
> -		execbuf.flags = ring_id;
> +		execbuf.flags = e->flags;
>   		gem_execbuf(fd, &execbuf);
>   	}
>   	execbuf.rsvd1 = ctx[1];
> @@ -825,7 +836,7 @@ static void preempt(int fd, uint32_t handle,
>   		igt_spin_t *spin =
>   			__igt_spin_new(fd,
>   				       .ctx = ctx[0],
> -				       .engine = ring_id);
> +				       .engine = e->flags);
>   
>   		for (int loop = 0; loop < 1024; loop++)
>   			gem_execbuf(fd, &execbuf);
> @@ -841,12 +852,12 @@ static void preempt(int fd, uint32_t handle,
>   	gem_context_destroy(fd, ctx[0]);
>   
>   	igt_info("%s: %'lu cycles: %.3fus\n",
> -		 ring_name, count, elapsed(&start, &now)*1e6 / count);
> +		 e->name, count, elapsed(&start, &now)*1e6 / count);
>   }
>   
>   igt_main
>   {
> -	const struct intel_execution_engine *e;
> +	const struct intel_execution_engine2 *e;
>   	uint32_t handle = 0;
>   	int device = -1;
>   
> @@ -873,11 +884,19 @@ igt_main
>   	igt_subtest("basic-sequential")
>   		sequential(device, handle, 0, 5);
>   
> -	for (e = intel_execution_engines; e->name; e++) {
> -		igt_subtest_f("%s", e->name)
> -			single(device, handle, eb_ring(e), e->name);
> -		igt_subtest_f("signal-%s", e->name)
> -			fence_signal(device, handle, eb_ring(e), e->name, 5);
> +	igt_subtest_with_dynamic("single") {
> +		__for_each_physical_engine(device, e) {
> +			igt_dynamic_f("%s", e->name)
> +				single(device, handle, e);
> +		}
> +	}
> +
> +	igt_subtest_with_dynamic("signal") {
> +		__for_each_physical_engine(device, e) {
> +			igt_dynamic_f("%s", e->name)
> +				fence_signal(device, handle, e->flags,
> +					     e->name, 5);
> +		}
>   	}
>   
>   	igt_subtest("signal-all")
> @@ -907,10 +926,11 @@ igt_main
>   			igt_require(gem_scheduler_has_ctx_priority(device));
>   			igt_require(gem_scheduler_has_preemption(device));
>   		}
> -
> -		for (e = intel_execution_engines; e->name; e++) {
> -			igt_subtest_f("preempt-%s", e->name)
> -				preempt(device, handle, eb_ring(e), e->name);
> +		igt_subtest_with_dynamic("preempt") {
> +			__for_each_physical_engine(device, e) {
> +				igt_dynamic_f("%s", e->name)
> +					preempt(device, handle, e);
> +			}
>   		}
>   	}
>   
> @@ -919,19 +939,25 @@ igt_main
>   			igt_device_set_master(device);
>   		}
>   
> -		for (e = intel_execution_engines; e->name; e++) {
> -			/* Requires master for STORE_DWORD on gen4/5 */
> -			igt_subtest_f("poll-%s", e->name)
> -				poll_ring(device, eb_ring(e), e->name, 20);
> +		igt_subtest_with_dynamic("poll") {
> +			__for_each_physical_engine(device, e) {
> +				/* Requires master for STORE_DWORD on gen4/5 */
> +				igt_dynamic_f("%s", e->name)
> +					poll_ring(device, e, 20);
> +			}
> +		}
> +
> +		igt_subtest_with_dynamic("headless") {
> +			__for_each_physical_engine(device, e) {
> +				igt_dynamic_f("%s", e->name)
> +				/* Requires master for changing display modes */
> +					headless(device, handle, e);
> +			}
>   		}
>   
>   		igt_subtest("poll-sequential")
>   			poll_sequential(device, "Sequential", 20);
>   
> -		igt_subtest("headless") {
> -			/* Requires master for changing display modes */
> -			headless(device, handle);
> -		}
>   	}
>   
>   	igt_fixture {
> 
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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Tvrtko Ursulin]

On 21/01/2020 12:31, Arjun Melkaveri wrote:
> Added __for_each_physical_engine to utilize all available engines.
> Moved single, signal, preempt, poll and headless test cases
> from static to dynamic group.
> 
> Cc: Dec Katarzyna <katarzyna.dec@intel.com>
> Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com>
> Cc: Tahvanainen Jari <jari.tahvanainen@intel.com>
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Reviewed-by: Ursulin Tvrtko <tvrtko.ursulin@intel.com>
> ---
>   tests/i915/gem_exec_nop.c | 162 ++++++++++++++++++++++----------------
>   1 file changed, 94 insertions(+), 68 deletions(-)
> 
> diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
> index dbedb356..8d2c1ef3 100644
> --- a/tests/i915/gem_exec_nop.c
> +++ b/tests/i915/gem_exec_nop.c
> @@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
>   		(end->tv_nsec - start->tv_nsec)*1e-9);
>   }
>   
> -static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
> -			  int timeout, unsigned long *out)
> +static double nop_on_ring(int fd, uint32_t handle,
> +			  const struct intel_execution_engine2 *e, int timeout,
> +			  unsigned long *out)
>   {
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> @@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = ring_id;
> +	execbuf.flags = e->flags;
>   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
>   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
>   	if (__gem_execbuf(fd, &execbuf)) {
> -		execbuf.flags = ring_id;
> +		execbuf.flags = e->flags;
>   		gem_execbuf(fd, &execbuf);
>   	}
>   	intel_detect_and_clear_missed_interrupts(fd);
> @@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
>   	return elapsed(&start, &now);
>   }
>   
> -static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> +static void poll_ring(int fd, const struct intel_execution_engine2 *e,
> +		      int timeout)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
>   	const uint32_t MI_ARB_CHK = 0x5 << 23;
> @@ -121,9 +123,9 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	if (gen == 4 || gen == 5)
>   		flags |= I915_EXEC_SECURE;
>   
> -	gem_require_ring(fd, engine);
> -	igt_require(gem_can_store_dword(fd, engine));
> -	igt_require(gem_engine_has_mutable_submission(fd, engine));
> +	gem_require_ring(fd, e->flags);

Don't need gem_require_ring any more.

> +	igt_require(gem_can_store_dword(fd, e->class));

Needs to be gem_class_can_store_dword. Here and everywhere where you 
pass in e->class.

> +	igt_require(gem_class_has_mutable_submission(fd, e->class));
>   
>   	memset(&obj, 0, sizeof(obj));
>   	obj.handle = gem_create(fd, 4096);
> @@ -187,7 +189,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = engine | flags;
> +	execbuf.flags = e->flags | flags;
>   
>   	cycles = 0;
>   	do {
> @@ -209,7 +211,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   	gem_sync(fd, obj.handle);
>   
>   	igt_info("%s completed %ld cycles: %.3f us\n",
> -		 name, cycles, elapsed*1e-3/cycles);
> +		 e->name, cycles, elapsed*1e-3/cycles);
>   
>   	munmap(batch, 4096);
>   	gem_close(fd, obj.handle);
> @@ -218,6 +220,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
>   static void poll_sequential(int fd, const char *name, int timeout)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
> +	const struct intel_execution_engine2 *e;
>   	const uint32_t MI_ARB_CHK = 0x5 << 23;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj[2];
> @@ -234,13 +237,14 @@ static void poll_sequential(int fd, const char *name, int timeout)
>   		flags |= I915_EXEC_SECURE;
>   
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		if (!gem_can_store_dword(fd, eb_ring(e)) ||
> -		    !gem_engine_has_mutable_submission(fd, eb_ring(e)))
> +	__for_each_physical_engine(fd, e) {
> +		if (!gem_can_store_dword(fd, e->class) ||

Here.

> +		    !gem_class_has_mutable_submission(fd, e->class))
>   			continue;
>   
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
> +
>   	igt_require(nengine);
>   
>   	memset(obj, 0, sizeof(obj));
> @@ -344,21 +348,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
>   }
>   
>   static void single(int fd, uint32_t handle,
> -		   unsigned ring_id, const char *ring_name)
> +		   const struct intel_execution_engine2 *e)
>   {
>   	double time;
>   	unsigned long count;
>   
> -	gem_require_ring(fd, ring_id);
> +	gem_require_ring(fd, e->flags);

Same here.

>   
> -	time = nop_on_ring(fd, handle, ring_id, 20, &count);
> +	time = nop_on_ring(fd, handle, e, 20, &count);
>   	igt_info("%s: %'lu cycles: %.3fus\n",
> -		 ring_name, count, time*1e6 / count);
> +		  e->name, count, time*1e6 / count);
>   }
>   
>   static double
> -stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
> -		   int timeout, int reps)
> +stable_nop_on_ring(int fd, uint32_t handle,
> +		   const struct intel_execution_engine2 *e, int timeout,
> +		   int reps)
>   {
>   	igt_stats_t s;
>   	double n;
> @@ -372,7 +377,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
>   		unsigned long count;
>   		double time;
>   
> -		time = nop_on_ring(fd, handle, engine, timeout, &count);
> +		time = nop_on_ring(fd, handle, e, timeout, &count);
>   		igt_stats_push_float(&s, time / count);
>   	}
>   
> @@ -388,7 +393,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
>                        "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
>                        #x, #ref, x, tolerance * 100.0, ref)
>   
> -static void headless(int fd, uint32_t handle)
> +static void headless(int fd, uint32_t handle,
> +		     const struct intel_execution_engine2 *e)
>   {
>   	unsigned int nr_connected = 0;
>   	drmModeConnector *connector;
> @@ -411,7 +417,7 @@ static void headless(int fd, uint32_t handle)
>   	kmstest_set_vt_graphics_mode();
>   
>   	/* benchmark nops */
> -	n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> +	n_display = stable_nop_on_ring(fd, handle, e, 1, 5);
>   	igt_info("With one display connected: %.2fus\n",
>   		 n_display * 1e6);
>   
> @@ -419,7 +425,7 @@ static void headless(int fd, uint32_t handle)
>   	kmstest_unset_all_crtcs(fd, res);
>   
>   	/* benchmark nops again */
> -	n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> +	n_headless = stable_nop_on_ring(fd, handle, e, 1, 5);
>   	igt_info("Without a display connected (headless): %.2fus\n",
>   		 n_headless * 1e6);
>   
> @@ -429,6 +435,7 @@ static void headless(int fd, uint32_t handle)
>   
>   static void parallel(int fd, uint32_t handle, int timeout)
>   {
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
>   	unsigned engines[16];
> @@ -439,12 +446,11 @@ static void parallel(int fd, uint32_t handle, int timeout)
>   
>   	sum = 0;
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		engines[nengine] = eb_ring(e);
> -		names[nengine] = e->name;
> -		nengine++;
> +	__for_each_physical_engine(fd, e) {
> +		engines[nengine] = e->flags;
> +		names[nengine++] = e->name;
>   
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		sum += time;
>   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
>   	}
> @@ -490,6 +496,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
>   
>   static void series(int fd, uint32_t handle, int timeout)
>   {
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
>   	struct timespec start, now, sync;
> @@ -500,8 +507,8 @@ static void series(int fd, uint32_t handle, int timeout)
>   	const char *name;
>   
>   	nengine = 0;
> -	for_each_physical_engine(e, fd) {
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +	__for_each_physical_engine(fd, e) {
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		if (time > max) {
>   			name = e->name;
>   			max = time;
> @@ -509,7 +516,7 @@ static void series(int fd, uint32_t handle, int timeout)
>   		if (time < min)
>   			min = time;
>   		sum += time;
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
>   	igt_require(nengine);
>   	igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
> @@ -580,6 +587,7 @@ static void xchg(void *array, unsigned i, unsigned j)
>   static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   {
>   	const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
> +	const struct intel_execution_engine2 *e;
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj[2];
>   	unsigned engines[16];
> @@ -595,14 +603,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   
>   	nengine = 0;
>   	sum = 0;
> -	for_each_physical_engine(e, fd) {
> +	__for_each_physical_engine(fd, e) {
>   		unsigned long count;
>   
> -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
>   		sum += time;
>   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
>   
> -		engines[nengine++] = eb_ring(e);
> +		engines[nengine++] = e->flags;
>   	}
>   	igt_require(nengine);
>   	igt_info("Total (individual) execution latency %.3fus per cycle\n",
> @@ -625,6 +633,7 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   
>   		igt_require(__gem_context_create(fd, &id) == 0);
>   		execbuf.rsvd1 = id;
> +		gem_context_set_all_engines(fd, execbuf.rsvd1);
>   	}
>   
>   	for (n = 0; n < nengine; n++) {
> @@ -642,8 +651,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
>   		obj[0].handle = gem_create(fd, 4096);
>   		gem_execbuf(fd, &execbuf);
>   
> -		if (flags & CONTEXT)
> +		if (flags & CONTEXT) {
>   			execbuf.rsvd1 = gem_context_create(fd);
> +			gem_context_set_all_engines(fd, execbuf.rsvd1);
> +		}
>   
>   		hars_petruska_f54_1_random_perturb(child);
>   
> @@ -716,6 +727,7 @@ static void fence_signal(int fd, uint32_t handle,
>   #define NFENCES 512
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> +	struct intel_execution_engine2 *__e;
>   	struct timespec start, now;
>   	unsigned engines[16];
>   	unsigned nengine;
> @@ -726,8 +738,8 @@ static void fence_signal(int fd, uint32_t handle,
>   
>   	nengine = 0;
>   	if (ring_id == ALL_ENGINES) {
> -		for_each_physical_engine(e, fd)
> -			engines[nengine++] = eb_ring(e);
> +		__for_each_physical_engine(fd, __e)
> +			engines[nengine++] = __e->flags;
>   	} else {
>   		gem_require_ring(fd, ring_id);
>   		engines[nengine++] = ring_id;
> @@ -781,13 +793,12 @@ static void fence_signal(int fd, uint32_t handle,
>   		if (fences[n] != -1)
>   			close(fences[n]);
>   	free(fences);
> -

Try to avoid random whitespace changes.

>   	igt_info("Signal %s: %'lu cycles (%'lu signals): %.3fus\n",
>   		 ring_name, count, signal, elapsed(&start, &now) * 1e6 / count);
>   }
>   
>   static void preempt(int fd, uint32_t handle,
> -		   unsigned ring_id, const char *ring_name)
> +		    const struct intel_execution_engine2 *e)
>   {
>   	struct drm_i915_gem_execbuffer2 execbuf;
>   	struct drm_i915_gem_exec_object2 obj;
> @@ -795,13 +806,13 @@ static void preempt(int fd, uint32_t handle,
>   	unsigned long count;
>   	uint32_t ctx[2];
>   
> -	gem_require_ring(fd, ring_id);
> +	gem_require_ring(fd, e->flags);

Not needed.

>   
> -	ctx[0] = gem_context_create(fd);
> -	gem_context_set_priority(fd, ctx[0], MIN_PRIO);
> -
> -	ctx[1] = gem_context_create(fd);
> -	gem_context_set_priority(fd, ctx[1], MAX_PRIO);
> +	for (int i = 0; i < 2; i++) {
> +		ctx[i] = gem_context_create(fd);
> +		gem_context_set_all_engines(fd, ctx[i]);
> +		gem_context_set_priority(fd, ctx[i], MAX_PRIO);
> +	}
>   
>   	memset(&obj, 0, sizeof(obj));
>   	obj.handle = handle;
> @@ -809,11 +820,11 @@ static void preempt(int fd, uint32_t handle,
>   	memset(&execbuf, 0, sizeof(execbuf));
>   	execbuf.buffers_ptr = to_user_pointer(&obj);
>   	execbuf.buffer_count = 1;
> -	execbuf.flags = ring_id;
> +	execbuf.flags = e->flags;
>   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
>   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
>   	if (__gem_execbuf(fd, &execbuf)) {
> -		execbuf.flags = ring_id;
> +		execbuf.flags = e->flags;
>   		gem_execbuf(fd, &execbuf);
>   	}
>   	execbuf.rsvd1 = ctx[1];
> @@ -825,7 +836,7 @@ static void preempt(int fd, uint32_t handle,
>   		igt_spin_t *spin =
>   			__igt_spin_new(fd,
>   				       .ctx = ctx[0],
> -				       .engine = ring_id);
> +				       .engine = e->flags);
>   
>   		for (int loop = 0; loop < 1024; loop++)
>   			gem_execbuf(fd, &execbuf);
> @@ -841,12 +852,12 @@ static void preempt(int fd, uint32_t handle,
>   	gem_context_destroy(fd, ctx[0]);
>   
>   	igt_info("%s: %'lu cycles: %.3fus\n",
> -		 ring_name, count, elapsed(&start, &now)*1e6 / count);
> +		 e->name, count, elapsed(&start, &now)*1e6 / count);
>   }
>   
>   igt_main
>   {
> -	const struct intel_execution_engine *e;
> +	const struct intel_execution_engine2 *e;
>   	uint32_t handle = 0;
>   	int device = -1;
>   
> @@ -873,11 +884,19 @@ igt_main
>   	igt_subtest("basic-sequential")
>   		sequential(device, handle, 0, 5);
>   
> -	for (e = intel_execution_engines; e->name; e++) {
> -		igt_subtest_f("%s", e->name)
> -			single(device, handle, eb_ring(e), e->name);
> -		igt_subtest_f("signal-%s", e->name)
> -			fence_signal(device, handle, eb_ring(e), e->name, 5);
> +	igt_subtest_with_dynamic("single") {
> +		__for_each_physical_engine(device, e) {
> +			igt_dynamic_f("%s", e->name)
> +				single(device, handle, e);
> +		}
> +	}
> +
> +	igt_subtest_with_dynamic("signal") {
> +		__for_each_physical_engine(device, e) {
> +			igt_dynamic_f("%s", e->name)
> +				fence_signal(device, handle, e->flags,
> +					     e->name, 5);
> +		}
>   	}
>   
>   	igt_subtest("signal-all")
> @@ -907,10 +926,11 @@ igt_main
>   			igt_require(gem_scheduler_has_ctx_priority(device));
>   			igt_require(gem_scheduler_has_preemption(device));
>   		}
> -
> -		for (e = intel_execution_engines; e->name; e++) {
> -			igt_subtest_f("preempt-%s", e->name)
> -				preempt(device, handle, eb_ring(e), e->name);
> +		igt_subtest_with_dynamic("preempt") {
> +			__for_each_physical_engine(device, e) {
> +				igt_dynamic_f("%s", e->name)
> +					preempt(device, handle, e);
> +			}
>   		}
>   	}
>   
> @@ -919,19 +939,25 @@ igt_main
>   			igt_device_set_master(device);
>   		}
>   
> -		for (e = intel_execution_engines; e->name; e++) {
> -			/* Requires master for STORE_DWORD on gen4/5 */
> -			igt_subtest_f("poll-%s", e->name)
> -				poll_ring(device, eb_ring(e), e->name, 20);
> +		igt_subtest_with_dynamic("poll") {
> +			__for_each_physical_engine(device, e) {
> +				/* Requires master for STORE_DWORD on gen4/5 */
> +				igt_dynamic_f("%s", e->name)
> +					poll_ring(device, e, 20);
> +			}
> +		}
> +
> +		igt_subtest_with_dynamic("headless") {
> +			__for_each_physical_engine(device, e) {
> +				igt_dynamic_f("%s", e->name)
> +				/* Requires master for changing display modes */
> +					headless(device, handle, e);
> +			}
>   		}
>   
>   		igt_subtest("poll-sequential")
>   			poll_sequential(device, "Sequential", 20);
>   
> -		igt_subtest("headless") {
> -			/* Requires master for changing display modes */
> -			headless(device, handle);
> -		}
>   	}
>   
>   	igt_fixture {
> 

Regards,

Tvrtko
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Re: [igt-dev] [PATCH i-g-t] i915/gem_exec_nop:Adjusted test to utilize all available engines

[Melkaveri, Arjun]

On Tue, Jan 21, 2020 at 02:26:28PM +0000, Tvrtko Ursulin wrote:
> 
> On 21/01/2020 12:31, Arjun Melkaveri wrote:
> > Added __for_each_physical_engine to utilize all available engines.
> > Moved single, signal, preempt, poll and headless test cases
> > from static to dynamic group.
> > 
> > Cc: Dec Katarzyna <katarzyna.dec@intel.com>
> > Cc: Kempczynski Zbigniew <zbigniew.kempczynski@intel.com>
> > Cc: Tahvanainen Jari <jari.tahvanainen@intel.com>
> > Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> > Reviewed-by: Ursulin Tvrtko <tvrtko.ursulin@intel.com>
> > ---
> >   tests/i915/gem_exec_nop.c | 162 ++++++++++++++++++++++----------------
> >   1 file changed, 94 insertions(+), 68 deletions(-)
> > 
> > diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
> > index dbedb356..8d2c1ef3 100644
> > --- a/tests/i915/gem_exec_nop.c
> > +++ b/tests/i915/gem_exec_nop.c
> > @@ -66,8 +66,9 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
> >   		(end->tv_nsec - start->tv_nsec)*1e-9);
> >   }
> > -static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
> > -			  int timeout, unsigned long *out)
> > +static double nop_on_ring(int fd, uint32_t handle,
> > +			  const struct intel_execution_engine2 *e, int timeout,
> > +			  unsigned long *out)
> >   {
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj;
> > @@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
> >   	memset(&execbuf, 0, sizeof(execbuf));
> >   	execbuf.buffers_ptr = to_user_pointer(&obj);
> >   	execbuf.buffer_count = 1;
> > -	execbuf.flags = ring_id;
> > +	execbuf.flags = e->flags;
> >   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
> >   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
> >   	if (__gem_execbuf(fd, &execbuf)) {
> > -		execbuf.flags = ring_id;
> > +		execbuf.flags = e->flags;
> >   		gem_execbuf(fd, &execbuf);
> >   	}
> >   	intel_detect_and_clear_missed_interrupts(fd);
> > @@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
> >   	return elapsed(&start, &now);
> >   }
> > -static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> > +static void poll_ring(int fd, const struct intel_execution_engine2 *e,
> > +		      int timeout)
> >   {
> >   	const int gen = intel_gen(intel_get_drm_devid(fd));
> >   	const uint32_t MI_ARB_CHK = 0x5 << 23;
> > @@ -121,9 +123,9 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> >   	if (gen == 4 || gen == 5)
> >   		flags |= I915_EXEC_SECURE;
> > -	gem_require_ring(fd, engine);
> > -	igt_require(gem_can_store_dword(fd, engine));
> > -	igt_require(gem_engine_has_mutable_submission(fd, engine));
> > +	gem_require_ring(fd, e->flags);
> 
> Don't need gem_require_ring any more.
>
Will fix this.
> > +	igt_require(gem_can_store_dword(fd, e->class));
> 
> Needs to be gem_class_can_store_dword. Here and everywhere where you pass in
> e->class.
>
Will modify this.
> > +	igt_require(gem_class_has_mutable_submission(fd, e->class));
> >   	memset(&obj, 0, sizeof(obj));
> >   	obj.handle = gem_create(fd, 4096);
> > @@ -187,7 +189,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> >   	memset(&execbuf, 0, sizeof(execbuf));
> >   	execbuf.buffers_ptr = to_user_pointer(&obj);
> >   	execbuf.buffer_count = 1;
> > -	execbuf.flags = engine | flags;
> > +	execbuf.flags = e->flags | flags;
> >   	cycles = 0;
> >   	do {
> > @@ -209,7 +211,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> >   	gem_sync(fd, obj.handle);
> >   	igt_info("%s completed %ld cycles: %.3f us\n",
> > -		 name, cycles, elapsed*1e-3/cycles);
> > +		 e->name, cycles, elapsed*1e-3/cycles);
> >   	munmap(batch, 4096);
> >   	gem_close(fd, obj.handle);
> > @@ -218,6 +220,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
> >   static void poll_sequential(int fd, const char *name, int timeout)
> >   {
> >   	const int gen = intel_gen(intel_get_drm_devid(fd));
> > +	const struct intel_execution_engine2 *e;
> >   	const uint32_t MI_ARB_CHK = 0x5 << 23;
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj[2];
> > @@ -234,13 +237,14 @@ static void poll_sequential(int fd, const char *name, int timeout)
> >   		flags |= I915_EXEC_SECURE;
> >   	nengine = 0;
> > -	for_each_physical_engine(e, fd) {
> > -		if (!gem_can_store_dword(fd, eb_ring(e)) ||
> > -		    !gem_engine_has_mutable_submission(fd, eb_ring(e)))
> > +	__for_each_physical_engine(fd, e) {
> > +		if (!gem_can_store_dword(fd, e->class) ||
> 
> Here.
> 
okay will fix this
> > +		    !gem_class_has_mutable_submission(fd, e->class))
> >   			continue;
> > -		engines[nengine++] = eb_ring(e);
> > +		engines[nengine++] = e->flags;
> >   	}
> > +
> >   	igt_require(nengine);
> >   	memset(obj, 0, sizeof(obj));
> > @@ -344,21 +348,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
> >   }
> >   static void single(int fd, uint32_t handle,
> > -		   unsigned ring_id, const char *ring_name)
> > +		   const struct intel_execution_engine2 *e)
> >   {
> >   	double time;
> >   	unsigned long count;
> > -	gem_require_ring(fd, ring_id);
> > +	gem_require_ring(fd, e->flags);
> 
> Same here.
> 
> > -	time = nop_on_ring(fd, handle, ring_id, 20, &count);
> > +	time = nop_on_ring(fd, handle, e, 20, &count);
> >   	igt_info("%s: %'lu cycles: %.3fus\n",
> > -		 ring_name, count, time*1e6 / count);
> > +		  e->name, count, time*1e6 / count);
> >   }
> >   static double
> > -stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
> > -		   int timeout, int reps)
> > +stable_nop_on_ring(int fd, uint32_t handle,
> > +		   const struct intel_execution_engine2 *e, int timeout,
> > +		   int reps)
> >   {
> >   	igt_stats_t s;
> >   	double n;
> > @@ -372,7 +377,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
> >   		unsigned long count;
> >   		double time;
> > -		time = nop_on_ring(fd, handle, engine, timeout, &count);
> > +		time = nop_on_ring(fd, handle, e, timeout, &count);
> >   		igt_stats_push_float(&s, time / count);
> >   	}
> > @@ -388,7 +393,8 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
> >                        "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
> >                        #x, #ref, x, tolerance * 100.0, ref)
> > -static void headless(int fd, uint32_t handle)
> > +static void headless(int fd, uint32_t handle,
> > +		     const struct intel_execution_engine2 *e)
> >   {
> >   	unsigned int nr_connected = 0;
> >   	drmModeConnector *connector;
> > @@ -411,7 +417,7 @@ static void headless(int fd, uint32_t handle)
> >   	kmstest_set_vt_graphics_mode();
> >   	/* benchmark nops */
> > -	n_display = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> > +	n_display = stable_nop_on_ring(fd, handle, e, 1, 5);
> >   	igt_info("With one display connected: %.2fus\n",
> >   		 n_display * 1e6);
> > @@ -419,7 +425,7 @@ static void headless(int fd, uint32_t handle)
> >   	kmstest_unset_all_crtcs(fd, res);
> >   	/* benchmark nops again */
> > -	n_headless = stable_nop_on_ring(fd, handle, I915_EXEC_DEFAULT, 1, 5);
> > +	n_headless = stable_nop_on_ring(fd, handle, e, 1, 5);
> >   	igt_info("Without a display connected (headless): %.2fus\n",
> >   		 n_headless * 1e6);
> > @@ -429,6 +435,7 @@ static void headless(int fd, uint32_t handle)
> >   static void parallel(int fd, uint32_t handle, int timeout)
> >   {
> > +	const struct intel_execution_engine2 *e;
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj;
> >   	unsigned engines[16];
> > @@ -439,12 +446,11 @@ static void parallel(int fd, uint32_t handle, int timeout)
> >   	sum = 0;
> >   	nengine = 0;
> > -	for_each_physical_engine(e, fd) {
> > -		engines[nengine] = eb_ring(e);
> > -		names[nengine] = e->name;
> > -		nengine++;
> > +	__for_each_physical_engine(fd, e) {
> > +		engines[nengine] = e->flags;
> > +		names[nengine++] = e->name;
> > -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> > +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
> >   		sum += time;
> >   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
> >   	}
> > @@ -490,6 +496,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
> >   static void series(int fd, uint32_t handle, int timeout)
> >   {
> > +	const struct intel_execution_engine2 *e;
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj;
> >   	struct timespec start, now, sync;
> > @@ -500,8 +507,8 @@ static void series(int fd, uint32_t handle, int timeout)
> >   	const char *name;
> >   	nengine = 0;
> > -	for_each_physical_engine(e, fd) {
> > -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> > +	__for_each_physical_engine(fd, e) {
> > +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
> >   		if (time > max) {
> >   			name = e->name;
> >   			max = time;
> > @@ -509,7 +516,7 @@ static void series(int fd, uint32_t handle, int timeout)
> >   		if (time < min)
> >   			min = time;
> >   		sum += time;
> > -		engines[nengine++] = eb_ring(e);
> > +		engines[nengine++] = e->flags;
> >   	}
> >   	igt_require(nengine);
> >   	igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
> > @@ -580,6 +587,7 @@ static void xchg(void *array, unsigned i, unsigned j)
> >   static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
> >   {
> >   	const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
> > +	const struct intel_execution_engine2 *e;
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj[2];
> >   	unsigned engines[16];
> > @@ -595,14 +603,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
> >   	nengine = 0;
> >   	sum = 0;
> > -	for_each_physical_engine(e, fd) {
> > +	__for_each_physical_engine(fd, e) {
> >   		unsigned long count;
> > -		time = nop_on_ring(fd, handle, eb_ring(e), 1, &count) / count;
> > +		time = nop_on_ring(fd, handle, e, 1, &count) / count;
> >   		sum += time;
> >   		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
> > -		engines[nengine++] = eb_ring(e);
> > +		engines[nengine++] = e->flags;
> >   	}
> >   	igt_require(nengine);
> >   	igt_info("Total (individual) execution latency %.3fus per cycle\n",
> > @@ -625,6 +633,7 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
> >   		igt_require(__gem_context_create(fd, &id) == 0);
> >   		execbuf.rsvd1 = id;
> > +		gem_context_set_all_engines(fd, execbuf.rsvd1);
> >   	}
> >   	for (n = 0; n < nengine; n++) {
> > @@ -642,8 +651,10 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
> >   		obj[0].handle = gem_create(fd, 4096);
> >   		gem_execbuf(fd, &execbuf);
> > -		if (flags & CONTEXT)
> > +		if (flags & CONTEXT) {
> >   			execbuf.rsvd1 = gem_context_create(fd);
> > +			gem_context_set_all_engines(fd, execbuf.rsvd1);
> > +		}
> >   		hars_petruska_f54_1_random_perturb(child);
> > @@ -716,6 +727,7 @@ static void fence_signal(int fd, uint32_t handle,
> >   #define NFENCES 512
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj;
> > +	struct intel_execution_engine2 *__e;
> >   	struct timespec start, now;
> >   	unsigned engines[16];
> >   	unsigned nengine;
> > @@ -726,8 +738,8 @@ static void fence_signal(int fd, uint32_t handle,
> >   	nengine = 0;
> >   	if (ring_id == ALL_ENGINES) {
> > -		for_each_physical_engine(e, fd)
> > -			engines[nengine++] = eb_ring(e);
> > +		__for_each_physical_engine(fd, __e)
> > +			engines[nengine++] = __e->flags;
> >   	} else {
> >   		gem_require_ring(fd, ring_id);
> >   		engines[nengine++] = ring_id;
> > @@ -781,13 +793,12 @@ static void fence_signal(int fd, uint32_t handle,
> >   		if (fences[n] != -1)
> >   			close(fences[n]);
> >   	free(fences);
> > -
> 
> Try to avoid random whitespace changes.
> 
> >   	igt_info("Signal %s: %'lu cycles (%'lu signals): %.3fus\n",
> >   		 ring_name, count, signal, elapsed(&start, &now) * 1e6 / count);
> >   }
> >   static void preempt(int fd, uint32_t handle,
> > -		   unsigned ring_id, const char *ring_name)
> > +		    const struct intel_execution_engine2 *e)
> >   {
> >   	struct drm_i915_gem_execbuffer2 execbuf;
> >   	struct drm_i915_gem_exec_object2 obj;
> > @@ -795,13 +806,13 @@ static void preempt(int fd, uint32_t handle,
> >   	unsigned long count;
> >   	uint32_t ctx[2];
> > -	gem_require_ring(fd, ring_id);
> > +	gem_require_ring(fd, e->flags);
> 
> Not needed.
> 
> > -	ctx[0] = gem_context_create(fd);
> > -	gem_context_set_priority(fd, ctx[0], MIN_PRIO);
> > -
> > -	ctx[1] = gem_context_create(fd);
> > -	gem_context_set_priority(fd, ctx[1], MAX_PRIO);
> > +	for (int i = 0; i < 2; i++) {
> > +		ctx[i] = gem_context_create(fd);
> > +		gem_context_set_all_engines(fd, ctx[i]);
> > +		gem_context_set_priority(fd, ctx[i], MAX_PRIO);
> > +	}
> >   	memset(&obj, 0, sizeof(obj));
> >   	obj.handle = handle;
> > @@ -809,11 +820,11 @@ static void preempt(int fd, uint32_t handle,
> >   	memset(&execbuf, 0, sizeof(execbuf));
> >   	execbuf.buffers_ptr = to_user_pointer(&obj);
> >   	execbuf.buffer_count = 1;
> > -	execbuf.flags = ring_id;
> > +	execbuf.flags = e->flags;
> >   	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
> >   	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
> >   	if (__gem_execbuf(fd, &execbuf)) {
> > -		execbuf.flags = ring_id;
> > +		execbuf.flags = e->flags;
> >   		gem_execbuf(fd, &execbuf);
> >   	}
> >   	execbuf.rsvd1 = ctx[1];
> > @@ -825,7 +836,7 @@ static void preempt(int fd, uint32_t handle,
> >   		igt_spin_t *spin =
> >   			__igt_spin_new(fd,
> >   				       .ctx = ctx[0],
> > -				       .engine = ring_id);
> > +				       .engine = e->flags);
> >   		for (int loop = 0; loop < 1024; loop++)
> >   			gem_execbuf(fd, &execbuf);
> > @@ -841,12 +852,12 @@ static void preempt(int fd, uint32_t handle,
> >   	gem_context_destroy(fd, ctx[0]);
> >   	igt_info("%s: %'lu cycles: %.3fus\n",
> > -		 ring_name, count, elapsed(&start, &now)*1e6 / count);
> > +		 e->name, count, elapsed(&start, &now)*1e6 / count);
> >   }
> >   igt_main
> >   {
> > -	const struct intel_execution_engine *e;
> > +	const struct intel_execution_engine2 *e;
> >   	uint32_t handle = 0;
> >   	int device = -1;
> > @@ -873,11 +884,19 @@ igt_main
> >   	igt_subtest("basic-sequential")
> >   		sequential(device, handle, 0, 5);
> > -	for (e = intel_execution_engines; e->name; e++) {
> > -		igt_subtest_f("%s", e->name)
> > -			single(device, handle, eb_ring(e), e->name);
> > -		igt_subtest_f("signal-%s", e->name)
> > -			fence_signal(device, handle, eb_ring(e), e->name, 5);
> > +	igt_subtest_with_dynamic("single") {
> > +		__for_each_physical_engine(device, e) {
> > +			igt_dynamic_f("%s", e->name)
> > +				single(device, handle, e);
> > +		}
> > +	}
> > +
> > +	igt_subtest_with_dynamic("signal") {
> > +		__for_each_physical_engine(device, e) {
> > +			igt_dynamic_f("%s", e->name)
> > +				fence_signal(device, handle, e->flags,
> > +					     e->name, 5);
> > +		}
> >   	}
> >   	igt_subtest("signal-all")
> > @@ -907,10 +926,11 @@ igt_main
> >   			igt_require(gem_scheduler_has_ctx_priority(device));
> >   			igt_require(gem_scheduler_has_preemption(device));
> >   		}
> > -
> > -		for (e = intel_execution_engines; e->name; e++) {
> > -			igt_subtest_f("preempt-%s", e->name)
> > -				preempt(device, handle, eb_ring(e), e->name);
> > +		igt_subtest_with_dynamic("preempt") {
> > +			__for_each_physical_engine(device, e) {
> > +				igt_dynamic_f("%s", e->name)
> > +					preempt(device, handle, e);
> > +			}
> >   		}
> >   	}
> > @@ -919,19 +939,25 @@ igt_main
> >   			igt_device_set_master(device);
> >   		}
> > -		for (e = intel_execution_engines; e->name; e++) {
> > -			/* Requires master for STORE_DWORD on gen4/5 */
> > -			igt_subtest_f("poll-%s", e->name)
> > -				poll_ring(device, eb_ring(e), e->name, 20);
> > +		igt_subtest_with_dynamic("poll") {
> > +			__for_each_physical_engine(device, e) {
> > +				/* Requires master for STORE_DWORD on gen4/5 */
> > +				igt_dynamic_f("%s", e->name)
> > +					poll_ring(device, e, 20);
> > +			}
> > +		}
> > +
> > +		igt_subtest_with_dynamic("headless") {
> > +			__for_each_physical_engine(device, e) {
> > +				igt_dynamic_f("%s", e->name)
> > +				/* Requires master for changing display modes */
> > +					headless(device, handle, e);
> > +			}
> >   		}
> >   		igt_subtest("poll-sequential")
> >   			poll_sequential(device, "Sequential", 20);
> > -		igt_subtest("headless") {
> > -			/* Requires master for changing display modes */
> > -			headless(device, handle);
> > -		}
> >   	}
> >   	igt_fixture {
> > 
> 
Will fix all review comments in next version.
> Regards,
> 
> Tvrtko
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[igt-dev] ✓ Fi.CI.IGT: success for i915/gem_exec_nop:Adjusted test to utilize all available engines

[Patchwork]

== Series Details ==

Series: i915/gem_exec_nop:Adjusted test to utilize all available engines
URL   : https://patchwork.freedesktop.org/series/72334/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7783_full -> IGTPW_3958_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html

Known issues
------------

  Here are the changes found in IGTPW_3958_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +15 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@gem_busy@busy-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb7/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_persistence@processes:
    - shard-kbl:          [PASS][3] -> [FAIL][4] ([i915#570])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl3/igt@gem_ctx_persistence@processes.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl7/igt@gem_ctx_persistence@processes.html

  * igt@gem_ctx_persistence@vcs1-hostile-preempt:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_persistence@vcs1-hostile-preempt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb6/igt@gem_ctx_persistence@vcs1-hostile-preempt.html

  * igt@gem_ctx_shared@exec-shared-gtt-bsd:
    - shard-kbl:          [PASS][7] -> [FAIL][8] ([i915#616])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl7/igt@gem_ctx_shared@exec-shared-gtt-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl1/igt@gem_ctx_shared@exec-shared-gtt-bsd.html

  * igt@gem_exec_create@forked:
    - shard-apl:          [PASS][9] -> [TIMEOUT][10] ([fdo#112271] / [i915#940])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl1/igt@gem_exec_create@forked.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl4/igt@gem_exec_create@forked.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([i915#677]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@pi-ringfull-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb8/igt@gem_exec_schedule@pi-ringfull-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb4/igt@gem_exec_schedule@pi-ringfull-bsd.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-glk:          [PASS][15] -> [INCOMPLETE][16] ([i915#530] / [i915#58] / [k.org#198133])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk8/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-glk5/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
    - shard-hsw:          [PASS][17] -> [TIMEOUT][18] ([fdo#112271] / [i915#530])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw5/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible:
    - shard-apl:          [PASS][19] -> [FAIL][20] ([i915#520])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl4/igt@gem_persistent_relocs@forked-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl6/igt@gem_persistent_relocs@forked-interruptible.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-tglb:         [PASS][21] -> [FAIL][22] ([i915#520])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
    - shard-apl:          [PASS][23] -> [TIMEOUT][24] ([fdo#112271] / [i915#530])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrash-inactive:
    - shard-hsw:          [PASS][25] -> [INCOMPLETE][26] ([i915#530] / [i915#61])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@gem_persistent_relocs@forked-thrash-inactive.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw6/igt@gem_persistent_relocs@forked-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-kbl:          [PASS][27] -> [INCOMPLETE][28] ([fdo#103665] / [i915#530])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl2/igt@gem_persistent_relocs@forked-thrashing.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl4/igt@gem_persistent_relocs@forked-thrashing.html
    - shard-snb:          [PASS][29] -> [FAIL][30] ([i915#520])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb6/igt@gem_persistent_relocs@forked-thrashing.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-snb5/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_softpin@noreloc-s3:
    - shard-iclb:         [PASS][31] -> [INCOMPLETE][32] ([fdo#109100] / [i915#140])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb8/igt@gem_softpin@noreloc-s3.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb3/igt@gem_softpin@noreloc-s3.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [PASS][33] -> [FAIL][34] ([i915#818])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw6/igt@gem_tiled_blits@interruptible.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw5/igt@gem_tiled_blits@interruptible.html

  * igt@i915_selftest@mock_requests:
    - shard-snb:          [PASS][35] -> [INCOMPLETE][36] ([i915#82])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb6/igt@i915_selftest@mock_requests.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-snb5/igt@i915_selftest@mock_requests.html
    - shard-kbl:          [PASS][37] -> [INCOMPLETE][38] ([fdo#103665])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl6/igt@i915_selftest@mock_requests.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl3/igt@i915_selftest@mock_requests.html
    - shard-iclb:         [PASS][39] -> [INCOMPLETE][40] ([i915#140])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@i915_selftest@mock_requests.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb2/igt@i915_selftest@mock_requests.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-hsw:          [PASS][41] -> [INCOMPLETE][42] ([CI#80] / [i915#61])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw4/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][43] -> [INCOMPLETE][44] ([i915#61])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@kms_flip@flip-vs-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw7/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][45] -> [DMESG-WARN][46] ([i915#180])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-tglb:         [PASS][47] -> [FAIL][48] ([i915#49]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][49] -> [DMESG-WARN][50] ([i915#180]) +2 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][51] -> [SKIP][52] ([fdo#109642] / [fdo#111068])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb7/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_sprite_plane_onoff:
    - shard-iclb:         [PASS][53] -> [SKIP][54] ([fdo#109441])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb7/igt@kms_psr@psr2_sprite_plane_onoff.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][55] -> [SKIP][56] ([fdo#109276]) +20 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@prime_busy@hang-bsd2.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb7/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [SKIP][57] ([fdo#109276] / [fdo#112080]) -> [PASS][58] +4 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@gem_ctx_isolation@vcs1-none.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#110841]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_balancer@hang:
    - shard-iclb:         [INCOMPLETE][61] ([i915#140]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_balancer@hang.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb6/igt@gem_exec_balancer@hang.html

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [SKIP][63] ([i915#677]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb8/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@preempt-contexts-bsd2:
    - shard-iclb:         [SKIP][65] ([fdo#109276]) -> [PASS][66] +14 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb6/igt@gem_exec_schedule@preempt-contexts-bsd2.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb2/igt@gem_exec_schedule@preempt-contexts-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][67] ([fdo#112146]) -> [PASS][68] +6 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][69] ([i915#463] / [i915#472]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
    - shard-apl:          [TIMEOUT][71] ([fdo#112271] / [i915#530]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
    - shard-hsw:          [TIMEOUT][73] ([fdo#112271] / [i915#530]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-apl:          [TIMEOUT][75] ([fdo#112271]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
    - shard-tglb:         [TIMEOUT][77] ([fdo#112126] / [fdo#112271] / [i915#530]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb5/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-glk:          [TIMEOUT][79] ([fdo#112271]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-glk7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-hsw:          [INCOMPLETE][81] ([i915#530] / [i915#61]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-hsw7/igt@gem_persistent_relocs@forked-thrashing.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-hsw7/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-apl:          [FAIL][83] ([i915#644]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl4/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [DMESG-WARN][85] ([fdo#111870] / [i915#478]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb5/igt@gem_userptr_blits@dmabuf-sync.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-snb4/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@i915_selftest@mock_requests:
    - shard-tglb:         [INCOMPLETE][87] ([i915#472]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb7/igt@i915_selftest@mock_requests.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb8/igt@i915_selftest@mock_requests.html
    - shard-apl:          [INCOMPLETE][89] ([fdo#103927]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl6/igt@i915_selftest@mock_requests.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl4/igt@i915_selftest@mock_requests.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][91] ([i915#180]) -> [PASS][92] +4 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][93] ([i915#180]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-apl8/igt@kms_flip@flip-vs-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-apl3/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-tglb:         [FAIL][95] ([i915#49]) -> [PASS][96] +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_psr@psr2_suspend:
    - shard-iclb:         [SKIP][97] ([fdo#109441]) -> [PASS][98] +2 similar issues
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb8/igt@kms_psr@psr2_suspend.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb2/igt@kms_psr@psr2_suspend.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][99] ([fdo#112080]) -> [PASS][100] +10 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb3/igt@perf_pmu@busy-check-all-vcs1.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb4/igt@perf_pmu@busy-check-all-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][101] ([fdo#109276] / [fdo#112080]) -> [FAIL][102] ([IGT#28])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][103] ([IGT#28]) -> [SKIP][104] ([fdo#109276] / [fdo#112080])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][105] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][106] ([fdo#111870] / [i915#478])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-snb5/igt@gem_userptr_blits@sync-unmap.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][107] ([fdo#107724]) -> [SKIP][108] ([fdo#109349])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@runner@aborted:
    - shard-glk:          [FAIL][109] ([k.org#202321]) -> [FAIL][110] ([i915#873] / [k.org#202321])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7783/shard-glk2/igt@runner@aborted.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/shard-glk1/igt@runner@aborted.html

  
  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112126]: https://bugs.freedesktop.org/show_bug.cgi?id=112126
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#616]: https://gitlab.freedesktop.org/drm/intel/issues/616
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#873]: https://gitlab.freedesktop.org/drm/intel/issues/873
  [i915#940]: https://gitlab.freedesktop.org/drm/intel/issues/940
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5376 -> IGTPW_3958
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7783: 3ee976286895f0bd54388efc16b12f62c624ff19 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3958: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html
  IGT_5376: 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3958/index.html
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