[PATCH i-g-t 0/3] Add test coverage for multi queue reset

[PATCH i-g-t 0/3] Add test coverage for multi queue reset

[Stuart Summers]

Add test coverage for engine and GT reset scenarios in
tests/intel/xe_exec_reset.c. This includes both the compute
mode and legacy cases and covers primary and secondary queue
resets and CAT faults.

Apoorva Singh (1):
  tests/intel/xe_exec_reset: Add multi queue subtests

Stuart Summers (2):
  tests/intel/xe_exec_reset: Add a comment about return for syncobj wait
  tests/intel/xe_exec_reset: Add checks for hanging queue wait_ufence
    return

 lib/xe/xe_legacy.c          |  86 +++++++++++--
 tests/intel/xe_exec_reset.c | 233 ++++++++++++++++++++++++++++++++++--
 2 files changed, 295 insertions(+), 24 deletions(-)

-- 
2.43.0

[PATCH i-g-t 1/3] tests/intel/xe_exec_reset: Add a comment about return for syncobj wait

[Stuart Summers]

Add a comment to the syncobj wait after a hanging submission
to indicate that even for the hang case, we expect the syncobj
wait to return successfully as opposed to the wait ufence case
where we only return successful if hardware did in fact execute
the batch through the MI_USER_INTERRUPT to satisfy the wait ufence.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 lib/xe/xe_legacy.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
index 084445305..6aeddc578 100644
--- a/lib/xe/xe_legacy.c
+++ b/lib/xe/xe_legacy.c
@@ -181,8 +181,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 		return;
 	}
 
-	for (i = 0; i < n_exec_queues && n_execs; i++)
+	for (i = 0; i < n_exec_queues && n_execs; i++) {
+		/*
+		 * Expectation here is that on reset, submissions will
+		 * still satisfy the syncobj_wait.
+		 */
 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0, NULL));
+	}
 
 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
 
-- 
2.43.0

Re: [PATCH i-g-t 1/3] tests/intel/xe_exec_reset: Add a comment about return for syncobj wait

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 08:36:59PM +0000, Stuart Summers wrote:
>Add a comment to the syncobj wait after a hanging submission
>to indicate that even for the hang case, we expect the syncobj
>wait to return successfully as opposed to the wait ufence case
>where we only return successful if hardware did in fact execute
>the batch through the MI_USER_INTERRUPT to satisfy the wait ufence.
>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>---
> lib/xe/xe_legacy.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
>diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
>index 084445305..6aeddc578 100644
>--- a/lib/xe/xe_legacy.c
>+++ b/lib/xe/xe_legacy.c
>@@ -181,8 +181,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		return;
> 	}
>
>-	for (i = 0; i < n_exec_queues && n_execs; i++)
>+	for (i = 0; i < n_exec_queues && n_execs; i++) {
>+		/*
>+		 * Expectation here is that on reset, submissions will
>+		 * still satisfy the syncobj_wait.
>+		 */
> 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0, NULL));
>+	}
>
> 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
>

LGTM
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>-- 
>2.43.0
>

[PATCH i-g-t 2/3] tests/intel/xe_exec_reset: Add checks for hanging queue wait_ufence return

[Stuart Summers]

There is a 3 second wait user fence timeout for the compute mode
variants of this test. Instead of just skipping the wait altogether,
let's make sure this does in fact return -ETIME as expected there.

Also add the i == 0 cases for legacy and compute path for the actual
data checks to stay consistent and to be a little more explicit
about what we're checking there.

This also let's us add a little more detail to the cases in some
planned changes around hanging multi queue secondary queues.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 lib/xe/xe_legacy.c          |  8 ++++++--
 tests/intel/xe_exec_reset.c | 15 +++++++++++----
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
index 6aeddc578..3371a91ac 100644
--- a/lib/xe/xe_legacy.c
+++ b/lib/xe/xe_legacy.c
@@ -230,9 +230,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
 
 	if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
-		for (i = flags & LONG_SPIN ? n_exec_queues : 1;
-		     i < n_execs + extra_execs; i++)
+		for (i = flags & LONG_SPIN ? n_exec_queues : 0;
+		     i < n_execs + extra_execs; i++) {
+			if (!i)
+				continue;
+
 			igt_assert_eq(data[i].data, 0xc0ffee);
+		}
 	}
 
 	syncobj_destroy(fd, sync[0].handle);
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 95191139d..6b71d9144 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -461,17 +461,20 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 		return;
 	}
 
-	for (i = 1; i < n_execs; i++) {
+	for (i = 0; i < n_execs; i++) {
 		int64_t timeout = 3 * NSEC_PER_SEC;
 		int err;
 
 		err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
 				       exec_queues[i % n_exec_queues], &timeout);
-		if (flags & GT_RESET || flags & CAT_ERROR)
+		if (!i) {
+			igt_assert(err == -ETIME || err == -EIO);
+		} else if (flags & GT_RESET || flags & CAT_ERROR) {
 			/* exec races with reset: may return -EIO or complete */
 			igt_assert(err == -EIO || !err);
-		else
+		} else {
 			igt_assert_eq(err, 0);
+		}
 	}
 
 	sync[0].addr = to_user_pointer(&data[0].vm_sync);
@@ -479,8 +482,12 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, 3 * NSEC_PER_SEC);
 
 	if (!(flags & (GT_RESET | CANCEL))) {
-		for (i = 1; i < n_execs; i++)
+		for (i = 0; i < n_execs; i++) {
+			if (!i)
+				continue;
+
 			igt_assert_eq(data[i].data, 0xc0ffee);
+		}
 	}
 
 	for (i = 0; i < n_exec_queues; i++)
-- 
2.43.0

Re: [PATCH i-g-t 2/3] tests/intel/xe_exec_reset: Add checks for hanging queue wait_ufence return

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 08:37:00PM +0000, Stuart Summers wrote:
>There is a 3 second wait user fence timeout for the compute mode
>variants of this test. Instead of just skipping the wait altogether,
>let's make sure this does in fact return -ETIME as expected there.
>
>Also add the i == 0 cases for legacy and compute path for the actual
>data checks to stay consistent and to be a little more explicit
>about what we're checking there.
>
>This also let's us add a little more detail to the cases in some
>planned changes around hanging multi queue secondary queues.
>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>---
> lib/xe/xe_legacy.c          |  8 ++++++--
> tests/intel/xe_exec_reset.c | 15 +++++++++++----
> 2 files changed, 17 insertions(+), 6 deletions(-)
>
>diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
>index 6aeddc578..3371a91ac 100644
>--- a/lib/xe/xe_legacy.c
>+++ b/lib/xe/xe_legacy.c
>@@ -230,9 +230,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
>
> 	if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
>-		for (i = flags & LONG_SPIN ? n_exec_queues : 1;
>-		     i < n_execs + extra_execs; i++)
>+		for (i = flags & LONG_SPIN ? n_exec_queues : 0;
>+		     i < n_execs + extra_execs; i++) {
>+			if (!i)
>+				continue;
>+
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>+		}
> 	}
>
> 	syncobj_destroy(fd, sync[0].handle);
>diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
>index 95191139d..6b71d9144 100644
>--- a/tests/intel/xe_exec_reset.c
>+++ b/tests/intel/xe_exec_reset.c
>@@ -461,17 +461,20 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		return;
> 	}
>
>-	for (i = 1; i < n_execs; i++) {
>+	for (i = 0; i < n_execs; i++) {
> 		int64_t timeout = 3 * NSEC_PER_SEC;
> 		int err;
>
> 		err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> 				       exec_queues[i % n_exec_queues], &timeout);
>-		if (flags & GT_RESET || flags & CAT_ERROR)
>+		if (!i) {
>+			igt_assert(err == -ETIME || err == -EIO);
>+		} else if (flags & GT_RESET || flags & CAT_ERROR) {
> 			/* exec races with reset: may return -EIO or complete */
> 			igt_assert(err == -EIO || !err);
>-		else
>+		} else {
> 			igt_assert_eq(err, 0);
>+		}
> 	}
>
> 	sync[0].addr = to_user_pointer(&data[0].vm_sync);
>@@ -479,8 +482,12 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	xe_wait_ufence(fd, &data[0].vm_sync, USER_FENCE_VALUE, 0, 3 * NSEC_PER_SEC);
>
> 	if (!(flags & (GT_RESET | CANCEL))) {
>-		for (i = 1; i < n_execs; i++)
>+		for (i = 0; i < n_execs; i++) {
>+			if (!i)
>+				continue;
>+
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>+		}
> 	}
>
> 	for (i = 0; i < n_exec_queues; i++)

LGTM
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>-- 
>2.43.0
>

[PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Stuart Summers]

From: Apoorva Singh <apoorva.singh@intel.com>

Extend the existing test cases in tests/intel/xe_exec_reset.c
to include testing of reset flows for both primary queue
and secondary queues.

Engine resets without CAT faults are triggered via the *-cancel
cases. These don't include the CANCEL flag as this causes a spinner
on each queue which isn't adding any extra coverage for multi queue
over non multi queue.

Since the *-cancel cases are currently implemented only for the
legacy cases, do the same for multi queue.

New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
the general multi queue cases and the cases where we are triggering
engine resets and/or cat faults on secondary queues specifically.

Note for multi queue it is interesting to test these secondary
queue reset scenarios since these are communicated to the driver
from GuC via the primary queue and after this, the entire queue
group is torn down. The test cases here are to ensure nothing
breaks when we hit a scenario like this.

Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Signed-off-by: Katarzyna Piecielska <katarzyna.piecielska@intel.com>
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 lib/xe/xe_legacy.c          |  71 ++++++++++--
 tests/intel/xe_exec_reset.c | 222 ++++++++++++++++++++++++++++++++++--
 2 files changed, 274 insertions(+), 19 deletions(-)

diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
index 3371a91ac..f9bd5bcb6 100644
--- a/lib/xe/xe_legacy.c
+++ b/lib/xe/xe_legacy.c
@@ -13,6 +13,8 @@
 
 /* Batch buffer element count, in number of dwords(u32) */
 #define BATCH_DW_COUNT			16
+#define SECONDARY_QUEUE			(0x1 << 15)
+#define MULTI_QUEUE			(0x1 << 14)
 #define COMPRESSION			(0x1 << 13)
 #define SYSTEM				(0x1 << 12)
 #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
@@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 			xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) : 0,
 	};
 	int i, b;
+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
 	int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ? n_exec_queues : 0;
 
 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
 
+	igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags & MULTI_QUEUE),
+		     "SECONDARY_QUEUE requires MULTI_QUEUE to be set");
+
 	if (flags & COMPRESSION)
 		igt_require(intel_gen(intel_get_drm_devid(fd)) >= 20);
 
@@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < n_exec_queues; i++) {
-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
+		if (flags & MULTI_QUEUE) {
+			struct drm_xe_ext_set_property multi_queue = {
+				.base.next_extension = 0,
+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
+			};
+
+			uint64_t ext = to_user_pointer(&multi_queue);
+
+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
+		} else {
+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
+		}
 		syncobjs[i] = syncobj_create(fd, 0);
 	}
 
@@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	}
 
 	for (i = 0; i < n_execs; i++) {
-		u64 base_addr = (!use_capture_mode && (flags & CAT_ERROR) && !i)
-			? (addr + bo_size * 128) : addr;
+		u64 base_addr = (!use_capture_mode && flags & CAT_ERROR &&
+				 i == hang_position) ?
+				(addr + bo_size * 128) : addr;
 		u64 batch_offset = (char *)&data[i].batch - (char *)data;
 		u64 batch_addr = base_addr + batch_offset;
 		u64 spin_offset = (char *)&data[i].spin - (char *)data;
 		u64 sdi_offset = (char *)&data[i].data - (char *)data;
 		u64 sdi_addr = base_addr + sdi_offset;
 		u64 exec_addr;
-		int e = i % n_exec_queues;
+		int err, e = i % n_exec_queues;
 
-		if (!i || flags & CANCEL ||
+		/*
+		 * For cat fault on a secondary queue the fault will
+		 * be on the spinner.
+		 */
+		if (i == hang_position || flags & CANCEL ||
 		    (flags & LONG_SPIN && i < n_exec_queues)) {
 			spin_opts.addr = base_addr + spin_offset;
 			xe_spin_init(&data[i].spin, &spin_opts);
@@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 		if (e != i)
 			syncobj_reset(fd, &syncobjs[e], 1);
 
-		xe_exec(fd, &exec);
+		/*
+		 * Secondary queues are reset when the primary queue
+		 * is reset. The submission can race here and it is
+		 * expected for those to fail submission if the primary
+		 * reset has already happened.
+		 */
+		err = __xe_exec(fd, &exec);
+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
 
-		if (!i && !(flags & CAT_ERROR) && !use_capture_mode &&
-		    !(flags & COMPRESSION))
+		if (i == hang_position && !(flags & CAT_ERROR) &&
+		    !use_capture_mode && !(flags & COMPRESSION))
 			xe_spin_wait_started(&data[i].spin);
 	}
 
@@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 		 * Expectation here is that on reset, submissions will
 		 * still satisfy the syncobj_wait.
 		 */
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0, NULL));
+		int err = syncobj_wait_err(fd, &syncobjs[i], 1, INT64_MAX, 0);
+
+		/*
+		 * Currently any time GuC resets a queue which is part of a
+		 * multi queue queue group submitted by the KMD, the KMD
+		 * will tear down the entire group. This means we don't know
+		 * whether a particular queue submitted prior to the hanging
+		 * queue will complete or not. So we have to check all possible
+		 * return values here.
+		 *
+		 * In the event we get an -ECANCELED at the exec above and the
+		 * syncobj was not installed, we expect this to return -EINVAL
+		 * here instead.
+		 */
+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -EINVAL));
 	}
 
 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
@@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
 		for (i = flags & LONG_SPIN ? n_exec_queues : 0;
 		     i < n_execs + extra_execs; i++) {
-			if (!i)
+			/*
+			 * For multi-queue there is no guarantee which
+			 * queue will be scheduled first as they are all
+			 * submitted at the same priority in this test.
+			 * So we can't guarantee any data integrity here.
+			 */
+			if (i == hang_position || flags & MULTI_QUEUE)
 				continue;
 
 			igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 6b71d9144..ea50567c0 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -112,7 +112,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
 #define MAX_N_EXECQUEUES	16
 #define GT_RESET			(0x1 << 0)
 #define CLOSE_FD			(0x1 << 1)
-#define CLOSE_EXEC_QUEUES	(0x1 << 2)
+#define CLOSE_EXEC_QUEUES		(0x1 << 2)
 #define VIRTUAL				(0x1 << 3)
 #define PARALLEL			(0x1 << 4)
 #define CAT_ERROR			(0x1 << 5)
@@ -124,6 +124,8 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
 #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
 #define SYSTEM				(0x1 << 12)
 #define COMPRESSION			(0x1 << 13)
+#define MULTI_QUEUE			(0x1 << 14)
+#define SECONDARY_QUEUE			(0x1 << 15)
 
 /**
  * SUBTEST: %s-cat-error
@@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
  *
  * SUBTEST: cm-close-execqueues-close-fd
  * Description: Test compute mode close exec_queues close fd
+ *
+ * SUBTEST: multi-queue-cat-error
+ * Sub-category: MultiQ tests
+ * Description: Test cat error with multi_queue
+ *
+ * SUBTEST: multi-queue-cat-error-on-secondary
+ * Sub-category: MultiQ tests
+ * Description: Test cat error with multi_queue
+ *              on a secondary queue
+ *
+ * SUBTEST: multi-queue-gt-reset
+ * Sub-category: MultiQ tests
+ * Description: Test GT reset with multi_queue
+ *
+ * SUBTEST: multi-queue-cancel
+ * Sub-category: MultiQ tests
+ * Description: Test engine reset with multi_queue
+ *
+ * SUBTEST: multi-queue-cancel-on-secondary
+ * Sub-category: MultiQ tests
+ * Description: Test engine reset with multi_queue
+ *              on a secondary queue
+ *
+ * SUBTEST: multi-queue-close-fd
+ * Sub-category: MultiQ tests
+ * Description: Test close fd with multi_queue
+ *
+ * SUBTEST: multi-queue-close-execqueues
+ * Sub-category: MultiQ tests
+ * Description: Test close execqueues with multi_queue
+ *
+ * SUBTEST: cm-multi-queue-cat-error
+ * Sub-category: MultiQ tests
+ * Description: Test compute mode cat error with multi_queue
+ *
+ * SUBTEST: cm-multi-queue-cat-error-on-secondary
+ * Sub-category: MultiQ tests
+ * Description: Test compute mode cat error with multi_queue
+ *              on a secondary queue
+ *
+ * SUBTEST: cm-multi-queue-gt-reset
+ * Sub-category: MultiQ tests
+ * Description: Test compute mode GT reset with multi_queue
+ *
+ * SUBTEST: cm-multi-queue-close-fd
+ * Sub-category: MultiQ tests
+ * Description: Test compute mode close fd with multi_queue
+ *
+ * SUBTEST: cm-multi-queue-close-execqueues
+ * Sub-category: MultiQ tests
+ * Description: Test compute mode close execqueues with multi_queue
  */
 
 static void
@@ -384,9 +437,14 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	} *data;
 	struct xe_spin_opts spin_opts = { .preempt = flags & PREEMPT };
 	int i, b;
+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
 
 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
 
+	igt_assert_f(!(flags & SECONDARY_QUEUE) ||
+		     ((flags & MULTI_QUEUE) && (flags & CAT_ERROR)),
+		     "SECONDARY_QUEUE requires MULTI_QUEUE and CAT_ERROR to be set");
+
 	if (flags & CLOSE_FD)
 		fd = drm_open_driver(DRIVER_XE);
 
@@ -401,7 +459,20 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	memset(data, 0, bo_size);
 
 	for (i = 0; i < n_exec_queues; i++) {
-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
+		if (flags & MULTI_QUEUE) {
+			struct drm_xe_ext_set_property multi_queue = {
+				.base.next_extension = 0,
+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
+			};
+
+			uint64_t ext = to_user_pointer(&multi_queue);
+
+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
+		} else {
+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
+		}
 	};
 
 	sync[0].addr = to_user_pointer(&data[0].vm_sync);
@@ -411,17 +482,21 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	data[0].vm_sync = 0;
 
 	for (i = 0; i < n_execs; i++) {
-		uint64_t base_addr = flags & CAT_ERROR && !i ?
-			addr + bo_size * 128 : addr;
+		uint64_t base_addr = (flags & CAT_ERROR && i == hang_position) ?
+				     (addr + bo_size * 128) : addr;
 		uint64_t batch_offset = (char *)&data[i].batch - (char *)data;
 		uint64_t batch_addr = base_addr + batch_offset;
 		uint64_t spin_offset = (char *)&data[i].spin - (char *)data;
 		uint64_t sdi_offset = (char *)&data[i].data - (char *)data;
 		uint64_t sdi_addr = base_addr + sdi_offset;
 		uint64_t exec_addr;
-		int e = i % n_exec_queues;
+		int err, e = i % n_exec_queues;
 
-		if (!i || flags & CANCEL) {
+		/*
+		 * For cat fault on a secondary queue the fault will
+		 * be on the spinner.
+		 */
+		if (i == hang_position || flags & CANCEL) {
 			spin_opts.addr = base_addr + spin_offset;
 			xe_spin_init(&data[i].spin, &spin_opts);
 			exec_addr = spin_opts.addr;
@@ -442,7 +517,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 
 		exec.exec_queue_id = exec_queues[e];
 		exec.address = exec_addr;
-		xe_exec(fd, &exec);
+
+		/*
+		 * Secondary queues are reset when the primary queue
+		 * is reset. The submission can race here and it is
+		 * expected for those to fail submission if the primary
+		 * reset has already happened.
+		 */
+		err = __xe_exec(fd, &exec);
+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
+
+		if (i == hang_position && !(flags & CAT_ERROR))
+			xe_spin_wait_started(&data[i].spin);
 	}
 
 	if (flags & GT_RESET) {
@@ -467,8 +553,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 
 		err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
 				       exec_queues[i % n_exec_queues], &timeout);
-		if (!i) {
+		if (i == hang_position) {
 			igt_assert(err == -ETIME || err == -EIO);
+		} else if (flags & MULTI_QUEUE) {
+			/*
+			 * Currently any time GuC resets a queue submitted
+			 * by the KMD, the KMD will tear down the entire
+			 * queue group. This means we don't know whether
+			 * a particular queue submitted prior to the hanging
+			 * queue will complete or not. So we have to check
+			 * all possible return values here.
+			 */
+			igt_assert(err == -ETIME || err == -EIO || !err);
 		} else if (flags & GT_RESET || flags & CAT_ERROR) {
 			/* exec races with reset: may return -EIO or complete */
 			igt_assert(err == -EIO || !err);
@@ -483,7 +579,13 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 
 	if (!(flags & (GT_RESET | CANCEL))) {
 		for (i = 0; i < n_execs; i++) {
-			if (!i)
+			/*
+			 * For multi-queue there is no guarantee which
+			 * queue will be scheduled first as they are all
+			 * submitted at the same priority in this test.
+			 * So we can't guarantee any data integrity here.
+			 */
+			if (i == hang_position || flags & MULTI_QUEUE)
 				continue;
 
 			igt_assert_eq(data[i].data, 0xc0ffee);
@@ -986,6 +1088,108 @@ int igt_main()
 		xe_for_each_gt(fd, gt)
 			gt_mocs_reset(fd, gt);
 
+	igt_subtest("multi-queue-cat-error") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(fd, hwe, 16, 16,
+					    CAT_ERROR | MULTI_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-cat-error-on-secondary") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(fd, hwe, 16, 16,
+					    CAT_ERROR | MULTI_QUEUE |
+					    SECONDARY_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-gt-reset") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(fd, hwe, 16, 16,
+					    GT_RESET | MULTI_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-cancel") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(fd, hwe, 16, 16,
+					    MULTI_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-cancel-on-secondary") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(fd, hwe, 16, 16,
+					    MULTI_QUEUE | SECONDARY_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-close-fd") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(-1, hwe, 16, 256,
+					    CLOSE_FD | MULTI_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("multi-queue-close-execqueues") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			xe_legacy_test_mode(-1, hwe, 16, 256,
+					    CLOSE_EXEC_QUEUES | CLOSE_FD |
+					    MULTI_QUEUE,
+					    LEGACY_MODE_ADDR,
+					    false);
+	}
+
+	igt_subtest("cm-multi-queue-cat-error") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			test_compute_mode(fd, hwe, 16, 16,
+					  CAT_ERROR | MULTI_QUEUE);
+	}
+
+	igt_subtest("cm-multi-queue-cat-error-on-secondary") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			test_compute_mode(fd, hwe, 16, 16,
+					  CAT_ERROR | MULTI_QUEUE |
+					  SECONDARY_QUEUE);
+	}
+
+	igt_subtest("cm-multi-queue-gt-reset") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			test_compute_mode(fd, hwe, 16, 16,
+					  GT_RESET | MULTI_QUEUE);
+	}
+
+	igt_subtest("cm-multi-queue-close-fd") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			test_compute_mode(-1, hwe, 16, 256,
+					  CLOSE_FD | MULTI_QUEUE);
+	}
+
+	igt_subtest("cm-multi-queue-close-execqueues") {
+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
+		xe_for_each_multi_queue_engine(fd, hwe)
+			test_compute_mode(-1, hwe, 16, 256,
+					  CLOSE_EXEC_QUEUES | CLOSE_FD |
+					  MULTI_QUEUE);
+	}
+
 	igt_fixture()
 		drm_close_driver(fd);
 }
-- 
2.43.0

Re: [PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 08:37:01PM +0000, Stuart Summers wrote:
>From: Apoorva Singh <apoorva.singh@intel.com>
>
>Extend the existing test cases in tests/intel/xe_exec_reset.c
>to include testing of reset flows for both primary queue
>and secondary queues.
>
>Engine resets without CAT faults are triggered via the *-cancel
>cases. These don't include the CANCEL flag as this causes a spinner
>on each queue which isn't adding any extra coverage for multi queue
>over non multi queue.
>
>Since the *-cancel cases are currently implemented only for the
>legacy cases, do the same for multi queue.
>
>New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
>the general multi queue cases and the cases where we are triggering
>engine resets and/or cat faults on secondary queues specifically.
>
>Note for multi queue it is interesting to test these secondary
>queue reset scenarios since these are communicated to the driver
>from GuC via the primary queue and after this, the entire queue
>group is torn down. The test cases here are to ensure nothing
>breaks when we hit a scenario like this.
>
>Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
>Signed-off-by: Fei Yang <fei.yang@intel.com>
>Signed-off-by: Katarzyna Piecielska <katarzyna.piecielska@intel.com>
>Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
>Signed-off-by: Daniel Charles <daniel.charles@intel.com>
>Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>---
> lib/xe/xe_legacy.c          |  71 ++++++++++--
> tests/intel/xe_exec_reset.c | 222 ++++++++++++++++++++++++++++++++++--
> 2 files changed, 274 insertions(+), 19 deletions(-)
>
>diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
>index 3371a91ac..f9bd5bcb6 100644
>--- a/lib/xe/xe_legacy.c
>+++ b/lib/xe/xe_legacy.c
>@@ -13,6 +13,8 @@
>
> /* Batch buffer element count, in number of dwords(u32) */
> #define BATCH_DW_COUNT			16
>+#define SECONDARY_QUEUE			(0x1 << 15)
>+#define MULTI_QUEUE			(0x1 << 14)
> #define COMPRESSION			(0x1 << 13)
> #define SYSTEM				(0x1 << 12)
> #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
>@@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 			xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) : 0,
> 	};
> 	int i, b;
>+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> 	int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ? n_exec_queues : 0;
>
> 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
>
>+	igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags & MULTI_QUEUE),
>+		     "SECONDARY_QUEUE requires MULTI_QUEUE to be set");
>+
> 	if (flags & COMPRESSION)
> 		igt_require(intel_gen(intel_get_drm_devid(fd)) >= 20);
>
>@@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	data = xe_bo_map(fd, bo, bo_size);
>
> 	for (i = 0; i < n_exec_queues; i++) {
>-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		if (flags & MULTI_QUEUE) {
>+			struct drm_xe_ext_set_property multi_queue = {
>+				.base.next_extension = 0,
>+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
>+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
>+			};
>+
>+			uint64_t ext = to_user_pointer(&multi_queue);
>+
>+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
>+		} else {
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		}
> 		syncobjs[i] = syncobj_create(fd, 0);
> 	}
>
>@@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	}
>
> 	for (i = 0; i < n_execs; i++) {
>-		u64 base_addr = (!use_capture_mode && (flags & CAT_ERROR) && !i)
>-			? (addr + bo_size * 128) : addr;
>+		u64 base_addr = (!use_capture_mode && flags & CAT_ERROR &&
>+				 i == hang_position) ?
>+				(addr + bo_size * 128) : addr;
> 		u64 batch_offset = (char *)&data[i].batch - (char *)data;
> 		u64 batch_addr = base_addr + batch_offset;
> 		u64 spin_offset = (char *)&data[i].spin - (char *)data;
> 		u64 sdi_offset = (char *)&data[i].data - (char *)data;
> 		u64 sdi_addr = base_addr + sdi_offset;
> 		u64 exec_addr;
>-		int e = i % n_exec_queues;
>+		int err, e = i % n_exec_queues;
>
>-		if (!i || flags & CANCEL ||
>+		/*
>+		 * For cat fault on a secondary queue the fault will
>+		 * be on the spinner.
>+		 */
>+		if (i == hang_position || flags & CANCEL ||
> 		    (flags & LONG_SPIN && i < n_exec_queues)) {
> 			spin_opts.addr = base_addr + spin_offset;
> 			xe_spin_init(&data[i].spin, &spin_opts);
>@@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		if (e != i)
> 			syncobj_reset(fd, &syncobjs[e], 1);
>
>-		xe_exec(fd, &exec);
>+		/*
>+		 * Secondary queues are reset when the primary queue
>+		 * is reset. The submission can race here and it is
>+		 * expected for those to fail submission if the primary
>+		 * reset has already happened.
>+		 */
>+		err = __xe_exec(fd, &exec);
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
>
>-		if (!i && !(flags & CAT_ERROR) && !use_capture_mode &&
>-		    !(flags & COMPRESSION))
>+		if (i == hang_position && !(flags & CAT_ERROR) &&
>+		    !use_capture_mode && !(flags & COMPRESSION))
> 			xe_spin_wait_started(&data[i].spin);
> 	}
>
>@@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		 * Expectation here is that on reset, submissions will
> 		 * still satisfy the syncobj_wait.
> 		 */
>-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0, NULL));
>+		int err = syncobj_wait_err(fd, &syncobjs[i], 1, INT64_MAX, 0);
>+
>+		/*
>+		 * Currently any time GuC resets a queue which is part of a
>+		 * multi queue queue group submitted by the KMD, the KMD
>+		 * will tear down the entire group. This means we don't know
>+		 * whether a particular queue submitted prior to the hanging
>+		 * queue will complete or not. So we have to check all possible
>+		 * return values here.
>+		 *
>+		 * In the event we get an -ECANCELED at the exec above and the
>+		 * syncobj was not installed, we expect this to return -EINVAL
>+		 * here instead.
>+		 */
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -EINVAL));
> 	}
>
> 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
>@@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
> 		for (i = flags & LONG_SPIN ? n_exec_queues : 0;
> 		     i < n_execs + extra_execs; i++) {
>-			if (!i)
>+			/*
>+			 * For multi-queue there is no guarantee which
>+			 * queue will be scheduled first as they are all
>+			 * submitted at the same priority in this test.
>+			 * So we can't guarantee any data integrity here.
>+			 */
>+			if (i == hang_position || flags & MULTI_QUEUE)
> 				continue;
>
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
>index 6b71d9144..ea50567c0 100644
>--- a/tests/intel/xe_exec_reset.c
>+++ b/tests/intel/xe_exec_reset.c
>@@ -112,7 +112,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
> #define MAX_N_EXECQUEUES	16
> #define GT_RESET			(0x1 << 0)
> #define CLOSE_FD			(0x1 << 1)
>-#define CLOSE_EXEC_QUEUES	(0x1 << 2)
>+#define CLOSE_EXEC_QUEUES		(0x1 << 2)
> #define VIRTUAL				(0x1 << 3)
> #define PARALLEL			(0x1 << 4)
> #define CAT_ERROR			(0x1 << 5)
>@@ -124,6 +124,8 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
> #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
> #define SYSTEM				(0x1 << 12)
> #define COMPRESSION			(0x1 << 13)
>+#define MULTI_QUEUE			(0x1 << 14)
>+#define SECONDARY_QUEUE			(0x1 << 15)
>
> /**
>  * SUBTEST: %s-cat-error
>@@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
>  *
>  * SUBTEST: cm-close-execqueues-close-fd
>  * Description: Test compute mode close exec_queues close fd
>+ *
>+ * SUBTEST: multi-queue-cat-error
>+ * Sub-category: MultiQ tests
>+ * Description: Test cat error with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cat-error-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test cat error with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: multi-queue-gt-reset
>+ * Sub-category: MultiQ tests
>+ * Description: Test GT reset with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cancel
>+ * Sub-category: MultiQ tests
>+ * Description: Test engine reset with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cancel-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test engine reset with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: multi-queue-close-fd
>+ * Sub-category: MultiQ tests
>+ * Description: Test close fd with multi_queue
>+ *
>+ * SUBTEST: multi-queue-close-execqueues
>+ * Sub-category: MultiQ tests
>+ * Description: Test close execqueues with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-cat-error
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode cat error with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-cat-error-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode cat error with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: cm-multi-queue-gt-reset
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode GT reset with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-close-fd
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode close fd with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-close-execqueues
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode close execqueues with multi_queue

Remove 'Sub-category' tags here as it is not consistent with other
multi-queue tests (Besides, MultiQ is not a consistent naming used
either).

Other than that, patch LGTM
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>  */
>
> static void
>@@ -384,9 +437,14 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	} *data;
> 	struct xe_spin_opts spin_opts = { .preempt = flags & PREEMPT };
> 	int i, b;
>+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
>
> 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
>
>+	igt_assert_f(!(flags & SECONDARY_QUEUE) ||
>+		     ((flags & MULTI_QUEUE) && (flags & CAT_ERROR)),
>+		     "SECONDARY_QUEUE requires MULTI_QUEUE and CAT_ERROR to be set");
>+
> 	if (flags & CLOSE_FD)
> 		fd = drm_open_driver(DRIVER_XE);
>
>@@ -401,7 +459,20 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	memset(data, 0, bo_size);
>
> 	for (i = 0; i < n_exec_queues; i++) {
>-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		if (flags & MULTI_QUEUE) {
>+			struct drm_xe_ext_set_property multi_queue = {
>+				.base.next_extension = 0,
>+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
>+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
>+			};
>+
>+			uint64_t ext = to_user_pointer(&multi_queue);
>+
>+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
>+		} else {
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		}
> 	};
>
> 	sync[0].addr = to_user_pointer(&data[0].vm_sync);
>@@ -411,17 +482,21 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	data[0].vm_sync = 0;
>
> 	for (i = 0; i < n_execs; i++) {
>-		uint64_t base_addr = flags & CAT_ERROR && !i ?
>-			addr + bo_size * 128 : addr;
>+		uint64_t base_addr = (flags & CAT_ERROR && i == hang_position) ?
>+				     (addr + bo_size * 128) : addr;
> 		uint64_t batch_offset = (char *)&data[i].batch - (char *)data;
> 		uint64_t batch_addr = base_addr + batch_offset;
> 		uint64_t spin_offset = (char *)&data[i].spin - (char *)data;
> 		uint64_t sdi_offset = (char *)&data[i].data - (char *)data;
> 		uint64_t sdi_addr = base_addr + sdi_offset;
> 		uint64_t exec_addr;
>-		int e = i % n_exec_queues;
>+		int err, e = i % n_exec_queues;
>
>-		if (!i || flags & CANCEL) {
>+		/*
>+		 * For cat fault on a secondary queue the fault will
>+		 * be on the spinner.
>+		 */
>+		if (i == hang_position || flags & CANCEL) {
> 			spin_opts.addr = base_addr + spin_offset;
> 			xe_spin_init(&data[i].spin, &spin_opts);
> 			exec_addr = spin_opts.addr;
>@@ -442,7 +517,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 		exec.exec_queue_id = exec_queues[e];
> 		exec.address = exec_addr;
>-		xe_exec(fd, &exec);
>+
>+		/*
>+		 * Secondary queues are reset when the primary queue
>+		 * is reset. The submission can race here and it is
>+		 * expected for those to fail submission if the primary
>+		 * reset has already happened.
>+		 */
>+		err = __xe_exec(fd, &exec);
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
>+
>+		if (i == hang_position && !(flags & CAT_ERROR))
>+			xe_spin_wait_started(&data[i].spin);
> 	}
>
> 	if (flags & GT_RESET) {
>@@ -467,8 +553,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 		err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> 				       exec_queues[i % n_exec_queues], &timeout);
>-		if (!i) {
>+		if (i == hang_position) {
> 			igt_assert(err == -ETIME || err == -EIO);
>+		} else if (flags & MULTI_QUEUE) {
>+			/*
>+			 * Currently any time GuC resets a queue submitted
>+			 * by the KMD, the KMD will tear down the entire
>+			 * queue group. This means we don't know whether
>+			 * a particular queue submitted prior to the hanging
>+			 * queue will complete or not. So we have to check
>+			 * all possible return values here.
>+			 */
>+			igt_assert(err == -ETIME || err == -EIO || !err);
> 		} else if (flags & GT_RESET || flags & CAT_ERROR) {
> 			/* exec races with reset: may return -EIO or complete */
> 			igt_assert(err == -EIO || !err);
>@@ -483,7 +579,13 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 	if (!(flags & (GT_RESET | CANCEL))) {
> 		for (i = 0; i < n_execs; i++) {
>-			if (!i)
>+			/*
>+			 * For multi-queue there is no guarantee which
>+			 * queue will be scheduled first as they are all
>+			 * submitted at the same priority in this test.
>+			 * So we can't guarantee any data integrity here.
>+			 */
>+			if (i == hang_position || flags & MULTI_QUEUE)
> 				continue;
>
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>@@ -986,6 +1088,108 @@ int igt_main()
> 		xe_for_each_gt(fd, gt)
> 			gt_mocs_reset(fd, gt);
>
>+	igt_subtest("multi-queue-cat-error") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    CAT_ERROR | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cat-error-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    CAT_ERROR | MULTI_QUEUE |
>+					    SECONDARY_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-gt-reset") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    GT_RESET | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cancel") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cancel-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    MULTI_QUEUE | SECONDARY_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-close-fd") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(-1, hwe, 16, 256,
>+					    CLOSE_FD | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-close-execqueues") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(-1, hwe, 16, 256,
>+					    CLOSE_EXEC_QUEUES | CLOSE_FD |
>+					    MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("cm-multi-queue-cat-error") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  CAT_ERROR | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-cat-error-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  CAT_ERROR | MULTI_QUEUE |
>+					  SECONDARY_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-gt-reset") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  GT_RESET | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-close-fd") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(-1, hwe, 16, 256,
>+					  CLOSE_FD | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-close-execqueues") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(-1, hwe, 16, 256,
>+					  CLOSE_EXEC_QUEUES | CLOSE_FD |
>+					  MULTI_QUEUE);
>+	}
>+
> 	igt_fixture()
> 		drm_close_driver(fd);
> }
>-- 
>2.43.0
>

Re: [PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Summers, Stuart]

On Sun, 2026-04-12 at 19:32 -0700, Niranjana Vishwanathapura wrote:
> On Thu, Apr 09, 2026 at 08:37:01PM +0000, Stuart Summers wrote:
> > From: Apoorva Singh <apoorva.singh@intel.com>
> > 
> > Extend the existing test cases in tests/intel/xe_exec_reset.c
> > to include testing of reset flows for both primary queue
> > and secondary queues.
> > 
> > Engine resets without CAT faults are triggered via the *-cancel
> > cases. These don't include the CANCEL flag as this causes a spinner
> > on each queue which isn't adding any extra coverage for multi queue
> > over non multi queue.
> > 
> > Since the *-cancel cases are currently implemented only for the
> > legacy cases, do the same for multi queue.
> > 
> > New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
> > the general multi queue cases and the cases where we are triggering
> > engine resets and/or cat faults on secondary queues specifically.
> > 
> > Note for multi queue it is interesting to test these secondary
> > queue reset scenarios since these are communicated to the driver
> > from GuC via the primary queue and after this, the entire queue
> > group is torn down. The test cases here are to ensure nothing
> > breaks when we hit a scenario like this.
> > 
> > Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
> > Signed-off-by: Fei Yang <fei.yang@intel.com>
> > Signed-off-by: Katarzyna Piecielska
> > <katarzyna.piecielska@intel.com>
> > Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
> > Signed-off-by: Daniel Charles <daniel.charles@intel.com>
> > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> > lib/xe/xe_legacy.c          |  71 ++++++++++--
> > tests/intel/xe_exec_reset.c | 222
> > ++++++++++++++++++++++++++++++++++--
> > 2 files changed, 274 insertions(+), 19 deletions(-)
> > 
> > diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
> > index 3371a91ac..f9bd5bcb6 100644
> > --- a/lib/xe/xe_legacy.c
> > +++ b/lib/xe/xe_legacy.c
> > @@ -13,6 +13,8 @@
> > 
> > /* Batch buffer element count, in number of dwords(u32) */
> > #define BATCH_DW_COUNT                  16
> > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > +#define MULTI_QUEUE                    (0x1 << 14)
> > #define COMPRESSION                     (0x1 << 13)
> > #define SYSTEM                          (0x1 << 12)
> > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > @@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                         xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) :
> > 0,
> >         };
> >         int i, b;
> > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> >         int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ?
> > n_exec_queues : 0;
> > 
> >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > 
> > +       igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags &
> > MULTI_QUEUE),
> > +                    "SECONDARY_QUEUE requires MULTI_QUEUE to be
> > set");
> > +
> >         if (flags & COMPRESSION)
> >                 igt_require(intel_gen(intel_get_drm_devid(fd)) >=
> > 20);
> > 
> > @@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         data = xe_bo_map(fd, bo, bo_size);
> > 
> >         for (i = 0; i < n_exec_queues; i++) {
> > -               exec_queues[i] = xe_exec_queue_create(fd, vm, eci,
> > 0);
> > +               if (flags & MULTI_QUEUE) {
> > +                       struct drm_xe_ext_set_property multi_queue
> > = {
> > +                               .base.next_extension = 0,
> > +                               .base.name =
> > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > +                               .property =
> > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > +                       };
> > +
> > +                       uint64_t ext =
> > to_user_pointer(&multi_queue);
> > +
> > +                       multi_queue.value = i ? exec_queues[0] :
> > DRM_XE_MULTI_GROUP_CREATE;
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, ext);
> > +               } else {
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, 0);
> > +               }
> >                 syncobjs[i] = syncobj_create(fd, 0);
> >         }
> > 
> > @@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         }
> > 
> >         for (i = 0; i < n_execs; i++) {
> > -               u64 base_addr = (!use_capture_mode && (flags &
> > CAT_ERROR) && !i)
> > -                       ? (addr + bo_size * 128) : addr;
> > +               u64 base_addr = (!use_capture_mode && flags &
> > CAT_ERROR &&
> > +                                i == hang_position) ?
> > +                               (addr + bo_size * 128) : addr;
> >                 u64 batch_offset = (char *)&data[i].batch - (char
> > *)data;
> >                 u64 batch_addr = base_addr + batch_offset;
> >                 u64 spin_offset = (char *)&data[i].spin - (char
> > *)data;
> >                 u64 sdi_offset = (char *)&data[i].data - (char
> > *)data;
> >                 u64 sdi_addr = base_addr + sdi_offset;
> >                 u64 exec_addr;
> > -               int e = i % n_exec_queues;
> > +               int err, e = i % n_exec_queues;
> > 
> > -               if (!i || flags & CANCEL ||
> > +               /*
> > +                * For cat fault on a secondary queue the fault
> > will
> > +                * be on the spinner.
> > +                */
> > +               if (i == hang_position || flags & CANCEL ||
> >                     (flags & LONG_SPIN && i < n_exec_queues)) {
> >                         spin_opts.addr = base_addr + spin_offset;
> >                         xe_spin_init(&data[i].spin, &spin_opts);
> > @@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                 if (e != i)
> >                         syncobj_reset(fd, &syncobjs[e], 1);
> > 
> > -               xe_exec(fd, &exec);
> > +               /*
> > +                * Secondary queues are reset when the primary
> > queue
> > +                * is reset. The submission can race here and it is
> > +                * expected for those to fail submission if the
> > primary
> > +                * reset has already happened.
> > +                */
> > +               err = __xe_exec(fd, &exec);
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -ECANCELED));
> > 
> > -               if (!i && !(flags & CAT_ERROR) && !use_capture_mode
> > &&
> > -                   !(flags & COMPRESSION))
> > +               if (i == hang_position && !(flags & CAT_ERROR) &&
> > +                   !use_capture_mode && !(flags & COMPRESSION))
> >                         xe_spin_wait_started(&data[i].spin);
> >         }
> > 
> > @@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                  * Expectation here is that on reset, submissions
> > will
> >                  * still satisfy the syncobj_wait.
> >                  */
> > -               igt_assert(syncobj_wait(fd, &syncobjs[i], 1,
> > INT64_MAX, 0, NULL));
> > +               int err = syncobj_wait_err(fd, &syncobjs[i], 1,
> > INT64_MAX, 0);
> > +
> > +               /*
> > +                * Currently any time GuC resets a queue which is
> > part of a
> > +                * multi queue queue group submitted by the KMD,
> > the KMD
> > +                * will tear down the entire group. This means we
> > don't know
> > +                * whether a particular queue submitted prior to
> > the hanging
> > +                * queue will complete or not. So we have to check
> > all possible
> > +                * return values here.
> > +                *
> > +                * In the event we get an -ECANCELED at the exec
> > above and the
> > +                * syncobj was not installed, we expect this to
> > return -EINVAL
> > +                * here instead.
> > +                */
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -EINVAL));
> >         }
> > 
> >         igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX,
> > 0, NULL));
> > @@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         if (!use_capture_mode && !(flags & (GT_RESET | CANCEL |
> > COMPRESSION))) {
> >                 for (i = flags & LONG_SPIN ? n_exec_queues : 0;
> >                      i < n_execs + extra_execs; i++) {
> > -                       if (!i)
> > +                       /*
> > +                        * For multi-queue there is no guarantee
> > which
> > +                        * queue will be scheduled first as they
> > are all
> > +                        * submitted at the same priority in this
> > test.
> > +                        * So we can't guarantee any data integrity
> > here.
> > +                        */
> > +                       if (i == hang_position || flags &
> > MULTI_QUEUE)
> >                                 continue;
> > 
> >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > diff --git a/tests/intel/xe_exec_reset.c
> > b/tests/intel/xe_exec_reset.c
> > index 6b71d9144..ea50567c0 100644
> > --- a/tests/intel/xe_exec_reset.c
> > +++ b/tests/intel/xe_exec_reset.c
> > @@ -112,7 +112,7 @@ static void test_spin(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > #define MAX_N_EXECQUEUES        16
> > #define GT_RESET                        (0x1 << 0)
> > #define CLOSE_FD                        (0x1 << 1)
> > -#define CLOSE_EXEC_QUEUES      (0x1 << 2)
> > +#define CLOSE_EXEC_QUEUES              (0x1 << 2)
> > #define VIRTUAL                         (0x1 << 3)
> > #define PARALLEL                        (0x1 << 4)
> > #define CAT_ERROR                       (0x1 << 5)
> > @@ -124,6 +124,8 @@ static void test_spin(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > #define SYSTEM                          (0x1 << 12)
> > #define COMPRESSION                     (0x1 << 13)
> > +#define MULTI_QUEUE                    (0x1 << 14)
> > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > 
> > /**
> >  * SUBTEST: %s-cat-error
> > @@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int
> > n_exec_queues, int n_execs,
> >  *
> >  * SUBTEST: cm-close-execqueues-close-fd
> >  * Description: Test compute mode close exec_queues close fd
> > + *
> > + * SUBTEST: multi-queue-cat-error
> > + * Sub-category: MultiQ tests
> > + * Description: Test cat error with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cat-error-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test cat error with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: multi-queue-gt-reset
> > + * Sub-category: MultiQ tests
> > + * Description: Test GT reset with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cancel
> > + * Sub-category: MultiQ tests
> > + * Description: Test engine reset with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cancel-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test engine reset with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: multi-queue-close-fd
> > + * Sub-category: MultiQ tests
> > + * Description: Test close fd with multi_queue
> > + *
> > + * SUBTEST: multi-queue-close-execqueues
> > + * Sub-category: MultiQ tests
> > + * Description: Test close execqueues with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-cat-error
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode cat error with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-cat-error-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode cat error with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: cm-multi-queue-gt-reset
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode GT reset with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-close-fd
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode close fd with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-close-execqueues
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode close execqueues with
> > multi_queue
> 
> Remove 'Sub-category' tags here as it is not consistent with other
> multi-queue tests (Besides, MultiQ is not a consistent naming used
> either).

Thanks yeah makes sense. I'll remove in the repost.

Thanks,
Stuart

> 
> Other than that, patch LGTM
> Reviewed-by: Niranjana Vishwanathapura
> <niranjana.vishwanathapura@intel.com>
> 
> >  */
> > 
> > static void
> > @@ -384,9 +437,14 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         } *data;
> >         struct xe_spin_opts spin_opts = { .preempt = flags &
> > PREEMPT };
> >         int i, b;
> > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> > 
> >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > 
> > +       igt_assert_f(!(flags & SECONDARY_QUEUE) ||
> > +                    ((flags & MULTI_QUEUE) && (flags &
> > CAT_ERROR)),
> > +                    "SECONDARY_QUEUE requires MULTI_QUEUE and
> > CAT_ERROR to be set");
> > +
> >         if (flags & CLOSE_FD)
> >                 fd = drm_open_driver(DRIVER_XE);
> > 
> > @@ -401,7 +459,20 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         memset(data, 0, bo_size);
> > 
> >         for (i = 0; i < n_exec_queues; i++) {
> > -               exec_queues[i] = xe_exec_queue_create(fd, vm, eci,
> > 0);
> > +               if (flags & MULTI_QUEUE) {
> > +                       struct drm_xe_ext_set_property multi_queue
> > = {
> > +                               .base.next_extension = 0,
> > +                               .base.name =
> > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > +                               .property =
> > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > +                       };
> > +
> > +                       uint64_t ext =
> > to_user_pointer(&multi_queue);
> > +
> > +                       multi_queue.value = i ? exec_queues[0] :
> > DRM_XE_MULTI_GROUP_CREATE;
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, ext);
> > +               } else {
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, 0);
> > +               }
> >         };
> > 
> >         sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > @@ -411,17 +482,21 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         data[0].vm_sync = 0;
> > 
> >         for (i = 0; i < n_execs; i++) {
> > -               uint64_t base_addr = flags & CAT_ERROR && !i ?
> > -                       addr + bo_size * 128 : addr;
> > +               uint64_t base_addr = (flags & CAT_ERROR && i ==
> > hang_position) ?
> > +                                    (addr + bo_size * 128) : addr;
> >                 uint64_t batch_offset = (char *)&data[i].batch -
> > (char *)data;
> >                 uint64_t batch_addr = base_addr + batch_offset;
> >                 uint64_t spin_offset = (char *)&data[i].spin -
> > (char *)data;
> >                 uint64_t sdi_offset = (char *)&data[i].data - (char
> > *)data;
> >                 uint64_t sdi_addr = base_addr + sdi_offset;
> >                 uint64_t exec_addr;
> > -               int e = i % n_exec_queues;
> > +               int err, e = i % n_exec_queues;
> > 
> > -               if (!i || flags & CANCEL) {
> > +               /*
> > +                * For cat fault on a secondary queue the fault
> > will
> > +                * be on the spinner.
> > +                */
> > +               if (i == hang_position || flags & CANCEL) {
> >                         spin_opts.addr = base_addr + spin_offset;
> >                         xe_spin_init(&data[i].spin, &spin_opts);
> >                         exec_addr = spin_opts.addr;
> > @@ -442,7 +517,18 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >                 exec.exec_queue_id = exec_queues[e];
> >                 exec.address = exec_addr;
> > -               xe_exec(fd, &exec);
> > +
> > +               /*
> > +                * Secondary queues are reset when the primary
> > queue
> > +                * is reset. The submission can race here and it is
> > +                * expected for those to fail submission if the
> > primary
> > +                * reset has already happened.
> > +                */
> > +               err = __xe_exec(fd, &exec);
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -ECANCELED));
> > +
> > +               if (i == hang_position && !(flags & CAT_ERROR))
> > +                       xe_spin_wait_started(&data[i].spin);
> >         }
> > 
> >         if (flags & GT_RESET) {
> > @@ -467,8 +553,18 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >                 err = __xe_wait_ufence(fd, &data[i].exec_sync,
> > USER_FENCE_VALUE,
> >                                        exec_queues[i %
> > n_exec_queues], &timeout);
> > -               if (!i) {
> > +               if (i == hang_position) {
> >                         igt_assert(err == -ETIME || err == -EIO);
> > +               } else if (flags & MULTI_QUEUE) {
> > +                       /*
> > +                        * Currently any time GuC resets a queue
> > submitted
> > +                        * by the KMD, the KMD will tear down the
> > entire
> > +                        * queue group. This means we don't know
> > whether
> > +                        * a particular queue submitted prior to
> > the hanging
> > +                        * queue will complete or not. So we have
> > to check
> > +                        * all possible return values here.
> > +                        */
> > +                       igt_assert(err == -ETIME || err == -EIO ||
> > !err);
> >                 } else if (flags & GT_RESET || flags & CAT_ERROR) {
> >                         /* exec races with reset: may return -EIO
> > or complete */
> >                         igt_assert(err == -EIO || !err);
> > @@ -483,7 +579,13 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >         if (!(flags & (GT_RESET | CANCEL))) {
> >                 for (i = 0; i < n_execs; i++) {
> > -                       if (!i)
> > +                       /*
> > +                        * For multi-queue there is no guarantee
> > which
> > +                        * queue will be scheduled first as they
> > are all
> > +                        * submitted at the same priority in this
> > test.
> > +                        * So we can't guarantee any data integrity
> > here.
> > +                        */
> > +                       if (i == hang_position || flags &
> > MULTI_QUEUE)
> >                                 continue;
> > 
> >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > @@ -986,6 +1088,108 @@ int igt_main()
> >                 xe_for_each_gt(fd, gt)
> >                         gt_mocs_reset(fd, gt);
> > 
> > +       igt_subtest("multi-queue-cat-error") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           CAT_ERROR |
> > MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cat-error-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           CAT_ERROR | MULTI_QUEUE
> > |
> > +                                           SECONDARY_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-gt-reset") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           GT_RESET | MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cancel") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cancel-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           MULTI_QUEUE |
> > SECONDARY_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-close-fd") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > +                                           CLOSE_FD | MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-close-execqueues") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > +                                           CLOSE_EXEC_QUEUES |
> > CLOSE_FD |
> > +                                           MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-cat-error") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         CAT_ERROR | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-cat-error-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         CAT_ERROR | MULTI_QUEUE |
> > +                                         SECONDARY_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-gt-reset") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         GT_RESET | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-close-fd") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(-1, hwe, 16, 256,
> > +                                         CLOSE_FD | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-close-execqueues") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(-1, hwe, 16, 256,
> > +                                         CLOSE_EXEC_QUEUES |
> > CLOSE_FD |
> > +                                         MULTI_QUEUE);
> > +       }
> > +
> >         igt_fixture()
> >                 drm_close_driver(fd);
> > }
> > -- 
> > 2.43.0
> > 

Re: [PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 08:37:01PM +0000, Stuart Summers wrote:
>From: Apoorva Singh <apoorva.singh@intel.com>
>
>Extend the existing test cases in tests/intel/xe_exec_reset.c
>to include testing of reset flows for both primary queue
>and secondary queues.
>
>Engine resets without CAT faults are triggered via the *-cancel
>cases. These don't include the CANCEL flag as this causes a spinner
>on each queue which isn't adding any extra coverage for multi queue
>over non multi queue.
>
>Since the *-cancel cases are currently implemented only for the
>legacy cases, do the same for multi queue.
>
>New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
>the general multi queue cases and the cases where we are triggering
>engine resets and/or cat faults on secondary queues specifically.
>
>Note for multi queue it is interesting to test these secondary
>queue reset scenarios since these are communicated to the driver
>from GuC via the primary queue and after this, the entire queue
>group is torn down. The test cases here are to ensure nothing
>breaks when we hit a scenario like this.
>
>Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
>Signed-off-by: Fei Yang <fei.yang@intel.com>
>Signed-off-by: Katarzyna Piecielska <katarzyna.piecielska@intel.com>
>Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
>Signed-off-by: Daniel Charles <daniel.charles@intel.com>
>Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>

Also ensure to include only valid email ids here for s-o-b.

Niranjana

>---
> lib/xe/xe_legacy.c          |  71 ++++++++++--
> tests/intel/xe_exec_reset.c | 222 ++++++++++++++++++++++++++++++++++--
> 2 files changed, 274 insertions(+), 19 deletions(-)
>
>diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
>index 3371a91ac..f9bd5bcb6 100644
>--- a/lib/xe/xe_legacy.c
>+++ b/lib/xe/xe_legacy.c
>@@ -13,6 +13,8 @@
>
> /* Batch buffer element count, in number of dwords(u32) */
> #define BATCH_DW_COUNT			16
>+#define SECONDARY_QUEUE			(0x1 << 15)
>+#define MULTI_QUEUE			(0x1 << 14)
> #define COMPRESSION			(0x1 << 13)
> #define SYSTEM				(0x1 << 12)
> #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
>@@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 			xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) : 0,
> 	};
> 	int i, b;
>+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> 	int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ? n_exec_queues : 0;
>
> 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
>
>+	igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags & MULTI_QUEUE),
>+		     "SECONDARY_QUEUE requires MULTI_QUEUE to be set");
>+
> 	if (flags & COMPRESSION)
> 		igt_require(intel_gen(intel_get_drm_devid(fd)) >= 20);
>
>@@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	data = xe_bo_map(fd, bo, bo_size);
>
> 	for (i = 0; i < n_exec_queues; i++) {
>-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		if (flags & MULTI_QUEUE) {
>+			struct drm_xe_ext_set_property multi_queue = {
>+				.base.next_extension = 0,
>+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
>+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
>+			};
>+
>+			uint64_t ext = to_user_pointer(&multi_queue);
>+
>+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
>+		} else {
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		}
> 		syncobjs[i] = syncobj_create(fd, 0);
> 	}
>
>@@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	}
>
> 	for (i = 0; i < n_execs; i++) {
>-		u64 base_addr = (!use_capture_mode && (flags & CAT_ERROR) && !i)
>-			? (addr + bo_size * 128) : addr;
>+		u64 base_addr = (!use_capture_mode && flags & CAT_ERROR &&
>+				 i == hang_position) ?
>+				(addr + bo_size * 128) : addr;
> 		u64 batch_offset = (char *)&data[i].batch - (char *)data;
> 		u64 batch_addr = base_addr + batch_offset;
> 		u64 spin_offset = (char *)&data[i].spin - (char *)data;
> 		u64 sdi_offset = (char *)&data[i].data - (char *)data;
> 		u64 sdi_addr = base_addr + sdi_offset;
> 		u64 exec_addr;
>-		int e = i % n_exec_queues;
>+		int err, e = i % n_exec_queues;
>
>-		if (!i || flags & CANCEL ||
>+		/*
>+		 * For cat fault on a secondary queue the fault will
>+		 * be on the spinner.
>+		 */
>+		if (i == hang_position || flags & CANCEL ||
> 		    (flags & LONG_SPIN && i < n_exec_queues)) {
> 			spin_opts.addr = base_addr + spin_offset;
> 			xe_spin_init(&data[i].spin, &spin_opts);
>@@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		if (e != i)
> 			syncobj_reset(fd, &syncobjs[e], 1);
>
>-		xe_exec(fd, &exec);
>+		/*
>+		 * Secondary queues are reset when the primary queue
>+		 * is reset. The submission can race here and it is
>+		 * expected for those to fail submission if the primary
>+		 * reset has already happened.
>+		 */
>+		err = __xe_exec(fd, &exec);
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
>
>-		if (!i && !(flags & CAT_ERROR) && !use_capture_mode &&
>-		    !(flags & COMPRESSION))
>+		if (i == hang_position && !(flags & CAT_ERROR) &&
>+		    !use_capture_mode && !(flags & COMPRESSION))
> 			xe_spin_wait_started(&data[i].spin);
> 	}
>
>@@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 		 * Expectation here is that on reset, submissions will
> 		 * still satisfy the syncobj_wait.
> 		 */
>-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0, NULL));
>+		int err = syncobj_wait_err(fd, &syncobjs[i], 1, INT64_MAX, 0);
>+
>+		/*
>+		 * Currently any time GuC resets a queue which is part of a
>+		 * multi queue queue group submitted by the KMD, the KMD
>+		 * will tear down the entire group. This means we don't know
>+		 * whether a particular queue submitted prior to the hanging
>+		 * queue will complete or not. So we have to check all possible
>+		 * return values here.
>+		 *
>+		 * In the event we get an -ECANCELED at the exec above and the
>+		 * syncobj was not installed, we expect this to return -EINVAL
>+		 * here instead.
>+		 */
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -EINVAL));
> 	}
>
> 	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
>@@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
> 		for (i = flags & LONG_SPIN ? n_exec_queues : 0;
> 		     i < n_execs + extra_execs; i++) {
>-			if (!i)
>+			/*
>+			 * For multi-queue there is no guarantee which
>+			 * queue will be scheduled first as they are all
>+			 * submitted at the same priority in this test.
>+			 * So we can't guarantee any data integrity here.
>+			 */
>+			if (i == hang_position || flags & MULTI_QUEUE)
> 				continue;
>
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
>index 6b71d9144..ea50567c0 100644
>--- a/tests/intel/xe_exec_reset.c
>+++ b/tests/intel/xe_exec_reset.c
>@@ -112,7 +112,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
> #define MAX_N_EXECQUEUES	16
> #define GT_RESET			(0x1 << 0)
> #define CLOSE_FD			(0x1 << 1)
>-#define CLOSE_EXEC_QUEUES	(0x1 << 2)
>+#define CLOSE_EXEC_QUEUES		(0x1 << 2)
> #define VIRTUAL				(0x1 << 3)
> #define PARALLEL			(0x1 << 4)
> #define CAT_ERROR			(0x1 << 5)
>@@ -124,6 +124,8 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
> #define LONG_SPIN_REUSE_QUEUE		(0x1 << 11)
> #define SYSTEM				(0x1 << 12)
> #define COMPRESSION			(0x1 << 13)
>+#define MULTI_QUEUE			(0x1 << 14)
>+#define SECONDARY_QUEUE			(0x1 << 15)
>
> /**
>  * SUBTEST: %s-cat-error
>@@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
>  *
>  * SUBTEST: cm-close-execqueues-close-fd
>  * Description: Test compute mode close exec_queues close fd
>+ *
>+ * SUBTEST: multi-queue-cat-error
>+ * Sub-category: MultiQ tests
>+ * Description: Test cat error with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cat-error-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test cat error with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: multi-queue-gt-reset
>+ * Sub-category: MultiQ tests
>+ * Description: Test GT reset with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cancel
>+ * Sub-category: MultiQ tests
>+ * Description: Test engine reset with multi_queue
>+ *
>+ * SUBTEST: multi-queue-cancel-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test engine reset with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: multi-queue-close-fd
>+ * Sub-category: MultiQ tests
>+ * Description: Test close fd with multi_queue
>+ *
>+ * SUBTEST: multi-queue-close-execqueues
>+ * Sub-category: MultiQ tests
>+ * Description: Test close execqueues with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-cat-error
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode cat error with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-cat-error-on-secondary
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode cat error with multi_queue
>+ *              on a secondary queue
>+ *
>+ * SUBTEST: cm-multi-queue-gt-reset
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode GT reset with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-close-fd
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode close fd with multi_queue
>+ *
>+ * SUBTEST: cm-multi-queue-close-execqueues
>+ * Sub-category: MultiQ tests
>+ * Description: Test compute mode close execqueues with multi_queue
>  */
>
> static void
>@@ -384,9 +437,14 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	} *data;
> 	struct xe_spin_opts spin_opts = { .preempt = flags & PREEMPT };
> 	int i, b;
>+	int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
>
> 	igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
>
>+	igt_assert_f(!(flags & SECONDARY_QUEUE) ||
>+		     ((flags & MULTI_QUEUE) && (flags & CAT_ERROR)),
>+		     "SECONDARY_QUEUE requires MULTI_QUEUE and CAT_ERROR to be set");
>+
> 	if (flags & CLOSE_FD)
> 		fd = drm_open_driver(DRIVER_XE);
>
>@@ -401,7 +459,20 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	memset(data, 0, bo_size);
>
> 	for (i = 0; i < n_exec_queues; i++) {
>-		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		if (flags & MULTI_QUEUE) {
>+			struct drm_xe_ext_set_property multi_queue = {
>+				.base.next_extension = 0,
>+				.base.name = DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
>+				.property = DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
>+			};
>+
>+			uint64_t ext = to_user_pointer(&multi_queue);
>+
>+			multi_queue.value = i ? exec_queues[0] : DRM_XE_MULTI_GROUP_CREATE;
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, ext);
>+		} else {
>+			exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
>+		}
> 	};
>
> 	sync[0].addr = to_user_pointer(&data[0].vm_sync);
>@@ -411,17 +482,21 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
> 	data[0].vm_sync = 0;
>
> 	for (i = 0; i < n_execs; i++) {
>-		uint64_t base_addr = flags & CAT_ERROR && !i ?
>-			addr + bo_size * 128 : addr;
>+		uint64_t base_addr = (flags & CAT_ERROR && i == hang_position) ?
>+				     (addr + bo_size * 128) : addr;
> 		uint64_t batch_offset = (char *)&data[i].batch - (char *)data;
> 		uint64_t batch_addr = base_addr + batch_offset;
> 		uint64_t spin_offset = (char *)&data[i].spin - (char *)data;
> 		uint64_t sdi_offset = (char *)&data[i].data - (char *)data;
> 		uint64_t sdi_addr = base_addr + sdi_offset;
> 		uint64_t exec_addr;
>-		int e = i % n_exec_queues;
>+		int err, e = i % n_exec_queues;
>
>-		if (!i || flags & CANCEL) {
>+		/*
>+		 * For cat fault on a secondary queue the fault will
>+		 * be on the spinner.
>+		 */
>+		if (i == hang_position || flags & CANCEL) {
> 			spin_opts.addr = base_addr + spin_offset;
> 			xe_spin_init(&data[i].spin, &spin_opts);
> 			exec_addr = spin_opts.addr;
>@@ -442,7 +517,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 		exec.exec_queue_id = exec_queues[e];
> 		exec.address = exec_addr;
>-		xe_exec(fd, &exec);
>+
>+		/*
>+		 * Secondary queues are reset when the primary queue
>+		 * is reset. The submission can race here and it is
>+		 * expected for those to fail submission if the primary
>+		 * reset has already happened.
>+		 */
>+		err = __xe_exec(fd, &exec);
>+		igt_assert(!err || ((flags & MULTI_QUEUE) && err == -ECANCELED));
>+
>+		if (i == hang_position && !(flags & CAT_ERROR))
>+			xe_spin_wait_started(&data[i].spin);
> 	}
>
> 	if (flags & GT_RESET) {
>@@ -467,8 +553,18 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 		err = __xe_wait_ufence(fd, &data[i].exec_sync, USER_FENCE_VALUE,
> 				       exec_queues[i % n_exec_queues], &timeout);
>-		if (!i) {
>+		if (i == hang_position) {
> 			igt_assert(err == -ETIME || err == -EIO);
>+		} else if (flags & MULTI_QUEUE) {
>+			/*
>+			 * Currently any time GuC resets a queue submitted
>+			 * by the KMD, the KMD will tear down the entire
>+			 * queue group. This means we don't know whether
>+			 * a particular queue submitted prior to the hanging
>+			 * queue will complete or not. So we have to check
>+			 * all possible return values here.
>+			 */
>+			igt_assert(err == -ETIME || err == -EIO || !err);
> 		} else if (flags & GT_RESET || flags & CAT_ERROR) {
> 			/* exec races with reset: may return -EIO or complete */
> 			igt_assert(err == -EIO || !err);
>@@ -483,7 +579,13 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> 	if (!(flags & (GT_RESET | CANCEL))) {
> 		for (i = 0; i < n_execs; i++) {
>-			if (!i)
>+			/*
>+			 * For multi-queue there is no guarantee which
>+			 * queue will be scheduled first as they are all
>+			 * submitted at the same priority in this test.
>+			 * So we can't guarantee any data integrity here.
>+			 */
>+			if (i == hang_position || flags & MULTI_QUEUE)
> 				continue;
>
> 			igt_assert_eq(data[i].data, 0xc0ffee);
>@@ -986,6 +1088,108 @@ int igt_main()
> 		xe_for_each_gt(fd, gt)
> 			gt_mocs_reset(fd, gt);
>
>+	igt_subtest("multi-queue-cat-error") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    CAT_ERROR | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cat-error-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    CAT_ERROR | MULTI_QUEUE |
>+					    SECONDARY_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-gt-reset") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    GT_RESET | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cancel") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-cancel-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(fd, hwe, 16, 16,
>+					    MULTI_QUEUE | SECONDARY_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-close-fd") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(-1, hwe, 16, 256,
>+					    CLOSE_FD | MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("multi-queue-close-execqueues") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			xe_legacy_test_mode(-1, hwe, 16, 256,
>+					    CLOSE_EXEC_QUEUES | CLOSE_FD |
>+					    MULTI_QUEUE,
>+					    LEGACY_MODE_ADDR,
>+					    false);
>+	}
>+
>+	igt_subtest("cm-multi-queue-cat-error") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  CAT_ERROR | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-cat-error-on-secondary") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  CAT_ERROR | MULTI_QUEUE |
>+					  SECONDARY_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-gt-reset") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(fd, hwe, 16, 16,
>+					  GT_RESET | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-close-fd") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(-1, hwe, 16, 256,
>+					  CLOSE_FD | MULTI_QUEUE);
>+	}
>+
>+	igt_subtest("cm-multi-queue-close-execqueues") {
>+		igt_require(intel_graphics_ver(intel_get_drm_devid(fd)) >= IP_VER(35, 0));
>+		xe_for_each_multi_queue_engine(fd, hwe)
>+			test_compute_mode(-1, hwe, 16, 256,
>+					  CLOSE_EXEC_QUEUES | CLOSE_FD |
>+					  MULTI_QUEUE);
>+	}
>+
> 	igt_fixture()
> 		drm_close_driver(fd);
> }
>-- 
>2.43.0
>

Re: [PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Summers, Stuart]

On Sun, 2026-04-12 at 19:34 -0700, Niranjana Vishwanathapura wrote:
> On Thu, Apr 09, 2026 at 08:37:01PM +0000, Stuart Summers wrote:
> > From: Apoorva Singh <apoorva.singh@intel.com>
> > 
> > Extend the existing test cases in tests/intel/xe_exec_reset.c
> > to include testing of reset flows for both primary queue
> > and secondary queues.
> > 
> > Engine resets without CAT faults are triggered via the *-cancel
> > cases. These don't include the CANCEL flag as this causes a spinner
> > on each queue which isn't adding any extra coverage for multi queue
> > over non multi queue.
> > 
> > Since the *-cancel cases are currently implemented only for the
> > legacy cases, do the same for multi queue.
> > 
> > New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
> > the general multi queue cases and the cases where we are triggering
> > engine resets and/or cat faults on secondary queues specifically.
> > 
> > Note for multi queue it is interesting to test these secondary
> > queue reset scenarios since these are communicated to the driver
> > from GuC via the primary queue and after this, the entire queue
> > group is torn down. The test cases here are to ensure nothing
> > breaks when we hit a scenario like this.
> > 
> > Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
> > Signed-off-by: Fei Yang <fei.yang@intel.com>
> > Signed-off-by: Katarzyna Piecielska
> > <katarzyna.piecielska@intel.com>
> > Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
> > Signed-off-by: Daniel Charles <daniel.charles@intel.com>
> > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> 
> Also ensure to include only valid email ids here for s-o-b.

Sure I'll remove the ones that aren't available.

Thanks,
Stuart

> 
> Niranjana
> 
> > ---
> > lib/xe/xe_legacy.c          |  71 ++++++++++--
> > tests/intel/xe_exec_reset.c | 222
> > ++++++++++++++++++++++++++++++++++--
> > 2 files changed, 274 insertions(+), 19 deletions(-)
> > 
> > diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
> > index 3371a91ac..f9bd5bcb6 100644
> > --- a/lib/xe/xe_legacy.c
> > +++ b/lib/xe/xe_legacy.c
> > @@ -13,6 +13,8 @@
> > 
> > /* Batch buffer element count, in number of dwords(u32) */
> > #define BATCH_DW_COUNT                  16
> > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > +#define MULTI_QUEUE                    (0x1 << 14)
> > #define COMPRESSION                     (0x1 << 13)
> > #define SYSTEM                          (0x1 << 12)
> > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > @@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                         xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) :
> > 0,
> >         };
> >         int i, b;
> > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> >         int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ?
> > n_exec_queues : 0;
> > 
> >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > 
> > +       igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags &
> > MULTI_QUEUE),
> > +                    "SECONDARY_QUEUE requires MULTI_QUEUE to be
> > set");
> > +
> >         if (flags & COMPRESSION)
> >                 igt_require(intel_gen(intel_get_drm_devid(fd)) >=
> > 20);
> > 
> > @@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         data = xe_bo_map(fd, bo, bo_size);
> > 
> >         for (i = 0; i < n_exec_queues; i++) {
> > -               exec_queues[i] = xe_exec_queue_create(fd, vm, eci,
> > 0);
> > +               if (flags & MULTI_QUEUE) {
> > +                       struct drm_xe_ext_set_property multi_queue
> > = {
> > +                               .base.next_extension = 0,
> > +                               .base.name =
> > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > +                               .property =
> > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > +                       };
> > +
> > +                       uint64_t ext =
> > to_user_pointer(&multi_queue);
> > +
> > +                       multi_queue.value = i ? exec_queues[0] :
> > DRM_XE_MULTI_GROUP_CREATE;
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, ext);
> > +               } else {
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, 0);
> > +               }
> >                 syncobjs[i] = syncobj_create(fd, 0);
> >         }
> > 
> > @@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         }
> > 
> >         for (i = 0; i < n_execs; i++) {
> > -               u64 base_addr = (!use_capture_mode && (flags &
> > CAT_ERROR) && !i)
> > -                       ? (addr + bo_size * 128) : addr;
> > +               u64 base_addr = (!use_capture_mode && flags &
> > CAT_ERROR &&
> > +                                i == hang_position) ?
> > +                               (addr + bo_size * 128) : addr;
> >                 u64 batch_offset = (char *)&data[i].batch - (char
> > *)data;
> >                 u64 batch_addr = base_addr + batch_offset;
> >                 u64 spin_offset = (char *)&data[i].spin - (char
> > *)data;
> >                 u64 sdi_offset = (char *)&data[i].data - (char
> > *)data;
> >                 u64 sdi_addr = base_addr + sdi_offset;
> >                 u64 exec_addr;
> > -               int e = i % n_exec_queues;
> > +               int err, e = i % n_exec_queues;
> > 
> > -               if (!i || flags & CANCEL ||
> > +               /*
> > +                * For cat fault on a secondary queue the fault
> > will
> > +                * be on the spinner.
> > +                */
> > +               if (i == hang_position || flags & CANCEL ||
> >                     (flags & LONG_SPIN && i < n_exec_queues)) {
> >                         spin_opts.addr = base_addr + spin_offset;
> >                         xe_spin_init(&data[i].spin, &spin_opts);
> > @@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                 if (e != i)
> >                         syncobj_reset(fd, &syncobjs[e], 1);
> > 
> > -               xe_exec(fd, &exec);
> > +               /*
> > +                * Secondary queues are reset when the primary
> > queue
> > +                * is reset. The submission can race here and it is
> > +                * expected for those to fail submission if the
> > primary
> > +                * reset has already happened.
> > +                */
> > +               err = __xe_exec(fd, &exec);
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -ECANCELED));
> > 
> > -               if (!i && !(flags & CAT_ERROR) && !use_capture_mode
> > &&
> > -                   !(flags & COMPRESSION))
> > +               if (i == hang_position && !(flags & CAT_ERROR) &&
> > +                   !use_capture_mode && !(flags & COMPRESSION))
> >                         xe_spin_wait_started(&data[i].spin);
> >         }
> > 
> > @@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >                  * Expectation here is that on reset, submissions
> > will
> >                  * still satisfy the syncobj_wait.
> >                  */
> > -               igt_assert(syncobj_wait(fd, &syncobjs[i], 1,
> > INT64_MAX, 0, NULL));
> > +               int err = syncobj_wait_err(fd, &syncobjs[i], 1,
> > INT64_MAX, 0);
> > +
> > +               /*
> > +                * Currently any time GuC resets a queue which is
> > part of a
> > +                * multi queue queue group submitted by the KMD,
> > the KMD
> > +                * will tear down the entire group. This means we
> > don't know
> > +                * whether a particular queue submitted prior to
> > the hanging
> > +                * queue will complete or not. So we have to check
> > all possible
> > +                * return values here.
> > +                *
> > +                * In the event we get an -ECANCELED at the exec
> > above and the
> > +                * syncobj was not installed, we expect this to
> > return -EINVAL
> > +                * here instead.
> > +                */
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -EINVAL));
> >         }
> > 
> >         igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX,
> > 0, NULL));
> > @@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         if (!use_capture_mode && !(flags & (GT_RESET | CANCEL |
> > COMPRESSION))) {
> >                 for (i = flags & LONG_SPIN ? n_exec_queues : 0;
> >                      i < n_execs + extra_execs; i++) {
> > -                       if (!i)
> > +                       /*
> > +                        * For multi-queue there is no guarantee
> > which
> > +                        * queue will be scheduled first as they
> > are all
> > +                        * submitted at the same priority in this
> > test.
> > +                        * So we can't guarantee any data integrity
> > here.
> > +                        */
> > +                       if (i == hang_position || flags &
> > MULTI_QUEUE)
> >                                 continue;
> > 
> >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > diff --git a/tests/intel/xe_exec_reset.c
> > b/tests/intel/xe_exec_reset.c
> > index 6b71d9144..ea50567c0 100644
> > --- a/tests/intel/xe_exec_reset.c
> > +++ b/tests/intel/xe_exec_reset.c
> > @@ -112,7 +112,7 @@ static void test_spin(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > #define MAX_N_EXECQUEUES        16
> > #define GT_RESET                        (0x1 << 0)
> > #define CLOSE_FD                        (0x1 << 1)
> > -#define CLOSE_EXEC_QUEUES      (0x1 << 2)
> > +#define CLOSE_EXEC_QUEUES              (0x1 << 2)
> > #define VIRTUAL                         (0x1 << 3)
> > #define PARALLEL                        (0x1 << 4)
> > #define CAT_ERROR                       (0x1 << 5)
> > @@ -124,6 +124,8 @@ static void test_spin(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > #define SYSTEM                          (0x1 << 12)
> > #define COMPRESSION                     (0x1 << 13)
> > +#define MULTI_QUEUE                    (0x1 << 14)
> > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > 
> > /**
> >  * SUBTEST: %s-cat-error
> > @@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int
> > n_exec_queues, int n_execs,
> >  *
> >  * SUBTEST: cm-close-execqueues-close-fd
> >  * Description: Test compute mode close exec_queues close fd
> > + *
> > + * SUBTEST: multi-queue-cat-error
> > + * Sub-category: MultiQ tests
> > + * Description: Test cat error with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cat-error-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test cat error with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: multi-queue-gt-reset
> > + * Sub-category: MultiQ tests
> > + * Description: Test GT reset with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cancel
> > + * Sub-category: MultiQ tests
> > + * Description: Test engine reset with multi_queue
> > + *
> > + * SUBTEST: multi-queue-cancel-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test engine reset with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: multi-queue-close-fd
> > + * Sub-category: MultiQ tests
> > + * Description: Test close fd with multi_queue
> > + *
> > + * SUBTEST: multi-queue-close-execqueues
> > + * Sub-category: MultiQ tests
> > + * Description: Test close execqueues with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-cat-error
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode cat error with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-cat-error-on-secondary
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode cat error with multi_queue
> > + *              on a secondary queue
> > + *
> > + * SUBTEST: cm-multi-queue-gt-reset
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode GT reset with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-close-fd
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode close fd with multi_queue
> > + *
> > + * SUBTEST: cm-multi-queue-close-execqueues
> > + * Sub-category: MultiQ tests
> > + * Description: Test compute mode close execqueues with
> > multi_queue
> >  */
> > 
> > static void
> > @@ -384,9 +437,14 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         } *data;
> >         struct xe_spin_opts spin_opts = { .preempt = flags &
> > PREEMPT };
> >         int i, b;
> > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> > 
> >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > 
> > +       igt_assert_f(!(flags & SECONDARY_QUEUE) ||
> > +                    ((flags & MULTI_QUEUE) && (flags &
> > CAT_ERROR)),
> > +                    "SECONDARY_QUEUE requires MULTI_QUEUE and
> > CAT_ERROR to be set");
> > +
> >         if (flags & CLOSE_FD)
> >                 fd = drm_open_driver(DRIVER_XE);
> > 
> > @@ -401,7 +459,20 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         memset(data, 0, bo_size);
> > 
> >         for (i = 0; i < n_exec_queues; i++) {
> > -               exec_queues[i] = xe_exec_queue_create(fd, vm, eci,
> > 0);
> > +               if (flags & MULTI_QUEUE) {
> > +                       struct drm_xe_ext_set_property multi_queue
> > = {
> > +                               .base.next_extension = 0,
> > +                               .base.name =
> > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > +                               .property =
> > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > +                       };
> > +
> > +                       uint64_t ext =
> > to_user_pointer(&multi_queue);
> > +
> > +                       multi_queue.value = i ? exec_queues[0] :
> > DRM_XE_MULTI_GROUP_CREATE;
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, ext);
> > +               } else {
> > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > vm, eci, 0);
> > +               }
> >         };
> > 
> >         sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > @@ -411,17 +482,21 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> >         data[0].vm_sync = 0;
> > 
> >         for (i = 0; i < n_execs; i++) {
> > -               uint64_t base_addr = flags & CAT_ERROR && !i ?
> > -                       addr + bo_size * 128 : addr;
> > +               uint64_t base_addr = (flags & CAT_ERROR && i ==
> > hang_position) ?
> > +                                    (addr + bo_size * 128) : addr;
> >                 uint64_t batch_offset = (char *)&data[i].batch -
> > (char *)data;
> >                 uint64_t batch_addr = base_addr + batch_offset;
> >                 uint64_t spin_offset = (char *)&data[i].spin -
> > (char *)data;
> >                 uint64_t sdi_offset = (char *)&data[i].data - (char
> > *)data;
> >                 uint64_t sdi_addr = base_addr + sdi_offset;
> >                 uint64_t exec_addr;
> > -               int e = i % n_exec_queues;
> > +               int err, e = i % n_exec_queues;
> > 
> > -               if (!i || flags & CANCEL) {
> > +               /*
> > +                * For cat fault on a secondary queue the fault
> > will
> > +                * be on the spinner.
> > +                */
> > +               if (i == hang_position || flags & CANCEL) {
> >                         spin_opts.addr = base_addr + spin_offset;
> >                         xe_spin_init(&data[i].spin, &spin_opts);
> >                         exec_addr = spin_opts.addr;
> > @@ -442,7 +517,18 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >                 exec.exec_queue_id = exec_queues[e];
> >                 exec.address = exec_addr;
> > -               xe_exec(fd, &exec);
> > +
> > +               /*
> > +                * Secondary queues are reset when the primary
> > queue
> > +                * is reset. The submission can race here and it is
> > +                * expected for those to fail submission if the
> > primary
> > +                * reset has already happened.
> > +                */
> > +               err = __xe_exec(fd, &exec);
> > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err ==
> > -ECANCELED));
> > +
> > +               if (i == hang_position && !(flags & CAT_ERROR))
> > +                       xe_spin_wait_started(&data[i].spin);
> >         }
> > 
> >         if (flags & GT_RESET) {
> > @@ -467,8 +553,18 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >                 err = __xe_wait_ufence(fd, &data[i].exec_sync,
> > USER_FENCE_VALUE,
> >                                        exec_queues[i %
> > n_exec_queues], &timeout);
> > -               if (!i) {
> > +               if (i == hang_position) {
> >                         igt_assert(err == -ETIME || err == -EIO);
> > +               } else if (flags & MULTI_QUEUE) {
> > +                       /*
> > +                        * Currently any time GuC resets a queue
> > submitted
> > +                        * by the KMD, the KMD will tear down the
> > entire
> > +                        * queue group. This means we don't know
> > whether
> > +                        * a particular queue submitted prior to
> > the hanging
> > +                        * queue will complete or not. So we have
> > to check
> > +                        * all possible return values here.
> > +                        */
> > +                       igt_assert(err == -ETIME || err == -EIO ||
> > !err);
> >                 } else if (flags & GT_RESET || flags & CAT_ERROR) {
> >                         /* exec races with reset: may return -EIO
> > or complete */
> >                         igt_assert(err == -EIO || !err);
> > @@ -483,7 +579,13 @@ test_compute_mode(int fd, struct
> > drm_xe_engine_class_instance *eci,
> > 
> >         if (!(flags & (GT_RESET | CANCEL))) {
> >                 for (i = 0; i < n_execs; i++) {
> > -                       if (!i)
> > +                       /*
> > +                        * For multi-queue there is no guarantee
> > which
> > +                        * queue will be scheduled first as they
> > are all
> > +                        * submitted at the same priority in this
> > test.
> > +                        * So we can't guarantee any data integrity
> > here.
> > +                        */
> > +                       if (i == hang_position || flags &
> > MULTI_QUEUE)
> >                                 continue;
> > 
> >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > @@ -986,6 +1088,108 @@ int igt_main()
> >                 xe_for_each_gt(fd, gt)
> >                         gt_mocs_reset(fd, gt);
> > 
> > +       igt_subtest("multi-queue-cat-error") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           CAT_ERROR |
> > MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cat-error-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           CAT_ERROR | MULTI_QUEUE
> > |
> > +                                           SECONDARY_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-gt-reset") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           GT_RESET | MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cancel") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-cancel-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > +                                           MULTI_QUEUE |
> > SECONDARY_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-close-fd") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > +                                           CLOSE_FD | MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("multi-queue-close-execqueues") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > +                                           CLOSE_EXEC_QUEUES |
> > CLOSE_FD |
> > +                                           MULTI_QUEUE,
> > +                                           LEGACY_MODE_ADDR,
> > +                                           false);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-cat-error") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         CAT_ERROR | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-cat-error-on-secondary") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         CAT_ERROR | MULTI_QUEUE |
> > +                                         SECONDARY_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-gt-reset") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(fd, hwe, 16, 16,
> > +                                         GT_RESET | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-close-fd") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(-1, hwe, 16, 256,
> > +                                         CLOSE_FD | MULTI_QUEUE);
> > +       }
> > +
> > +       igt_subtest("cm-multi-queue-close-execqueues") {
> > +               igt_require(intel_graphics_ver(intel_get_drm_devid(
> > fd)) >= IP_VER(35, 0));
> > +               xe_for_each_multi_queue_engine(fd, hwe)
> > +                       test_compute_mode(-1, hwe, 16, 256,
> > +                                         CLOSE_EXEC_QUEUES |
> > CLOSE_FD |
> > +                                         MULTI_QUEUE);
> > +       }
> > +
> >         igt_fixture()
> >                 drm_close_driver(fd);
> > }
> > -- 
> > 2.43.0
> > 

Re: [PATCH i-g-t 3/3] tests/intel/xe_exec_reset: Add multi queue subtests

[Summers, Stuart]

On Mon, 2026-04-13 at 21:01 +0000, Summers, Stuart wrote:
> On Sun, 2026-04-12 at 19:34 -0700, Niranjana Vishwanathapura wrote:
> > On Thu, Apr 09, 2026 at 08:37:01PM +0000, Stuart Summers wrote:
> > > From: Apoorva Singh <apoorva.singh@intel.com>
> > > 
> > > Extend the existing test cases in tests/intel/xe_exec_reset.c
> > > to include testing of reset flows for both primary queue
> > > and secondary queues.
> > > 
> > > Engine resets without CAT faults are triggered via the *-cancel
> > > cases. These don't include the CANCEL flag as this causes a
> > > spinner
> > > on each queue which isn't adding any extra coverage for multi
> > > queue
> > > over non multi queue.
> > > 
> > > Since the *-cancel cases are currently implemented only for the
> > > legacy cases, do the same for multi queue.
> > > 
> > > New MULTI_QUEUE and SECONDARY_QUEUE flags are added to cover
> > > the general multi queue cases and the cases where we are
> > > triggering
> > > engine resets and/or cat faults on secondary queues specifically.
> > > 
> > > Note for multi queue it is interesting to test these secondary
> > > queue reset scenarios since these are communicated to the driver
> > > from GuC via the primary queue and after this, the entire queue
> > > group is torn down. The test cases here are to ensure nothing
> > > breaks when we hit a scenario like this.
> > > 
> > > Signed-off-by: Apoorva Singh <apoorva.singh@intel.com>
> > > Signed-off-by: Fei Yang <fei.yang@intel.com>
> > > Signed-off-by: Katarzyna Piecielska
> > > <katarzyna.piecielska@intel.com>
> > > Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
> > > Signed-off-by: Daniel Charles <daniel.charles@intel.com>
> > > Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > 
> > Also ensure to include only valid email ids here for s-o-b.
> 
> Sure I'll remove the ones that aren't available.

Hey sorry I think Apoorva is the main one who doesn't have the email
here any more. But she was also one of the original authors here (even
if there are quite a few changes since then) and I wanted to keep the
history. I'll keep her s-o-b for now for record.

Thanks,
Stuart

> 
> Thanks,
> Stuart
> 
> > 
> > Niranjana
> > 
> > > ---
> > > lib/xe/xe_legacy.c          |  71 ++++++++++--
> > > tests/intel/xe_exec_reset.c | 222
> > > ++++++++++++++++++++++++++++++++++--
> > > 2 files changed, 274 insertions(+), 19 deletions(-)
> > > 
> > > diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
> > > index 3371a91ac..f9bd5bcb6 100644
> > > --- a/lib/xe/xe_legacy.c
> > > +++ b/lib/xe/xe_legacy.c
> > > @@ -13,6 +13,8 @@
> > > 
> > > /* Batch buffer element count, in number of dwords(u32) */
> > > #define BATCH_DW_COUNT                  16
> > > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > > +#define MULTI_QUEUE                    (0x1 << 14)
> > > #define COMPRESSION                     (0x1 << 13)
> > > #define SYSTEM                          (0x1 << 12)
> > > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > > @@ -70,10 +72,14 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >                         xe_spin_nsec_to_ticks(fd, 0, THREE_SEC) :
> > > 0,
> > >         };
> > >         int i, b;
> > > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> > >         int extra_execs = (flags & LONG_SPIN_REUSE_QUEUE) ?
> > > n_exec_queues : 0;
> > > 
> > >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > > 
> > > +       igt_assert_f(!(flags & SECONDARY_QUEUE) || (flags &
> > > MULTI_QUEUE),
> > > +                    "SECONDARY_QUEUE requires MULTI_QUEUE to be
> > > set");
> > > +
> > >         if (flags & COMPRESSION)
> > >                 igt_require(intel_gen(intel_get_drm_devid(fd)) >=
> > > 20);
> > > 
> > > @@ -101,7 +107,20 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         data = xe_bo_map(fd, bo, bo_size);
> > > 
> > >         for (i = 0; i < n_exec_queues; i++) {
> > > -               exec_queues[i] = xe_exec_queue_create(fd, vm,
> > > eci,
> > > 0);
> > > +               if (flags & MULTI_QUEUE) {
> > > +                       struct drm_xe_ext_set_property
> > > multi_queue
> > > = {
> > > +                               .base.next_extension = 0,
> > > +                               .base.name =
> > > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > > +                               .property =
> > > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > > +                       };
> > > +
> > > +                       uint64_t ext =
> > > to_user_pointer(&multi_queue);
> > > +
> > > +                       multi_queue.value = i ? exec_queues[0] :
> > > DRM_XE_MULTI_GROUP_CREATE;
> > > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > > vm, eci, ext);
> > > +               } else {
> > > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > > vm, eci, 0);
> > > +               }
> > >                 syncobjs[i] = syncobj_create(fd, 0);
> > >         }
> > > 
> > > @@ -123,17 +142,22 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         }
> > > 
> > >         for (i = 0; i < n_execs; i++) {
> > > -               u64 base_addr = (!use_capture_mode && (flags &
> > > CAT_ERROR) && !i)
> > > -                       ? (addr + bo_size * 128) : addr;
> > > +               u64 base_addr = (!use_capture_mode && flags &
> > > CAT_ERROR &&
> > > +                                i == hang_position) ?
> > > +                               (addr + bo_size * 128) : addr;
> > >                 u64 batch_offset = (char *)&data[i].batch - (char
> > > *)data;
> > >                 u64 batch_addr = base_addr + batch_offset;
> > >                 u64 spin_offset = (char *)&data[i].spin - (char
> > > *)data;
> > >                 u64 sdi_offset = (char *)&data[i].data - (char
> > > *)data;
> > >                 u64 sdi_addr = base_addr + sdi_offset;
> > >                 u64 exec_addr;
> > > -               int e = i % n_exec_queues;
> > > +               int err, e = i % n_exec_queues;
> > > 
> > > -               if (!i || flags & CANCEL ||
> > > +               /*
> > > +                * For cat fault on a secondary queue the fault
> > > will
> > > +                * be on the spinner.
> > > +                */
> > > +               if (i == hang_position || flags & CANCEL ||
> > >                     (flags & LONG_SPIN && i < n_exec_queues)) {
> > >                         spin_opts.addr = base_addr + spin_offset;
> > >                         xe_spin_init(&data[i].spin, &spin_opts);
> > > @@ -160,10 +184,17 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >                 if (e != i)
> > >                         syncobj_reset(fd, &syncobjs[e], 1);
> > > 
> > > -               xe_exec(fd, &exec);
> > > +               /*
> > > +                * Secondary queues are reset when the primary
> > > queue
> > > +                * is reset. The submission can race here and it
> > > is
> > > +                * expected for those to fail submission if the
> > > primary
> > > +                * reset has already happened.
> > > +                */
> > > +               err = __xe_exec(fd, &exec);
> > > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err
> > > ==
> > > -ECANCELED));
> > > 
> > > -               if (!i && !(flags & CAT_ERROR) &&
> > > !use_capture_mode
> > > &&
> > > -                   !(flags & COMPRESSION))
> > > +               if (i == hang_position && !(flags & CAT_ERROR) &&
> > > +                   !use_capture_mode && !(flags & COMPRESSION))
> > >                         xe_spin_wait_started(&data[i].spin);
> > >         }
> > > 
> > > @@ -186,7 +217,21 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >                  * Expectation here is that on reset, submissions
> > > will
> > >                  * still satisfy the syncobj_wait.
> > >                  */
> > > -               igt_assert(syncobj_wait(fd, &syncobjs[i], 1,
> > > INT64_MAX, 0, NULL));
> > > +               int err = syncobj_wait_err(fd, &syncobjs[i], 1,
> > > INT64_MAX, 0);
> > > +
> > > +               /*
> > > +                * Currently any time GuC resets a queue which is
> > > part of a
> > > +                * multi queue queue group submitted by the KMD,
> > > the KMD
> > > +                * will tear down the entire group. This means we
> > > don't know
> > > +                * whether a particular queue submitted prior to
> > > the hanging
> > > +                * queue will complete or not. So we have to
> > > check
> > > all possible
> > > +                * return values here.
> > > +                *
> > > +                * In the event we get an -ECANCELED at the exec
> > > above and the
> > > +                * syncobj was not installed, we expect this to
> > > return -EINVAL
> > > +                * here instead.
> > > +                */
> > > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err
> > > ==
> > > -EINVAL));
> > >         }
> > > 
> > >         igt_assert(syncobj_wait(fd, &sync[0].handle, 1,
> > > INT64_MAX,
> > > 0, NULL));
> > > @@ -232,7 +277,13 @@ xe_legacy_test_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         if (!use_capture_mode && !(flags & (GT_RESET | CANCEL |
> > > COMPRESSION))) {
> > >                 for (i = flags & LONG_SPIN ? n_exec_queues : 0;
> > >                      i < n_execs + extra_execs; i++) {
> > > -                       if (!i)
> > > +                       /*
> > > +                        * For multi-queue there is no guarantee
> > > which
> > > +                        * queue will be scheduled first as they
> > > are all
> > > +                        * submitted at the same priority in this
> > > test.
> > > +                        * So we can't guarantee any data
> > > integrity
> > > here.
> > > +                        */
> > > +                       if (i == hang_position || flags &
> > > MULTI_QUEUE)
> > >                                 continue;
> > > 
> > >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > > diff --git a/tests/intel/xe_exec_reset.c
> > > b/tests/intel/xe_exec_reset.c
> > > index 6b71d9144..ea50567c0 100644
> > > --- a/tests/intel/xe_exec_reset.c
> > > +++ b/tests/intel/xe_exec_reset.c
> > > @@ -112,7 +112,7 @@ static void test_spin(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > > #define MAX_N_EXECQUEUES        16
> > > #define GT_RESET                        (0x1 << 0)
> > > #define CLOSE_FD                        (0x1 << 1)
> > > -#define CLOSE_EXEC_QUEUES      (0x1 << 2)
> > > +#define CLOSE_EXEC_QUEUES              (0x1 << 2)
> > > #define VIRTUAL                         (0x1 << 3)
> > > #define PARALLEL                        (0x1 << 4)
> > > #define CAT_ERROR                       (0x1 << 5)
> > > @@ -124,6 +124,8 @@ static void test_spin(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > > #define LONG_SPIN_REUSE_QUEUE           (0x1 << 11)
> > > #define SYSTEM                          (0x1 << 12)
> > > #define COMPRESSION                     (0x1 << 13)
> > > +#define MULTI_QUEUE                    (0x1 << 14)
> > > +#define SECONDARY_QUEUE                        (0x1 << 15)
> > > 
> > > /**
> > >  * SUBTEST: %s-cat-error
> > > @@ -353,6 +355,57 @@ test_balancer(int fd, int gt, int class, int
> > > n_exec_queues, int n_execs,
> > >  *
> > >  * SUBTEST: cm-close-execqueues-close-fd
> > >  * Description: Test compute mode close exec_queues close fd
> > > + *
> > > + * SUBTEST: multi-queue-cat-error
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test cat error with multi_queue
> > > + *
> > > + * SUBTEST: multi-queue-cat-error-on-secondary
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test cat error with multi_queue
> > > + *              on a secondary queue
> > > + *
> > > + * SUBTEST: multi-queue-gt-reset
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test GT reset with multi_queue
> > > + *
> > > + * SUBTEST: multi-queue-cancel
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test engine reset with multi_queue
> > > + *
> > > + * SUBTEST: multi-queue-cancel-on-secondary
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test engine reset with multi_queue
> > > + *              on a secondary queue
> > > + *
> > > + * SUBTEST: multi-queue-close-fd
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test close fd with multi_queue
> > > + *
> > > + * SUBTEST: multi-queue-close-execqueues
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test close execqueues with multi_queue
> > > + *
> > > + * SUBTEST: cm-multi-queue-cat-error
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test compute mode cat error with multi_queue
> > > + *
> > > + * SUBTEST: cm-multi-queue-cat-error-on-secondary
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test compute mode cat error with multi_queue
> > > + *              on a secondary queue
> > > + *
> > > + * SUBTEST: cm-multi-queue-gt-reset
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test compute mode GT reset with multi_queue
> > > + *
> > > + * SUBTEST: cm-multi-queue-close-fd
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test compute mode close fd with multi_queue
> > > + *
> > > + * SUBTEST: cm-multi-queue-close-execqueues
> > > + * Sub-category: MultiQ tests
> > > + * Description: Test compute mode close execqueues with
> > > multi_queue
> > >  */
> > > 
> > > static void
> > > @@ -384,9 +437,14 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         } *data;
> > >         struct xe_spin_opts spin_opts = { .preempt = flags &
> > > PREEMPT };
> > >         int i, b;
> > > +       int hang_position = flags & SECONDARY_QUEUE ? 1 : 0;
> > > 
> > >         igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
> > > 
> > > +       igt_assert_f(!(flags & SECONDARY_QUEUE) ||
> > > +                    ((flags & MULTI_QUEUE) && (flags &
> > > CAT_ERROR)),
> > > +                    "SECONDARY_QUEUE requires MULTI_QUEUE and
> > > CAT_ERROR to be set");
> > > +
> > >         if (flags & CLOSE_FD)
> > >                 fd = drm_open_driver(DRIVER_XE);
> > > 
> > > @@ -401,7 +459,20 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         memset(data, 0, bo_size);
> > > 
> > >         for (i = 0; i < n_exec_queues; i++) {
> > > -               exec_queues[i] = xe_exec_queue_create(fd, vm,
> > > eci,
> > > 0);
> > > +               if (flags & MULTI_QUEUE) {
> > > +                       struct drm_xe_ext_set_property
> > > multi_queue
> > > = {
> > > +                               .base.next_extension = 0,
> > > +                               .base.name =
> > > DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY,
> > > +                               .property =
> > > DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP,
> > > +                       };
> > > +
> > > +                       uint64_t ext =
> > > to_user_pointer(&multi_queue);
> > > +
> > > +                       multi_queue.value = i ? exec_queues[0] :
> > > DRM_XE_MULTI_GROUP_CREATE;
> > > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > > vm, eci, ext);
> > > +               } else {
> > > +                       exec_queues[i] = xe_exec_queue_create(fd,
> > > vm, eci, 0);
> > > +               }
> > >         };
> > > 
> > >         sync[0].addr = to_user_pointer(&data[0].vm_sync);
> > > @@ -411,17 +482,21 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > >         data[0].vm_sync = 0;
> > > 
> > >         for (i = 0; i < n_execs; i++) {
> > > -               uint64_t base_addr = flags & CAT_ERROR && !i ?
> > > -                       addr + bo_size * 128 : addr;
> > > +               uint64_t base_addr = (flags & CAT_ERROR && i ==
> > > hang_position) ?
> > > +                                    (addr + bo_size * 128) :
> > > addr;
> > >                 uint64_t batch_offset = (char *)&data[i].batch -
> > > (char *)data;
> > >                 uint64_t batch_addr = base_addr + batch_offset;
> > >                 uint64_t spin_offset = (char *)&data[i].spin -
> > > (char *)data;
> > >                 uint64_t sdi_offset = (char *)&data[i].data -
> > > (char
> > > *)data;
> > >                 uint64_t sdi_addr = base_addr + sdi_offset;
> > >                 uint64_t exec_addr;
> > > -               int e = i % n_exec_queues;
> > > +               int err, e = i % n_exec_queues;
> > > 
> > > -               if (!i || flags & CANCEL) {
> > > +               /*
> > > +                * For cat fault on a secondary queue the fault
> > > will
> > > +                * be on the spinner.
> > > +                */
> > > +               if (i == hang_position || flags & CANCEL) {
> > >                         spin_opts.addr = base_addr + spin_offset;
> > >                         xe_spin_init(&data[i].spin, &spin_opts);
> > >                         exec_addr = spin_opts.addr;
> > > @@ -442,7 +517,18 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > > 
> > >                 exec.exec_queue_id = exec_queues[e];
> > >                 exec.address = exec_addr;
> > > -               xe_exec(fd, &exec);
> > > +
> > > +               /*
> > > +                * Secondary queues are reset when the primary
> > > queue
> > > +                * is reset. The submission can race here and it
> > > is
> > > +                * expected for those to fail submission if the
> > > primary
> > > +                * reset has already happened.
> > > +                */
> > > +               err = __xe_exec(fd, &exec);
> > > +               igt_assert(!err || ((flags & MULTI_QUEUE) && err
> > > ==
> > > -ECANCELED));
> > > +
> > > +               if (i == hang_position && !(flags & CAT_ERROR))
> > > +                       xe_spin_wait_started(&data[i].spin);
> > >         }
> > > 
> > >         if (flags & GT_RESET) {
> > > @@ -467,8 +553,18 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > > 
> > >                 err = __xe_wait_ufence(fd, &data[i].exec_sync,
> > > USER_FENCE_VALUE,
> > >                                        exec_queues[i %
> > > n_exec_queues], &timeout);
> > > -               if (!i) {
> > > +               if (i == hang_position) {
> > >                         igt_assert(err == -ETIME || err == -EIO);
> > > +               } else if (flags & MULTI_QUEUE) {
> > > +                       /*
> > > +                        * Currently any time GuC resets a queue
> > > submitted
> > > +                        * by the KMD, the KMD will tear down the
> > > entire
> > > +                        * queue group. This means we don't know
> > > whether
> > > +                        * a particular queue submitted prior to
> > > the hanging
> > > +                        * queue will complete or not. So we have
> > > to check
> > > +                        * all possible return values here.
> > > +                        */
> > > +                       igt_assert(err == -ETIME || err == -EIO
> > > ||
> > > !err);
> > >                 } else if (flags & GT_RESET || flags & CAT_ERROR)
> > > {
> > >                         /* exec races with reset: may return -EIO
> > > or complete */
> > >                         igt_assert(err == -EIO || !err);
> > > @@ -483,7 +579,13 @@ test_compute_mode(int fd, struct
> > > drm_xe_engine_class_instance *eci,
> > > 
> > >         if (!(flags & (GT_RESET | CANCEL))) {
> > >                 for (i = 0; i < n_execs; i++) {
> > > -                       if (!i)
> > > +                       /*
> > > +                        * For multi-queue there is no guarantee
> > > which
> > > +                        * queue will be scheduled first as they
> > > are all
> > > +                        * submitted at the same priority in this
> > > test.
> > > +                        * So we can't guarantee any data
> > > integrity
> > > here.
> > > +                        */
> > > +                       if (i == hang_position || flags &
> > > MULTI_QUEUE)
> > >                                 continue;
> > > 
> > >                         igt_assert_eq(data[i].data, 0xc0ffee);
> > > @@ -986,6 +1088,108 @@ int igt_main()
> > >                 xe_for_each_gt(fd, gt)
> > >                         gt_mocs_reset(fd, gt);
> > > 
> > > +       igt_subtest("multi-queue-cat-error") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > > +                                           CAT_ERROR |
> > > MULTI_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-cat-error-on-secondary") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > > +                                           CAT_ERROR |
> > > MULTI_QUEUE
> > > > 
> > > +                                           SECONDARY_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-gt-reset") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > > +                                           GT_RESET |
> > > MULTI_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-cancel") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > > +                                           MULTI_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-cancel-on-secondary") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(fd, hwe, 16, 16,
> > > +                                           MULTI_QUEUE |
> > > SECONDARY_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-close-fd") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > > +                                           CLOSE_FD |
> > > MULTI_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("multi-queue-close-execqueues") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       xe_legacy_test_mode(-1, hwe, 16, 256,
> > > +                                           CLOSE_EXEC_QUEUES |
> > > CLOSE_FD |
> > > +                                           MULTI_QUEUE,
> > > +                                           LEGACY_MODE_ADDR,
> > > +                                           false);
> > > +       }
> > > +
> > > +       igt_subtest("cm-multi-queue-cat-error") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       test_compute_mode(fd, hwe, 16, 16,
> > > +                                         CAT_ERROR |
> > > MULTI_QUEUE);
> > > +       }
> > > +
> > > +       igt_subtest("cm-multi-queue-cat-error-on-secondary") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       test_compute_mode(fd, hwe, 16, 16,
> > > +                                         CAT_ERROR | MULTI_QUEUE
> > > |
> > > +                                         SECONDARY_QUEUE);
> > > +       }
> > > +
> > > +       igt_subtest("cm-multi-queue-gt-reset") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       test_compute_mode(fd, hwe, 16, 16,
> > > +                                         GT_RESET |
> > > MULTI_QUEUE);
> > > +       }
> > > +
> > > +       igt_subtest("cm-multi-queue-close-fd") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       test_compute_mode(-1, hwe, 16, 256,
> > > +                                         CLOSE_FD |
> > > MULTI_QUEUE);
> > > +       }
> > > +
> > > +       igt_subtest("cm-multi-queue-close-execqueues") {
> > > +               igt_require(intel_graphics_ver(intel_get_drm_devi
> > > d(
> > > fd)) >= IP_VER(35, 0));
> > > +               xe_for_each_multi_queue_engine(fd, hwe)
> > > +                       test_compute_mode(-1, hwe, 16, 256,
> > > +                                         CLOSE_EXEC_QUEUES |
> > > CLOSE_FD |
> > > +                                         MULTI_QUEUE);
> > > +       }
> > > +
> > >         igt_fixture()
> > >                 drm_close_driver(fd);
> > > }
> > > -- 
> > > 2.43.0
> > > 
> 

✓ Xe.CI.BAT: success for Add test coverage for multi queue reset

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2394 bytes --]

== Series Details ==

Series: Add test coverage for multi queue reset
URL   : https://patchwork.freedesktop.org/series/164653/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_8852_BAT -> XEIGTPW_14959_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_14959_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][5] ([Intel XE#6520]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * IGT: IGT_8852 -> IGTPW_14959
  * Linux: xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf -> xe-4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37

  IGTPW_14959: c1f34a1b187591ec75cd48940468ed10b720427d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8852: 8852
  xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf: 5ee75b2816df74bfe606d4dfc061547d5cda4ebf
  xe-4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37: 97d8833ffba6bd3d6aaa51169069620ac17a2e37

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/index.html

[-- Attachment #2: Type: text/html, Size: 3102 bytes --]

✓ i915.CI.BAT: success for Add test coverage for multi queue reset

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3927 bytes --]

== Series Details ==

Series: Add test coverage for multi queue reset
URL   : https://patchwork.freedesktop.org/series/164653/
State : success

== Summary ==

CI Bug Log - changes from IGT_8852 -> IGTPW_14959
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/index.html

Participating hosts (42 -> 40)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_14959 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_debugfs@read-all-entries:
    - bat-adlp-9:         [PASS][1] -> [DMESG-WARN][2] ([i915#15673])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-adlp-9/igt@core_debugfs@read-all-entries.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-adlp-9/igt@core_debugfs@read-all-entries.html

  * igt@i915_selftest@live@sanitycheck:
    - bat-apl-1:          [PASS][3] -> [DMESG-WARN][4] ([i915#13735]) +77 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-apl-1/igt@i915_selftest@live@sanitycheck.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - bat-apl-1:          [PASS][5] -> [DMESG-WARN][6] ([i915#13735] / [i915#180]) +49 other tests dmesg-warn
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html

  
#### Possible fixes ####

  * igt@i915_selftest@live:
    - bat-dg2-8:          [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-dg2-8/igt@i915_selftest@live.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-dg2-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-5:         [DMESG-FAIL][9] ([i915#12061]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-arls-5/igt@i915_selftest@live@workarounds.html
    - bat-dg2-14:         [DMESG-FAIL][11] ([i915#12061]) -> [PASS][12] +1 other test pass
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-dg2-14/igt@i915_selftest@live@workarounds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-dg2-14/igt@i915_selftest@live@workarounds.html
    - bat-mtlp-9:         [DMESG-FAIL][13] ([i915#12061]) -> [PASS][14] +1 other test pass
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8852/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/bat-mtlp-9/igt@i915_selftest@live@workarounds.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8852 -> IGTPW_14959
  * Linux: CI_DRM_18303 -> CI_DRM_18306

  CI-20190529: 20190529
  CI_DRM_18303: 7fa61e7003dda66c77b7f63a555658d8fb10bacf @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_18306: 97d8833ffba6bd3d6aaa51169069620ac17a2e37 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_14959: c1f34a1b187591ec75cd48940468ed10b720427d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8852: 8852

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/index.html

[-- Attachment #2: Type: text/html, Size: 4962 bytes --]

✗ Xe.CI.FULL: failure for Add test coverage for multi queue reset

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 19492 bytes --]

== Series Details ==

Series: Add test coverage for multi queue reset
URL   : https://patchwork.freedesktop.org/series/164653/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_8852_FULL -> XEIGTPW_14959_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_14959_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_14959_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_14959_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_reset@cm-multi-queue-cat-error (NEW):
    - shard-bmg:          NOTRUN -> [SKIP][1] +11 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-3/igt@xe_exec_reset@cm-multi-queue-cat-error.html

  * igt@xe_exec_reset@multi-queue-gt-reset (NEW):
    - shard-lnl:          NOTRUN -> [SKIP][2] +11 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-lnl-1/igt@xe_exec_reset@multi-queue-gt-reset.html

  
New tests
---------

  New tests have been introduced between XEIGT_8852_FULL and XEIGTPW_14959_FULL:

### New IGT tests (12) ###

  * igt@xe_exec_reset@cm-multi-queue-cat-error:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@cm-multi-queue-close-execqueues:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@cm-multi-queue-close-fd:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-cancel:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-cancel-on-secondary:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-cat-error:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-cat-error-on-secondary:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-close-execqueues:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-close-fd:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  * igt@xe_exec_reset@multi-queue-gt-reset:
    - Statuses : 2 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in XEIGTPW_14959_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2328] / [Intel XE#7367])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#7679]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-6/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2887]) +6 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2252]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@kms_chamelium_hpd@dp-hpd-fast.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2320])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-bmg:          [PASS][9] -> [DMESG-WARN][10] ([Intel XE#5354])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-10/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-10/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][11] -> [FAIL][12] ([Intel XE#7586])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#4354] / [Intel XE#7386])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7178] / [Intel XE#7351])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#4141]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2311]) +9 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2313]) +5 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#7130]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-b-plane-5.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#1489]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#3904] / [Intel XE#7342])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [PASS][22] -> [FAIL][23] ([Intel XE#4459]) +1 other test fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-lnl-4/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-lnl-7/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@kms_vrr@lobf:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2168] / [Intel XE#7444])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-5/igt@kms_vrr@lobf.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7636]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-3/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][26] ([Intel XE#6321])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict@evict-small-multi-queue-priority-cm:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7140])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@xe_evict@evict-small-multi-queue-priority-cm.html

  * igt@xe_exec_basic@multigpu-no-exec-null:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2322] / [Intel XE#7372])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-9/igt@xe_exec_basic@multigpu-no-exec-null.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#7136]) +6 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-5/igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#6874]) +9 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-preempt-mode-basic-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7138]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#4733] / [Intel XE#7417])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-10/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#944])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-2/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-bmg:          [PASS][34] -> [FAIL][35] ([Intel XE#6569])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-7/igt@xe_sriov_flr@flr-vfs-parallel.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-3/igt@xe_sriov_flr@flr-vfs-parallel.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-bmg:          [DMESG-WARN][36] ([Intel XE#5354]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-5/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-5/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
    - shard-bmg:          [FAIL][38] ([Intel XE#3149]) -> [PASS][39] +1 other test pass
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-6/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][40] -> [PASS][41] +4 other tests pass
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-6/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][42] ([Intel XE#301]) -> [PASS][43] +1 other test pass
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          [SKIP][44] ([Intel XE#7308]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-9/igt@kms_hdmi_inject@inject-audio.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-8/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_vrr@flip-basic:
    - shard-lnl:          [FAIL][46] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][47] +3 other tests pass
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-lnl-8/igt@kms_vrr@flip-basic.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-lnl-2/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [FAIL][48] ([Intel XE#2142]) -> [PASS][49] +1 other test pass
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-shared-remap-eocheck:
    - shard-bmg:          [DMESG-WARN][50] -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-6/igt@xe_exec_system_allocator@many-execqueues-mmap-shared-remap-eocheck.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-3/igt@xe_exec_system_allocator@many-execqueues-mmap-shared-remap-eocheck.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
    - shard-bmg:          [FAIL][52] ([Intel XE#5937]) -> [PASS][53] +2 other tests pass
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-8/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-5/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][54] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][55] ([Intel XE#2426] / [Intel XE#5848])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8852/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
  [Intel XE#7586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7586
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8852 -> IGTPW_14959
  * Linux: xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf -> xe-4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37

  IGTPW_14959: c1f34a1b187591ec75cd48940468ed10b720427d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8852: 8852
  xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf: 5ee75b2816df74bfe606d4dfc061547d5cda4ebf
  xe-4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37: 97d8833ffba6bd3d6aaa51169069620ac17a2e37

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/index.html

[-- Attachment #2: Type: text/html, Size: 21380 bytes --]

Re: Xe.CI.FULL: failure for Add test coverage for multi queue reset

[Summers, Stuart]

On Fri, 2026-04-10 at 09:54 +0000, Patchwork wrote:
> Patch Details
> Series: Add test coverage for multi queue reset URL:
> https://patchwork.freedesktop.org/series/164653/ State: failure
> Details:
> https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14959/index.html 
> CI Bug Log - changes from XEIGT_8852_FULL ->
> XEIGTPW_14959_FULLSummaryFAILURE
> Serious unknown changes coming with XEIGTPW_14959_FULL absolutely
> need to be
>  verified manually.
> If you think the reported changes have nothing to do with the changes
>  introduced in XEIGTPW_14959_FULL, please notify your bug team
> (I915-ci-infra@lists.freedesktop.org) to allow them
>  to document this new failure mode, which will reduce false positives
> in CI.
> Participating hosts (2 -> 2)No changes in participating hosts
> Possible new issuesHere are the unknown changes that may have been
> introduced in XEIGTPW_14959_FULL:
> IGT changesPossible regressions *
> igt@xe_exec_reset@cm-multi-queue-cat-error (NEW):shard-bmg: NOTRUN ->
> SKIP +11 other tests skip
>  * igt@xe_exec_reset@multi-queue-gt-reset (NEW):shard-lnl: NOTRUN ->
> SKIP +11 other tests skip

Expected skips here since this is restricted to xe3p+

-Stuart

> New testsNew tests have been introduced between XEIGT_8852_FULL and
> XEIGTPW_14959_FULL:
> New IGT tests (12) *
> igt@xe_exec_reset@cm-multi-queue-cat-error:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary:Statuses :
> 2 skip(s)Exec time: [0.0] s
>  * igt@xe_exec_reset@cm-multi-queue-close-execqueues:Statuses : 2
> skip(s)Exec time: [0.0] s
>  * igt@xe_exec_reset@cm-multi-queue-close-fd:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@cm-multi-queue-gt-reset:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-cancel:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-cancel-on-secondary:Statuses : 2
> skip(s)Exec time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-cat-error:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-cat-error-on-secondary:Statuses : 2
> skip(s)Exec time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-close-execqueues:Statuses : 2
> skip(s)Exec time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-close-fd:Statuses : 2 skip(s)Exec
> time: [0.0] s
>  * igt@xe_exec_reset@multi-queue-gt-reset:Statuses : 2 skip(s)Exec
> time: [0.0] s
> Known issuesHere are the changes found in XEIGTPW_14959_FULL that
> come from known issues:
> IGT changesIssues hit * igt@kms_big_fb@y-tiled-8bpp-rotate-90:shard-
> bmg: NOTRUN -> SKIP (Intel XE#1124) +1 other test skip
>  * igt@kms_big_fb@yf-tiled-addfb:shard-bmg: NOTRUN -> SKIP (Intel
> XE#2328 / Intel XE#7367)
>  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:shard-
> bmg: NOTRUN -> SKIP (Intel XE#7679) +1 other test skip
>  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:shard-bmg: NOTRUN -> SKIP
> (Intel XE#2887) +6 other tests skip
>  * igt@kms_chamelium_hpd@dp-hpd-fast:shard-bmg: NOTRUN -> SKIP (Intel
> XE#2252) +1 other test skip
>  * igt@kms_cursor_crc@cursor-offscreen-256x85:shard-bmg: NOTRUN ->
> SKIP (Intel XE#2320)
>  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:shard-bmg:
> PASS -> DMESG-WARN (Intel XE#5354)
>  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:shard-bmg: PASS ->
> FAIL (Intel XE#7586)
>  * igt@kms_dp_link_training@uhbr-mst:shard-bmg: NOTRUN -> SKIP (Intel
> XE#4354 / Intel XE#7386)
>  *
> igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling
> :shard-bmg: NOTRUN -> SKIP (Intel XE#7178 / Intel XE#7351)
>  *
> igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:shard-
> bmg: NOTRUN -> SKIP (Intel XE#4141) +3 other tests skip
>  *
> igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-blt:
> shard-bmg: NOTRUN -> SKIP (Intel XE#2311) +9 other tests skip
>  *
> igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt:shar
> d-bmg: NOTRUN -> SKIP (Intel XE#2313) +5 other tests skip
>  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier@pipe-b-plane-
> 5:shard-bmg: NOTRUN -> SKIP (Intel XE#7130) +1 other test skip
>  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:shard-
> bmg: NOTRUN -> SKIP (Intel XE#1489) +1 other test skip
>  * igt@kms_psr@fbc-pr-primary-page-flip:shard-bmg: NOTRUN -> SKIP
> (Intel XE#2234 / Intel XE#2850) +5 other tests skip
>  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:shard-bmg:
> NOTRUN -> SKIP (Intel XE#3904 / Intel XE#7342)
>  * igt@kms_vrr@cmrr@pipe-a-edp-1:shard-lnl: PASS -> FAIL (Intel
> XE#4459) +1 other test fail
>  * igt@kms_vrr@lobf:shard-bmg: NOTRUN -> SKIP (Intel XE#2168 / Intel
> XE#7444)
>  * igt@xe_eudebug@basic-exec-queues:shard-bmg: NOTRUN -> SKIP (Intel
> XE#7636) +4 other tests skip
>  * igt@xe_evict@evict-mixed-many-threads-small:shard-bmg: NOTRUN ->
> INCOMPLETE (Intel XE#6321)
>  * igt@xe_evict@evict-small-multi-queue-priority-cm:shard-bmg: NOTRUN
> -> SKIP (Intel XE#7140)
>  * igt@xe_exec_basic@multigpu-no-exec-null:shard-bmg: NOTRUN -> SKIP
> (Intel XE#2322 / Intel XE#7372)
>  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind:shard-bmg:
> NOTRUN -> SKIP (Intel XE#7136) +6 other tests skip
>  * igt@xe_exec_multi_queue@two-queues-preempt-mode-basic-smem:shard-
> bmg: NOTRUN -> SKIP (Intel XE#6874) +9 other tests skip
>  * igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind:shard-bmg:
> NOTRUN -> SKIP (Intel XE#7138) +3 other tests skip
>  * igt@xe_pxp@pxp-termination-key-update-post-suspend:shard-bmg:
> NOTRUN -> SKIP (Intel XE#4733 / Intel XE#7417)
>  * igt@xe_query@multigpu-query-pxp-status:shard-bmg: NOTRUN -> SKIP
> (Intel XE#944)
>  * igt@xe_sriov_flr@flr-vfs-parallel:shard-bmg: PASS -> FAIL (Intel
> XE#6569)
> Possible fixes *
> igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
> shard-bmg: DMESG-WARN (Intel XE#5354) -> PASS
>  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:shard-bmg: FAIL
> (Intel XE#3149) -> PASS +1 other test pass
>  *
> igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3:shard
> -bmg: FAIL -> PASS +4 other tests pass
>  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:shard-lnl: FAIL (Intel
> XE#301) -> PASS +1 other test pass
>  * igt@kms_hdmi_inject@inject-audio:shard-bmg: SKIP (Intel XE#7308) -
> > PASS
>  * igt@kms_vrr@flip-basic:shard-lnl: FAIL (Intel XE#4227 / Intel
> XE#7397) -> PASS +3 other tests pass
>  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:shard-lnl:
> FAIL (Intel XE#2142) -> PASS +1 other test pass
>  *
> igt@xe_exec_system_allocator@many-execqueues-mmap-shared-remap-eocheck
> :shard-bmg: DMESG-WARN -> PASS
>  *
> igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs
> :shard-bmg: FAIL (Intel XE#5937) -> PASS +2 other tests pass
> Warnings *
> igt@kms_tiled_display@basic-test-pattern-with-chamelium:shard-bmg:
> SKIP (Intel XE#2509 / Intel XE#7437) -> SKIP (Intel XE#2426 / Intel
> XE#5848)
> {name}: This element is suppressed. This means it is ignored when
> computing
>  the status of the difference (SUCCESS, WARNING, or FAILURE).
> Build changes * IGT: IGT_8852 -> IGTPW_14959
>  * Linux: xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf -> xe-
> 4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37
> IGTPW_14959: c1f34a1b187591ec75cd48940468ed10b720427d @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>  IGT_8852: 8852
>  xe-4860-5ee75b2816df74bfe606d4dfc061547d5cda4ebf:
> 5ee75b2816df74bfe606d4dfc061547d5cda4ebf
>  xe-4877-97d8833ffba6bd3d6aaa51169069620ac17a2e37:
> 97d8833ffba6bd3d6aaa51169069620ac17a2e37

✗ i915.CI.Full: failure for Add test coverage for multi queue reset

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 169482 bytes --]

== Series Details ==

Series: Add test coverage for multi queue reset
URL   : https://patchwork.freedesktop.org/series/164653/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_18306_full -> IGTPW_14959_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_14959_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_14959_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/index.html

Participating hosts (11 -> 10)
------------------------------

  Missing    (1): pig-kbl-iris 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_14959_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - shard-dg2:          ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24]) -> ([PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [FAIL][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-10/igt@i915_module_load@load.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@i915_module_load@load.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@i915_module_load@load.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@i915_module_load@load.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@i915_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@i915_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@i915_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@i915_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@i915_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@i915_module_load@load.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@i915_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@i915_module_load@load.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@i915_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@i915_module_load@load.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@i915_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@i915_module_load@load.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@i915_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@i915_module_load@load.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@i915_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@i915_module_load@load.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@i915_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@i915_module_load@load.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@i915_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@i915_module_load@load.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@i915_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@i915_module_load@load.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@i915_module_load@load.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@i915_module_load@load.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@i915_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@i915_module_load@load.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@i915_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@i915_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@i915_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@i915_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@i915_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@i915_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@i915_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@i915_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@i915_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@i915_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@i915_module_load@load.html

  * igt@i915_selftest@perf:
    - shard-dg2:          NOTRUN -> [FAIL][50] +4 other tests fail
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_selftest@perf.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear:
    - shard-dg2:          NOTRUN -> [SKIP][51] +11 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-rkl:          [PASS][52] -> [ABORT][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1:
    - shard-rkl:          NOTRUN -> [ABORT][54]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-hdmi-a1:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][55] +1 other test dmesg-warn
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-hdmi-a1.html

  * igt@syncobj_wait@invalid-multi-wait-all-unsubmitted-signaled:
    - shard-dg2:          [PASS][56] -> [SKIP][57] +27 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@syncobj_wait@invalid-multi-wait-all-unsubmitted-signaled.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@syncobj_wait@invalid-multi-wait-all-unsubmitted-signaled.html

  
#### Warnings ####

  * igt@kms_addfb_basic@bo-too-small-due-to-tiling:
    - shard-dg2:          [SKIP][58] ([i915#4212]) -> [SKIP][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg2:          [SKIP][60] ([i915#11151] / [i915#7828]) -> [SKIP][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@kms_chamelium_hpd@hdmi-hpd.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@lic-type-0:
    - shard-dg2:          [SKIP][62] ([i915#15865]) -> [SKIP][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@kms_content_protection@lic-type-0.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_content_protection@lic-type-0.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-dg2:          [SKIP][64] ([i915#13046] / [i915#5354]) -> [SKIP][65] +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
    - shard-dg2:          [SKIP][66] ([i915#9934]) -> [SKIP][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-dg2:          [SKIP][68] ([i915#6301]) -> [SKIP][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@kms_panel_fitting@atomic-fastset.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
    - shard-dg2:          [SKIP][70] ([i915#15709]) -> [SKIP][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html

  
New tests
---------

  New tests have been introduced between CI_DRM_18306_full and IGTPW_14959_full:

### New IGT tests (14) ###

  * igt@kms_flip@bad-open:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@close-race:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@close-race@b-hdmi-a1:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@create-massive:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@etime-multi-wait-submitted:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@fbc:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@fbc-1p-primscrn-shrfb-plflip-blt:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@fbcpsr-1p-primscrn-indfb-pgflip-blt:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@lic-type-1:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@reset-stress:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@setcrtc-implicit-plane:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@too-high:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@uint-max-clock:
    - Statuses :
    - Exec time: [None] s

  * igt@kms_flip@unaligned-read:
    - Statuses :
    - Exec time: [None] s

  

Known issues
------------

  Here are the changes found in IGTPW_14959_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][72] ([i915#8411]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@api_intel_bb@blit-reloc-purge-cache.html

  * igt@gem_bad_reloc@negative-reloc-bltcopy:
    - shard-mtlp:         NOTRUN -> [SKIP][73] ([i915#3281]) +9 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@gem_bad_reloc@negative-reloc-bltcopy.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          NOTRUN -> [SKIP][74] ([i915#7697])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#13008])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@gem_ccs@large-ctrl-surf-copy.html
    - shard-dg1:          NOTRUN -> [SKIP][76] ([i915#13008])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@gem_ccs@large-ctrl-surf-copy.html
    - shard-tglu:         NOTRUN -> [SKIP][77] ([i915#13008])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-9/igt@gem_ccs@large-ctrl-surf-copy.html
    - shard-mtlp:         NOTRUN -> [SKIP][78] ([i915#13008])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume:
    - shard-rkl:          NOTRUN -> [SKIP][79] ([i915#9323])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@gem_ccs@suspend-resume.html
    - shard-dg1:          NOTRUN -> [SKIP][80] ([i915#9323])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@gem_ccs@suspend-resume.html
    - shard-tglu:         NOTRUN -> [SKIP][81] ([i915#9323]) +1 other test skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@gem_ccs@suspend-resume.html
    - shard-mtlp:         NOTRUN -> [SKIP][82] ([i915#9323])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@gem_ccs@suspend-resume.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu:         NOTRUN -> [SKIP][83] ([i915#6335])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@gem_create@create-ext-cpu-access-sanity-check.html
    - shard-mtlp:         NOTRUN -> [SKIP][84] ([i915#6335])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_ctx_isolation@preservation-s3:
    - shard-rkl:          [PASS][85] -> [INCOMPLETE][86] ([i915#13356]) +1 other test incomplete
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@gem_ctx_isolation@preservation-s3.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@gem_ctx_isolation@preservation-s3.html

  * igt@gem_ctx_persistence@heartbeat-close:
    - shard-dg1:          NOTRUN -> [SKIP][87] ([i915#8555]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@gem_ctx_persistence@heartbeat-close.html
    - shard-mtlp:         NOTRUN -> [SKIP][88] ([i915#8555])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@gem_ctx_persistence@heartbeat-close.html

  * igt@gem_ctx_persistence@heartbeat-stop:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#8555]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#14544] / [i915#280])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#280])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-mtlp:         NOTRUN -> [SKIP][92] ([i915#4771])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@gem_exec_balancer@bonded-pair.html
    - shard-dg2:          NOTRUN -> [SKIP][93] ([i915#4771])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@gem_exec_balancer@bonded-pair.html
    - shard-dg1:          NOTRUN -> [SKIP][94] ([i915#4771])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@bonded-true-hang:
    - shard-dg2:          NOTRUN -> [SKIP][95] ([i915#4812]) +3 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@gem_exec_balancer@bonded-true-hang.html

  * igt@gem_exec_balancer@parallel:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#4525]) +3 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-tglu-1:       NOTRUN -> [SKIP][97] ([i915#4525])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_capture@capture:
    - shard-mtlp:         NOTRUN -> [FAIL][98] ([i915#11965]) +1 other test fail
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_exec_capture@capture.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-glk:          NOTRUN -> [SKIP][99] ([i915#6334]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk3/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_capture@capture-recoverable:
    - shard-tglu:         NOTRUN -> [SKIP][100] ([i915#6344])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@gem_exec_capture@capture-recoverable.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg2:          NOTRUN -> [FAIL][101] ([i915#11965]) +4 other tests fail
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@gem_exec_capture@capture@vecs0-lmem0.html
    - shard-dg1:          NOTRUN -> [FAIL][102] ([i915#11965]) +2 other tests fail
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_fence@submit67:
    - shard-mtlp:         NOTRUN -> [SKIP][103] ([i915#4812])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#3539] / [i915#4852]) +2 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@gem_exec_flush@basic-wb-prw-default.html
    - shard-dg1:          NOTRUN -> [SKIP][105] ([i915#3539] / [i915#4852]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_reloc@basic-gtt-cpu-active:
    - shard-rkl:          NOTRUN -> [SKIP][106] ([i915#3281]) +13 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-cpu-active.html

  * igt@gem_exec_reloc@basic-wc-gtt-noreloc:
    - shard-dg1:          NOTRUN -> [SKIP][107] ([i915#3281]) +12 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@gem_exec_reloc@basic-wc-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-dg2:          NOTRUN -> [SKIP][108] ([i915#3281]) +11 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@reorder-wide:
    - shard-dg2:          NOTRUN -> [SKIP][109] ([i915#4537] / [i915#4812])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@gem_exec_schedule@reorder-wide.html
    - shard-dg1:          NOTRUN -> [SKIP][110] ([i915#4812]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@gem_exec_schedule@reorder-wide.html
    - shard-mtlp:         NOTRUN -> [SKIP][111] ([i915#4537] / [i915#4812])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_exec_schedule@reorder-wide.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][112] ([i915#13196] / [i915#13356]) +1 other test incomplete
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#4860])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          NOTRUN -> [SKIP][114] ([i915#2190])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@gem_huc_copy@huc-copy.html
    - shard-tglu:         NOTRUN -> [SKIP][115] ([i915#2190])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@gem_huc_copy@huc-copy.html
    - shard-glk:          NOTRUN -> [SKIP][116] ([i915#2190])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][117] ([i915#4613]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][118] ([i915#4613]) +8 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk3/igt@gem_lmem_swapping@verify-ccs.html
    - shard-rkl:          NOTRUN -> [SKIP][119] ([i915#4613]) +2 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_mmap_gtt@basic-small-bo-tiledx:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#4077]) +5 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_mmap_gtt@basic-small-bo-tiledx.html

  * igt@gem_mmap_gtt@fault-concurrent:
    - shard-dg1:          NOTRUN -> [SKIP][121] ([i915#4077]) +5 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@gem_mmap_gtt@fault-concurrent.html
    - shard-mtlp:         NOTRUN -> [SKIP][122] ([i915#4077]) +3 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@gem_mmap_gtt@fault-concurrent.html

  * igt@gem_mmap_offset@perf:
    - shard-dg2:          [PASS][123] -> [SKIP][124] ([i915#2575]) +23 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@gem_mmap_offset@perf.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_mmap_offset@perf.html

  * igt@gem_mmap_wc@coherency:
    - shard-dg2:          NOTRUN -> [SKIP][125] ([i915#4083]) +5 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@gem_mmap_wc@coherency.html
    - shard-dg1:          NOTRUN -> [SKIP][126] ([i915#4083]) +6 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@gem_mmap_wc@coherency.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-mtlp:         NOTRUN -> [SKIP][127] ([i915#4083]) +3 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#14544] / [i915#3282])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pwrite@basic-random:
    - shard-dg2:          NOTRUN -> [SKIP][129] ([i915#3282]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@gem_pwrite@basic-random.html
    - shard-rkl:          NOTRUN -> [SKIP][130] ([i915#3282]) +2 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@gem_pwrite@basic-random.html
    - shard-dg1:          NOTRUN -> [SKIP][131] ([i915#3282]) +2 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@gem_pwrite@basic-random.html
    - shard-mtlp:         NOTRUN -> [SKIP][132] ([i915#3282]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@gem_pwrite@basic-random.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-tglu-1:       NOTRUN -> [SKIP][133] ([i915#13398])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#4270]) +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-dg1:          NOTRUN -> [SKIP][135] ([i915#4270]) +4 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-12/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][136] ([i915#5190] / [i915#8428]) +4 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs.html

  * igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][137] ([i915#8428])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html

  * igt@gem_softpin@evict-snoop:
    - shard-rkl:          NOTRUN -> [SKIP][138] +19 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@gem_softpin@evict-snoop.html

  * igt@gem_softpin@noreloc-s3:
    - shard-rkl:          [PASS][139] -> [INCOMPLETE][140] ([i915#13809])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@gem_softpin@noreloc-s3.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-dg2:          NOTRUN -> [SKIP][141] ([i915#2575]) +3 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_userptr_blits@forbidden-operations:
    - shard-dg2:          NOTRUN -> [SKIP][142] ([i915#3282] / [i915#3297])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@gem_userptr_blits@forbidden-operations.html
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#3282] / [i915#3297])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@gem_userptr_blits@forbidden-operations.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-dg2:          NOTRUN -> [SKIP][144] ([i915#3297] / [i915#4880])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
    - shard-dg1:          NOTRUN -> [SKIP][145] ([i915#3297] / [i915#4880])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
    - shard-mtlp:         NOTRUN -> [SKIP][146] ([i915#3297])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][147] ([i915#3297]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@relocations:
    - shard-rkl:          NOTRUN -> [SKIP][148] ([i915#14544] / [i915#3281] / [i915#3297])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@sd-probe:
    - shard-dg2:          NOTRUN -> [SKIP][149] ([i915#3297] / [i915#4958])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@gem_userptr_blits@sd-probe.html
    - shard-dg1:          NOTRUN -> [SKIP][150] ([i915#3297] / [i915#4958])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@gem_userptr_blits@sd-probe.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([i915#14544] / [i915#3297])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([i915#2856]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-tglu-1:       NOTRUN -> [SKIP][153] ([i915#2527] / [i915#2856])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@batch-without-end:
    - shard-tglu:         NOTRUN -> [SKIP][154] ([i915#2527] / [i915#2856]) +2 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@gen9_exec_parse@batch-without-end.html

  * igt@gen9_exec_parse@bb-secure:
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#14544] / [i915#2527]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gen9_exec_parse@bb-secure.html
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#2527])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@gen9_exec_parse@bb-secure.html
    - shard-mtlp:         NOTRUN -> [SKIP][157] ([i915#2856])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@gen9_exec_parse@bb-secure.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-rkl:          NOTRUN -> [SKIP][158] ([i915#2527]) +3 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@gen9_exec_parse@bb-start-far.html

  * igt@i915_drm_fdinfo@busy@rcs0:
    - shard-dg1:          NOTRUN -> [SKIP][159] ([i915#14073]) +5 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@i915_drm_fdinfo@busy@rcs0.html
    - shard-mtlp:         NOTRUN -> [SKIP][160] ([i915#14073]) +6 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@i915_drm_fdinfo@busy@rcs0.html

  * igt@i915_drm_fdinfo@busy@vecs1:
    - shard-dg2:          NOTRUN -> [SKIP][161] ([i915#14073]) +7 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@i915_drm_fdinfo@busy@vecs1.html

  * igt@i915_drm_fdinfo@virtual-busy:
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#14118]) +1 other test skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@i915_drm_fdinfo@virtual-busy.html

  * igt@i915_drm_fdinfo@virtual-busy-hang-all:
    - shard-dg1:          NOTRUN -> [SKIP][163] ([i915#14118])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@i915_drm_fdinfo@virtual-busy-hang-all.html
    - shard-mtlp:         NOTRUN -> [SKIP][164] ([i915#14118])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@i915_drm_fdinfo@virtual-busy-hang-all.html

  * igt@i915_module_load@fault-injection:
    - shard-dg1:          NOTRUN -> [ABORT][165] ([i915#15481]) +1 other test abort
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@i915_module_load@fault-injection.html

  * igt@i915_module_load@fault-injection@i915_driver_mmio_probe:
    - shard-dg1:          NOTRUN -> [INCOMPLETE][166] ([i915#15481])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@i915_module_load@fault-injection@i915_driver_mmio_probe.html

  * igt@i915_module_load@resize-bar:
    - shard-rkl:          NOTRUN -> [SKIP][167] ([i915#6412])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@i915_module_load@resize-bar.html
    - shard-tglu-1:       NOTRUN -> [SKIP][168] ([i915#6412])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@i915_module_load@resize-bar.html

  * igt@i915_pm_freq_api@freq-basic-api:
    - shard-rkl:          NOTRUN -> [SKIP][169] ([i915#8399])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@i915_pm_freq_api@freq-basic-api.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-rkl:          NOTRUN -> [SKIP][170] ([i915#6590]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@i915_pm_freq_mult@media-freq@gt0.html
    - shard-tglu-1:       NOTRUN -> [SKIP][171] ([i915#6590]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-dg2:          [PASS][172] -> [FAIL][173] ([i915#12964]) +1 other test fail
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-tglu:         [PASS][174] -> [WARN][175] ([i915#13790] / [i915#2681]) +1 other test warn
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_pm_rps@thresholds-idle-park:
    - shard-dg2:          NOTRUN -> [SKIP][176] ([i915#11681])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@i915_pm_rps@thresholds-idle-park.html

  * igt@i915_power@sanity:
    - shard-rkl:          NOTRUN -> [SKIP][177] ([i915#7984])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@i915_power@sanity.html

  * igt@i915_query@hwconfig_table:
    - shard-dg1:          NOTRUN -> [SKIP][178] ([i915#6245])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@i915_query@hwconfig_table.html
    - shard-tglu:         NOTRUN -> [SKIP][179] ([i915#6245])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-9/igt@i915_query@hwconfig_table.html
    - shard-rkl:          NOTRUN -> [SKIP][180] ([i915#6245])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@i915_query@hwconfig_table.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-dg2:          NOTRUN -> [SKIP][181] ([i915#6188])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_selftest@live@gt_pm:
    - shard-rkl:          [PASS][182] -> [DMESG-FAIL][183] ([i915#12964]) +1 other test dmesg-fail
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-7/igt@i915_selftest@live@gt_pm.html
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@forcewake:
    - shard-glk:          NOTRUN -> [INCOMPLETE][184] ([i915#4817]) +1 other test incomplete
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk8/igt@i915_suspend@forcewake.html

  * igt@i915_suspend@sysfs-reader:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][185] ([i915#4817])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk11/igt@i915_suspend@sysfs-reader.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([i915#4212]) +1 other test skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#4212])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@kms_addfb_basic@basic-x-tiled-legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][188] ([i915#4212])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - shard-dg1:          NOTRUN -> [SKIP][189] ([i915#4215])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-tglu:         NOTRUN -> [SKIP][190] ([i915#12454] / [i915#12712])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([i915#9531])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
    - shard-rkl:          NOTRUN -> [SKIP][192] ([i915#9531])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
    - shard-tglu-1:       NOTRUN -> [SKIP][193] ([i915#9531])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#1769] / [i915#3555])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3:
    - shard-dg2:          [PASS][195] -> [FAIL][196] ([i915#5956]) +1 other test fail
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([i915#5286]) +4 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
    - shard-dg1:          NOTRUN -> [SKIP][198] ([i915#4538] / [i915#5286]) +2 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#5286]) +4 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-tglu-1:       NOTRUN -> [SKIP][200] ([i915#5286]) +2 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [PASS][201] -> [FAIL][202] ([i915#15733] / [i915#5138])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#3638]) +2 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-90.html
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#3638]) +2 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([i915#14544] / [i915#3638])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][206] ([i915#3828])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][207] ([i915#3828])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][208] +15 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-addfb-size-offset-overflow:
    - shard-dg2:          [PASS][209] -> [SKIP][210] +2 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@kms_big_fb@x-tiled-addfb-size-offset-overflow.html
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_big_fb@x-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][211] ([i915#5190]) +2 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
    - shard-mtlp:         NOTRUN -> [SKIP][212] ([i915#6187]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][213] ([i915#4538] / [i915#5190]) +9 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
    - shard-rkl:          NOTRUN -> [SKIP][214] ([i915#14544]) +3 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
    - shard-dg1:          NOTRUN -> [SKIP][215] ([i915#4538]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
    - shard-tglu:         NOTRUN -> [SKIP][216] +57 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][217] ([i915#6095]) +181 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#12313]) +1 other test skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][219] ([i915#12313]) +3 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#10307] / [i915#6095]) +101 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#12313])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][222] ([i915#12313])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
    - shard-mtlp:         NOTRUN -> [SKIP][223] ([i915#12313])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
    - shard-tglu:         NOTRUN -> [SKIP][224] ([i915#6095]) +74 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][225] ([i915#6095]) +50 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-dp-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][226] ([i915#12805])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][227] ([i915#14544] / [i915#6095]) +6 other tests skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][228] ([i915#14098] / [i915#14544] / [i915#6095]) +4 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][229] ([i915#15582])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][230] ([i915#14098] / [i915#6095]) +46 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][231] ([i915#12313]) +1 other test skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][232] ([i915#6095]) +34 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-7/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][233] ([i915#6095]) +24 other tests skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#6095]) +64 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][235] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#3742])
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-b-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][237] ([i915#13781]) +3 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_cdclk@mode-transition@pipe-b-dp-3.html

  * igt@kms_cdclk@plane-scaling:
    - shard-tglu:         NOTRUN -> [SKIP][238] ([i915#3742])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_cdclk@plane-scaling.html

  * igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][239] ([i915#13783]) +3 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-mtlp:         NOTRUN -> [SKIP][240] +9 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - shard-rkl:          NOTRUN -> [SKIP][241] ([i915#11151] / [i915#7828]) +10 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][242] ([i915#11151] / [i915#7828]) +6 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-mtlp:         NOTRUN -> [SKIP][243] ([i915#11151] / [i915#7828]) +4 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-tglu-1:       NOTRUN -> [SKIP][244] ([i915#11151] / [i915#7828]) +4 other tests skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-dg1:          NOTRUN -> [SKIP][245] ([i915#11151] / [i915#7828]) +4 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
    - shard-tglu:         NOTRUN -> [SKIP][246] ([i915#11151] / [i915#7828]) +7 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-5/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-rkl:          NOTRUN -> [SKIP][247] ([i915#11151] / [i915#14544] / [i915#7828])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_color@deep-color:
    - shard-rkl:          NOTRUN -> [SKIP][248] ([i915#12655] / [i915#3555])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_color@deep-color.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][249] ([i915#15865]) +1 other test skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-dg1:          NOTRUN -> [SKIP][250] ([i915#15865]) +1 other test skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@dp-mst-type-1-suspend-resume:
    - shard-tglu:         NOTRUN -> [SKIP][251] ([i915#15330]) +1 other test skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
    - shard-mtlp:         NOTRUN -> [SKIP][252] ([i915#15330])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-7/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
    - shard-dg2:          NOTRUN -> [SKIP][253] ([i915#15330]) +1 other test skip
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
    - shard-rkl:          NOTRUN -> [SKIP][254] ([i915#15330])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
    - shard-dg1:          NOTRUN -> [SKIP][255] ([i915#15330])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-rkl:          NOTRUN -> [SKIP][256] ([i915#15865]) +3 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@lic-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][257] ([i915#15865])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@suspend-resume:
    - shard-dg2:          NOTRUN -> [SKIP][258] ([i915#15865]) +1 other test skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_content_protection@suspend-resume.html

  * igt@kms_content_protection@type1:
    - shard-tglu:         NOTRUN -> [SKIP][259] ([i915#15865]) +1 other test skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][260] ([i915#13049]) +1 other test skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html
    - shard-mtlp:         NOTRUN -> [SKIP][261] ([i915#13049]) +1 other test skip
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html
    - shard-rkl:          NOTRUN -> [SKIP][262] ([i915#13049] / [i915#14544])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][263] ([i915#13049]) +1 other test skip
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85:
    - shard-tglu:         NOTRUN -> [FAIL][264] ([i915#13566]) +3 other tests fail
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-9/igt@kms_cursor_crc@cursor-onscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][265] ([i915#13566]) +4 other tests fail
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-2.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][266] ([i915#13049])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-64x21@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][267] -> [FAIL][268] ([i915#13566]) +1 other test fail
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-64x21@pipe-a-hdmi-a-1.html
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-64x21@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-dg2:          NOTRUN -> [SKIP][269] ([i915#3555]) +1 other test skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_cursor_crc@cursor-onscreen-max-size.html
    - shard-dg1:          NOTRUN -> [SKIP][270] ([i915#3555]) +4 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-12/igt@kms_cursor_crc@cursor-onscreen-max-size.html
    - shard-tglu:         NOTRUN -> [SKIP][271] ([i915#3555]) +1 other test skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@kms_cursor_crc@cursor-onscreen-max-size.html
    - shard-mtlp:         NOTRUN -> [SKIP][272] ([i915#3555] / [i915#8814])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][273] ([i915#13049]) +2 other tests skip
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@kms_cursor_crc@cursor-random-512x170.html
    - shard-dg1:          NOTRUN -> [SKIP][274] ([i915#13049]) +1 other test skip
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-mtlp:         NOTRUN -> [SKIP][275] ([i915#8814]) +1 other test skip
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][276] ([i915#12358] / [i915#14152] / [i915#7882])
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][277] ([i915#12358] / [i915#14152])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][278] ([i915#13046] / [i915#5354]) +1 other test skip
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
    - shard-mtlp:         NOTRUN -> [SKIP][279] ([i915#9809])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-tglu:         NOTRUN -> [SKIP][280] ([i915#4103])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][281] ([i915#4103])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][282] +24 other tests skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          NOTRUN -> [FAIL][283] ([i915#15804])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-rkl:          NOTRUN -> [SKIP][284] ([i915#9723])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-dg1:          NOTRUN -> [SKIP][285] ([i915#13749])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-mtlp:         NOTRUN -> [SKIP][286] ([i915#13749])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@kms_dp_link_training@uhbr-mst.html
    - shard-rkl:          NOTRUN -> [SKIP][287] ([i915#13748] / [i915#14544])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_dp_link_training@uhbr-mst.html
    - shard-dg1:          NOTRUN -> [SKIP][288] ([i915#13748])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_dp_link_training@uhbr-mst.html
    - shard-tglu:         NOTRUN -> [SKIP][289] ([i915#13748])
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2:          NOTRUN -> [SKIP][290] ([i915#13707])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html
    - shard-rkl:          NOTRUN -> [SKIP][291] ([i915#13707]) +1 other test skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html
    - shard-tglu-1:       NOTRUN -> [SKIP][292] ([i915#13707])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
    - shard-dg1:          NOTRUN -> [SKIP][293] ([i915#13707])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-12/igt@kms_dp_linktrain_fallback@dsc-fallback.html
    - shard-mtlp:         NOTRUN -> [SKIP][294] ([i915#13707])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-rkl:          NOTRUN -> [SKIP][295] ([i915#3840])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-tglu:         NOTRUN -> [SKIP][296] ([i915#3840])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][297] ([i915#3555] / [i915#3840])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_dsc@dsc-with-bpc.html
    - shard-dg1:          NOTRUN -> [SKIP][298] ([i915#3555] / [i915#3840])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@kms_dsc@dsc-with-bpc.html
    - shard-tglu:         NOTRUN -> [SKIP][299] ([i915#3555] / [i915#3840])
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_dsc@dsc-with-bpc.html
    - shard-mtlp:         NOTRUN -> [SKIP][300] ([i915#3555] / [i915#3840])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-dg2:          NOTRUN -> [SKIP][301] ([i915#3555] / [i915#3840]) +1 other test skip
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-dg1:          NOTRUN -> [SKIP][302] ([i915#3469])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@display-2x:
    - shard-dg2:          NOTRUN -> [SKIP][303] ([i915#1839])
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_feature_discovery@display-2x.html
    - shard-rkl:          NOTRUN -> [SKIP][304] ([i915#1839]) +1 other test skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_feature_discovery@display-2x.html
    - shard-tglu-1:       NOTRUN -> [SKIP][305] ([i915#1839])
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@psr1:
    - shard-tglu:         NOTRUN -> [SKIP][306] ([i915#658])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@kms_feature_discovery@psr1.html
    - shard-dg2:          NOTRUN -> [SKIP][307] ([i915#658])
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@kms_feature_discovery@psr1.html
    - shard-rkl:          NOTRUN -> [SKIP][308] ([i915#14544] / [i915#658])
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_feature_discovery@psr1.html
    - shard-dg1:          NOTRUN -> [SKIP][309] ([i915#658])
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][310] ([i915#3637] / [i915#9934]) +9 other tests skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
    - shard-mtlp:         NOTRUN -> [SKIP][311] ([i915#3637] / [i915#9934]) +3 other tests skip
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][312] ([i915#3637] / [i915#9934]) +4 other tests skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-tglu:         NOTRUN -> [SKIP][313] ([i915#9934])
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-9/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-flip-vs-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][314] ([i915#8381])
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@kms_flip@2x-flip-vs-fences-interruptible.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-dg2:          NOTRUN -> [SKIP][315] ([i915#9934]) +3 other tests skip
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][316] ([i915#12745] / [i915#4839])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][317] ([i915#12745] / [i915#4839])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][318] ([i915#12745])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk4/igt@kms_flip@2x-flip-vs-suspend-interruptible@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][319] ([i915#12745])
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_flip@2x-flip-vs-suspend@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][320] ([i915#14544] / [i915#9934]) +1 other test skip
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
    - shard-dg1:          NOTRUN -> [SKIP][321] ([i915#9934]) +4 other tests skip
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-rkl:          NOTRUN -> [SKIP][322] ([i915#9934]) +5 other tests skip
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][323] ([i915#12314] / [i915#12745] / [i915#4839])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][324] ([i915#12314] / [i915#12745])
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][325] ([i915#6113]) +1 other test incomplete
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate@a-vga1:
    - shard-snb:          [PASS][326] -> [FAIL][327] ([i915#14600]) +1 other test fail
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-snb5/igt@kms_flip@plain-flip-fb-recreate@a-vga1.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-snb1/igt@kms_flip@plain-flip-fb-recreate@a-vga1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
    - shard-dg2:          NOTRUN -> [SKIP][328] ([i915#15643]) +1 other test skip
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][329] ([i915#15643] / [i915#5190]) +1 other test skip
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
    - shard-tglu:         NOTRUN -> [SKIP][330] ([i915#15643]) +4 other tests skip
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
    - shard-mtlp:         NOTRUN -> [SKIP][331] ([i915#3555] / [i915#8810] / [i915#8813])
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][332] ([i915#8810] / [i915#8813])
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][333] ([i915#15643]) +5 other tests skip
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
    - shard-tglu-1:       NOTRUN -> [SKIP][334] ([i915#15643]) +2 other tests skip
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-upscaling:
    - shard-glk10:        NOTRUN -> [SKIP][335] +101 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][336] ([i915#14544] / [i915#15643])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
    - shard-dg1:          NOTRUN -> [SKIP][337] ([i915#15643]) +3 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
    - shard-mtlp:         NOTRUN -> [SKIP][338] ([i915#15643]) +1 other test skip
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][339] ([i915#15104]) +2 other tests skip
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
    - shard-dg1:          NOTRUN -> [SKIP][340] ([i915#15104]) +1 other test skip
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][341] ([i915#15104])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][342] ([i915#8708]) +11 other tests skip
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][343] ([i915#5354]) +21 other tests skip
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][344] +25 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][345] ([i915#1825]) +39 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][346] ([i915#10056])
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk11/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][347] ([i915#15102]) +3 other tests skip
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt.html
    - shard-dg1:          NOTRUN -> [SKIP][348] ([i915#15102]) +3 other tests skip
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][349] ([i915#15102]) +6 other tests skip
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][350] ([i915#8708]) +11 other tests skip
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
    - shard-snb:          NOTRUN -> [SKIP][351] +154 other tests skip
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-snb7/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html
    - shard-dg1:          NOTRUN -> [SKIP][352] ([i915#15102] / [i915#3458]) +13 other tests skip
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][353] ([i915#15102] / [i915#3023]) +29 other tests skip
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][354] ([i915#14544] / [i915#15102] / [i915#3023])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][355] ([i915#10055])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
    - shard-mtlp:         NOTRUN -> [SKIP][356] ([i915#10055])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-tglu-1:       NOTRUN -> [SKIP][357] ([i915#15102]) +6 other tests skip
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][358] ([i915#15102] / [i915#3458]) +17 other tests skip
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][359] ([i915#1825]) +8 other tests skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][360] ([i915#15102]) +26 other tests skip
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][361] ([i915#8708]) +4 other tests skip
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][362] ([i915#12713])
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][363] ([i915#3555] / [i915#8228])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][364] ([i915#3555] / [i915#8228])
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_hdr@static-toggle-suspend.html
    - shard-tglu:         NOTRUN -> [SKIP][365] ([i915#3555] / [i915#8228]) +1 other test skip
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_hdr@static-toggle-suspend@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [ABORT][366] ([i915#15132])
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_hdr@static-toggle-suspend@pipe-a-dp-3.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][367] ([i915#15460])
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][368] ([i915#15459])
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][369] ([i915#13688])
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_joiner@basic-max-non-joiner.html
    - shard-mtlp:         NOTRUN -> [SKIP][370] ([i915#13688])
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_joiner@basic-max-non-joiner.html
    - shard-dg2:          NOTRUN -> [SKIP][371] ([i915#13688])
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-1/igt@kms_joiner@basic-max-non-joiner.html
    - shard-rkl:          NOTRUN -> [SKIP][372] ([i915#13688])
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_joiner@basic-max-non-joiner.html
    - shard-dg1:          NOTRUN -> [SKIP][373] ([i915#13688])
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][374] ([i915#15460])
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-3/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-rkl:          NOTRUN -> [SKIP][375] ([i915#14544] / [i915#6301])
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_panel_fitting@atomic-fastset.html
    - shard-tglu:         NOTRUN -> [SKIP][376] ([i915#6301])
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-dg1:          NOTRUN -> [SKIP][377] ([i915#15709]) +2 other tests skip
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-tglu:         NOTRUN -> [SKIP][378] ([i915#15709]) +1 other test skip
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
    - shard-rkl:          NOTRUN -> [SKIP][379] ([i915#15709]) +2 other tests skip
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping:
    - shard-tglu-1:       NOTRUN -> [SKIP][380] ([i915#15709]) +1 other test skip
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-dg2:          NOTRUN -> [SKIP][381] ([i915#15709]) +3 other tests skip
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping:
    - shard-mtlp:         NOTRUN -> [SKIP][382] ([i915#15709])
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-3/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-a-plane-5:
    - shard-rkl:          NOTRUN -> [SKIP][383] ([i915#15608]) +1 other test skip
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7:
    - shard-tglu:         NOTRUN -> [SKIP][384] ([i915#15608]) +1 other test skip
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-modifier@pipe-a-plane-7.html

  * igt@kms_plane@pixel-format-y-tiled-modifier@pipe-b-plane-7:
    - shard-tglu-1:       NOTRUN -> [SKIP][385] ([i915#15608]) +1 other test skip
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_plane@pixel-format-y-tiled-modifier@pipe-b-plane-7.html
    - shard-dg1:          NOTRUN -> [SKIP][386] ([i915#15608]) +1 other test skip
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@kms_plane@pixel-format-y-tiled-modifier@pipe-b-plane-7.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb:
    - shard-glk:          NOTRUN -> [FAIL][387] ([i915#10647] / [i915#12177])
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk9/igt@kms_plane_alpha_blend@alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@constant-alpha-max:
    - shard-glk:          NOTRUN -> [FAIL][388] ([i915#10647] / [i915#12169])
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk5/igt@kms_plane_alpha_blend@constant-alpha-max.html

  * igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][389] ([i915#10647]) +3 other tests fail
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk5/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1.html

  * igt@kms_plane_lowres@tiling-4:
    - shard-mtlp:         NOTRUN -> [SKIP][390] ([i915#10226] / [i915#11614] / [i915#3555] / [i915#8821])
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@kms_plane_lowres@tiling-4.html

  * igt@kms_plane_lowres@tiling-4@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][391] ([i915#11614] / [i915#3582]) +3 other tests skip
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@kms_plane_lowres@tiling-4@pipe-c-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-rkl:          NOTRUN -> [SKIP][392] ([i915#13958]) +1 other test skip
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-tglu-1:       NOTRUN -> [SKIP][393] ([i915#13958])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_plane_multiple@2x-tiling-yf.html
    - shard-dg2:          NOTRUN -> [SKIP][394] ([i915#13958])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][395] ([i915#14259])
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html
    - shard-dg1:          NOTRUN -> [SKIP][396] ([i915#14259])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_plane_multiple@tiling-yf.html
    - shard-tglu:         NOTRUN -> [SKIP][397] ([i915#14259])
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_plane_multiple@tiling-yf.html
    - shard-mtlp:         NOTRUN -> [SKIP][398] ([i915#14259])
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_plane_multiple@tiling-yf.html
    - shard-dg2:          NOTRUN -> [SKIP][399] ([i915#14259])
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-rkl:          [PASS][400] -> [SKIP][401] ([i915#6953])
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size.html
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-a:
    - shard-glk11:        NOTRUN -> [SKIP][402] +60 other tests skip
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk11/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
    - shard-tglu-1:       NOTRUN -> [SKIP][403] ([i915#15329]) +4 other tests skip
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-dg2:          [PASS][404] -> [SKIP][405] ([i915#9423]) +1 other test skip
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d:
    - shard-dg1:          NOTRUN -> [SKIP][406] ([i915#15329]) +9 other tests skip
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-18/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-mtlp:         NOTRUN -> [SKIP][407] ([i915#15329] / [i915#3555] / [i915#6953])
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-mtlp:         NOTRUN -> [SKIP][408] ([i915#15329]) +3 other tests skip
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-rkl:          NOTRUN -> [SKIP][409] ([i915#5354])
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][410] ([i915#9812]) +1 other test skip
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][411] ([i915#5354]) +1 other test skip
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-19/igt@kms_pm_backlight@fade-with-suspend.html
    - shard-tglu:         NOTRUN -> [SKIP][412] ([i915#9812])
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-rkl:          NOTRUN -> [SKIP][413] ([i915#14544] / [i915#3828])
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         NOTRUN -> [FAIL][414] ([i915#15752])
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][415] ([i915#3828])
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-tglu:         NOTRUN -> [SKIP][416] ([i915#8430])
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-dg2:          [PASS][417] -> [SKIP][418] ([i915#15073])
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@kms_pm_rpm@dpms-lpsp.html
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_pm_rpm@dpms-lpsp.html
    - shard-rkl:          [PASS][419] -> [SKIP][420] ([i915#15073])
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-tglu-1:       NOTRUN -> [SKIP][421] ([i915#15073])
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          NOTRUN -> [SKIP][422] ([i915#15073]) +1 other test skip
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-tglu:         NOTRUN -> [SKIP][423] ([i915#15073]) +1 other test skip
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-9/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-mtlp:         NOTRUN -> [SKIP][424] ([i915#15073])
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@package-g7:
    - shard-mtlp:         NOTRUN -> [SKIP][425] ([i915#15403])
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_pm_rpm@package-g7.html
    - shard-dg2:          NOTRUN -> [SKIP][426] ([i915#15403])
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@kms_pm_rpm@package-g7.html
    - shard-rkl:          NOTRUN -> [SKIP][427] ([i915#15403])
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_pm_rpm@package-g7.html
    - shard-tglu-1:       NOTRUN -> [SKIP][428] ([i915#15403])
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_pm_rpm@package-g7.html
    - shard-dg1:          NOTRUN -> [SKIP][429] ([i915#15403])
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@kms_pm_rpm@package-g7.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-rkl:          [PASS][430] -> [INCOMPLETE][431] ([i915#14419])
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@kms_pm_rpm@system-suspend-modeset.html
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][432] ([i915#6524])
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-tglu-1:       NOTRUN -> [SKIP][433] ([i915#6524])
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_properties@get_properties-sanity-atomic:
    - shard-dg1:          [PASS][434] -> [DMESG-WARN][435] ([i915#4423]) +1 other test dmesg-warn
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg1-15/igt@kms_properties@get_properties-sanity-atomic.html
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_properties@get_properties-sanity-atomic.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][436] ([i915#11520]) +6 other tests skip
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][437] ([i915#11520]) +2 other tests skip
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html
    - shard-snb:          NOTRUN -> [SKIP][438] ([i915#11520]) +1 other test skip
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-snb4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html
    - shard-mtlp:         NOTRUN -> [SKIP][439] ([i915#12316]) +1 other test skip
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][440] ([i915#11520]) +6 other tests skip
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][441] ([i915#11520]) +3 other tests skip
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-rkl:          NOTRUN -> [SKIP][442] ([i915#11520] / [i915#14544]) +1 other test skip
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
    - shard-glk11:        NOTRUN -> [SKIP][443] ([i915#11520])
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk11/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-dg1:          NOTRUN -> [SKIP][444] ([i915#11520]) +3 other tests skip
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-15/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-glk10:        NOTRUN -> [SKIP][445] ([i915#11520]) +2 other tests skip
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][446] ([i915#11520]) +11 other tests skip
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk3/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglu:         NOTRUN -> [SKIP][447] ([i915#9683])
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-4/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-sprite-render:
    - shard-tglu-1:       NOTRUN -> [SKIP][448] ([i915#9732]) +8 other tests skip
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_psr@fbc-pr-sprite-render.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-dg2:          NOTRUN -> [SKIP][449] ([i915#1072] / [i915#9732]) +15 other tests skip
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_psr@fbc-psr-cursor-plane-move.html
    - shard-rkl:          NOTRUN -> [SKIP][450] ([i915#1072] / [i915#9732]) +21 other tests skip
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr@fbc-psr-primary-page-flip@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][451] ([i915#9688]) +10 other tests skip
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_psr@fbc-psr-primary-page-flip@edp-1.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-dg1:          NOTRUN -> [SKIP][452] ([i915#1072] / [i915#9732]) +13 other tests skip
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@fbc-psr2-cursor-mmap-gtt:
    - shard-glk:          NOTRUN -> [SKIP][453] +448 other tests skip
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk6/igt@kms_psr@fbc-psr2-cursor-mmap-gtt.html

  * igt@kms_psr@pr-sprite-plane-move:
    - shard-tglu:         NOTRUN -> [SKIP][454] ([i915#9732]) +18 other tests skip
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@kms_psr@pr-sprite-plane-move.html

  * igt@kms_psr@psr-primary-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][455] ([i915#1072] / [i915#14544] / [i915#9732]) +1 other test skip
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_psr@psr-primary-mmap-cpu.html

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-glk:          NOTRUN -> [INCOMPLETE][456] ([i915#15492])
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk3/igt@kms_rotation_crc@multiplane-rotation.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-dg1:          NOTRUN -> [SKIP][457] ([i915#5289]) +2 other tests skip
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2:          NOTRUN -> [SKIP][458] ([i915#12755] / [i915#15867] / [i915#5190])
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
    - shard-rkl:          NOTRUN -> [SKIP][459] ([i915#5289]) +1 other test skip
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
    - shard-tglu:         NOTRUN -> [SKIP][460] ([i915#5289]) +1 other test skip
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
    - shard-mtlp:         NOTRUN -> [SKIP][461] ([i915#12755] / [i915#15867])
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-rkl:          NOTRUN -> [SKIP][462] ([i915#3555]) +3 other tests skip
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_scaling_modes@scaling-mode-none.html
    - shard-tglu-1:       NOTRUN -> [SKIP][463] ([i915#3555]) +2 other tests skip
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-1/igt@kms_scaling_modes@scaling-mode-none.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-tglu:         NOTRUN -> [SKIP][464] ([i915#8623])
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][465] ([i915#12276]) +1 other test incomplete
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk2/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          NOTRUN -> [SKIP][466] ([i915#11920])
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-1/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-tglu:         NOTRUN -> [SKIP][467] ([i915#9906])
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_vrr@max-min.html

  * igt@kms_vrr@negative-basic:
    - shard-tglu:         NOTRUN -> [SKIP][468] ([i915#3555] / [i915#9906])
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-6/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-rkl:          NOTRUN -> [SKIP][469] ([i915#9906])
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][470] ([i915#2436])
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@global-sseu-config-invalid:
    - shard-mtlp:         NOTRUN -> [SKIP][471] ([i915#7387])
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-7/igt@perf@global-sseu-config-invalid.html
    - shard-dg2:          NOTRUN -> [SKIP][472] ([i915#7387])
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@perf@global-sseu-config-invalid.html

  * igt@perf@mi-rpc:
    - shard-dg2:          NOTRUN -> [SKIP][473] ([i915#2434])
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-6/igt@perf@mi-rpc.html
    - shard-rkl:          NOTRUN -> [SKIP][474] ([i915#2434])
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@perf@mi-rpc.html
    - shard-dg1:          NOTRUN -> [SKIP][475] ([i915#2434])
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@perf@mi-rpc.html
    - shard-mtlp:         NOTRUN -> [SKIP][476] ([i915#2434])
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@perf@mi-rpc.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][477] ([i915#2433])
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@busy-idle@bcs0:
    - shard-mtlp:         [PASS][478] -> [FAIL][479] ([i915#4349]) +2 other tests fail
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-2/igt@perf_pmu@busy-idle@bcs0.html
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@perf_pmu@busy-idle@bcs0.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          [PASS][480] -> [ABORT][481] ([i915#15131])
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-3/igt@perf_pmu@rc6-suspend.html
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-1/igt@perf_pmu@rc6-suspend.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-rkl:          NOTRUN -> [SKIP][482] ([i915#8516])
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@basic-fence-read:
    - shard-dg1:          NOTRUN -> [SKIP][483] ([i915#3708])
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-13/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][484] ([i915#3708])
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@prime_vgem@coherency-gtt.html

  * igt@sriov_basic@bind-unbind-vf@vf-4:
    - shard-tglu:         NOTRUN -> [FAIL][485] ([i915#12910]) +10 other tests fail
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-2/igt@sriov_basic@bind-unbind-vf@vf-4.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-rkl:          NOTRUN -> [SKIP][486] ([i915#9917]) +2 other tests skip
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@sriov_basic@enable-vfs-autoprobe-off.html

  
#### Possible fixes ####

  * igt@gem_eio@suspend:
    - shard-dg2:          [ABORT][487] ([i915#15131]) -> [PASS][488]
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-10/igt@gem_eio@suspend.html
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-7/igt@gem_eio@suspend.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - shard-tglu:         [ABORT][489] ([i915#15652]) -> [PASS][490] +1 other test pass
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-7/igt@gem_exec_suspend@basic-s3@smem.html
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-tglu:         [FAIL][491] -> [PASS][492] +1 other test pass
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-2/igt@gem_exec_suspend@basic-s4-devices.html
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-5/igt@gem_exec_suspend@basic-s4-devices.html
    - shard-mtlp:         [FAIL][493] ([i915#15762]) -> [PASS][494] +1 other test pass
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-2/igt@gem_exec_suspend@basic-s4-devices.html
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-6/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_pm_rpm@sysfs-read:
    - shard-dg1:          [DMESG-WARN][495] ([i915#4423]) -> [PASS][496] +1 other test pass
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg1-12/igt@i915_pm_rpm@sysfs-read.html
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@i915_pm_rpm@sysfs-read.html

  * igt@i915_selftest@live:
    - shard-mtlp:         [DMESG-FAIL][497] ([i915#12061] / [i915#15560]) -> [PASS][498]
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-1/igt@i915_selftest@live.html
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - shard-mtlp:         [DMESG-FAIL][499] ([i915#12061]) -> [PASS][500]
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-1/igt@i915_selftest@live@workarounds.html
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@forcewake:
    - shard-rkl:          [INCOMPLETE][501] ([i915#4817]) -> [PASS][502]
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@i915_suspend@forcewake.html
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@i915_suspend@forcewake.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-dg2:          [FAIL][503] ([i915#5956]) -> [PASS][504] +1 other test pass
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1:
    - shard-mtlp:         [FAIL][505] ([i915#5956]) -> [PASS][506] +1 other test pass
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][507] ([i915#15662]) -> [PASS][508] +3 other tests pass
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-9/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-7/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          [INCOMPLETE][509] ([i915#15582]) -> [PASS][510]
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-glk8/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
    - shard-rkl:          [INCOMPLETE][511] ([i915#15582]) -> [PASS][512]
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html

  * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][513] ([i915#13566]) -> [PASS][514] +1 other test pass
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-tglu-2/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
   [514]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-tglu-8/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-rkl:          [ABORT][515] ([i915#15132]) -> [PASS][516]
   [515]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [516]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_hdr@bpc-switch:
    - shard-rkl:          [SKIP][517] ([i915#3555] / [i915#8228]) -> [PASS][518]
   [517]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_hdr@bpc-switch.html
   [518]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane_cursor@overlay:
    - shard-rkl:          [FAIL][519] ([i915#15912]) -> [PASS][520]
   [519]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_plane_cursor@overlay.html
   [520]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_plane_cursor@overlay.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg2:          [SKIP][521] ([i915#15073]) -> [PASS][522] +1 other test pass
   [521]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [522]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
    - shard-dg1:          [SKIP][523] ([i915#15073]) -> [PASS][524] +2 other tests pass
   [523]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg1-16/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [524]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [SKIP][525] ([i915#15073]) -> [PASS][526]
   [525]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [526]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-snb:          [FAIL][527] ([i915#15106]) -> [PASS][528] +1 other test pass
   [527]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-snb5/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
   [528]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-snb6/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  * igt@perf_pmu@busy-accuracy-50@rcs0:
    - shard-glk:          [FAIL][529] ([i915#4349]) -> [PASS][530] +2 other tests pass
   [529]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-glk6/igt@perf_pmu@busy-accuracy-50@rcs0.html
   [530]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk6/igt@perf_pmu@busy-accuracy-50@rcs0.html

  
#### Warnings ####

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-rkl:          [SKIP][531] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][532] ([i915#3555] / [i915#9323])
   [531]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_ccs@ctrl-surf-copy.html
   [532]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-rkl:          [SKIP][533] ([i915#9323]) -> [SKIP][534] ([i915#14544] / [i915#9323])
   [533]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
   [534]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_create@create-ext-set-pat:
    - shard-rkl:          [SKIP][535] ([i915#8562]) -> [SKIP][536] ([i915#14544] / [i915#8562])
   [535]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-3/igt@gem_create@create-ext-set-pat.html
   [536]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-dg2:          [SKIP][537] ([i915#280]) -> [SKIP][538] ([i915#2575])
   [537]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@gem_ctx_sseu@mmap-args.html
   [538]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-rkl:          [SKIP][539] ([i915#14544] / [i915#4525]) -> [SKIP][540] ([i915#4525])
   [539]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_exec_balancer@parallel-keep-in-fence.html
   [540]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          [SKIP][541] ([i915#3281]) -> [SKIP][542] ([i915#2575])
   [541]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
   [542]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
    - shard-rkl:          [SKIP][543] ([i915#3281]) -> [SKIP][544] ([i915#14544] / [i915#3281]) +4 other tests skip
   [543]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
   [544]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-rkl:          [SKIP][545] ([i915#14544] / [i915#3281]) -> [SKIP][546] ([i915#3281]) +3 other tests skip
   [545]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_exec_reloc@basic-softpin.html
   [546]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_exec_schedule@preempt-queue-chain:
    - shard-dg2:          [SKIP][547] ([i915#4537] / [i915#4812]) -> [SKIP][548] ([i915#2575])
   [547]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_exec_schedule@preempt-queue-chain.html
   [548]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_exec_schedule@preempt-queue-chain.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          [SKIP][549] ([i915#7276]) -> [SKIP][550] ([i915#14544] / [i915#7276])
   [549]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@gem_exec_schedule@semaphore-power.html
   [550]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-rkl:          [FAIL][551] -> [ABORT][552] ([i915#7975]) +1 other test abort
   [551]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@gem_exec_suspend@basic-s4-devices.html
   [552]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          [SKIP][553] ([i915#14544] / [i915#4613]) -> [SKIP][554] ([i915#4613]) +1 other test skip
   [553]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-random.html
   [554]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-rkl:          [SKIP][555] ([i915#4613]) -> [SKIP][556] ([i915#14544] / [i915#4613])
   [555]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@gem_lmem_swapping@parallel-multi.html
   [556]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_mmap@basic-small-bo:
    - shard-dg2:          [SKIP][557] ([i915#4083]) -> [SKIP][558] ([i915#2575])
   [557]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@gem_mmap@basic-small-bo.html
   [558]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_mmap@basic-small-bo.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-dg2:          [SKIP][559] ([i915#4077]) -> [SKIP][560] ([i915#2575]) +1 other test skip
   [559]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
   [560]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-rkl:          [SKIP][561] ([i915#14544] / [i915#3282]) -> [SKIP][562] ([i915#3282]) +2 other tests skip
   [561]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_partial_pwrite_pread@reads-uncached.html
   [562]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_pread@display:
    - shard-dg2:          [SKIP][563] ([i915#3282]) -> [SKIP][564] ([i915#2575])
   [563]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_pread@display.html
   [564]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_pread@display.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-dg2:          [SKIP][565] ([i915#4270]) -> [SKIP][566] ([i915#2575])
   [565]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
   [566]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
    - shard-dg2:          [SKIP][567] ([i915#5190] / [i915#8428]) -> [SKIP][568] ([i915#2575] / [i915#5190])
   [567]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html
   [568]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          [SKIP][569] ([i915#14544] / [i915#8411]) -> [SKIP][570] ([i915#8411])
   [569]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
   [570]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_userptr_blits@relocations:
    - shard-dg2:          [SKIP][571] ([i915#3281] / [i915#3297]) -> [SKIP][572] ([i915#2575])
   [571]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_userptr_blits@relocations.html
   [572]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg2:          [SKIP][573] ([i915#3297]) -> [SKIP][574] ([i915#2575])
   [573]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@gem_userptr_blits@unsync-overlap.html
   [574]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_userptr_blits@unsync-unmap:
    - shard-rkl:          [SKIP][575] ([i915#14544] / [i915#3297]) -> [SKIP][576] ([i915#3297])
   [575]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gem_userptr_blits@unsync-unmap.html
   [576]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@gem_userptr_blits@unsync-unmap.html

  * igt@gen3_render_linear_blits:
    - shard-dg2:          [SKIP][577] -> [SKIP][578] ([i915#2575])
   [577]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@gen3_render_linear_blits.html
   [578]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gen3_render_linear_blits.html

  * igt@gen9_exec_parse@bb-start-out:
    - shard-dg2:          [SKIP][579] ([i915#2856]) -> [SKIP][580] ([i915#2575])
   [579]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@gen9_exec_parse@bb-start-out.html
   [580]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@gen9_exec_parse@bb-start-out.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-rkl:          [SKIP][581] ([i915#14544] / [i915#2527]) -> [SKIP][582] ([i915#2527])
   [581]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@gen9_exec_parse@valid-registers.html
   [582]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-rkl:          [SKIP][583] ([i915#14544] / [i915#8399]) -> [SKIP][584] ([i915#8399])
   [583]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@i915_pm_freq_api@freq-reset.html
   [584]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rc6_residency@media-rc6-accuracy:
    - shard-rkl:          [SKIP][585] -> [SKIP][586] ([i915#14544]) +7 other tests skip
   [585]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-7/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
   [586]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@i915_pm_rc6_residency@media-rc6-accuracy.html

  * igt@i915_pm_sseu@full-enable:
    - shard-rkl:          [SKIP][587] ([i915#14544] / [i915#4387]) -> [SKIP][588] ([i915#4387])
   [587]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@i915_pm_sseu@full-enable.html
   [588]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@i915_pm_sseu@full-enable.html

  * igt@intel_hwmon@hwmon-write:
    - shard-rkl:          [SKIP][589] ([i915#14544] / [i915#7707]) -> [SKIP][590] ([i915#7707])
   [589]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@intel_hwmon@hwmon-write.html
   [590]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-rkl:          [SKIP][591] ([i915#14544] / [i915#5286]) -> [SKIP][592] ([i915#5286]) +1 other test skip
   [591]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_big_fb@4-tiled-addfb.html
   [592]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-rkl:          [SKIP][593] ([i915#5286]) -> [SKIP][594] ([i915#14544] / [i915#5286])
   [593]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [594]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-rkl:          [SKIP][595] ([i915#3638]) -> [SKIP][596] ([i915#14544] / [i915#3638]) +1 other test skip
   [595]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_big_fb@linear-32bpp-rotate-270.html
   [596]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-rkl:          [SKIP][597] ([i915#14544] / [i915#3638]) -> [SKIP][598] ([i915#3638])
   [597]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
   [598]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-rkl:          [SKIP][599] ([i915#14544]) -> [SKIP][600] +3 other tests skip
   [599]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
   [600]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-dg2:          [SKIP][601] ([i915#4538] / [i915#5190]) -> [SKIP][602] ([i915#5190]) +2 other tests skip
   [601]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [602]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc:
    - shard-dg2:          [SKIP][603] ([i915#10307] / [i915#6095]) -> [SKIP][604] +1 other test skip
   [603]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc.html
   [604]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs:
    - shard-rkl:          [SKIP][605] ([i915#14098] / [i915#6095]) -> [SKIP][606] ([i915#14098] / [i915#14544] / [i915#6095]) +8 other tests skip
   [605]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs.html
   [606]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs.html

  * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          [SKIP][607] ([i915#6095]) -> [SKIP][608] ([i915#14544] / [i915#6095]) +4 other tests skip
   [607]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html
   [608]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-dg2:          [SKIP][609] ([i915#12313]) -> [SKIP][610] +1 other test skip
   [609]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
   [610]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][611] ([i915#14544] / [i915#6095]) -> [SKIP][612] ([i915#6095]) +2 other tests skip
   [611]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2.html
   [612]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][613] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][614] ([i915#14098] / [i915#6095]) +6 other tests skip
   [613]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-c-hdmi-a-2.html
   [614]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-rkl:          [SKIP][615] ([i915#12313]) -> [SKIP][616] ([i915#12313] / [i915#14544]) +1 other test skip
   [615]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
   [616]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2:          [SKIP][617] ([i915#13784]) -> [SKIP][618]
   [617]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@kms_cdclk@mode-transition-all-outputs.html
   [618]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-rkl:          [SKIP][619] ([i915#3742]) -> [SKIP][620] ([i915#14544] / [i915#3742])
   [619]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@kms_cdclk@mode-transition-all-outputs.html
   [620]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-rkl:          [SKIP][621] ([i915#11151] / [i915#7828]) -> [SKIP][622] ([i915#11151] / [i915#14544] / [i915#7828]) +1 other test skip
   [621]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-3/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
   [622]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_edid@dp-mode-timings:
    - shard-rkl:          [SKIP][623] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][624] ([i915#11151] / [i915#7828]) +2 other tests skip
   [623]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_chamelium_edid@dp-mode-timings.html
   [624]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_chamelium_edid@dp-mode-timings.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-rkl:          [SKIP][625] ([i915#15330] / [i915#3116]) -> [SKIP][626] ([i915#14544] / [i915#15330] / [i915#3116])
   [625]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@kms_content_protection@dp-mst-lic-type-0.html
   [626]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-rkl:          [SKIP][627] ([i915#14544] / [i915#15330] / [i915#3116]) -> [SKIP][628] ([i915#15330] / [i915#3116])
   [627]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_content_protection@dp-mst-type-1.html
   [628]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-rkl:          [SKIP][629] ([i915#14544] / [i915#15865]) -> [SKIP][630] ([i915#15865])
   [629]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_content_protection@legacy.html
   [630]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-0:
    - shard-rkl:          [SKIP][631] ([i915#15865]) -> [SKIP][632] ([i915#14544] / [i915#15865])
   [631]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_content_protection@lic-type-0.html
   [632]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-rkl:          [SKIP][633] ([i915#3555]) -> [SKIP][634] ([i915#14544] / [i915#3555])
   [633]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
   [634]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-rkl:          [SKIP][635] ([i915#13049]) -> [SKIP][636] ([i915#13049] / [i915#14544])
   [635]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_cursor_crc@cursor-sliding-512x512.html
   [636]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-rkl:          [SKIP][637] ([i915#14544] / [i915#9067]) -> [SKIP][638] ([i915#9067])
   [637]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
   [638]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-rkl:          [SKIP][639] ([i915#3555] / [i915#3840]) -> [SKIP][640] ([i915#14544] / [i915#3555] / [i915#3840])
   [639]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_dsc@dsc-with-output-formats.html
   [640]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-rkl:          [SKIP][641] ([i915#14544] / [i915#3840] / [i915#9053]) -> [SKIP][642] ([i915#3840] / [i915#9053])
   [641]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
   [642]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-8/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          [SKIP][643] ([i915#3955]) -> [SKIP][644] ([i915#14544] / [i915#3955])
   [643]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-2/igt@kms_fbcon_fbt@psr-suspend.html
   [644]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-rkl:          [SKIP][645] ([i915#14544] / [i915#9934]) -> [SKIP][646] ([i915#9934]) +2 other tests skip
   [645]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [646]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-1/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-rkl:          [SKIP][647] ([i915#9934]) -> [SKIP][648] ([i915#14544] / [i915#9934]) +1 other test skip
   [647]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-5/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [648]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-glk:          [INCOMPLETE][649] ([i915#12745] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][650] ([i915#12745] / [i915#4839])
   [649]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-glk3/igt@kms_flip@flip-vs-suspend.html
   [650]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
    - shard-glk:          [INCOMPLETE][651] ([i915#12745] / [i915#6113]) -> [INCOMPLETE][652] ([i915#12745])
   [651]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-glk3/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html
   [652]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-glk6/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
    - shard-rkl:          [SKIP][653] ([i915#14544] / [i915#15643]) -> [SKIP][654] ([i915#15643])
   [653]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
   [654]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
    - shard-dg2:          [SKIP][655] ([i915#15643]) -> [SKIP][656]
   [655]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
   [656]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
    - shard-rkl:          [SKIP][657] ([i915#15643]) -> [SKIP][658] ([i915#14544] / [i915#15643]) +1 other test skip
   [657]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
   [658]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-dg2:          [SKIP][659] ([i915#15643] / [i915#5190]) -> [SKIP][660] ([i915#5190])
   [659]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
   [660]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_force_connector_basic@force-load-detect:
    - shard-mtlp:         [SKIP][661] ([i915#15672]) -> [SKIP][662]
   [661]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-1/igt@kms_force_connector_basic@force-load-detect.html
   [662]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-2/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
    - shard-rkl:          [SKIP][663] ([i915#15102]) -> [SKIP][664] ([i915#14544] / [i915#15102])
   [663]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
   [664]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2:          [SKIP][665] ([i915#15102] / [i915#3458]) -> [SKIP][666] +2 other tests skip
   [665]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt.html
   [666]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt:
    - shard-dg2:          [SKIP][667] ([i915#5354]) -> [SKIP][668] +6 other tests skip
   [667]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html
   [668]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-cpu:
    - shard-rkl:          [SKIP][669] ([i915#14544] / [i915#1825]) -> [SKIP][670] ([i915#1825]) +9 other tests skip
   [669]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html
   [670]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff:
    - shard-rkl:          [SKIP][671] ([i915#1825]) -> [SKIP][672] ([i915#14544] / [i915#1825]) +16 other tests skip
   [671]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html
   [672]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-rkl:          [SKIP][673] ([i915#15102] / [i915#3023]) -> [SKIP][674] ([i915#14544] / [i915#15102] / [i915#3023]) +3 other tests skip
   [673]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite.html
   [674]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
    - shard-dg2:          [SKIP][675] ([i915#8708]) -> [SKIP][676] +3 other tests skip
   [675]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
   [676]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          [SKIP][677] ([i915#15102] / [i915#3458]) -> [SKIP][678] ([i915#10433] / [i915#15102] / [i915#3458]) +5 other tests skip
   [677]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [678]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
    - shard-rkl:          [SKIP][679] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][680] ([i915#15102] / [i915#3023]) +3 other tests skip
   [679]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
   [680]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-dg2:          [SKIP][681] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][682] ([i915#15102] / [i915#3458])
   [681]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [682]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-rkl:          [INCOMPLETE][683] ([i915#15436]) -> [SKIP][684] ([i915#3555] / [i915#8228])
   [683]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_hdr@bpc-switch-suspend.html
   [684]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-4/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-mtlp:         [SKIP][685] ([i915#1187] / [i915#12713]) -> [SKIP][686] ([i915#12713])
   [685]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-mtlp-1/igt@kms_hdr@brightness-with-hdr.html
   [686]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-mtlp-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-dg2:          [SKIP][687] ([i915#3555] / [i915#8228]) -> [ABORT][688] ([i915#15132])
   [687]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@kms_hdr@static-toggle-suspend.html
   [688]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-10/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
    - shard-rkl:          [SKIP][689] ([i915#14544] / [i915#15709]) -> [SKIP][690] ([i915#15709])
   [689]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
   [690]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
    - shard-rkl:          [SKIP][691] ([i915#15709]) -> [SKIP][692] ([i915#14544] / [i915#15709])
   [691]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-1/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html
   [692]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-dg1:          [SKIP][693] ([i915#13958] / [i915#4423]) -> [SKIP][694] ([i915#13958])
   [693]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg1-18/igt@kms_plane_multiple@2x-tiling-4.html
   [694]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-17/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-rkl:          [SKIP][695] ([i915#15329] / [i915#3555]) -> [SKIP][696] ([i915#14544] / [i915#15329] / [i915#3555])
   [695]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
   [696]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b:
    - shard-rkl:          [SKIP][697] ([i915#15329]) -> [SKIP][698] ([i915#14544] / [i915#15329]) +2 other tests skip
   [697]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html
   [698]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-dg1:          [SKIP][699] ([i915#3828]) -> [SKIP][700] ([i915#9340])
   [699]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg1-14/igt@kms_pm_lpsp@kms-lpsp.html
   [700]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg1-16/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-dg2:          [SKIP][701] ([i915#11520]) -> [SKIP][702] +1 other test skip
   [701]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
   [702]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
    - shard-rkl:          [SKIP][703] ([i915#11520]) -> [SKIP][704] ([i915#11520] / [i915#14544])
   [703]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
   [704]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
    - shard-rkl:          [SKIP][705] ([i915#11520] / [i915#14544]) -> [SKIP][706] ([i915#11520]) +2 other tests skip
   [705]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html
   [706]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-psr-dpms:
    - shard-dg2:          [SKIP][707] ([i915#1072] / [i915#9732]) -> [SKIP][708] +3 other tests skip
   [707]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-dg2-7/igt@kms_psr@fbc-psr-dpms.html
   [708]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-dg2-8/igt@kms_psr@fbc-psr-dpms.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-rkl:          [SKIP][709] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][710] ([i915#1072] / [i915#9732]) +4 other tests skip
   [709]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@kms_psr@fbc-psr2-sprite-render.html
   [710]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-5/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_psr@psr-cursor-mmap-cpu:
    - shard-rkl:          [SKIP][711] ([i915#1072] / [i915#9732]) -> [SKIP][712] ([i915#1072] / [i915#14544] / [i915#9732]) +4 other tests skip
   [711]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-4/igt@kms_psr@psr-cursor-mmap-cpu.html
   [712]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-6/igt@kms_psr@psr-cursor-mmap-cpu.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-rkl:          [SKIP][713] ([i915#14544] / [i915#2435]) -> [SKIP][714] ([i915#2435])
   [713]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18306/shard-rkl-6/igt@perf@per-context-mode-unprivileged.html
   [714]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/shard-rkl-7/igt@perf@per-context-mode-unprivileged.html

  
  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
  [i915#10226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10226
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11614]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11614
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
  [i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177
  [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
  [i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
  [i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
  [i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13196
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
  [i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
  [i915#13784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13784
  [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
  [i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
  [i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
  [i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
  [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
  [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
  [i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
  [i915#15436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15436
  [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
  [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
  [i915#15481]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15481
  [i915#15492]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15492
  [i915#15560]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15560
  [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
  [i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
  [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
  [i915#15652]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15652
  [i915#15662]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15662
  [i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
  [i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
  [i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
  [i915#15752]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15752
  [i915#15762]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15762
  [i915#15804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15804
  [i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
  [i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
  [i915#15912]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15912
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
  [i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
  [i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4958
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_8852 -> IGTPW_14959
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_18306: 97d8833ffba6bd3d6aaa51169069620ac17a2e37 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_14959: c1f34a1b187591ec75cd48940468ed10b720427d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8852: 8852
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14959/index.html

[-- Attachment #2: Type: text/html, Size: 227340 bytes --]