* [PATCH i-g-t v2 0/2] Add engine activity tests for functions
@ 2025-03-12 6:24 Riana Tauro
2025-03-12 6:24 ` [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions Riana Tauro
` (5 more replies)
0 siblings, 6 replies; 11+ messages in thread
From: Riana Tauro @ 2025-03-12 6:24 UTC (permalink / raw)
To: igt-dev
Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa,
lucas.demarchi, michal.wajdeczko, soham.purkait
Add engine activity tests for PF and VF's. Provision the PF and VF's
with execution quantum and sched policy and run workload on functions.
Add two tests
all-fn-engine-activity-load : Run workload on all functions
simultaneously and validate that all engines are equally
and fully loaded.
fn-engine-activity-load: Run workload on one function at a time.
With sched_if_idle set to false, workload uses the execution quantum
of idle functions.
Riana Tauro (2):
tests/intel/xe_pmu: Add engine activity test for all functions
tests/intel/xe_pmu: Add a test to validate engine activity on a
function
tests/intel/xe_pmu.c | 197 ++++++++++++++++++++++++++++++++++++++++---
1 file changed, 187 insertions(+), 10 deletions(-)
--
2.47.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro @ 2025-03-12 6:24 ` Riana Tauro 2025-03-19 22:22 ` Umesh Nerlige Ramappa 2025-03-12 6:24 ` [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function Riana Tauro ` (4 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: Riana Tauro @ 2025-03-12 6:24 UTC (permalink / raw) To: igt-dev Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi, michal.wajdeczko, soham.purkait Add a test that runs workload on all functions simultaneously and validates that all engines are equally and fully loaded for the entire execution quantum of the function v2: add a different function for function config add function details to log move pmu_fd to struct enable and provision VF's (Umesh) Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- tests/intel/xe_pmu.c | 130 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 120 insertions(+), 10 deletions(-) diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c index 66edf24ad..a95ee1777 100644 --- a/tests/intel/xe_pmu.c +++ b/tests/intel/xe_pmu.c @@ -14,18 +14,22 @@ #include "igt.h" #include "igt_perf.h" +#include "igt_sriov_device.h" #include "igt_sysfs.h" #include "xe/xe_gt.h" #include "xe/xe_ioctl.h" #include "xe/xe_spin.h" +#include "xe/xe_sriov_provisioning.h" #define SLEEP_DURATION 2 /* in seconds */ +#define TOTAL_EXEC_QUANTUM 128 /* in ms */ /* flag masks */ #define TEST_LOAD BIT(0) #define TEST_TRAILING_IDLE BIT(1) const double tolerance = 0.1; +char xe_device[NAME_MAX]; #define test_each_engine(test, fd, hwe) \ igt_subtest_with_dynamic(test) \ @@ -92,7 +96,7 @@ static unsigned long read_idle_residency(int fd, int gt) return residency; } -static uint64_t add_format_config(const char *xe_device, const char *format, uint64_t val) +static uint64_t add_format_config(const char *format, uint64_t val) { int ret; uint32_t shift; @@ -105,26 +109,30 @@ static uint64_t add_format_config(const char *xe_device, const char *format, uin return config; } -static uint64_t get_event_config(int xe, unsigned int gt, struct drm_xe_engine_class_instance *eci, +static uint64_t get_event_config(unsigned int gt, struct drm_xe_engine_class_instance *eci, const char *event) { - char xe_device[100]; uint64_t pmu_config = 0; int ret; - xe_perf_device(xe, xe_device, sizeof(xe_device)); ret = perf_event_config(xe_device, event, &pmu_config); igt_assert(ret >= 0); - pmu_config |= add_format_config(xe_device, "gt", gt); + pmu_config |= add_format_config("gt", gt); if (eci) { - pmu_config |= add_format_config(xe_device, "engine_class", eci->engine_class); - pmu_config |= add_format_config(xe_device, "engine_instance", eci->engine_instance); + pmu_config |= add_format_config("engine_class", eci->engine_class); + pmu_config |= add_format_config("engine_instance", eci->engine_instance); } return pmu_config; } +static uint64_t get_event_config_fn(unsigned int gt, int function, + struct drm_xe_engine_class_instance *eci, const char *event) +{ + return get_event_config(gt, eci, event) | add_format_config("function", function); +} + /** * SUBTEST: engine-activity-idle * Description: Test to validate engine activity shows no load when idle @@ -144,10 +152,10 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un uint32_t vm; int pmu_fd[2]; - config = get_event_config(fd, eci->gt_id, eci, "engine-active-ticks"); + config = get_event_config(eci->gt_id, eci, "engine-active-ticks"); pmu_fd[0] = open_group(fd, config, -1); - config = get_event_config(fd, eci->gt_id, eci, "engine-total-ticks"); + config = get_event_config(eci->gt_id, eci, "engine-total-ticks"); pmu_fd[1] = open_group(fd, config, pmu_fd[0]); vm = xe_vm_create(fd, 0, 0); @@ -188,6 +196,73 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un igt_assert(!engine_active_ticks); } +/** + * SUBTEST: all-fn-engine-activity-load + * Description: Test to validate engine activity by running load on all functions simultaneously + */ +static void engine_activity_all_fn(int fd, struct drm_xe_engine_class_instance *eci, int num_fns) +{ + uint64_t config, engine_active_ticks, engine_total_ticks; + uint64_t after[2 * num_fns], before[2 * num_fns]; + struct pmu_function { + struct xe_cork *cork; + uint32_t vm; + uint64_t pmu_fd[2]; + int fd; + } fn[num_fns]; + int i; + + fn[0].pmu_fd[0] = -1; + for (i = 0; i < num_fns; i++) { + config = get_event_config_fn(eci->gt_id, i, eci, "engine-active-ticks"); + fn[i].pmu_fd[0] = open_group(fd, config, fn[0].pmu_fd[0]); + + config = get_event_config_fn(eci->gt_id, i, eci, "engine-total-ticks"); + fn[i].pmu_fd[1] = open_group(fd, config, fn[0].pmu_fd[0]); + + if (i > 0) + fn[i].fd = igt_sriov_open_vf_drm_device(fd, i); + else + fn[i].fd = fd; + + igt_assert_fd(fn[i].fd); + + fn[i].vm = xe_vm_create(fn[i].fd, 0, 0); + fn[i].cork = xe_cork_create_opts(fn[i].fd, eci, fn[i].vm, 1, 1); + xe_cork_sync_start(fn[i].fd, fn[i].cork); + } + + pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, before); + usleep(SLEEP_DURATION * USEC_PER_SEC); + pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, after); + + for (i = 0; i < num_fns; i++) { + int idx = i * 2; + + xe_cork_sync_end(fn[i].fd, fn[i].cork); + engine_active_ticks = after[idx] - before[idx]; + engine_total_ticks = after[idx + 1] - before[idx + 1]; + + igt_debug("[%d] Engine active ticks: after %ld, before %ld delta %ld\n", i, + after[idx], before[idx], engine_active_ticks); + igt_debug("[%d] Engine total ticks: after %ld, before %ld delta %ld\n", i, + after[idx + 1], before[idx + 1], engine_total_ticks); + + if (fn[i].cork) + xe_cork_destroy(fn[i].fd, fn[i].cork); + + xe_vm_destroy(fn[i].fd, fn[i].vm); + + close(fn[i].pmu_fd[0]); + close(fn[i].pmu_fd[1]); + + if (i > 0) + close(fn[i].fd); + + assert_within_epsilon(engine_active_ticks, engine_total_ticks, tolerance); + } +} + /** * SUBTEST: gt-c6-idle * Description: Basic residency test to validate idle residency @@ -202,7 +277,7 @@ static void test_gt_c6_idle(int xe, unsigned int gt) uint64_t val; /* Get the PMU config for the gt-c6 event */ - pmu_config = get_event_config(xe, gt, NULL, "gt-c6-residency"); + pmu_config = get_event_config(gt, NULL, "gt-c6-residency"); pmu_fd = open_pmu(xe, pmu_config); @@ -226,13 +301,34 @@ static void test_gt_c6_idle(int xe, unsigned int gt) close(pmu_fd); } +static unsigned int enable_and_provision_vfs(int fd) +{ + unsigned int gt, num_vfs; + + igt_sriov_enable_vfs(fd, 2); + num_vfs = igt_sriov_get_enabled_vfs(fd); + igt_require(num_vfs); + + /* Set 32ms for VF execution quantum and 64ms for PF execution quantum */ + xe_for_each_gt(fd, gt) { + xe_sriov_set_sched_if_idle(fd, gt, 0); + for (int fn = 0; fn <= num_vfs; fn++) + xe_sriov_set_exec_quantum_ms(fd, fn, gt, fn ? TOTAL_EXEC_QUANTUM / 4 : + TOTAL_EXEC_QUANTUM / 2); + } + + return num_vfs; +} + igt_main { int fd, gt; + unsigned int num_fns; struct drm_xe_engine_class_instance *eci; igt_fixture { fd = drm_open_driver(DRIVER_XE); + xe_perf_device(fd, xe_device, sizeof(xe_device)); } igt_describe("Validate PMU gt-c6 residency counters when idle"); @@ -254,6 +350,20 @@ igt_main test_each_engine("engine-activity-load", fd, eci) engine_activity(fd, eci, TEST_LOAD); + igt_subtest_group { + igt_fixture { + igt_require(igt_sriov_is_pf(fd)); + num_fns = enable_and_provision_vfs(fd) + 1; + } + + igt_describe("Validate engine activity on all functions"); + test_each_engine("all-fn-engine-activity-load", fd, eci) + engine_activity_all_fn(fd, eci, num_fns); + + igt_fixture + igt_sriov_disable_vfs(fd); + } + igt_fixture { close(fd); } -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions 2025-03-12 6:24 ` [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions Riana Tauro @ 2025-03-19 22:22 ` Umesh Nerlige Ramappa 2025-03-19 23:11 ` Umesh Nerlige Ramappa 0 siblings, 1 reply; 11+ messages in thread From: Umesh Nerlige Ramappa @ 2025-03-19 22:22 UTC (permalink / raw) To: Riana Tauro Cc: igt-dev, anshuman.gupta, lucas.demarchi, michal.wajdeczko, soham.purkait On Wed, Mar 12, 2025 at 11:54:30AM +0530, Riana Tauro wrote: >Add a test that runs workload on all functions simultaneously and >validates that all engines are equally and fully loaded for the >entire execution quantum of the function > >v2: add a different function for function config > add function details to log > move pmu_fd to struct > enable and provision VF's (Umesh) > >Signed-off-by: Riana Tauro <riana.tauro@intel.com> >--- > tests/intel/xe_pmu.c | 130 +++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 120 insertions(+), 10 deletions(-) > >diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c >index 66edf24ad..a95ee1777 100644 >--- a/tests/intel/xe_pmu.c >+++ b/tests/intel/xe_pmu.c >@@ -14,18 +14,22 @@ > > #include "igt.h" > #include "igt_perf.h" >+#include "igt_sriov_device.h" > #include "igt_sysfs.h" > > #include "xe/xe_gt.h" > #include "xe/xe_ioctl.h" > #include "xe/xe_spin.h" >+#include "xe/xe_sriov_provisioning.h" > > #define SLEEP_DURATION 2 /* in seconds */ >+#define TOTAL_EXEC_QUANTUM 128 /* in ms */ > /* flag masks */ > #define TEST_LOAD BIT(0) > #define TEST_TRAILING_IDLE BIT(1) > > const double tolerance = 0.1; >+char xe_device[NAME_MAX]; These globals should be static. Optionally, for easier reviews, it's better to split the patch in two - (1) make xe_device global (2) Add the engine activity test. With just the static change, this is Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Thanks, Umesh > > #define test_each_engine(test, fd, hwe) \ > igt_subtest_with_dynamic(test) \ >@@ -92,7 +96,7 @@ static unsigned long read_idle_residency(int fd, int gt) > return residency; > } > >-static uint64_t add_format_config(const char *xe_device, const char *format, uint64_t val) >+static uint64_t add_format_config(const char *format, uint64_t val) > { > int ret; > uint32_t shift; >@@ -105,26 +109,30 @@ static uint64_t add_format_config(const char *xe_device, const char *format, uin > return config; > } > >-static uint64_t get_event_config(int xe, unsigned int gt, struct drm_xe_engine_class_instance *eci, >+static uint64_t get_event_config(unsigned int gt, struct drm_xe_engine_class_instance *eci, > const char *event) > { >- char xe_device[100]; > uint64_t pmu_config = 0; > int ret; > >- xe_perf_device(xe, xe_device, sizeof(xe_device)); > ret = perf_event_config(xe_device, event, &pmu_config); > igt_assert(ret >= 0); >- pmu_config |= add_format_config(xe_device, "gt", gt); >+ pmu_config |= add_format_config("gt", gt); > > if (eci) { >- pmu_config |= add_format_config(xe_device, "engine_class", eci->engine_class); >- pmu_config |= add_format_config(xe_device, "engine_instance", eci->engine_instance); >+ pmu_config |= add_format_config("engine_class", eci->engine_class); >+ pmu_config |= add_format_config("engine_instance", eci->engine_instance); > } > > return pmu_config; > } > >+static uint64_t get_event_config_fn(unsigned int gt, int function, >+ struct drm_xe_engine_class_instance *eci, const char *event) >+{ >+ return get_event_config(gt, eci, event) | add_format_config("function", function); >+} >+ > /** > * SUBTEST: engine-activity-idle > * Description: Test to validate engine activity shows no load when idle >@@ -144,10 +152,10 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un > uint32_t vm; > int pmu_fd[2]; > >- config = get_event_config(fd, eci->gt_id, eci, "engine-active-ticks"); >+ config = get_event_config(eci->gt_id, eci, "engine-active-ticks"); > pmu_fd[0] = open_group(fd, config, -1); > >- config = get_event_config(fd, eci->gt_id, eci, "engine-total-ticks"); >+ config = get_event_config(eci->gt_id, eci, "engine-total-ticks"); > pmu_fd[1] = open_group(fd, config, pmu_fd[0]); > > vm = xe_vm_create(fd, 0, 0); >@@ -188,6 +196,73 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un > igt_assert(!engine_active_ticks); > } > >+/** >+ * SUBTEST: all-fn-engine-activity-load >+ * Description: Test to validate engine activity by running load on all functions simultaneously >+ */ >+static void engine_activity_all_fn(int fd, struct drm_xe_engine_class_instance *eci, int num_fns) >+{ >+ uint64_t config, engine_active_ticks, engine_total_ticks; >+ uint64_t after[2 * num_fns], before[2 * num_fns]; >+ struct pmu_function { >+ struct xe_cork *cork; >+ uint32_t vm; >+ uint64_t pmu_fd[2]; >+ int fd; >+ } fn[num_fns]; >+ int i; >+ >+ fn[0].pmu_fd[0] = -1; >+ for (i = 0; i < num_fns; i++) { >+ config = get_event_config_fn(eci->gt_id, i, eci, "engine-active-ticks"); >+ fn[i].pmu_fd[0] = open_group(fd, config, fn[0].pmu_fd[0]); >+ >+ config = get_event_config_fn(eci->gt_id, i, eci, "engine-total-ticks"); >+ fn[i].pmu_fd[1] = open_group(fd, config, fn[0].pmu_fd[0]); >+ >+ if (i > 0) >+ fn[i].fd = igt_sriov_open_vf_drm_device(fd, i); >+ else >+ fn[i].fd = fd; >+ >+ igt_assert_fd(fn[i].fd); >+ >+ fn[i].vm = xe_vm_create(fn[i].fd, 0, 0); >+ fn[i].cork = xe_cork_create_opts(fn[i].fd, eci, fn[i].vm, 1, 1); >+ xe_cork_sync_start(fn[i].fd, fn[i].cork); >+ } >+ >+ pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, before); >+ usleep(SLEEP_DURATION * USEC_PER_SEC); >+ pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, after); >+ >+ for (i = 0; i < num_fns; i++) { >+ int idx = i * 2; >+ >+ xe_cork_sync_end(fn[i].fd, fn[i].cork); >+ engine_active_ticks = after[idx] - before[idx]; >+ engine_total_ticks = after[idx + 1] - before[idx + 1]; >+ >+ igt_debug("[%d] Engine active ticks: after %ld, before %ld delta %ld\n", i, >+ after[idx], before[idx], engine_active_ticks); >+ igt_debug("[%d] Engine total ticks: after %ld, before %ld delta %ld\n", i, >+ after[idx + 1], before[idx + 1], engine_total_ticks); >+ >+ if (fn[i].cork) >+ xe_cork_destroy(fn[i].fd, fn[i].cork); >+ >+ xe_vm_destroy(fn[i].fd, fn[i].vm); >+ >+ close(fn[i].pmu_fd[0]); >+ close(fn[i].pmu_fd[1]); >+ >+ if (i > 0) >+ close(fn[i].fd); >+ >+ assert_within_epsilon(engine_active_ticks, engine_total_ticks, tolerance); >+ } >+} >+ > /** > * SUBTEST: gt-c6-idle > * Description: Basic residency test to validate idle residency >@@ -202,7 +277,7 @@ static void test_gt_c6_idle(int xe, unsigned int gt) > uint64_t val; > > /* Get the PMU config for the gt-c6 event */ >- pmu_config = get_event_config(xe, gt, NULL, "gt-c6-residency"); >+ pmu_config = get_event_config(gt, NULL, "gt-c6-residency"); > > pmu_fd = open_pmu(xe, pmu_config); > >@@ -226,13 +301,34 @@ static void test_gt_c6_idle(int xe, unsigned int gt) > close(pmu_fd); > } > >+static unsigned int enable_and_provision_vfs(int fd) >+{ >+ unsigned int gt, num_vfs; >+ >+ igt_sriov_enable_vfs(fd, 2); >+ num_vfs = igt_sriov_get_enabled_vfs(fd); >+ igt_require(num_vfs); >+ >+ /* Set 32ms for VF execution quantum and 64ms for PF execution quantum */ >+ xe_for_each_gt(fd, gt) { >+ xe_sriov_set_sched_if_idle(fd, gt, 0); >+ for (int fn = 0; fn <= num_vfs; fn++) >+ xe_sriov_set_exec_quantum_ms(fd, fn, gt, fn ? TOTAL_EXEC_QUANTUM / 4 : >+ TOTAL_EXEC_QUANTUM / 2); >+ } >+ >+ return num_vfs; >+} >+ > igt_main > { > int fd, gt; >+ unsigned int num_fns; > struct drm_xe_engine_class_instance *eci; > > igt_fixture { > fd = drm_open_driver(DRIVER_XE); >+ xe_perf_device(fd, xe_device, sizeof(xe_device)); > } > > igt_describe("Validate PMU gt-c6 residency counters when idle"); >@@ -254,6 +350,20 @@ igt_main > test_each_engine("engine-activity-load", fd, eci) > engine_activity(fd, eci, TEST_LOAD); > >+ igt_subtest_group { >+ igt_fixture { >+ igt_require(igt_sriov_is_pf(fd)); >+ num_fns = enable_and_provision_vfs(fd) + 1; >+ } >+ >+ igt_describe("Validate engine activity on all functions"); >+ test_each_engine("all-fn-engine-activity-load", fd, eci) >+ engine_activity_all_fn(fd, eci, num_fns); >+ >+ igt_fixture >+ igt_sriov_disable_vfs(fd); >+ } >+ > igt_fixture { > close(fd); > } >-- >2.47.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions 2025-03-19 22:22 ` Umesh Nerlige Ramappa @ 2025-03-19 23:11 ` Umesh Nerlige Ramappa 2025-03-20 13:51 ` Riana Tauro 0 siblings, 1 reply; 11+ messages in thread From: Umesh Nerlige Ramappa @ 2025-03-19 23:11 UTC (permalink / raw) To: Riana Tauro Cc: igt-dev, anshuman.gupta, lucas.demarchi, michal.wajdeczko, soham.purkait I missed out some comments, adding it here: On Wed, Mar 19, 2025 at 03:22:00PM -0700, Umesh Nerlige Ramappa wrote: >On Wed, Mar 12, 2025 at 11:54:30AM +0530, Riana Tauro wrote: >>Add a test that runs workload on all functions simultaneously and >>validates that all engines are equally and fully loaded for the >>entire execution quantum of the function >> >>v2: add a different function for function config >> add function details to log >> move pmu_fd to struct >> enable and provision VF's (Umesh) >> >>Signed-off-by: Riana Tauro <riana.tauro@intel.com> >>--- >>tests/intel/xe_pmu.c | 130 +++++++++++++++++++++++++++++++++++++++---- >>1 file changed, 120 insertions(+), 10 deletions(-) >> >>diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c >>index 66edf24ad..a95ee1777 100644 >>--- a/tests/intel/xe_pmu.c >>+++ b/tests/intel/xe_pmu.c >>@@ -14,18 +14,22 @@ >> >>#include "igt.h" >>#include "igt_perf.h" >>+#include "igt_sriov_device.h" >>#include "igt_sysfs.h" >> >>#include "xe/xe_gt.h" >>#include "xe/xe_ioctl.h" >>#include "xe/xe_spin.h" >>+#include "xe/xe_sriov_provisioning.h" >> >>#define SLEEP_DURATION 2 /* in seconds */ >>+#define TOTAL_EXEC_QUANTUM 128 /* in ms */ >>/* flag masks */ >>#define TEST_LOAD BIT(0) >>#define TEST_TRAILING_IDLE BIT(1) >> >>const double tolerance = 0.1; >>+char xe_device[NAME_MAX]; > >These globals should be static. > >Optionally, for easier reviews, it's better to split the patch in two >- (1) make xe_device global (2) Add the engine activity test. > >With just the static change, this is > >Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> > >Thanks, >Umesh > >> >>#define test_each_engine(test, fd, hwe) \ >> igt_subtest_with_dynamic(test) \ >>@@ -92,7 +96,7 @@ static unsigned long read_idle_residency(int fd, int gt) >> return residency; >>} >> >>-static uint64_t add_format_config(const char *xe_device, const char *format, uint64_t val) >>+static uint64_t add_format_config(const char *format, uint64_t val) >>{ >> int ret; >> uint32_t shift; >>@@ -105,26 +109,30 @@ static uint64_t add_format_config(const char *xe_device, const char *format, uin >> return config; >>} >> >>-static uint64_t get_event_config(int xe, unsigned int gt, struct drm_xe_engine_class_instance *eci, >>+static uint64_t get_event_config(unsigned int gt, struct drm_xe_engine_class_instance *eci, >> const char *event) >>{ >>- char xe_device[100]; >> uint64_t pmu_config = 0; >> int ret; >> >>- xe_perf_device(xe, xe_device, sizeof(xe_device)); >> ret = perf_event_config(xe_device, event, &pmu_config); >> igt_assert(ret >= 0); >>- pmu_config |= add_format_config(xe_device, "gt", gt); >>+ pmu_config |= add_format_config("gt", gt); >> >> if (eci) { >>- pmu_config |= add_format_config(xe_device, "engine_class", eci->engine_class); >>- pmu_config |= add_format_config(xe_device, "engine_instance", eci->engine_instance); >>+ pmu_config |= add_format_config("engine_class", eci->engine_class); >>+ pmu_config |= add_format_config("engine_instance", eci->engine_instance); >> } >> >> return pmu_config; >>} >> >>+static uint64_t get_event_config_fn(unsigned int gt, int function, >>+ struct drm_xe_engine_class_instance *eci, const char *event) >>+{ >>+ return get_event_config(gt, eci, event) | add_format_config("function", function); >>+} >>+ >>/** >> * SUBTEST: engine-activity-idle >> * Description: Test to validate engine activity shows no load when idle >>@@ -144,10 +152,10 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un >> uint32_t vm; >> int pmu_fd[2]; >> >>- config = get_event_config(fd, eci->gt_id, eci, "engine-active-ticks"); >>+ config = get_event_config(eci->gt_id, eci, "engine-active-ticks"); >> pmu_fd[0] = open_group(fd, config, -1); >> >>- config = get_event_config(fd, eci->gt_id, eci, "engine-total-ticks"); >>+ config = get_event_config(eci->gt_id, eci, "engine-total-ticks"); >> pmu_fd[1] = open_group(fd, config, pmu_fd[0]); >> >> vm = xe_vm_create(fd, 0, 0); >>@@ -188,6 +196,73 @@ static void engine_activity(int fd, struct drm_xe_engine_class_instance *eci, un >> igt_assert(!engine_active_ticks); >>} >> >>+/** >>+ * SUBTEST: all-fn-engine-activity-load >>+ * Description: Test to validate engine activity by running load on all functions simultaneously >>+ */ >>+static void engine_activity_all_fn(int fd, struct drm_xe_engine_class_instance *eci, int num_fns) >>+{ >>+ uint64_t config, engine_active_ticks, engine_total_ticks; >>+ uint64_t after[2 * num_fns], before[2 * num_fns]; >>+ struct pmu_function { >>+ struct xe_cork *cork; >>+ uint32_t vm; >>+ uint64_t pmu_fd[2]; >>+ int fd; >>+ } fn[num_fns]; >>+ int i; >>+ >>+ fn[0].pmu_fd[0] = -1; >>+ for (i = 0; i < num_fns; i++) { >>+ config = get_event_config_fn(eci->gt_id, i, eci, "engine-active-ticks"); >>+ fn[i].pmu_fd[0] = open_group(fd, config, fn[0].pmu_fd[0]); >>+ >>+ config = get_event_config_fn(eci->gt_id, i, eci, "engine-total-ticks"); >>+ fn[i].pmu_fd[1] = open_group(fd, config, fn[0].pmu_fd[0]); >>+ >>+ if (i > 0) >>+ fn[i].fd = igt_sriov_open_vf_drm_device(fd, i); >>+ else >>+ fn[i].fd = fd; >>+ >>+ igt_assert_fd(fn[i].fd); >>+ >>+ fn[i].vm = xe_vm_create(fn[i].fd, 0, 0); >>+ fn[i].cork = xe_cork_create_opts(fn[i].fd, eci, fn[i].vm, 1, 1); >>+ xe_cork_sync_start(fn[i].fd, fn[i].cork); >>+ } >>+ >>+ pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, before); >>+ usleep(SLEEP_DURATION * USEC_PER_SEC); >>+ pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, after); >>+ >>+ for (i = 0; i < num_fns; i++) { >>+ int idx = i * 2; >>+ >>+ xe_cork_sync_end(fn[i].fd, fn[i].cork); >>+ engine_active_ticks = after[idx] - before[idx]; >>+ engine_total_ticks = after[idx + 1] - before[idx + 1]; >>+ >>+ igt_debug("[%d] Engine active ticks: after %ld, before %ld delta %ld\n", i, >>+ after[idx], before[idx], engine_active_ticks); >>+ igt_debug("[%d] Engine total ticks: after %ld, before %ld delta %ld\n", i, >>+ after[idx + 1], before[idx + 1], engine_total_ticks); >>+ >>+ if (fn[i].cork) >>+ xe_cork_destroy(fn[i].fd, fn[i].cork); >>+ >>+ xe_vm_destroy(fn[i].fd, fn[i].vm); >>+ >>+ close(fn[i].pmu_fd[0]); >>+ close(fn[i].pmu_fd[1]); >>+ >>+ if (i > 0) >>+ close(fn[i].fd); >>+ >>+ assert_within_epsilon(engine_active_ticks, engine_total_ticks, tolerance); >>+ } >>+} >>+ >>/** >> * SUBTEST: gt-c6-idle >> * Description: Basic residency test to validate idle residency >>@@ -202,7 +277,7 @@ static void test_gt_c6_idle(int xe, unsigned int gt) >> uint64_t val; >> >> /* Get the PMU config for the gt-c6 event */ >>- pmu_config = get_event_config(xe, gt, NULL, "gt-c6-residency"); >>+ pmu_config = get_event_config(gt, NULL, "gt-c6-residency"); >> >> pmu_fd = open_pmu(xe, pmu_config); >> >>@@ -226,13 +301,34 @@ static void test_gt_c6_idle(int xe, unsigned int gt) >> close(pmu_fd); >>} >> >>+static unsigned int enable_and_provision_vfs(int fd) >>+{ >>+ unsigned int gt, num_vfs; >>+ >>+ igt_sriov_enable_vfs(fd, 2); >>+ num_vfs = igt_sriov_get_enabled_vfs(fd); >>+ igt_require(num_vfs); igt_assert(num_vfs == 2) I am thinking maybe you could use globals instead of the define and initialize them here. pf_quanta_msec = 64; vf_quanta_msec = 32; total_quanta = pf_quanta_msec + (num_vfs * vf_quanta_msec); >>+ >>+ /* Set 32ms for VF execution quantum and 64ms for PF execution quantum */ >>+ xe_for_each_gt(fd, gt) { >>+ xe_sriov_set_sched_if_idle(fd, gt, 0); >>+ for (int fn = 0; fn <= num_vfs; fn++) >>+ xe_sriov_set_exec_quantum_ms(fd, fn, gt, fn ? TOTAL_EXEC_QUANTUM / 4 : >>+ TOTAL_EXEC_QUANTUM / 2); >>+ } maybe also cover the case for sched_if_idle = 1? Thanks, Umesh >>+ >>+ return num_vfs; >>+} >>+ >>igt_main >>{ >> int fd, gt; >>+ unsigned int num_fns; >> struct drm_xe_engine_class_instance *eci; >> >> igt_fixture { >> fd = drm_open_driver(DRIVER_XE); >>+ xe_perf_device(fd, xe_device, sizeof(xe_device)); >> } >> >> igt_describe("Validate PMU gt-c6 residency counters when idle"); >>@@ -254,6 +350,20 @@ igt_main >> test_each_engine("engine-activity-load", fd, eci) >> engine_activity(fd, eci, TEST_LOAD); >> >>+ igt_subtest_group { >>+ igt_fixture { >>+ igt_require(igt_sriov_is_pf(fd)); >>+ num_fns = enable_and_provision_vfs(fd) + 1; How does this work if VFs are already provisioned before starting the test? >>+ } >>+ >>+ igt_describe("Validate engine activity on all functions"); >>+ test_each_engine("all-fn-engine-activity-load", fd, eci) >>+ engine_activity_all_fn(fd, eci, num_fns); >>+ >>+ igt_fixture >>+ igt_sriov_disable_vfs(fd); >>+ } >>+ >> igt_fixture { >> close(fd); >> } >>-- >>2.47.1 >> ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions 2025-03-19 23:11 ` Umesh Nerlige Ramappa @ 2025-03-20 13:51 ` Riana Tauro 0 siblings, 0 replies; 11+ messages in thread From: Riana Tauro @ 2025-03-20 13:51 UTC (permalink / raw) To: Umesh Nerlige Ramappa Cc: igt-dev, anshuman.gupta, lucas.demarchi, michal.wajdeczko, soham.purkait Hi Umesh On 3/20/2025 4:41 AM, Umesh Nerlige Ramappa wrote: > I missed out some comments, adding it here: > > On Wed, Mar 19, 2025 at 03:22:00PM -0700, Umesh Nerlige Ramappa wrote: >> On Wed, Mar 12, 2025 at 11:54:30AM +0530, Riana Tauro wrote: >>> Add a test that runs workload on all functions simultaneously and >>> validates that all engines are equally and fully loaded for the >>> entire execution quantum of the function >>> >>> v2: add a different function for function config >>> add function details to log >>> move pmu_fd to struct >>> enable and provision VF's (Umesh) >>> >>> Signed-off-by: Riana Tauro <riana.tauro@intel.com> >>> --- >>> tests/intel/xe_pmu.c | 130 +++++++++++++++++++++++++++++++++++++++---- >>> 1 file changed, 120 insertions(+), 10 deletions(-) >>> >>> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c >>> index 66edf24ad..a95ee1777 100644 >>> --- a/tests/intel/xe_pmu.c >>> +++ b/tests/intel/xe_pmu.c >>> @@ -14,18 +14,22 @@ >>> >>> #include "igt.h" >>> #include "igt_perf.h" >>> +#include "igt_sriov_device.h" >>> #include "igt_sysfs.h" >>> >>> #include "xe/xe_gt.h" >>> #include "xe/xe_ioctl.h" >>> #include "xe/xe_spin.h" >>> +#include "xe/xe_sriov_provisioning.h" >>> >>> #define SLEEP_DURATION 2 /* in seconds */ >>> +#define TOTAL_EXEC_QUANTUM 128 /* in ms */ >>> /* flag masks */ >>> #define TEST_LOAD BIT(0) >>> #define TEST_TRAILING_IDLE BIT(1) >>> >>> const double tolerance = 0.1; >>> +char xe_device[NAME_MAX]; >> >> These globals should be static. >> >> Optionally, for easier reviews, it's better to split the patch in two >> - (1) make xe_device global (2) Add the engine activity test. >> >> With just the static change, this is >> >> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> >> >> Thanks, >> Umesh >> >>> >>> #define test_each_engine(test, fd, hwe) \ >>> igt_subtest_with_dynamic(test) \ >>> @@ -92,7 +96,7 @@ static unsigned long read_idle_residency(int fd, >>> int gt) >>> return residency; >>> } >>> >>> -static uint64_t add_format_config(const char *xe_device, const char >>> *format, uint64_t val) >>> +static uint64_t add_format_config(const char *format, uint64_t val) >>> { >>> int ret; >>> uint32_t shift; >>> @@ -105,26 +109,30 @@ static uint64_t add_format_config(const char >>> *xe_device, const char *format, uin >>> return config; >>> } >>> >>> -static uint64_t get_event_config(int xe, unsigned int gt, struct >>> drm_xe_engine_class_instance *eci, >>> +static uint64_t get_event_config(unsigned int gt, struct >>> drm_xe_engine_class_instance *eci, >>> const char *event) >>> { >>> - char xe_device[100]; >>> uint64_t pmu_config = 0; >>> int ret; >>> >>> - xe_perf_device(xe, xe_device, sizeof(xe_device)); >>> ret = perf_event_config(xe_device, event, &pmu_config); >>> igt_assert(ret >= 0); >>> - pmu_config |= add_format_config(xe_device, "gt", gt); >>> + pmu_config |= add_format_config("gt", gt); >>> >>> if (eci) { >>> - pmu_config |= add_format_config(xe_device, "engine_class", >>> eci->engine_class); >>> - pmu_config |= add_format_config(xe_device, >>> "engine_instance", eci->engine_instance); >>> + pmu_config |= add_format_config("engine_class", eci- >>> >engine_class); >>> + pmu_config |= add_format_config("engine_instance", eci- >>> >engine_instance); >>> } >>> >>> return pmu_config; >>> } >>> >>> +static uint64_t get_event_config_fn(unsigned int gt, int function, >>> + struct drm_xe_engine_class_instance *eci, const >>> char *event) >>> +{ >>> + return get_event_config(gt, eci, event) | >>> add_format_config("function", function); >>> +} >>> + >>> /** >>> * SUBTEST: engine-activity-idle >>> * Description: Test to validate engine activity shows no load when idle >>> @@ -144,10 +152,10 @@ static void engine_activity(int fd, struct >>> drm_xe_engine_class_instance *eci, un >>> uint32_t vm; >>> int pmu_fd[2]; >>> >>> - config = get_event_config(fd, eci->gt_id, eci, "engine-active- >>> ticks"); >>> + config = get_event_config(eci->gt_id, eci, "engine-active-ticks"); >>> pmu_fd[0] = open_group(fd, config, -1); >>> >>> - config = get_event_config(fd, eci->gt_id, eci, "engine-total- >>> ticks"); >>> + config = get_event_config(eci->gt_id, eci, "engine-total-ticks"); >>> pmu_fd[1] = open_group(fd, config, pmu_fd[0]); >>> >>> vm = xe_vm_create(fd, 0, 0); >>> @@ -188,6 +196,73 @@ static void engine_activity(int fd, struct >>> drm_xe_engine_class_instance *eci, un >>> igt_assert(!engine_active_ticks); >>> } >>> >>> +/** >>> + * SUBTEST: all-fn-engine-activity-load >>> + * Description: Test to validate engine activity by running load on >>> all functions simultaneously >>> + */ >>> +static void engine_activity_all_fn(int fd, struct >>> drm_xe_engine_class_instance *eci, int num_fns) >>> +{ >>> + uint64_t config, engine_active_ticks, engine_total_ticks; >>> + uint64_t after[2 * num_fns], before[2 * num_fns]; >>> + struct pmu_function { >>> + struct xe_cork *cork; >>> + uint32_t vm; >>> + uint64_t pmu_fd[2]; >>> + int fd; >>> + } fn[num_fns]; >>> + int i; >>> + >>> + fn[0].pmu_fd[0] = -1; >>> + for (i = 0; i < num_fns; i++) { >>> + config = get_event_config_fn(eci->gt_id, i, eci, "engine- >>> active-ticks"); >>> + fn[i].pmu_fd[0] = open_group(fd, config, fn[0].pmu_fd[0]); >>> + >>> + config = get_event_config_fn(eci->gt_id, i, eci, "engine- >>> total-ticks"); >>> + fn[i].pmu_fd[1] = open_group(fd, config, fn[0].pmu_fd[0]); >>> + >>> + if (i > 0) >>> + fn[i].fd = igt_sriov_open_vf_drm_device(fd, i); >>> + else >>> + fn[i].fd = fd; >>> + >>> + igt_assert_fd(fn[i].fd); >>> + >>> + fn[i].vm = xe_vm_create(fn[i].fd, 0, 0); >>> + fn[i].cork = xe_cork_create_opts(fn[i].fd, eci, fn[i].vm, 1, >>> 1); >>> + xe_cork_sync_start(fn[i].fd, fn[i].cork); >>> + } >>> + >>> + pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, before); >>> + usleep(SLEEP_DURATION * USEC_PER_SEC); >>> + pmu_read_multi(fn[0].pmu_fd[0], 2 * num_fns, after); >>> + >>> + for (i = 0; i < num_fns; i++) { >>> + int idx = i * 2; >>> + >>> + xe_cork_sync_end(fn[i].fd, fn[i].cork); >>> + engine_active_ticks = after[idx] - before[idx]; >>> + engine_total_ticks = after[idx + 1] - before[idx + 1]; >>> + >>> + igt_debug("[%d] Engine active ticks: after %ld, before %ld >>> delta %ld\n", i, >>> + after[idx], before[idx], engine_active_ticks); >>> + igt_debug("[%d] Engine total ticks: after %ld, before %ld >>> delta %ld\n", i, >>> + after[idx + 1], before[idx + 1], engine_total_ticks); >>> + >>> + if (fn[i].cork) >>> + xe_cork_destroy(fn[i].fd, fn[i].cork); >>> + >>> + xe_vm_destroy(fn[i].fd, fn[i].vm); >>> + >>> + close(fn[i].pmu_fd[0]); >>> + close(fn[i].pmu_fd[1]); >>> + >>> + if (i > 0) >>> + close(fn[i].fd); >>> + >>> + assert_within_epsilon(engine_active_ticks, >>> engine_total_ticks, tolerance); >>> + } >>> +} >>> + >>> /** >>> * SUBTEST: gt-c6-idle >>> * Description: Basic residency test to validate idle residency >>> @@ -202,7 +277,7 @@ static void test_gt_c6_idle(int xe, unsigned int gt) >>> uint64_t val; >>> >>> /* Get the PMU config for the gt-c6 event */ >>> - pmu_config = get_event_config(xe, gt, NULL, "gt-c6-residency"); >>> + pmu_config = get_event_config(gt, NULL, "gt-c6-residency"); >>> >>> pmu_fd = open_pmu(xe, pmu_config); >>> >>> @@ -226,13 +301,34 @@ static void test_gt_c6_idle(int xe, unsigned >>> int gt) >>> close(pmu_fd); >>> } >>> >>> +static unsigned int enable_and_provision_vfs(int fd) >>> +{ >>> + unsigned int gt, num_vfs; >>> + >>> + igt_sriov_enable_vfs(fd, 2); >>> + num_vfs = igt_sriov_get_enabled_vfs(fd); >>> + igt_require(num_vfs); > > igt_assert(num_vfs == 2) > > I am thinking maybe you could use globals instead of the define and > initialize them here. > > pf_quanta_msec = 64; > vf_quanta_msec = 32; > total_quanta = pf_quanta_msec + (num_vfs * vf_quanta_msec); > Okay will fix this>>> + >>> + /* Set 32ms for VF execution quantum and 64ms for PF execution >>> quantum */ >>> + xe_for_each_gt(fd, gt) { >>> + xe_sriov_set_sched_if_idle(fd, gt, 0); >>> + for (int fn = 0; fn <= num_vfs; fn++) >>> + xe_sriov_set_exec_quantum_ms(fd, fn, gt, fn ? >>> TOTAL_EXEC_QUANTUM / 4 : >>> + TOTAL_EXEC_QUANTUM / 2); >>> + } > > maybe also cover the case for sched_if_idle = 1?For both tests?> > Thanks, > Umesh > >>> + >>> + return num_vfs; >>> +} >>> + >>> igt_main >>> { >>> int fd, gt; >>> + unsigned int num_fns; >>> struct drm_xe_engine_class_instance *eci; >>> >>> igt_fixture { >>> fd = drm_open_driver(DRIVER_XE); >>> + xe_perf_device(fd, xe_device, sizeof(xe_device)); >>> } >>> >>> igt_describe("Validate PMU gt-c6 residency counters when idle"); >>> @@ -254,6 +350,20 @@ igt_main >>> test_each_engine("engine-activity-load", fd, eci) >>> engine_activity(fd, eci, TEST_LOAD); >>> >>> + igt_subtest_group { >>> + igt_fixture { >>> + igt_require(igt_sriov_is_pf(fd)); >>> + num_fns = enable_and_provision_vfs(fd) + 1; > > How does this work if VFs are already provisioned before starting the test?It fails to write to num_vfs. The sriov tests in igt skip in that case igt_require(igt_sriov_get_enabled_vfs(pf_fd) == 0); Thanks for catching this. Will do the same for these tests.> > >>> + } >>> + >>> + igt_describe("Validate engine activity on all functions"); >>> + test_each_engine("all-fn-engine-activity-load", fd, eci) >>> + engine_activity_all_fn(fd, eci, num_fns); >>> + >>> + igt_fixture >>> + igt_sriov_disable_vfs(fd); >>> + } >>> + >>> igt_fixture { >>> close(fd); >>> } >>> -- >>> 2.47.1 >>> ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro 2025-03-12 6:24 ` [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions Riana Tauro @ 2025-03-12 6:24 ` Riana Tauro 2025-03-19 23:17 ` Umesh Nerlige Ramappa 2025-03-12 8:41 ` ✓ Xe.CI.BAT: success for Add engine activity tests for functions Patchwork ` (3 subsequent siblings) 5 siblings, 1 reply; 11+ messages in thread From: Riana Tauro @ 2025-03-12 6:24 UTC (permalink / raw) To: igt-dev Cc: riana.tauro, anshuman.gupta, umesh.nerlige.ramappa, lucas.demarchi, michal.wajdeczko, soham.purkait Provision and enable 2 VFs with execution quantum and scheduling policy set. Run workload on one function at a time. With sched_if_idle set to false, workload uses the execution quantum of idle functions. Signed-off-by: Riana Tauro <riana.tauro@intel.com> --- tests/intel/xe_pmu.c | 67 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c index a95ee1777..be4d17ed2 100644 --- a/tests/intel/xe_pmu.c +++ b/tests/intel/xe_pmu.c @@ -263,6 +263,68 @@ static void engine_activity_all_fn(int fd, struct drm_xe_engine_class_instance * } } +/** + * SUBTEST: fn-engine-activity-load + * Description: Test to validate engine activity by running load on a function + */ +static void engine_activity_fn(int fd, struct drm_xe_engine_class_instance *eci, int function) +{ + uint64_t config, engine_active_ticks, engine_total_ticks, before[2], after[2]; + struct xe_cork *cork = NULL; + uint32_t vm; + int pmu_fd[2], fn_fd; + double busy_percent, exec_quantum_ratio; + + if (function > 0) { + fn_fd = igt_sriov_open_vf_drm_device(fd, function); + igt_assert_fd(fn_fd); + } else { + fn_fd = fd; + } + + config = get_event_config_fn(eci->gt_id, function, eci, "engine-active-ticks"); + pmu_fd[0] = open_group(fd, config, -1); + + config = get_event_config_fn(eci->gt_id, function, eci, "engine-total-ticks"); + pmu_fd[1] = open_group(fd, config, pmu_fd[0]); + + vm = xe_vm_create(fn_fd, 0, 0); + cork = xe_cork_create_opts(fn_fd, eci, vm, 1, 1); + xe_cork_sync_start(fn_fd, cork); + + pmu_read_multi(pmu_fd[0], 2, before); + usleep(SLEEP_DURATION * USEC_PER_SEC); + pmu_read_multi(pmu_fd[0], 2, after); + + xe_cork_sync_end(fn_fd, cork); + + engine_active_ticks = after[0] - before[0]; + engine_total_ticks = after[1] - before[1]; + + igt_debug("[%d] Engine active ticks: after %ld, before %ld delta %ld\n", function, + after[0], before[0], engine_active_ticks); + igt_debug("[%d] Engine total ticks: after %ld, before %ld delta %ld\n", function, + after[1], before[1], engine_total_ticks); + + busy_percent = (double)engine_active_ticks / engine_total_ticks; + exec_quantum_ratio = (double)TOTAL_EXEC_QUANTUM / xe_sriov_get_exec_quantum_ms(fd, function, eci->gt_id); + + igt_debug("Percent %lf\n", busy_percent * 100); + + if (cork) + xe_cork_destroy(fn_fd, cork); + + xe_vm_destroy(fn_fd, vm); + + close(pmu_fd[0]); + close(pmu_fd[1]); + + if (function > 0) + close(fn_fd); + + assert_within_epsilon(busy_percent, exec_quantum_ratio, tolerance); +} + /** * SUBTEST: gt-c6-idle * Description: Basic residency test to validate idle residency @@ -360,6 +422,11 @@ igt_main test_each_engine("all-fn-engine-activity-load", fd, eci) engine_activity_all_fn(fd, eci, num_fns); + igt_describe("Validate per-function engine activity"); + test_each_engine("fn-engine-activity-load", fd, eci) + for (int fn = 0; fn < num_fns; fn++) + engine_activity_fn(fd, eci, fn); + igt_fixture igt_sriov_disable_vfs(fd); } -- 2.47.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function 2025-03-12 6:24 ` [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function Riana Tauro @ 2025-03-19 23:17 ` Umesh Nerlige Ramappa 0 siblings, 0 replies; 11+ messages in thread From: Umesh Nerlige Ramappa @ 2025-03-19 23:17 UTC (permalink / raw) To: Riana Tauro Cc: igt-dev, anshuman.gupta, lucas.demarchi, michal.wajdeczko, soham.purkait On Wed, Mar 12, 2025 at 11:54:31AM +0530, Riana Tauro wrote: >Provision and enable 2 VFs with execution quantum and scheduling policy >set. Run workload on one function at a time. With sched_if_idle set to >false, workload uses the execution quantum of idle functions. I think part of this ^ description should be moved to patch 1 since you are provisioning it there. > >Signed-off-by: Riana Tauro <riana.tauro@intel.com> >--- > tests/intel/xe_pmu.c | 67 ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > >diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c >index a95ee1777..be4d17ed2 100644 >--- a/tests/intel/xe_pmu.c >+++ b/tests/intel/xe_pmu.c >@@ -263,6 +263,68 @@ static void engine_activity_all_fn(int fd, struct drm_xe_engine_class_instance * > } > } > >+/** >+ * SUBTEST: fn-engine-activity-load >+ * Description: Test to validate engine activity by running load on a function >+ */ >+static void engine_activity_fn(int fd, struct drm_xe_engine_class_instance *eci, int function) >+{ >+ uint64_t config, engine_active_ticks, engine_total_ticks, before[2], after[2]; >+ struct xe_cork *cork = NULL; >+ uint32_t vm; >+ int pmu_fd[2], fn_fd; >+ double busy_percent, exec_quantum_ratio; >+ >+ if (function > 0) { >+ fn_fd = igt_sriov_open_vf_drm_device(fd, function); >+ igt_assert_fd(fn_fd); >+ } else { >+ fn_fd = fd; >+ } >+ >+ config = get_event_config_fn(eci->gt_id, function, eci, "engine-active-ticks"); >+ pmu_fd[0] = open_group(fd, config, -1); >+ >+ config = get_event_config_fn(eci->gt_id, function, eci, "engine-total-ticks"); >+ pmu_fd[1] = open_group(fd, config, pmu_fd[0]); >+ >+ vm = xe_vm_create(fn_fd, 0, 0); >+ cork = xe_cork_create_opts(fn_fd, eci, vm, 1, 1); >+ xe_cork_sync_start(fn_fd, cork); >+ >+ pmu_read_multi(pmu_fd[0], 2, before); >+ usleep(SLEEP_DURATION * USEC_PER_SEC); >+ pmu_read_multi(pmu_fd[0], 2, after); >+ >+ xe_cork_sync_end(fn_fd, cork); >+ >+ engine_active_ticks = after[0] - before[0]; >+ engine_total_ticks = after[1] - before[1]; >+ >+ igt_debug("[%d] Engine active ticks: after %ld, before %ld delta %ld\n", function, >+ after[0], before[0], engine_active_ticks); >+ igt_debug("[%d] Engine total ticks: after %ld, before %ld delta %ld\n", function, >+ after[1], before[1], engine_total_ticks); >+ >+ busy_percent = (double)engine_active_ticks / engine_total_ticks; >+ exec_quantum_ratio = (double)TOTAL_EXEC_QUANTUM / xe_sriov_get_exec_quantum_ms(fd, function, eci->gt_id); >+ >+ igt_debug("Percent %lf\n", busy_percent * 100); >+ >+ if (cork) >+ xe_cork_destroy(fn_fd, cork); >+ >+ xe_vm_destroy(fn_fd, vm); >+ >+ close(pmu_fd[0]); >+ close(pmu_fd[1]); >+ >+ if (function > 0) >+ close(fn_fd); >+ >+ assert_within_epsilon(busy_percent, exec_quantum_ratio, tolerance); >+} >+ > /** > * SUBTEST: gt-c6-idle > * Description: Basic residency test to validate idle residency >@@ -360,6 +422,11 @@ igt_main > test_each_engine("all-fn-engine-activity-load", fd, eci) > engine_activity_all_fn(fd, eci, num_fns); > >+ igt_describe("Validate per-function engine activity"); >+ test_each_engine("fn-engine-activity-load", fd, eci) >+ for (int fn = 0; fn < num_fns; fn++) >+ engine_activity_fn(fd, eci, fn); >+ Maybe add the sched_if_idle = 1 case here. Rest looks good, Thanks, Umesh > igt_fixture > igt_sriov_disable_vfs(fd); > } >-- >2.47.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.BAT: success for Add engine activity tests for functions 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro 2025-03-12 6:24 ` [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions Riana Tauro 2025-03-12 6:24 ` [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function Riana Tauro @ 2025-03-12 8:41 ` Patchwork 2025-03-12 8:59 ` ✓ i915.CI.BAT: " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-03-12 8:41 UTC (permalink / raw) To: Riana Tauro; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 972 bytes --] == Series Details == Series: Add engine activity tests for functions URL : https://patchwork.freedesktop.org/series/146186/ State : success == Summary == CI Bug Log - changes from XEIGT_8271_BAT -> XEIGTPW_12753_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * IGT: IGT_8271 -> IGTPW_12753 * Linux: xe-2797-eb17816e52395a403aa0b447aa0befa9d2f86dd5 -> xe-2798-aba848f9b752cf51474c0c3b1abcf0f572f774dc IGTPW_12753: 12753 IGT_8271: 8271 xe-2797-eb17816e52395a403aa0b447aa0befa9d2f86dd5: eb17816e52395a403aa0b447aa0befa9d2f86dd5 xe-2798-aba848f9b752cf51474c0c3b1abcf0f572f774dc: aba848f9b752cf51474c0c3b1abcf0f572f774dc == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/index.html [-- Attachment #2: Type: text/html, Size: 1531 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ i915.CI.BAT: success for Add engine activity tests for functions 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro ` (2 preceding siblings ...) 2025-03-12 8:41 ` ✓ Xe.CI.BAT: success for Add engine activity tests for functions Patchwork @ 2025-03-12 8:59 ` Patchwork 2025-03-12 16:12 ` ✓ i915.CI.Full: " Patchwork 2025-03-12 23:19 ` ✗ Xe.CI.Full: failure " Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-03-12 8:59 UTC (permalink / raw) To: Riana Tauro; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 2442 bytes --] == Series Details == Series: Add engine activity tests for functions URL : https://patchwork.freedesktop.org/series/146186/ State : success == Summary == CI Bug Log - changes from IGT_8271 -> IGTPW_12753 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/index.html Participating hosts (44 -> 41) ------------------------------ Missing (3): bat-arlh-2 fi-snb-2520m bat-jsl-3 Known issues ------------ Here are the changes found in IGTPW_12753 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@late_gt_pm: - fi-cfl-8109u: [PASS][1] -> [DMESG-WARN][2] ([i915#13735]) +132 other tests dmesg-warn [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8271/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html #### Possible fixes #### * igt@core_auth@basic-auth: - fi-bsw-nick: [DMESG-WARN][3] ([i915#13736]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8271/fi-bsw-nick/igt@core_auth@basic-auth.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/fi-bsw-nick/igt@core_auth@basic-auth.html * igt@i915_selftest@live@workarounds: - bat-mtlp-6: [DMESG-FAIL][5] ([i915#12061]) -> [PASS][6] +1 other test pass [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8271/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735 [i915#13736]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13736 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_8271 -> IGTPW_12753 * Linux: CI_DRM_16265 -> CI_DRM_16266 CI-20190529: 20190529 CI_DRM_16265: eb17816e52395a403aa0b447aa0befa9d2f86dd5 @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_16266: aba848f9b752cf51474c0c3b1abcf0f572f774dc @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_12753: 12753 IGT_8271: 8271 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/index.html [-- Attachment #2: Type: text/html, Size: 3104 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ i915.CI.Full: success for Add engine activity tests for functions 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro ` (3 preceding siblings ...) 2025-03-12 8:59 ` ✓ i915.CI.BAT: " Patchwork @ 2025-03-12 16:12 ` Patchwork 2025-03-12 23:19 ` ✗ Xe.CI.Full: failure " Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-03-12 16:12 UTC (permalink / raw) To: Riana Tauro; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 983 bytes --] == Series Details == Series: Add engine activity tests for functions URL : https://patchwork.freedesktop.org/series/146186/ State : success == Summary == CI Bug Log - changes from CI_DRM_16266_full -> IGTPW_12753_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/index.html Participating hosts (12 -> 12) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * IGT: IGT_8271 -> IGTPW_12753 * Piglit: piglit_4509 -> None CI_DRM_16266: aba848f9b752cf51474c0c3b1abcf0f572f774dc @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_12753: 12753 IGT_8271: 8271 piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12753/index.html [-- Attachment #2: Type: text/html, Size: 1549 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.Full: failure for Add engine activity tests for functions 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro ` (4 preceding siblings ...) 2025-03-12 16:12 ` ✓ i915.CI.Full: " Patchwork @ 2025-03-12 23:19 ` Patchwork 5 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2025-03-12 23:19 UTC (permalink / raw) To: Riana Tauro; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 78414 bytes --] == Series Details == Series: Add engine activity tests for functions URL : https://patchwork.freedesktop.org/series/146186/ State : failure == Summary == CI Bug Log - changes from XEIGT_8271_full -> XEIGTPW_12753_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with XEIGTPW_12753_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in XEIGTPW_12753_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in XEIGTPW_12753_full: ### IGT changes ### #### Possible regressions #### * {igt@xe_pmu@all-fn-engine-activity-load} (NEW): - shard-dg2-set2: NOTRUN -> [SKIP][1] +1 other test skip [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@xe_pmu@all-fn-engine-activity-load.html - shard-lnl: NOTRUN -> [SKIP][2] [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@xe_pmu@all-fn-engine-activity-load.html * igt@xe_pmu@fn-engine-activity-load (NEW): - shard-bmg: NOTRUN -> [SKIP][3] +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@xe_pmu@fn-engine-activity-load.html New tests --------- New tests have been introduced between XEIGT_8271_full and XEIGTPW_12753_full: ### New IGT tests (3) ### * igt@kms_cursor_edge_walk@64x64-right-edge@pipe-c-edp-1: - Statuses : 1 pass(s) - Exec time: [4.36] s * igt@xe_pmu@all-fn-engine-activity-load: - Statuses : 3 skip(s) - Exec time: [0.0] s * igt@xe_pmu@fn-engine-activity-load: - Statuses : 2 skip(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in XEIGTPW_12753_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@hotunplug-rescan: - shard-lnl: NOTRUN -> [ABORT][4] ([Intel XE#3914]) +1 other test abort [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@core_hotunplug@hotunplug-rescan.html * igt@kms_3d: - shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1465]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_3d.html * igt@kms_async_flips@invalid-async-flip: - shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#873]) [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_async_flips@invalid-async-flip.html - shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#873]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_async_flips@invalid-async-flip.html * igt@kms_atomic@plane-primary-overlay-mutable-zpos: - shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2385]) [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#1407]) +4 other tests skip [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@x-tiled-32bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2327]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html * igt@kms_big_fb@x-tiled-8bpp-rotate-270: - shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#316]) +5 other tests skip [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html * igt@kms_big_fb@y-tiled-64bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1124]) +15 other tests skip [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html * igt@kms_big_fb@y-tiled-addfb-size-overflow: - shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#610]) [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@kms_big_fb@y-tiled-addfb-size-overflow.html - shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#1428]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html - shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#610]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_big_fb@y-tiled-addfb-size-overflow.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-180: - shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +10 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip: - shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +17 other tests skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p: - shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#2191]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html * igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p: - shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#2191]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2314] / [Intel XE#2894]) [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html * igt@kms_bw@linear-tiling-1-displays-1920x1080p: - shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#367]) +4 other tests skip [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html * igt@kms_bw@linear-tiling-3-displays-2160x1440p: - shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#367]) +1 other test skip [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html * igt@kms_bw@linear-tiling-4-displays-2560x1440p: - shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#367]) +1 other test skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc: - shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#2887]) +17 other tests skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#787]) +194 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs: - shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#2907]) +1 other test skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#3432]) +5 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs: - shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#3442]) [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs: - shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#3432]) +2 other tests skip [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#455] / [Intel XE#787]) +52 other tests skip [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs: - shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2887]) +19 other tests skip [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][33] ([Intel XE#3124]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [DMESG-WARN][34] ([Intel XE#1727] / [Intel XE#3113]) [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-6.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2724]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_cdclk@mode-transition-all-outputs.html - shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#4418]) [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_cdclk@mode-transition@pipe-c-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#4417]) +3 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_cdclk@mode-transition@pipe-c-dp-4.html * igt@kms_chamelium_color@ctm-negative: - shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#306]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_chamelium_color@ctm-negative.html - shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2325]) +1 other test skip [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_chamelium_color@ctm-negative.html - shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#306]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_chamelium_color@ctm-negative.html * igt@kms_chamelium_edid@dp-edid-change-during-hibernate: - shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2252]) +13 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode: - shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#373]) +13 other tests skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode: - shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#373]) +19 other tests skip [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html * igt@kms_content_protection@atomic: - shard-bmg: NOTRUN -> [FAIL][44] ([Intel XE#1178]) +4 other tests fail [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_content_protection@atomic.html * igt@kms_content_protection@content-type-change: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2341]) [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2390]) +1 other test skip [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_content_protection@dp-mst-lic-type-1.html - shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#307]) [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_content_protection@dp-mst-lic-type-1.html - shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#307]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@legacy@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][49] ([Intel XE#1178]) +2 other tests fail [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_content_protection@legacy@pipe-a-dp-4.html * igt@kms_content_protection@lic-type-0: - shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#3278]) +1 other test skip [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@kms_content_protection@lic-type-0.html * igt@kms_content_protection@lic-type-0@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][51] ([Intel XE#3304]) [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html * igt@kms_cursor_crc@cursor-offscreen-32x10: - shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2320]) +3 other tests skip [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-32x10.html * igt@kms_cursor_crc@cursor-sliding-128x42: - shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#1424]) [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_cursor_crc@cursor-sliding-128x42.html * igt@kms_cursor_crc@cursor-sliding-512x170: - shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#308]) +1 other test skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_cursor_crc@cursor-sliding-512x170.html - shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#2321]) +1 other test skip [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@kms_cursor_crc@cursor-sliding-512x170.html - shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2321]) [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-512x170.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2291]) +1 other test skip [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: - shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#309]) +4 other tests skip [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-6/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#323]) [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2286]) [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic: - shard-dg2-set2: [PASS][61] -> [SKIP][62] ([Intel XE#309]) [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-435/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html - shard-bmg: [PASS][63] -> [SKIP][64] ([Intel XE#2291]) [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl: - shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#4210]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html * igt@kms_dp_aux_dev: - shard-dg2-set2: NOTRUN -> [SKIP][66] ([Intel XE#3009]) [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_dp_aux_dev.html * igt@kms_dp_link_training@uhbr-sst: - shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#4354]) [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_dp_link_training@uhbr-sst.html - shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#4356]) [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_dp_link_training@uhbr-sst.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#4294]) [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_dsc@dsc-with-formats: - shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#2244]) [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_dsc@dsc-with-formats.html - shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#2244]) [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_dsc@dsc-with-formats.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests: - shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#4422]) +1 other test skip [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area: - shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#4422]) +1 other test skip [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html - shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#4422]) [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html * igt@kms_fbcon_fbt@psr-suspend: - shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#776]) [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@psr2: - shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#2374]) [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_feature_discovery@psr2.html - shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#1135]) [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_feature_discovery@psr2.html * igt@kms_flip@2x-absolute-wf_vblank-interruptible: - shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#310]) +1 other test skip [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html * igt@kms_flip@2x-flip-vs-suspend-interruptible: - shard-dg2-set2: [PASS][79] -> [SKIP][80] ([Intel XE#310]) +1 other test skip [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-435/igt@kms_flip@2x-flip-vs-suspend-interruptible.html [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_flip@2x-flip-vs-suspend-interruptible.html * igt@kms_flip@2x-plain-flip: - shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1421]) +8 other tests skip [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible: - shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2316]) +3 other tests skip [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html * igt@kms_flip@bo-too-big-interruptible: - shard-lnl: NOTRUN -> [TIMEOUT][83] ([Intel XE#1504]) +1 other test timeout [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-6/igt@kms_flip@bo-too-big-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-bmg: [PASS][84] -> [FAIL][85] ([Intel XE#3321]) +3 other tests fail [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp4: - shard-dg2-set2: [PASS][86] -> [FAIL][87] ([Intel XE#301]) +4 other tests fail [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp4.html [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp4.html * igt@kms_flip@plain-flip-fb-recreate: - shard-bmg: [PASS][88] -> [FAIL][89] ([Intel XE#2882] / [Intel XE#3098]) [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate.html [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate.html * igt@kms_flip@plain-flip-fb-recreate@a-edp1: - shard-lnl: [PASS][90] -> [FAIL][91] ([Intel XE#886]) +1 other test fail [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-8/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html * igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a3: - shard-bmg: [PASS][92] -> [FAIL][93] ([Intel XE#2882]) +2 other tests fail [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a3.html [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a3.html * igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a3: - shard-bmg: [PASS][94] -> [FAIL][95] ([Intel XE#3098]) [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a3.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a3.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#1397] / [Intel XE#1745]) [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#1397]) [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling: - shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2380]) +1 other test skip [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][99] ([Intel XE#1401]) +4 other tests skip [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling: - shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling: - shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#1401] / [Intel XE#1745]) +4 other tests skip [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode: - shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2293]) +5 other tests skip [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html * igt@kms_force_connector_basic@prune-stale-modes: - shard-lnl: NOTRUN -> [SKIP][103] ([Intel XE#352]) +1 other test skip [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render: - shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2312]) +20 other tests skip [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render: - shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#2311]) +28 other tests skip [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: - shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#4141]) +15 other tests skip [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: - shard-dg2-set2: [PASS][107] -> [SKIP][108] ([Intel XE#656]) +5 other tests skip [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt: - shard-lnl: NOTRUN -> [SKIP][109] ([Intel XE#651]) +18 other tests skip [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-linear: - shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#651]) +47 other tests skip [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-linear.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc: - shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#656]) +42 other tests skip [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y: - shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#2352]) [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt: - shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#656]) +6 other tests skip [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#2313]) +33 other tests skip [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-slowdraw: - shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#653]) +49 other tests skip [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-slowdraw.html * igt@kms_joiner@basic-max-non-joiner: - shard-dg2-set2: NOTRUN -> [SKIP][116] ([Intel XE#4298]) [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_joiner@basic-max-non-joiner.html * igt@kms_joiner@invalid-modeset-force-ultra-joiner: - shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#2925]) [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html - shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#2934]) [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html * igt@kms_joiner@invalid-modeset-ultra-joiner: - shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#2927]) [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_joiner@invalid-modeset-ultra-joiner.html - shard-lnl: NOTRUN -> [SKIP][120] ([Intel XE#2927]) [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html - shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#2927]) [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_joiner@invalid-modeset-ultra-joiner.html * igt@kms_pipe_stress@stress-xrgb8888-ytiled: - shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#4359]) [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html * igt@kms_plane@plane-position-covered@pipe-a-plane-4: - shard-lnl: [PASS][123] -> [DMESG-FAIL][124] ([Intel XE#324]) [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-2/igt@kms_plane@plane-position-covered@pipe-a-plane-4.html [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_plane@plane-position-covered@pipe-a-plane-4.html * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1: - shard-lnl: NOTRUN -> [SKIP][125] ([Intel XE#599]) +3 other tests skip [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html * igt@kms_plane_multiple@tiling-y: - shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#2493]) [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_plane_multiple@tiling-y.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-d: - shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#2763] / [Intel XE#455]) +7 other tests skip [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-d.html * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a: - shard-lnl: NOTRUN -> [SKIP][128] ([Intel XE#2763]) +19 other tests skip [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-8/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b: - shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#2763]) +11 other tests skip [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5: - shard-bmg: NOTRUN -> [SKIP][130] ([Intel XE#2763]) +19 other tests skip [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html * igt@kms_pm_backlight@fade: - shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#870]) [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_pm_backlight@fade.html - shard-dg2-set2: NOTRUN -> [SKIP][132] ([Intel XE#870]) +1 other test skip [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_pm_backlight@fade.html * igt@kms_pm_dc@dc3co-vpb-simulation: - shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#2391]) [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_pm_dc@dc3co-vpb-simulation.html * igt@kms_pm_dc@dc5-retention-flops: - shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#3309]) [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_pm_dc@dc5-retention-flops.html - shard-lnl: NOTRUN -> [SKIP][135] ([Intel XE#3309]) [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@kms_pm_dc@dc5-retention-flops.html - shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#3309]) [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_pm_dc@dc5-retention-flops.html * igt@kms_pm_dc@dc6-dpms: - shard-dg2-set2: NOTRUN -> [SKIP][137] ([Intel XE#908]) [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_pm_dc@dc6-dpms.html - shard-bmg: NOTRUN -> [FAIL][138] ([Intel XE#1430]) [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#1439] / [Intel XE#3141]) [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf: - shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#1489]) +9 other tests skip [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf: - shard-dg2-set2: NOTRUN -> [SKIP][141] ([Intel XE#1489]) +13 other tests skip [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area: - shard-lnl: NOTRUN -> [SKIP][142] ([Intel XE#2893]) +6 other tests skip [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#2387]) +1 other test skip [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr2_su@page_flip-nv12: - shard-dg2-set2: NOTRUN -> [SKIP][144] ([Intel XE#1122]) +1 other test skip [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_psr2_su@page_flip-nv12.html - shard-lnl: NOTRUN -> [SKIP][145] ([Intel XE#1128]) [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr@fbc-pr-no-drrs: - shard-dg2-set2: NOTRUN -> [SKIP][146] ([Intel XE#2850] / [Intel XE#929]) +26 other tests skip [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_psr@fbc-pr-no-drrs.html * igt@kms_psr@fbc-pr-suspend: - shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#1406]) +3 other tests skip [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_psr@fbc-pr-suspend.html * igt@kms_psr@fbc-psr2-cursor-plane-move: - shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#2234] / [Intel XE#2850]) +17 other tests skip [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_psr@fbc-psr2-cursor-plane-move.html * igt@kms_psr@psr2-primary-render: - shard-bmg: NOTRUN -> [SKIP][149] ([Intel XE#2234]) [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_psr@psr2-primary-render.html * igt@kms_rotation_crc@primary-rotation-90: - shard-bmg: NOTRUN -> [SKIP][150] ([Intel XE#3414] / [Intel XE#3904]) +3 other tests skip [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_rotation_crc@primary-rotation-90.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180: - shard-bmg: NOTRUN -> [SKIP][151] ([Intel XE#2330]) [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html - shard-dg2-set2: NOTRUN -> [SKIP][152] ([Intel XE#1127]) [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html - shard-lnl: NOTRUN -> [SKIP][153] ([Intel XE#1127]) [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-dg2-set2: NOTRUN -> [SKIP][154] ([Intel XE#3414]) +3 other tests skip [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-lnl: NOTRUN -> [SKIP][155] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_scaling_modes@scaling-mode-none: - shard-bmg: NOTRUN -> [SKIP][156] ([Intel XE#2413]) [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_scaling_modes@scaling-mode-none.html * igt@kms_setmode@basic-clone-single-crtc: - shard-bmg: NOTRUN -> [SKIP][157] ([Intel XE#1435]) +1 other test skip [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_setmode@basic-clone-single-crtc.html * igt@kms_setmode@invalid-clone-single-crtc: - shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#1435]) +2 other tests skip [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_setmode@invalid-clone-single-crtc.html * igt@kms_vrr@cmrr: - shard-bmg: NOTRUN -> [SKIP][159] ([Intel XE#2168]) [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_vrr@cmrr.html - shard-dg2-set2: NOTRUN -> [SKIP][160] ([Intel XE#2168]) [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_vrr@cmrr.html * igt@kms_vrr@flipline: - shard-dg2-set2: NOTRUN -> [SKIP][161] ([Intel XE#455]) +23 other tests skip [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_vrr@flipline.html * igt@kms_vrr@max-min: - shard-bmg: NOTRUN -> [SKIP][162] ([Intel XE#1499]) +1 other test skip [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_vrr@max-min.html * igt@kms_vrr@negative-basic: - shard-lnl: NOTRUN -> [SKIP][163] ([Intel XE#1499]) [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_vrr@negative-basic.html * igt@kms_writeback@writeback-fb-id-xrgb2101010: - shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#756]) +1 other test skip [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_writeback@writeback-fb-id-xrgb2101010.html - shard-lnl: NOTRUN -> [SKIP][165] ([Intel XE#756]) [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html * igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute: - shard-dg2-set2: NOTRUN -> [SKIP][166] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@xe_compute_preempt@compute-threadgroup-preempt@engine-drm_xe_engine_class_compute.html * igt@xe_eu_stall@blocking-read: - shard-dg2-set2: NOTRUN -> [SKIP][167] ([Intel XE#4497]) +1 other test skip [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@xe_eu_stall@blocking-read.html * igt@xe_eudebug@basic-vm-bind-ufence-delay-ack: - shard-dg2-set2: NOTRUN -> [SKIP][168] ([Intel XE#2905] / [Intel XE#3889]) [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html - shard-lnl: NOTRUN -> [SKIP][169] ([Intel XE#2905] / [Intel XE#3889]) [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-6/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html - shard-bmg: NOTRUN -> [SKIP][170] ([Intel XE#2905] / [Intel XE#3889]) [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html * igt@xe_eudebug@read-metadata: - shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#2905]) +10 other tests skip [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@xe_eudebug@read-metadata.html * igt@xe_eudebug@vma-ufence: - shard-bmg: NOTRUN -> [SKIP][172] ([Intel XE#2905]) +14 other tests skip [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@xe_eudebug@vma-ufence.html * igt@xe_eudebug_online@interrupt-all-set-breakpoint: - shard-dg2-set2: NOTRUN -> [SKIP][173] ([Intel XE#2905]) +16 other tests skip [173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html * igt@xe_eudebug_sriov@deny-eudebug: - shard-dg2-set2: NOTRUN -> [SKIP][174] ([Intel XE#4518]) [174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@xe_eudebug_sriov@deny-eudebug.html - shard-lnl: NOTRUN -> [SKIP][175] ([Intel XE#4518]) [175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@xe_eudebug_sriov@deny-eudebug.html - shard-bmg: NOTRUN -> [SKIP][176] ([Intel XE#4518]) [176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@xe_eudebug_sriov@deny-eudebug.html * igt@xe_evict@evict-beng-small-multi-vm: - shard-lnl: NOTRUN -> [SKIP][177] ([Intel XE#688]) +4 other tests skip [177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-1/igt@xe_evict@evict-beng-small-multi-vm.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic: - shard-dg2-set2: [PASS][178] -> [SKIP][179] ([Intel XE#1392]) +2 other tests skip [178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind: - shard-dg2-set2: NOTRUN -> [SKIP][180] ([Intel XE#1392]) [180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-rebind.html * igt@xe_exec_basic@multigpu-once-basic-defer-bind: - shard-bmg: NOTRUN -> [SKIP][181] ([Intel XE#2322]) +10 other tests skip [181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html * igt@xe_exec_basic@multigpu-once-basic-defer-mmap: - shard-lnl: NOTRUN -> [SKIP][182] ([Intel XE#1392]) +12 other tests skip [182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html * igt@xe_exec_fault_mode@many-bindexecqueue-userptr-invalidate-race: - shard-dg2-set2: NOTRUN -> [SKIP][183] ([Intel XE#288]) +38 other tests skip [183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-invalidate-race.html * igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit: - shard-lnl: NOTRUN -> [SKIP][184] ([Intel XE#2229]) [184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-6/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html * igt@xe_mmap@pci-membarrier-parallel: - shard-lnl: NOTRUN -> [SKIP][185] ([Intel XE#4045]) [185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@xe_mmap@pci-membarrier-parallel.html * igt@xe_noexec_ping_pong: - shard-lnl: NOTRUN -> [SKIP][186] ([Intel XE#379]) [186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-6/igt@xe_noexec_ping_pong.html * igt@xe_oa@syncs-ufence-wait: - shard-dg2-set2: NOTRUN -> [SKIP][187] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +3 other tests skip [187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@xe_oa@syncs-ufence-wait.html * igt@xe_oa@unprivileged-single-ctx-counters: - shard-dg2-set2: NOTRUN -> [SKIP][188] ([Intel XE#2541] / [Intel XE#3573]) +6 other tests skip [188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@xe_oa@unprivileged-single-ctx-counters.html * igt@xe_pat@pat-index-xe2: - shard-dg2-set2: NOTRUN -> [SKIP][189] ([Intel XE#977]) [189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@xe_pat@pat-index-xe2.html * igt@xe_pat@pat-index-xehpc: - shard-dg2-set2: NOTRUN -> [SKIP][190] ([Intel XE#2838] / [Intel XE#979]) [190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@xe_pat@pat-index-xehpc.html - shard-lnl: NOTRUN -> [SKIP][191] ([Intel XE#1420] / [Intel XE#2838]) [191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@xe_pat@pat-index-xehpc.html * igt@xe_pat@pat-index-xelp: - shard-bmg: NOTRUN -> [SKIP][192] ([Intel XE#2245]) [192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@xe_pat@pat-index-xelp.html * igt@xe_pm@d3cold-mmap-vram: - shard-dg2-set2: NOTRUN -> [SKIP][193] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip [193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@xe_pm@d3cold-mmap-vram.html - shard-lnl: NOTRUN -> [SKIP][194] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip [194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@xe_pm@d3cold-mmap-vram.html - shard-bmg: NOTRUN -> [SKIP][195] ([Intel XE#2284]) [195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@xe_pm@d3cold-mmap-vram.html * igt@xe_pm@s3-multiple-execs: - shard-lnl: NOTRUN -> [SKIP][196] ([Intel XE#584]) [196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-3/igt@xe_pm@s3-multiple-execs.html * igt@xe_pm@s4-basic-exec: - shard-dg2-set2: NOTRUN -> [ABORT][197] ([Intel XE#4268]) +1 other test abort [197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-466/igt@xe_pm@s4-basic-exec.html * igt@xe_pm@s4-vm-bind-prefetch: - shard-bmg: NOTRUN -> [ABORT][198] ([Intel XE#4268]) +1 other test abort [198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@xe_pm@s4-vm-bind-prefetch.html * igt@xe_query@multigpu-query-engines: - shard-dg2-set2: NOTRUN -> [SKIP][199] ([Intel XE#944]) +4 other tests skip [199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_query@multigpu-query-engines.html * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz: - shard-bmg: NOTRUN -> [SKIP][200] ([Intel XE#944]) +4 other tests skip [200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html * igt@xe_query@multigpu-query-oa-units: - shard-lnl: NOTRUN -> [SKIP][201] ([Intel XE#944]) +1 other test skip [201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@xe_query@multigpu-query-oa-units.html * igt@xe_sriov_auto_provisioning@selfconfig-basic: - shard-dg2-set2: NOTRUN -> [SKIP][202] ([Intel XE#4130]) +1 other test skip [202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@xe_sriov_auto_provisioning@selfconfig-basic.html * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs: - shard-bmg: NOTRUN -> [SKIP][203] ([Intel XE#4130]) [203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html - shard-lnl: NOTRUN -> [SKIP][204] ([Intel XE#4130]) [204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html * igt@xe_sriov_scheduling@equal-throughput: - shard-bmg: NOTRUN -> [SKIP][205] ([Intel XE#4351]) [205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@xe_sriov_scheduling@equal-throughput.html * igt@xe_sriov_scheduling@nonpreempt-engine-resets: - shard-dg2-set2: NOTRUN -> [SKIP][206] ([Intel XE#4351]) +1 other test skip [206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html - shard-lnl: NOTRUN -> [SKIP][207] ([Intel XE#4351]) [207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-5/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html #### Possible fixes #### * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-dg2-set2: [SKIP][208] ([Intel XE#2191]) -> [PASS][209] [208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs: - shard-dg2-set2: [INCOMPLETE][210] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][211] +1 other test pass [210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6: - shard-dg2-set2: [INCOMPLETE][212] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4502] / [Intel XE#4522]) -> [PASS][213] [212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions: - shard-dg2-set2: [SKIP][214] ([Intel XE#309]) -> [PASS][215] [214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [SKIP][216] ([Intel XE#2291]) -> [PASS][217] +3 other tests pass [216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle: - shard-bmg: [DMESG-WARN][218] ([Intel XE#877]) -> [PASS][219] [218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html * igt@kms_flip@2x-wf_vblank-ts-check: - shard-bmg: [SKIP][220] ([Intel XE#2316]) -> [PASS][221] +5 other tests pass [220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_flip@2x-wf_vblank-ts-check.html - shard-dg2-set2: [SKIP][222] ([Intel XE#310]) -> [PASS][223] +2 other tests pass [222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_flip@2x-wf_vblank-ts-check.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@kms_flip@2x-wf_vblank-ts-check.html * igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3: - shard-bmg: [FAIL][224] ([Intel XE#3321]) -> [PASS][225] [224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a3.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc: - shard-dg2-set2: [SKIP][226] ([Intel XE#656]) -> [PASS][227] +3 other tests pass [226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html * igt@kms_plane@plane-position-covered@pipe-a-plane-3: - shard-lnl: [DMESG-FAIL][228] ([Intel XE#324]) -> [PASS][229] [228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-2/igt@kms_plane@plane-position-covered@pipe-a-plane-3.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-2/igt@kms_plane@plane-position-covered@pipe-a-plane-3.html * igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-3: - shard-lnl: [DMESG-WARN][230] ([Intel XE#324]) -> [PASS][231] [230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-6/igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-3.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-7/igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-3.html * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64: - shard-dg2-set2: [FAIL][232] ([Intel XE#616]) -> [PASS][233] +1 other test pass [232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-436/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html * igt@kms_pm_dc@dc5-dpms: - shard-lnl: [FAIL][234] ([Intel XE#718]) -> [PASS][235] [234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-5/igt@kms_pm_dc@dc5-dpms.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html * igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1: - shard-lnl: [FAIL][236] ([Intel XE#899]) -> [PASS][237] [236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-lnl-2/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-lnl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html * igt@xe_exec_basic@multigpu-once-bindexecqueue: - shard-dg2-set2: [SKIP][238] ([Intel XE#1392]) -> [PASS][239] [238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@xe_exec_basic@multigpu-once-bindexecqueue.html * igt@xe_exec_compute_mode@many-userptr-invalidate-race: - shard-dg2-set2: [INCOMPLETE][240] -> [PASS][241] [240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-435/igt@xe_exec_compute_mode@many-userptr-invalidate-race.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-432/igt@xe_exec_compute_mode@many-userptr-invalidate-race.html #### Warnings #### * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-6: - shard-dg2-set2: [SKIP][242] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][243] ([Intel XE#787]) +5 other tests skip [242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-6.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-6.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: [INCOMPLETE][244] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4522]) -> [INCOMPLETE][245] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) [244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-6: - shard-dg2-set2: [SKIP][246] ([Intel XE#787]) -> [SKIP][247] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip [246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-463/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-6.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-6.html * igt@kms_content_protection@legacy: - shard-bmg: [SKIP][248] ([Intel XE#2341]) -> [FAIL][249] ([Intel XE#1178]) [248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_content_protection@legacy.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_content_protection@legacy.html - shard-dg2-set2: [SKIP][250] ([Intel XE#455]) -> [FAIL][251] ([Intel XE#1178]) [250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_content_protection@legacy.html [251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_content_protection@legacy.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-bmg: [FAIL][252] ([Intel XE#3321]) -> [SKIP][253] ([Intel XE#2316]) [252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank.html [253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move: - shard-dg2-set2: [SKIP][254] ([Intel XE#651]) -> [SKIP][255] ([Intel XE#656]) +5 other tests skip [254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html [255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render: - shard-dg2-set2: [SKIP][256] ([Intel XE#656]) -> [SKIP][257] ([Intel XE#651]) +8 other tests skip [256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render.html [257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen: - shard-bmg: [SKIP][258] ([Intel XE#4141]) -> [SKIP][259] ([Intel XE#2312]) +4 other tests skip [258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html [259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt: - shard-bmg: [SKIP][260] ([Intel XE#2312]) -> [SKIP][261] ([Intel XE#4141]) +1 other test skip [260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html [261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render: - shard-bmg: [SKIP][262] ([Intel XE#2311]) -> [SKIP][263] ([Intel XE#2312]) +7 other tests skip [262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html [263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt: - shard-bmg: [SKIP][264] ([Intel XE#2312]) -> [SKIP][265] ([Intel XE#2311]) +13 other tests skip [264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html [265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt: - shard-bmg: [SKIP][266] ([Intel XE#2312]) -> [SKIP][267] ([Intel XE#2313]) +10 other tests skip [266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html [267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff: - shard-bmg: [SKIP][268] ([Intel XE#2313]) -> [SKIP][269] ([Intel XE#2312]) +4 other tests skip [268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html [269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt: - shard-dg2-set2: [SKIP][270] ([Intel XE#653]) -> [SKIP][271] ([Intel XE#656]) +5 other tests skip [270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html [271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc: - shard-dg2-set2: [SKIP][272] ([Intel XE#656]) -> [SKIP][273] ([Intel XE#653]) +4 other tests skip [272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html [273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_hdr@brightness-with-hdr: - shard-bmg: [SKIP][274] ([Intel XE#3544]) -> [SKIP][275] ([Intel XE#3374] / [Intel XE#3544]) [274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html [275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-dg2-set2: [SKIP][276] ([Intel XE#362]) -> [SKIP][277] ([Intel XE#1500]) [276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html [277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@xe_pm@s4-basic: - shard-dg2-set2: [ABORT][278] -> [ABORT][279] ([Intel XE#4268]) [278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8271/shard-dg2-434/igt@xe_pm@s4-basic.html [279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/shard-dg2-435/igt@xe_pm@s4-basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128 [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397 [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428 [Intel XE#1430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1430 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1465]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1465 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500 [Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244 [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352 [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374 [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380 [Intel XE#2385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2385 [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387 [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390 [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391 [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413 [Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493 [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705 [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905 [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907 [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925 [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927 [Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934 [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307 [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098 [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/324 [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278 [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304 [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309 [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442 [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379 [Intel XE#3889]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3889 [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904 [Intel XE#3914]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3914 [Intel XE#4045]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4045 [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130 [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141 [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210 [Intel XE#4268]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4268 [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294 [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298 [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351 [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354 [Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356 [Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359 [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417 [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418 [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422 [Intel XE#4497]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4497 [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501 [Intel XE#4502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4502 [Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518 [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599 [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610 [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718 [Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756 [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870 [Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873 [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877 [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886 [Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899 [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977 [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979 Build changes ------------- * IGT: IGT_8271 -> IGTPW_12753 * Linux: xe-2797-eb17816e52395a403aa0b447aa0befa9d2f86dd5 -> xe-2798-aba848f9b752cf51474c0c3b1abcf0f572f774dc IGTPW_12753: 12753 IGT_8271: 8271 xe-2797-eb17816e52395a403aa0b447aa0befa9d2f86dd5: eb17816e52395a403aa0b447aa0befa9d2f86dd5 xe-2798-aba848f9b752cf51474c0c3b1abcf0f572f774dc: aba848f9b752cf51474c0c3b1abcf0f572f774dc == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12753/index.html [-- Attachment #2: Type: text/html, Size: 92586 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2025-03-20 13:52 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-03-12 6:24 [PATCH i-g-t v2 0/2] Add engine activity tests for functions Riana Tauro 2025-03-12 6:24 ` [PATCH i-g-t v2 1/2] tests/intel/xe_pmu: Add engine activity test for all functions Riana Tauro 2025-03-19 22:22 ` Umesh Nerlige Ramappa 2025-03-19 23:11 ` Umesh Nerlige Ramappa 2025-03-20 13:51 ` Riana Tauro 2025-03-12 6:24 ` [PATCH i-g-t v2 2/2] tests/intel/xe_pmu: Add a test to validate engine activity on a function Riana Tauro 2025-03-19 23:17 ` Umesh Nerlige Ramappa 2025-03-12 8:41 ` ✓ Xe.CI.BAT: success for Add engine activity tests for functions Patchwork 2025-03-12 8:59 ` ✓ i915.CI.BAT: " Patchwork 2025-03-12 16:12 ` ✓ i915.CI.Full: " Patchwork 2025-03-12 23:19 ` ✗ Xe.CI.Full: failure " Patchwork
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