* [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct
@ 2023-01-20 10:14 Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type Karolina Stolarek
` (10 more replies)
0 siblings, 11 replies; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
This patch series introduces a new way of checking if a specific
tiling format and/or blitter copy command is supported on
the current platform. Instead of using functions with hardcoded
devices, now we store information about available features in
blt_cmd_info struct, each of the instances connected to the
intel_device_info definitions.
Two patches that follow the introduction of blt_cmd_info and
intel_device_info modification are a prep work for the fast
copy test -- extracting needed functions and updating
fill_data() to support TileYF (available only for Pre-gen12).
In addition to this, the patchset adds two fast copy tests: basic
fast-copy where two blit copies are done in separate batches, and
fast-copy-emit which uses emit_blt_fast_copy() and manually
crafts two copies in one batch.
v7:
- Break down the first patch in the series into three separate
changes (Zbigniew)
- Add requirement for "gem_uses_full_ppgtt(i915)" to
gem_exercise_blt (Zbigniew)
- Rename supported_tiling field in blt_cmd_info to supported_cmds
(Zbigniew)
- Add GET_BLT_INFO in i915_blt.c to wrap calls to
intel_get_blt_info
v6:
- Rename the library to intel_tiling_info, and keep only struct
definitions there
- Move predicates to i915_blt.c, as this is going to be the main
user of the library
- Regenerate patch "lib/i915_blt: Add common functions for
blt_copy_object", as i915_blt.(ch) significantly changed after
rewriting the first patch
v5:
- Rebase, fix conflict in gem_ccs.c
v4:
- Move the inclusion of igt_core.h to intel_blt_info.c
(Kamil/Petri)
- Rename __MAX_TILING and __MAX_CMD so they are blitter-specific
(Kamil)
- Use BIT() macro from intel_chipset.h (Zbigniew)
- Check for empty blt_tiling_info in tiling_info(), and warn
about it
- Change blt_cmd_info declarations in intel_blt_info. Add a
separate file for their definitions (intel_tiling_info.c).
Update lib/mason.build to reflect that change (Zbigniew)
- Remove definitions for ATS-M, as we can reuse dg2's (Zbigniew)
- Add EXEC_OBJECT_WRITE flag for dest in fast-copy-emit subtest
(Zbigniew)
Karolina Stolarek (9):
lib/i915_blt: Rename blt_tiling to blt_tiling_type
lib/i915_blt: Add T_YFMAJOR tiling type
lib/i915_blt: Check for Tile-YF in fast_copy
i915/lib: Add new library for blitter and tiling formats
lib/intel_device_info: Update platform definitions with blitter
information
lib/i915_blt: Add helpers to check if command or tiling is supported
lib/i915_blt: Add common functions for blt_copy_object
tests/gem_exercise_blt: Add fast-copy test
tests/gem_exercise_blt: Add fast-copy-emit test
lib/i915/i915_blt.c | 238 ++++++++++++++++++--
lib/i915/i915_blt.h | 53 +++--
lib/i915/intel_tiling_info.c | 88 ++++++++
lib/i915/intel_tiling_info.h | 47 ++++
lib/intel_chipset.h | 4 +
lib/intel_device_info.c | 47 ++++
lib/meson.build | 5 +-
tests/i915/gem_ccs.c | 209 +++++-------------
tests/i915/gem_exercise_blt.c | 389 +++++++++++++++++++++++++++++++++
tests/i915/gem_lmem_swapping.c | 81 ++-----
tests/meson.build | 1 +
11 files changed, 910 insertions(+), 252 deletions(-)
create mode 100644 lib/i915/intel_tiling_info.c
create mode 100644 lib/i915/intel_tiling_info.h
create mode 100644 tests/i915/gem_exercise_blt.c
--
2.25.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:03 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type Karolina Stolarek
` (9 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Make it more clear that blt_tiling enum indicates the tiling type.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/i915_blt.c | 8 ++++----
lib/i915/i915_blt.h | 8 ++++----
tests/i915/gem_ccs.c | 10 +++++-----
tests/i915/gem_lmem_swapping.c | 2 +-
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 54193565..694c818c 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -217,7 +217,7 @@ bool blt_supports_compression(int i915)
* Returns:
* true if it does, false otherwise.
*/
-bool blt_supports_tiling(int i915, enum blt_tiling tiling)
+bool blt_supports_tiling(int i915, enum blt_tiling_type tiling)
{
uint32_t devid = intel_get_drm_devid(i915);
@@ -245,7 +245,7 @@ bool blt_supports_tiling(int i915, enum blt_tiling tiling)
* Returns:
* name of @tiling passed. Useful to build test names.
*/
-const char *blt_tiling_name(enum blt_tiling tiling)
+const char *blt_tiling_name(enum blt_tiling_type tiling)
{
switch (tiling) {
case T_LINEAR: return "linear";
@@ -259,7 +259,7 @@ const char *blt_tiling_name(enum blt_tiling tiling)
return NULL;
}
-static int __block_tiling(enum blt_tiling tiling)
+static int __block_tiling(enum blt_tiling_type tiling)
{
switch (tiling) {
case T_LINEAR: return 0;
@@ -891,7 +891,7 @@ struct gen12_fast_copy_data {
} dw09;
};
-static int __fast_tiling(enum blt_tiling tiling)
+static int __fast_tiling(enum blt_tiling_type tiling)
{
switch (tiling) {
case T_LINEAR: return 0;
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 34db9bb9..747eb093 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -59,7 +59,7 @@ enum blt_color_depth {
CD_128bit,
};
-enum blt_tiling {
+enum blt_tiling_type {
T_LINEAR,
T_XMAJOR,
T_YMAJOR,
@@ -83,7 +83,7 @@ struct blt_copy_object {
uint32_t region;
uint64_t size;
uint8_t mocs;
- enum blt_tiling tiling;
+ enum blt_tiling_type tiling;
enum blt_compression compression; /* BC only */
enum blt_compression_type compression_type; /* BC only */
uint32_t pitch;
@@ -165,8 +165,8 @@ struct blt_ctrl_surf_copy_data {
};
bool blt_supports_compression(int i915);
-bool blt_supports_tiling(int i915, enum blt_tiling tiling);
-const char *blt_tiling_name(enum blt_tiling tiling);
+bool blt_supports_tiling(int i915, enum blt_tiling_type tiling);
+const char *blt_tiling_name(enum blt_tiling_type tiling);
uint64_t emit_blt_block_copy(int i915,
uint64_t ahnd,
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 6ae5ad85..724aa20b 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -46,7 +46,7 @@ struct test_config {
static void set_object(struct blt_copy_object *obj,
uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling tiling,
+ uint8_t mocs, enum blt_tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type)
{
@@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
static struct blt_copy_object *
create_object(int i915, uint32_t region,
uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
- enum blt_tiling tiling,
+ enum blt_tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type,
bool create_mapping)
@@ -429,7 +429,7 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling,
+ enum blt_tiling_type mid_tiling,
const struct test_config *config)
{
struct blt_copy_data blt = {};
@@ -548,7 +548,7 @@ static void block_multicopy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling,
+ enum blt_tiling_type mid_tiling,
const struct test_config *config)
{
struct blt_copy3_data blt3 = {};
@@ -637,7 +637,7 @@ static const struct {
const char *suffix;
void (*copyfn)(int, const intel_ctx_t *,
const struct intel_execution_engine2 *,
- uint32_t, uint32_t, enum blt_tiling,
+ uint32_t, uint32_t, enum blt_tiling_type,
const struct test_config *);
} copyfns[] = {
[BLOCK_COPY] = { "", block_copy },
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 75121d41..9388d4de 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -78,7 +78,7 @@ struct object {
static void set_object(struct blt_copy_object *obj,
uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling tiling,
+ uint8_t mocs, enum blt_tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type)
{
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:05 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 3/9] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
` (8 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Introduce a tiling type used by older generation in fast copy command.
Update functions that use blt_tiling_type to handle this type.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/i915_blt.c | 10 ++++++++++
lib/i915/i915_blt.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 694c818c..a1abc2eb 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -253,6 +253,9 @@ const char *blt_tiling_name(enum blt_tiling_type tiling)
case T_YMAJOR: return "ymajor";
case T_TILE4: return "tile4";
case T_TILE64: return "tile64";
+ case T_YFMAJOR: return "yfmajor";
+ default:
+ break;
}
igt_warn("invalid tiling passed: %d\n", tiling);
@@ -267,6 +270,8 @@ static int __block_tiling(enum blt_tiling_type tiling)
case T_YMAJOR: return 1;
case T_TILE4: return 2;
case T_TILE64: return 3;
+ default:
+ break;
}
igt_warn("invalid tiling passed: %d\n", tiling);
@@ -898,8 +903,13 @@ static int __fast_tiling(enum blt_tiling_type tiling)
case T_XMAJOR: return 1;
case T_YMAJOR: return 2;
case T_TILE4: return 2;
+ case T_YFMAJOR: return 2;
case T_TILE64: return 3;
+ default:
+ break;
}
+
+ igt_warn("invalid tiling passed: %d\n", tiling);
return 0;
}
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 747eb093..bc375aba 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -65,6 +65,7 @@ enum blt_tiling_type {
T_YMAJOR,
T_TILE4,
T_TILE64,
+ T_YFMAJOR,
};
enum blt_compression {
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 3/9] lib/i915_blt: Check for Tile-YF in fast_copy
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats Karolina Stolarek
` (7 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
In older gens Tile4 is not available, we have Tile-YF instead. Check for
both tilings when setting up the fast_copy command.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
lib/i915/i915_blt.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index a1abc2eb..cd7422d1 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -311,6 +311,11 @@ static enum blt_aux_mode __aux_mode(const struct blt_copy_object *obj)
return AM_AUX_NONE;
}
+static bool __new_tile_y_type(enum blt_tiling_type tiling)
+{
+ return tiling == T_TILE4 || tiling == T_YFMAJOR;
+}
+
static void fill_data(struct gen12_block_copy_data *data,
const struct blt_copy_data *blt,
uint64_t src_offset, uint64_t dst_offset,
@@ -1001,8 +1006,8 @@ uint64_t emit_blt_fast_copy(int i915,
data.dw01.color_depth = __fast_color_depth(blt->color_depth);
data.dw01.dst_memory = __memory_type(blt->dst.region);
data.dw01.src_memory = __memory_type(blt->src.region);
- data.dw01.dst_type_y = blt->dst.tiling == T_TILE4 ? 1 : 0;
- data.dw01.src_type_y = blt->src.tiling == T_TILE4 ? 1 : 0;
+ data.dw01.dst_type_y = __new_tile_y_type(blt->dst.tiling) ? 1 : 0;
+ data.dw01.src_type_y = __new_tile_y_type(blt->src.tiling) ? 1 : 0;
data.dw02.dst_x1 = blt->dst.x1;
data.dw02.dst_y1 = blt->dst.y1;
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (2 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 3/9] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:08 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information Karolina Stolarek
` (6 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Add structs to describe what blitter commands and tiling formats
are supported per platform. Move blt_tiling enum to the newly
created library and update its definition.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/i915_blt.h | 10 +---
lib/i915/intel_tiling_info.c | 88 ++++++++++++++++++++++++++++++++++++
lib/i915/intel_tiling_info.h | 47 +++++++++++++++++++
lib/meson.build | 5 +-
4 files changed, 140 insertions(+), 10 deletions(-)
create mode 100644 lib/i915/intel_tiling_info.c
create mode 100644 lib/i915/intel_tiling_info.h
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index bc375aba..9837dcac 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -47,6 +47,7 @@
#include <malloc.h>
#include "drm.h"
#include "igt.h"
+#include "intel_tiling_info.h"
#define CCS_RATIO 256
@@ -59,15 +60,6 @@ enum blt_color_depth {
CD_128bit,
};
-enum blt_tiling_type {
- T_LINEAR,
- T_XMAJOR,
- T_YMAJOR,
- T_TILE4,
- T_TILE64,
- T_YFMAJOR,
-};
-
enum blt_compression {
COMPRESSION_DISABLED,
COMPRESSION_ENABLED,
diff --git a/lib/i915/intel_tiling_info.c b/lib/i915/intel_tiling_info.c
new file mode 100644
index 00000000..ab1d21d9
--- /dev/null
+++ b/lib/i915/intel_tiling_info.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <stdint.h>
+#include "intel_chipset.h"
+#include "i915/intel_tiling_info.h"
+
+#define BLT_INFO(_cmd, _tiling) { \
+ .blt_cmd_type = _cmd, \
+ .supported_tiling = _tiling \
+ }
+
+static const struct blt_tiling_info src_copy = BLT_INFO(SRC_COPY, BIT(T_LINEAR));
+static const struct blt_tiling_info
+ pre_gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_XMAJOR));
+static const struct blt_tiling_info
+ gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_XMAJOR) |
+ BIT(T_YMAJOR));
+static const struct blt_tiling_info
+ gen11_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_YMAJOR) |
+ BIT(T_YFMAJOR) |
+ BIT(T_TILE64));
+static const struct blt_tiling_info
+ gen12_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_YMAJOR) |
+ BIT(T_TILE4) |
+ BIT(T_TILE64));
+static const struct blt_tiling_info
+ dg2_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_XMAJOR) |
+ BIT(T_TILE4) |
+ BIT(T_TILE64));
+static const struct blt_tiling_info
+ gen12_xy_block_copy = BLT_INFO(XY_BLOCK_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_YMAJOR));
+static const struct blt_tiling_info
+ dg2_xy_block_copy = BLT_INFO(XY_BLOCK_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_XMAJOR) |
+ BIT(T_TILE4) |
+ BIT(T_TILE64));
+
+const struct blt_cmd_info pre_gen8_blt_info = {
+ .supported_cmds = {
+ [SRC_COPY] = &src_copy,
+ [XY_SRC_COPY] = &pre_gen8_xy_src_copy
+ }
+};
+
+const struct blt_cmd_info gen8_blt_info = {
+ .supported_cmds = {
+ [XY_SRC_COPY] = &gen8_xy_src_copy,
+ }
+};
+
+const struct blt_cmd_info gen11_blt_info = {
+ .supported_cmds = {
+ [XY_SRC_COPY] = &gen8_xy_src_copy,
+ [XY_FAST_COPY] = &gen11_xy_fast_copy,
+ }
+};
+
+const struct blt_cmd_info gen12_blt_info = {
+ .supported_cmds = {
+ [XY_SRC_COPY] = &gen8_xy_src_copy,
+ [XY_FAST_COPY] = &gen12_xy_fast_copy,
+ [XY_BLOCK_COPY] = &gen12_xy_block_copy,
+ }
+};
+
+const struct blt_cmd_info gen12_dg2_blt_info = {
+ .supported_cmds = {
+ [XY_SRC_COPY] = &gen8_xy_src_copy,
+ [XY_FAST_COPY] = &dg2_xy_fast_copy,
+ [XY_BLOCK_COPY] = &dg2_xy_block_copy,
+ }
+};
diff --git a/lib/i915/intel_tiling_info.h b/lib/i915/intel_tiling_info.h
new file mode 100644
index 00000000..21ed8761
--- /dev/null
+++ b/lib/i915/intel_tiling_info.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __INTEL_TILING_INFO_H
+#define __INTEL_TILING_INFO_H
+
+#include <stdint.h>
+
+enum blt_tiling_type {
+ T_LINEAR,
+ T_XMAJOR,
+ T_YMAJOR,
+ T_TILE4,
+ T_TILE64,
+ T_YFMAJOR,
+ __BLT_MAX_TILING
+};
+
+enum blt_cmd_type {
+ SRC_COPY,
+ XY_SRC_COPY,
+ XY_FAST_COPY,
+ XY_BLOCK_COPY,
+ __BLT_MAX_CMD
+};
+
+struct blt_tiling_info {
+ enum blt_cmd_type blt_cmd_type;
+ uint32_t supported_tiling;
+};
+
+struct blt_cmd_info {
+ struct blt_tiling_info const *supported_cmds[__BLT_MAX_CMD];
+};
+
+extern const struct blt_cmd_info pre_gen8_blt_info;
+extern const struct blt_cmd_info gen8_blt_info;
+extern const struct blt_cmd_info gen11_blt_info;
+extern const struct blt_cmd_info gen12_blt_info;
+extern const struct blt_cmd_info gen12_dg2_blt_info;
+
+#define for_each_tiling(__tiling) \
+ for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
+
+#endif
diff --git a/lib/meson.build b/lib/meson.build
index cc784686..22069440 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -14,6 +14,7 @@ lib_sources = [
'i915/intel_decode.c',
'i915/intel_memory_region.c',
'i915/intel_mocs.c',
+ 'i915/intel_tiling_info.c',
'i915/i915_blt.c',
'i915/i915_crc.c',
'igt_collection.c',
@@ -216,7 +217,8 @@ igt_deps = [ lib_igt ] + lib_deps
lin_igt_chipset_build = static_library('igt_chipset',
['intel_chipset.c',
- 'intel_device_info.c'],
+ 'intel_device_info.c',
+ 'i915/intel_tiling_info.c'],
include_directories : inc)
lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
@@ -239,6 +241,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
'igt_list.c',
'igt_tools_stub.c',
'intel_device_info.c',
+ 'i915/intel_tiling_info.c',
],
dependencies : scan_dep,
include_directories : inc)
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (3 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:10 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported Karolina Stolarek
` (5 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Update entries in intel_device_info to store information on
supported blitter commands and tiling formats. Add a function
to return tiling information for a device.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/intel_chipset.h | 4 ++++
lib/intel_device_info.c | 47 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+)
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 9b39472a..cceca929 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -31,6 +31,8 @@
#include <pciaccess.h>
#include <stdbool.h>
+#include "i915/intel_tiling_info.h"
+
#define BIT(x) (1ul <<(x))
struct pci_device *intel_get_pci_device(void);
@@ -86,11 +88,13 @@ struct intel_device_info {
bool is_alderlake_p : 1;
bool is_alderlake_n : 1;
bool is_meteorlake : 1;
+ const struct blt_cmd_info *blt_tiling;
const char *codename;
};
const struct intel_device_info *intel_get_device_info(uint16_t devid) __attribute__((pure));
+const struct blt_cmd_info *intel_get_blt_info(uint16_t devid) __attribute__((pure));
unsigned intel_gen(uint16_t devid) __attribute__((pure));
unsigned intel_graphics_ver(uint16_t devid) __attribute__((pure));
unsigned intel_display_ver(uint16_t devid) __attribute__((pure));
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 68dd17ee..f1233ee0 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -145,6 +145,7 @@ static const struct intel_device_info intel_sandybridge_info = {
.graphics_ver = 6,
.display_ver = 6,
.is_sandybridge = true,
+ .blt_tiling = &pre_gen8_blt_info,
.codename = "sandybridge"
};
static const struct intel_device_info intel_sandybridge_m_info = {
@@ -152,6 +153,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
.display_ver = 6,
.is_mobile = true,
.is_sandybridge = true,
+ .blt_tiling = &pre_gen8_blt_info,
.codename = "sandybridge"
};
@@ -159,6 +161,7 @@ static const struct intel_device_info intel_ivybridge_info = {
.graphics_ver = 7,
.display_ver = 7,
.is_ivybridge = true,
+ .blt_tiling = &pre_gen8_blt_info,
.codename = "ivybridge"
};
static const struct intel_device_info intel_ivybridge_m_info = {
@@ -166,6 +169,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
.display_ver = 7,
.is_mobile = true,
.is_ivybridge = true,
+ .blt_tiling = &pre_gen8_blt_info,
.codename = "ivybridge"
};
@@ -173,6 +177,7 @@ static const struct intel_device_info intel_valleyview_info = {
.graphics_ver = 7,
.display_ver = 7,
.is_valleyview = true,
+ .blt_tiling = &pre_gen8_blt_info,
.codename = "valleyview"
};
@@ -180,6 +185,7 @@ static const struct intel_device_info intel_valleyview_info = {
.graphics_ver = 7, \
.display_ver = 7, \
.is_haswell = true, \
+ .blt_tiling = &pre_gen8_blt_info, \
.codename = "haswell"
static const struct intel_device_info intel_haswell_gt1_info = {
@@ -201,6 +207,7 @@ static const struct intel_device_info intel_haswell_gt3_info = {
.graphics_ver = 8, \
.display_ver = 8, \
.is_broadwell = true, \
+ .blt_tiling = &gen8_blt_info, \
.codename = "broadwell"
static const struct intel_device_info intel_broadwell_gt1_info = {
@@ -226,12 +233,14 @@ static const struct intel_device_info intel_cherryview_info = {
.graphics_ver = 8,
.display_ver = 8,
.is_cherryview = true,
+ .blt_tiling = &gen8_blt_info,
.codename = "cherryview"
};
#define SKYLAKE_FIELDS \
.graphics_ver = 9, \
.display_ver = 9, \
+ .blt_tiling = &gen11_blt_info, \
.codename = "skylake", \
.is_skylake = true
@@ -259,6 +268,7 @@ static const struct intel_device_info intel_broxton_info = {
.graphics_ver = 9,
.display_ver = 9,
.is_broxton = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "broxton"
};
@@ -266,6 +276,7 @@ static const struct intel_device_info intel_broxton_info = {
.graphics_ver = 9, \
.display_ver = 9, \
.is_kabylake = true, \
+ .blt_tiling = &gen11_blt_info, \
.codename = "kabylake"
static const struct intel_device_info intel_kabylake_gt1_info = {
@@ -292,6 +303,7 @@ static const struct intel_device_info intel_geminilake_info = {
.graphics_ver = 9,
.display_ver = 9,
.is_geminilake = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "geminilake"
};
@@ -299,6 +311,7 @@ static const struct intel_device_info intel_geminilake_info = {
.graphics_ver = 9, \
.display_ver = 9, \
.is_coffeelake = true, \
+ .blt_tiling = &gen11_blt_info, \
.codename = "coffeelake"
static const struct intel_device_info intel_coffeelake_gt1_info = {
@@ -320,6 +333,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
.graphics_ver = 9, \
.display_ver = 9, \
.is_cometlake = true, \
+ .blt_tiling = &gen11_blt_info, \
.codename = "cometlake"
static const struct intel_device_info intel_cometlake_gt1_info = {
@@ -336,6 +350,7 @@ static const struct intel_device_info intel_cannonlake_info = {
.graphics_ver = 10,
.display_ver = 10,
.is_cannonlake = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "cannonlake"
};
@@ -343,6 +358,7 @@ static const struct intel_device_info intel_icelake_info = {
.graphics_ver = 11,
.display_ver = 11,
.is_icelake = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "icelake"
};
@@ -350,6 +366,7 @@ static const struct intel_device_info intel_elkhartlake_info = {
.graphics_ver = 11,
.display_ver = 11,
.is_elkhartlake = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "elkhartlake"
};
@@ -357,6 +374,7 @@ static const struct intel_device_info intel_jasperlake_info = {
.graphics_ver = 11,
.display_ver = 11,
.is_jasperlake = true,
+ .blt_tiling = &gen11_blt_info,
.codename = "jasperlake"
};
@@ -364,6 +382,7 @@ static const struct intel_device_info intel_tigerlake_gt1_info = {
.graphics_ver = 12,
.display_ver = 12,
.is_tigerlake = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "tigerlake",
.gt = 1,
};
@@ -372,6 +391,7 @@ static const struct intel_device_info intel_tigerlake_gt2_info = {
.graphics_ver = 12,
.display_ver = 12,
.is_tigerlake = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "tigerlake",
.gt = 2,
};
@@ -380,6 +400,7 @@ static const struct intel_device_info intel_rocketlake_info = {
.graphics_ver = 12,
.display_ver = 12,
.is_rocketlake = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "rocketlake"
};
@@ -388,6 +409,7 @@ static const struct intel_device_info intel_dg1_info = {
.graphics_rel = 10,
.display_ver = 12,
.is_dg1 = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "dg1"
};
@@ -398,6 +420,7 @@ static const struct intel_device_info intel_dg2_info = {
.has_4tile = true,
.is_dg2 = true,
.codename = "dg2",
+ .blt_tiling = &gen12_dg2_blt_info,
.has_flatccs = true,
};
@@ -405,6 +428,7 @@ static const struct intel_device_info intel_alderlake_s_info = {
.graphics_ver = 12,
.display_ver = 12,
.is_alderlake_s = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "alderlake_s"
};
@@ -412,6 +436,7 @@ static const struct intel_device_info intel_raptorlake_s_info = {
.graphics_ver = 12,
.display_ver = 12,
.is_raptorlake_s = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "raptorlake_s"
};
@@ -419,6 +444,7 @@ static const struct intel_device_info intel_alderlake_p_info = {
.graphics_ver = 12,
.display_ver = 13,
.is_alderlake_p = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "alderlake_p"
};
@@ -426,6 +452,7 @@ static const struct intel_device_info intel_alderlake_n_info = {
.graphics_ver = 12,
.display_ver = 13,
.is_alderlake_n = true,
+ .blt_tiling = &gen12_blt_info,
.codename = "alderlake_n"
};
@@ -436,6 +463,7 @@ static const struct intel_device_info intel_ats_m_info = {
.is_dg2 = true,
.has_4tile = true,
.codename = "ats_m",
+ .blt_tiling = &gen12_dg2_blt_info,
.has_flatccs = true,
};
@@ -583,6 +611,25 @@ out:
return cache;
}
+/**
+ * intel_get_blt_info:
+ * @devid: pci device id
+ *
+ * Looks up information on blitter commands and tiling formats supported
+ * by the device.
+ *
+ * Returns:
+ * The associated blt_cmd_info, NULL if no such information is found
+ */
+const struct blt_cmd_info *intel_get_blt_info(uint16_t devid)
+{
+ const struct intel_device_info *dev_info;
+
+ dev_info = intel_get_device_info(devid);
+
+ return dev_info->blt_tiling;
+}
+
/**
* intel_gen:
* @devid: pci device id
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (4 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:12 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 7/9] lib/i915_blt: Add common functions for blt_copy_object Karolina Stolarek
` (4 subsequent siblings)
10 siblings, 1 reply; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Add predicates that check if block or fast copy are supported and
a simple iterator for tiling formats. Update block copy tests to use
the new checks.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
lib/i915/i915_blt.c | 118 ++++++++++++++++++++++++++++++++++++-------
lib/i915/i915_blt.h | 10 +++-
tests/i915/gem_ccs.c | 7 +--
3 files changed, 113 insertions(+), 22 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index cd7422d1..cd7968a1 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -14,6 +14,7 @@
#include "i915_blt.h"
#define BITRANGE(start, end) (end - start + 1)
+#define GET_BLT_INFO(__fd) intel_get_blt_info(intel_get_drm_devid(__fd))
enum blt_special_mode {
SM_NONE,
@@ -208,34 +209,115 @@ bool blt_supports_compression(int i915)
}
/**
- * blt_supports_tiling:
+ * blt_supports_command:
+ * @info: Blitter command info struct
+ * @cmd: Blitter command enum
+ *
+ * Checks if @info has an entry of supported tiling formats for @cmd command.
+ *
+ * Returns: true if it does, false otherwise
+ */
+bool blt_supports_command(const struct blt_cmd_info *info,
+ enum blt_cmd_type cmd)
+{
+ igt_require_f(info, "No config found for the platform\n");
+
+ return info->supported_cmds[cmd];
+}
+
+/**
+ * blt_cmd_supports_tiling:
+ * @info: Blitter command info struct
+ * @cmd: Blitter command enum
+ * @tiling: tiling format enum
+ *
+ * Checks if a @cmd entry of @info lists @tiling. It also returns false if
+ * no information about the command is stored.
+ *
+ * Returns: true if it does, false otherwise
+ */
+bool blt_cmd_supports_tiling(const struct blt_cmd_info *info,
+ enum blt_cmd_type cmd,
+ enum blt_tiling_type tiling)
+{
+ struct blt_tiling_info const *tile_config;
+
+ if (!info)
+ return false;
+
+ tile_config = info->supported_cmds[cmd];
+
+ /* no config means no support for that tiling */
+ if (!tile_config)
+ return false;
+
+ return tile_config->supported_tiling & BIT(tiling);
+}
+
+/**
+ * blt_has_block_copy
* @i915: drm fd
- * @tiling: tiling id
*
- * Function checks if blitter supports @tiling on @i915 device.
+ * Check if block copy is supported by @i915 device
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_supports_tiling(int i915, enum blt_tiling_type tiling)
+bool blt_has_block_copy(int i915)
{
- uint32_t devid = intel_get_drm_devid(i915);
+ const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
- if (tiling == T_XMAJOR) {
- if (IS_TIGERLAKE(devid) || IS_DG1(devid))
- return false;
- else
- return true;
- }
+ return blt_supports_command(blt_info, XY_BLOCK_COPY);
+}
- if (tiling == T_YMAJOR) {
- if (IS_TIGERLAKE(devid) || IS_DG1(devid))
- return true;
- else
- return false;
- }
+/**
+ * blt_has_fast_copy
+ * @i915: drm fd
+ *
+ * Check if fast copy is supported by @i915 device
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_has_fast_copy(int i915)
+{
+ const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
+
+ return blt_supports_command(blt_info, XY_FAST_COPY);
+}
+
+/**
+ * blt_fast_copy_supports_tiling
+ * @i915: drm fd
+ * @tiling: tiling format
+ *
+ * Check if fast copy provided by @i915 device supports @tiling format
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+{
+ const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
+
+ return blt_cmd_supports_tiling(blt_info, XY_FAST_COPY, tiling);
+}
+
+/**
+ * blt_block_copy_supports_tiling
+ * @i915: drm fd
+ * @tiling: tiling format
+ *
+ * Check if block copy provided by @i915 device supports @tiling format
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+{
+ const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
- return true;
+ return blt_cmd_supports_tiling(blt_info, XY_BLOCK_COPY, tiling);
}
/**
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 9837dcac..1e5061c6 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -158,7 +158,15 @@ struct blt_ctrl_surf_copy_data {
};
bool blt_supports_compression(int i915);
-bool blt_supports_tiling(int i915, enum blt_tiling_type tiling);
+bool blt_supports_command(const struct blt_cmd_info *info,
+ enum blt_cmd_type cmd);
+bool blt_cmd_supports_tiling(const struct blt_cmd_info *info,
+ enum blt_cmd_type cmd,
+ enum blt_tiling_type tiling);
+bool blt_has_block_copy(int i915);
+bool blt_has_fast_copy(int i915);
+bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
+bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
const char *blt_tiling_name(enum blt_tiling_type tiling);
uint64_t emit_blt_block_copy(int i915,
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 724aa20b..2b60ce31 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -652,6 +652,7 @@ static void block_copy_test(int i915,
{
struct igt_collection *regions;
const struct intel_execution_engine2 *e;
+ int tiling;
if (config->compression && !blt_supports_compression(i915))
return;
@@ -659,8 +660,8 @@ static void block_copy_test(int i915,
if (config->inplace && !config->compression)
return;
- for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
- if (!blt_supports_tiling(i915, tiling) ||
+ for_each_tiling(tiling) {
+ if (!blt_block_copy_supports_tiling(i915, tiling) ||
(param.tiling >= 0 && param.tiling != tiling))
continue;
@@ -758,7 +759,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
igt_fixture {
i915 = drm_open_driver(DRIVER_INTEL);
igt_require_gem(i915);
- igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
+ igt_require(blt_has_block_copy(i915));
query_info = gem_get_query_memory_regions(i915);
igt_require(query_info);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 7/9] lib/i915_blt: Add common functions for blt_copy_object
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (5 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 8/9] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
` (3 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
gem_ccs and gem_lmem_swapping tests share a number of functions.
Extract them to i915_blt so they are accessible for both tests.
Delete local definitions. Add blt_* prefixes to avoid potential
name clash.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
lib/i915/i915_blt.c | 95 ++++++++++++++++
lib/i915/i915_blt.h | 30 ++++-
tests/i915/gem_ccs.c | 196 +++++++++------------------------
tests/i915/gem_lmem_swapping.c | 81 +++-----------
4 files changed, 191 insertions(+), 211 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index cd7968a1..bbfb6ffc 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -1193,6 +1193,101 @@ int blt_fast_copy(int i915,
return ret;
}
+void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
+ int16_t x1, int16_t y1, int16_t x2, int16_t y2,
+ uint16_t x_offset, uint16_t y_offset)
+{
+ obj->pitch = pitch;
+ obj->x1 = x1;
+ obj->y1 = y1;
+ obj->x2 = x2;
+ obj->y2 = y2;
+ obj->x_offset = x_offset;
+ obj->y_offset = y_offset;
+}
+
+void blt_set_batch(struct blt_copy_batch *batch,
+ uint32_t handle, uint64_t size, uint32_t region)
+{
+ batch->handle = handle;
+ batch->size = size;
+ batch->region = region;
+}
+
+struct blt_copy_object *
+blt_create_object(int i915, uint32_t region,
+ uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
+ enum blt_tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type,
+ bool create_mapping)
+{
+ struct blt_copy_object *obj;
+ uint64_t size = width * height * bpp / 8;
+ uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
+ uint32_t handle;
+
+ obj = calloc(1, sizeof(*obj));
+
+ obj->size = size;
+ igt_assert(__gem_create_in_memory_regions(i915, &handle,
+ &size, region) == 0);
+
+ blt_set_object(obj, handle, size, region, mocs, tiling,
+ compression, compression_type);
+ blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
+
+ if (create_mapping)
+ obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
+ PROT_READ | PROT_WRITE);
+
+ return obj;
+}
+
+void blt_destroy_object(int i915, struct blt_copy_object *obj)
+{
+ if (obj->ptr)
+ munmap(obj->ptr, obj->size);
+
+ gem_close(i915, obj->handle);
+ free(obj);
+}
+
+void blt_set_object(struct blt_copy_object *obj,
+ uint32_t handle, uint64_t size, uint32_t region,
+ uint8_t mocs, enum blt_tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type)
+{
+ obj->handle = handle;
+ obj->size = size;
+ obj->region = region;
+ obj->mocs = mocs;
+ obj->tiling = tiling;
+ obj->compression = compression;
+ obj->compression_type = compression_type;
+}
+
+void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
+ uint8_t compression_format,
+ uint16_t surface_width, uint16_t surface_height,
+ enum blt_surface_type surface_type)
+{
+ obj->compression_format = compression_format;
+ obj->surface_width = surface_width;
+ obj->surface_height = surface_height;
+ obj->surface_type = surface_type;
+
+ /* Ensure mip tail won't overlap lod */
+ obj->mip_tail_start_lod = 0xf;
+}
+
+void blt_set_copy_object(struct blt_copy_object *obj,
+ const struct blt_copy_object *orig)
+{
+ memcpy(obj, orig, sizeof(*obj));
+}
+
/**
* blt_surface_fill_rect:
* @i915: drm fd
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 1e5061c6..299dff8e 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -207,10 +207,36 @@ int blt_fast_copy(int i915,
uint64_t ahnd,
const struct blt_copy_data *blt);
+void blt_set_geom(struct blt_copy_object *obj, uint32_t pitch,
+ int16_t x1, int16_t y1, int16_t x2, int16_t y2,
+ uint16_t x_offset, uint16_t y_offset);
+void blt_set_batch(struct blt_copy_batch *batch,
+ uint32_t handle, uint64_t size, uint32_t region);
+
+struct blt_copy_object *
+blt_create_object(int i915, uint32_t region,
+ uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
+ enum blt_tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type,
+ bool create_mapping);
+void blt_destroy_object(int i915, struct blt_copy_object *obj);
+void blt_set_object(struct blt_copy_object *obj,
+ uint32_t handle, uint64_t size, uint32_t region,
+ uint8_t mocs, enum blt_tiling_type tiling,
+ enum blt_compression compression,
+ enum blt_compression_type compression_type);
+void blt_set_object_ext(struct blt_block_copy_object_ext *obj,
+ uint8_t compression_format,
+ uint16_t surface_width, uint16_t surface_height,
+ enum blt_surface_type surface_type);
+void blt_set_copy_object(struct blt_copy_object *obj,
+ const struct blt_copy_object *orig);
+
void blt_surface_info(const char *info,
const struct blt_copy_object *obj);
void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
uint32_t width, uint32_t height);
void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
- const struct blt_copy_object *obj,
- uint32_t width, uint32_t height);
+ const struct blt_copy_object *obj,
+ uint32_t width, uint32_t height);
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 2b60ce31..f629f664 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -44,56 +44,6 @@ struct test_config {
bool suspend_resume;
};
-static void set_object(struct blt_copy_object *obj,
- uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type)
-{
- obj->handle = handle;
- obj->size = size;
- obj->region = region;
- obj->mocs = mocs;
- obj->tiling = tiling;
- obj->compression = compression;
- obj->compression_type = compression_type;
-}
-
-static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
- int16_t x1, int16_t y1, int16_t x2, int16_t y2,
- uint16_t x_offset, uint16_t y_offset)
-{
- obj->pitch = pitch;
- obj->x1 = x1;
- obj->y1 = y1;
- obj->x2 = x2;
- obj->y2 = y2;
- obj->x_offset = x_offset;
- obj->y_offset = y_offset;
-}
-
-static void set_batch(struct blt_copy_batch *batch,
- uint32_t handle, uint64_t size, uint32_t region)
-{
- batch->handle = handle;
- batch->size = size;
- batch->region = region;
-}
-
-static void set_object_ext(struct blt_block_copy_object_ext *obj,
- uint8_t compression_format,
- uint16_t surface_width, uint16_t surface_height,
- enum blt_surface_type surface_type)
-{
- obj->compression_format = compression_format;
- obj->surface_width = surface_width;
- obj->surface_height = surface_height;
- obj->surface_type = surface_type;
-
- /* Ensure mip tail won't overlap lod */
- obj->mip_tail_start_lod = 0xf;
-}
-
static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
uint32_t handle, uint32_t region, uint64_t size,
uint8_t mocs, enum blt_access_type access_type)
@@ -105,51 +55,6 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
obj->access_type = access_type;
}
-static struct blt_copy_object *
-create_object(int i915, uint32_t region,
- uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
- enum blt_tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type,
- bool create_mapping)
-{
- struct blt_copy_object *obj;
- uint64_t size = width * height * bpp / 8;
- uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
- uint32_t handle;
-
- obj = calloc(1, sizeof(*obj));
-
- obj->size = size;
- igt_assert(__gem_create_in_memory_regions(i915, &handle,
- &size, region) == 0);
-
- set_object(obj, handle, size, region, mocs, tiling,
- compression, compression_type);
- set_geom(obj, stride, 0, 0, width, height, 0, 0);
-
- if (create_mapping)
- obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
- PROT_READ | PROT_WRITE);
-
- return obj;
-}
-
-static void destroy_object(int i915, struct blt_copy_object *obj)
-{
- if (obj->ptr)
- munmap(obj->ptr, obj->size);
-
- gem_close(i915, obj->handle);
- free(obj);
-}
-
-static void set_blt_object(struct blt_copy_object *obj,
- const struct blt_copy_object *orig)
-{
- memcpy(obj, orig, sizeof(*obj));
-}
-
#define PRINT_SURFACE_INFO(name, obj) do { \
if (param.print_surface_info) \
blt_surface_info((name), (obj)); } while (0)
@@ -237,7 +142,7 @@ static void surf_copy(int i915,
uc_mocs, DIRECT_ACCESS);
bb_size = 4096;
igt_assert_eq(__gem_create(i915, &bb_size, &bb1), 0);
- set_batch(&surf.bb, bb1, bb_size, REGION_SMEM);
+ blt_set_batch(&surf.bb, bb1, bb_size, REGION_SMEM);
blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
gem_sync(i915, surf.dst.handle);
@@ -284,12 +189,12 @@ static void surf_copy(int i915,
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
blt.print_bb = param.print_bb;
- set_blt_object(&blt.src, mid);
- set_blt_object(&blt.dst, dst);
- set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
- set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ blt_set_copy_object(&blt.src, mid);
+ blt_set_copy_object(&blt.dst, dst);
+ blt_set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
igt_assert_eq(__gem_create(i915, &bb_size, &bb2), 0);
- set_batch(&blt.bb, bb2, bb_size, REGION_SMEM);
+ blt_set_batch(&blt.bb, bb2, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
gem_sync(i915, blt.dst.handle);
WRITE_PNG(i915, run_id, "corrupted", &blt.dst, dst->x2, dst->y2);
@@ -455,12 +360,12 @@ static void block_copy(int i915,
if (!blt_supports_compression(i915) && !IS_METEORLAKE(devid))
pext = NULL;
- src = create_object(i915, region1, width, height, bpp, uc_mocs,
- T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
- mid = create_object(i915, mid_region, width, height, bpp, uc_mocs,
- mid_tiling, mid_compression, comp_type, true);
- dst = create_object(i915, region1, width, height, bpp, uc_mocs,
- T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
+ src = blt_create_object(i915, region1, width, height, bpp, uc_mocs,
+ T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
+ mid = blt_create_object(i915, mid_region, width, height, bpp, uc_mocs,
+ mid_tiling, mid_compression, comp_type, true);
+ dst = blt_create_object(i915, region1, width, height, bpp, uc_mocs,
+ T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
igt_assert(src->size == dst->size);
PRINT_SURFACE_INFO("src", src);
PRINT_SURFACE_INFO("mid", mid);
@@ -472,11 +377,11 @@ static void block_copy(int i915,
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
blt.print_bb = param.print_bb;
- set_blt_object(&blt.src, src);
- set_blt_object(&blt.dst, mid);
- set_object_ext(&ext.src, 0, width, height, SURFACE_TYPE_2D);
- set_object_ext(&ext.dst, mid_compression_format, width, height, SURFACE_TYPE_2D);
- set_batch(&blt.bb, bb, bb_size, region1);
+ blt_set_copy_object(&blt.src, src);
+ blt_set_copy_object(&blt.dst, mid);
+ blt_set_object_ext(&ext.src, 0, width, height, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.dst, mid_compression_format, width, height, SURFACE_TYPE_2D);
+ blt_set_batch(&blt.bb, bb, bb_size, region1);
blt_block_copy(i915, ctx, e, ahnd, &blt, pext);
gem_sync(i915, mid->handle);
@@ -518,26 +423,26 @@ static void block_copy(int i915,
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
blt.print_bb = param.print_bb;
- set_blt_object(&blt.src, mid);
- set_blt_object(&blt.dst, dst);
- set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
- set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
+ blt_set_copy_object(&blt.src, mid);
+ blt_set_copy_object(&blt.dst, dst);
+ blt_set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
if (config->inplace) {
- set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
- T_LINEAR, COMPRESSION_DISABLED, comp_type);
+ blt_set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
+ T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
}
- set_batch(&blt.bb, bb, bb_size, region1);
+ blt_set_batch(&blt.bb, bb, bb_size, region1);
blt_block_copy(i915, ctx, e, ahnd, &blt, pext);
gem_sync(i915, blt.dst.handle);
WRITE_PNG(i915, run_id, "dst", &blt.dst, width, height);
result = memcmp(src->ptr, blt.dst.ptr, src->size);
- destroy_object(i915, src);
- destroy_object(i915, mid);
- destroy_object(i915, dst);
+ blt_destroy_object(i915, src);
+ blt_destroy_object(i915, mid);
+ blt_destroy_object(i915, dst);
gem_close(i915, bb);
put_ahnd(ahnd);
@@ -571,14 +476,14 @@ static void block_multicopy(int i915,
if (!blt_supports_compression(i915))
pext3 = NULL;
- src = create_object(i915, region1, width, height, bpp, uc_mocs,
- T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
- mid = create_object(i915, mid_region, width, height, bpp, uc_mocs,
- mid_tiling, mid_compression, comp_type, true);
- dst = create_object(i915, region1, width, height, bpp, uc_mocs,
- mid_tiling, COMPRESSION_DISABLED, comp_type, true);
- final = create_object(i915, region1, width, height, bpp, uc_mocs,
- T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
+ src = blt_create_object(i915, region1, width, height, bpp, uc_mocs,
+ T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
+ mid = blt_create_object(i915, mid_region, width, height, bpp, uc_mocs,
+ mid_tiling, mid_compression, comp_type, true);
+ dst = blt_create_object(i915, region1, width, height, bpp, uc_mocs,
+ mid_tiling, COMPRESSION_DISABLED, comp_type, true);
+ final = blt_create_object(i915, region1, width, height, bpp, uc_mocs,
+ T_LINEAR, COMPRESSION_DISABLED, comp_type, true);
igt_assert(src->size == dst->size);
PRINT_SURFACE_INFO("src", src);
PRINT_SURFACE_INFO("mid", mid);
@@ -590,22 +495,23 @@ static void block_multicopy(int i915,
memset(&blt3, 0, sizeof(blt3));
blt3.color_depth = CD_32bit;
blt3.print_bb = param.print_bb;
- set_blt_object(&blt3.src, src);
- set_blt_object(&blt3.mid, mid);
- set_blt_object(&blt3.dst, dst);
- set_blt_object(&blt3.final, final);
+ blt_set_copy_object(&blt3.src, src);
+ blt_set_copy_object(&blt3.mid, mid);
+ blt_set_copy_object(&blt3.dst, dst);
+ blt_set_copy_object(&blt3.final, final);
if (config->inplace) {
- set_object(&blt3.dst, mid->handle, dst->size, mid->region, mid->mocs,
- mid_tiling, COMPRESSION_DISABLED, comp_type);
+ blt_set_object(&blt3.dst, mid->handle, dst->size, mid->region,
+ mid->mocs, mid_tiling, COMPRESSION_DISABLED,
+ comp_type);
blt3.dst.ptr = mid->ptr;
}
- set_object_ext(&ext3.src, 0, width, height, SURFACE_TYPE_2D);
- set_object_ext(&ext3.mid, mid_compression_format, width, height, SURFACE_TYPE_2D);
- set_object_ext(&ext3.dst, 0, width, height, SURFACE_TYPE_2D);
- set_object_ext(&ext3.final, 0, width, height, SURFACE_TYPE_2D);
- set_batch(&blt3.bb, bb, bb_size, region1);
+ blt_set_object_ext(&ext3.src, 0, width, height, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext3.mid, mid_compression_format, width, height, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext3.dst, 0, width, height, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext3.final, 0, width, height, SURFACE_TYPE_2D);
+ blt_set_batch(&blt3.bb, bb, bb_size, region1);
blt_block_copy3(i915, ctx, e, ahnd, &blt3, pext3);
gem_sync(i915, blt3.final.handle);
@@ -618,10 +524,10 @@ static void block_multicopy(int i915,
result = memcmp(src->ptr, blt3.final.ptr, src->size);
- destroy_object(i915, src);
- destroy_object(i915, mid);
- destroy_object(i915, dst);
- destroy_object(i915, final);
+ blt_destroy_object(i915, src);
+ blt_destroy_object(i915, mid);
+ blt_destroy_object(i915, dst);
+ blt_destroy_object(i915, final);
gem_close(i915, bb);
put_ahnd(ahnd);
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 9388d4de..55b044ec 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -76,53 +76,6 @@ struct object {
struct blt_copy_object *blt_obj;
};
-static void set_object(struct blt_copy_object *obj,
- uint32_t handle, uint64_t size, uint32_t region,
- uint8_t mocs, enum blt_tiling_type tiling,
- enum blt_compression compression,
- enum blt_compression_type compression_type)
-{
- obj->handle = handle;
- obj->size = size;
- obj->region = region;
- obj->mocs = mocs;
- obj->tiling = tiling;
- obj->compression = compression;
- obj->compression_type = compression_type;
-}
-
-static void set_geom(struct blt_copy_object *obj, uint32_t pitch,
- int16_t x1, int16_t y1, int16_t x2, int16_t y2,
- uint16_t x_offset, uint16_t y_offset)
-{
- obj->pitch = pitch;
- obj->x1 = x1;
- obj->y1 = y1;
- obj->x2 = x2;
- obj->y2 = y2;
- obj->x_offset = x_offset;
- obj->y_offset = y_offset;
-}
-
-static void set_batch(struct blt_copy_batch *batch,
- uint32_t handle, uint64_t size, uint32_t region)
-{
- batch->handle = handle;
- batch->size = size;
- batch->region = region;
-}
-
-static void set_object_ext(struct blt_block_copy_object_ext *obj,
- uint8_t compression_format,
- uint16_t surface_width, uint16_t surface_height,
- enum blt_surface_type surface_type)
-{
- obj->compression_format = compression_format;
- obj->surface_width = surface_width;
- obj->surface_height = surface_height;
- obj->surface_type = surface_type;
-}
-
static uint32_t create_bo(int i915,
uint64_t *size,
struct drm_i915_gem_memory_class_instance *region,
@@ -179,7 +132,7 @@ init_object_ccs(int i915, struct object *obj, struct blt_copy_object *tmp,
cmd = calloc(1, sizeof(*cmd));
igt_assert(cmd);
cmd->handle = gem_create_from_pool(i915, &size, region);
- set_batch(cmd, cmd->handle, size, region);
+ blt_set_batch(cmd, cmd->handle, size, region);
buf = gem_mmap__device_coherent(i915, tmp->handle, 0, obj->size, PROT_WRITE);
gem_set_domain(i915, tmp->handle, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
@@ -195,9 +148,9 @@ init_object_ccs(int i915, struct object *obj, struct blt_copy_object *tmp,
memcpy(&blt.dst, obj->blt_obj, sizeof(blt.dst));
memcpy(&blt.bb, cmd, sizeof(blt.bb));
- set_object_ext(&ext.src, 0, tmp->x2, tmp->y2, SURFACE_TYPE_2D);
- set_object_ext(&ext.dst, 0, obj->blt_obj->x2, obj->blt_obj->y2,
- SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.src, 0, tmp->x2, tmp->y2, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.dst, 0, obj->blt_obj->x2, obj->blt_obj->y2,
+ SURFACE_TYPE_2D);
blt_block_copy(i915, ctx, e, ahnd, &blt, pext);
free(cmd);
@@ -244,7 +197,7 @@ verify_object_ccs(int i915, const struct object *obj,
cmd = calloc(1, sizeof(*cmd));
igt_assert(cmd);
cmd->handle = gem_create_from_pool(i915, &size, region);
- set_batch(cmd, cmd->handle, size, region);
+ blt_set_batch(cmd, cmd->handle, size, region);
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -256,9 +209,9 @@ verify_object_ccs(int i915, const struct object *obj,
blt.dst.x2 = min(obj->blt_obj->x2, tmp->x2);
blt.dst.y2 = min(obj->blt_obj->y2, tmp->y2);
- set_object_ext(&ext.src, 0, obj->blt_obj->x2, obj->blt_obj->y2,
- SURFACE_TYPE_2D);
- set_object_ext(&ext.dst, 0, tmp->x2, tmp->y2, SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.src, 0, obj->blt_obj->x2, obj->blt_obj->y2,
+ SURFACE_TYPE_2D);
+ blt_set_object_ext(&ext.dst, 0, tmp->x2, tmp->y2, SURFACE_TYPE_2D);
blt_block_copy(i915, ctx, e, ahnd, &blt, pext);
buf = gem_mmap__device_coherent(i915, tmp->handle, 0,
@@ -364,11 +317,11 @@ static void __do_evict(int i915,
tmp->handle = gem_create_in_memory_regions(i915, params->size.max,
INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0));
- set_object(tmp, tmp->handle, params->size.max,
- INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0),
- intel_get_uc_mocs(i915), T_LINEAR,
- COMPRESSION_DISABLED, COMPRESSION_TYPE_3D);
- set_geom(tmp, stride, 0, 0, width, height, 0, 0);
+ blt_set_object(tmp, tmp->handle, params->size.max,
+ INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0),
+ intel_get_uc_mocs(i915), T_LINEAR,
+ COMPRESSION_DISABLED, COMPRESSION_TYPE_3D);
+ blt_set_geom(tmp, stride, 0, 0, width, height, 0, 0);
}
size = 0;
@@ -395,10 +348,10 @@ static void __do_evict(int i915,
obj->blt_obj = calloc(1, sizeof(*obj->blt_obj));
igt_assert(obj->blt_obj);
- set_object(obj->blt_obj, obj->handle, obj->size, region_id,
- intel_get_uc_mocs(i915), T_LINEAR,
- COMPRESSION_ENABLED, COMPRESSION_TYPE_3D);
- set_geom(obj->blt_obj, stride, 0, 0, width, height, 0, 0);
+ blt_set_object(obj->blt_obj, obj->handle, obj->size, region_id,
+ intel_get_uc_mocs(i915), T_LINEAR,
+ COMPRESSION_ENABLED, COMPRESSION_TYPE_3D);
+ blt_set_geom(obj->blt_obj, stride, 0, 0, width, height, 0, 0);
init_object_ccs(i915, obj, tmp, rand(), blt_ctx,
region_id, ahnd);
} else if (params->flags & TEST_VERIFY) {
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 8/9] tests/gem_exercise_blt: Add fast-copy test
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (6 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 7/9] lib/i915_blt: Add common functions for blt_copy_object Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 9/9] tests/gem_exercise_blt: Add fast-copy-emit test Karolina Stolarek
` (2 subsequent siblings)
10 siblings, 0 replies; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Exercise a basic scenario with two block copies in separate batch
buffers.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exercise_blt.c | 217 ++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 218 insertions(+)
create mode 100644 tests/i915/gem_exercise_blt.c
diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
new file mode 100644
index 00000000..193929c1
--- /dev/null
+++ b/tests/i915/gem_exercise_blt.c
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "igt.h"
+#include "drm.h"
+#include "i915/gem.h"
+#include "i915/gem_create.h"
+#include "lib/intel_chipset.h"
+#include "i915/i915_blt.h"
+#include "i915/intel_mocs.h"
+
+IGT_TEST_DESCRIPTION("Exercise blitter commands");
+
+static struct param {
+ int tiling;
+ bool write_png;
+ bool print_bb;
+ bool print_surface_info;
+ int width;
+ int height;
+} param = {
+ .tiling = -1,
+ .write_png = false,
+ .print_bb = false,
+ .print_surface_info = false,
+ .width = 512,
+ .height = 512,
+};
+
+#define PRINT_SURFACE_INFO(name, obj) do { \
+ if (param.print_surface_info) \
+ blt_surface_info((name), (obj)); } while (0)
+
+#define WRITE_PNG(fd, id, name, obj, w, h) do { \
+ if (param.write_png) \
+ blt_surface_to_png((fd), (id), (name), (obj), (w), (h)); } while (0)
+
+static void fast_copy(int i915, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint32_t region1, uint32_t region2,
+ enum blt_tiling_type mid_tiling)
+{
+ struct blt_copy_data blt = {};
+ struct blt_copy_object *src, *mid, *dst;
+ const uint32_t bpp = 32;
+ uint64_t bb_size = 4096;
+ uint64_t ahnd = intel_allocator_open_full(i915, ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ uint32_t bb;
+ uint32_t width = param.width, height = param.height;
+ int result;
+
+ igt_assert(__gem_create_in_memory_regions(i915, &bb, &bb_size, region1) == 0);
+
+ src = blt_create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ mid = blt_create_object(i915, region2, width, height, bpp, 0,
+ mid_tiling, COMPRESSION_DISABLED, 0, true);
+ dst = blt_create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ igt_assert(src->size == dst->size);
+
+ blt_surface_fill_rect(i915, src, width, height);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = CD_32bit;
+ blt.print_bb = param.print_bb;
+ blt_set_copy_object(&blt.src, src);
+ blt_set_copy_object(&blt.dst, mid);
+ blt_set_batch(&blt.bb, bb, bb_size, region1);
+
+ blt_fast_copy(i915, ctx, e, ahnd, &blt);
+ gem_sync(i915, mid->handle);
+
+ WRITE_PNG(i915, mid_tiling, "src", &blt.src, width, height);
+ WRITE_PNG(i915, mid_tiling, "mid", &blt.dst, width, height);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = CD_32bit;
+ blt.print_bb = param.print_bb;
+ blt_set_copy_object(&blt.src, mid);
+ blt_set_copy_object(&blt.dst, dst);
+ blt_set_batch(&blt.bb, bb, bb_size, region1);
+
+ blt_fast_copy(i915, ctx, e, ahnd, &blt);
+ gem_sync(i915, blt.dst.handle);
+
+ WRITE_PNG(i915, mid_tiling, "dst", &blt.dst, width, height);
+
+ result = memcmp(src->ptr, blt.dst.ptr, src->size);
+
+ blt_destroy_object(i915, src);
+ blt_destroy_object(i915, mid);
+ blt_destroy_object(i915, dst);
+ gem_close(i915, bb);
+ put_ahnd(ahnd);
+
+ igt_assert_f(!result, "source and destination surfaces differs!\n");
+}
+
+static void fast_copy_test(int i915,
+ const intel_ctx_t *ctx,
+ struct igt_collection *set)
+{
+ struct igt_collection *regions;
+ const struct intel_execution_engine2 *e;
+ int tiling;
+
+ for_each_tiling(tiling) {
+ if (!blt_fast_copy_supports_tiling(i915, tiling))
+ continue;
+
+ for_each_ctx_engine(i915, ctx, e) {
+ if (e->class != I915_ENGINE_CLASS_COPY)
+ continue;
+ for_each_variation_r(regions, 2, set) {
+ uint32_t region1, region2;
+ char *regtxt;
+
+ region1 = igt_collection_get_value(regions, 0);
+ region2 = igt_collection_get_value(regions, 1);
+ regtxt = memregion_dynamic_subtest_name(regions);
+
+ igt_dynamic_f("%s-%s",
+ blt_tiling_name(tiling), regtxt) {
+ fast_copy(i915, ctx, e,
+ region1, region2,
+ tiling);
+ }
+
+ free(regtxt);
+ }
+ }
+ }
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'b':
+ param.print_bb = true;
+ igt_debug("Print bb: %d\n", param.print_bb);
+ break;
+ case 'p':
+ param.write_png = true;
+ igt_debug("Write png: %d\n", param.write_png);
+ break;
+ case 's':
+ param.print_surface_info = true;
+ igt_debug("Print surface info: %d\n", param.print_surface_info);
+ break;
+ case 't':
+ param.tiling = atoi(optarg);
+ igt_debug("Tiling: %d\n", param.tiling);
+ break;
+ case 'W':
+ param.width = atoi(optarg);
+ igt_debug("Width: %d\n", param.width);
+ break;
+ case 'H':
+ param.height = atoi(optarg);
+ igt_debug("Height: %d\n", param.height);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -b\tPrint bb\n"
+ " -p\tWrite PNG\n"
+ " -s\tPrint surface info\n"
+ " -t\tTiling format (0 - linear, 1 - XMAJOR, 2 - YMAJOR, 3 - TILE4, 4 - TILE64, 5 - YFMAJOR)\n"
+ " -W\tWidth (default 512)\n"
+ " -H\tHeight (default 512)"
+ ;
+
+igt_main_args("b:pst:W:H:", NULL, help_str, opt_handler, NULL)
+{
+ struct drm_i915_query_memory_regions *query_info;
+ struct igt_collection *set;
+ const intel_ctx_t *ctx;
+ int i915;
+ igt_hang_t hang;
+
+ igt_fixture {
+ i915 = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(i915);
+ igt_require(blt_has_fast_copy(i915));
+
+ igt_require(gem_uses_full_ppgtt(i915));
+
+ query_info = gem_get_query_memory_regions(i915);
+ igt_require(query_info);
+
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
+ ctx = intel_ctx_create_all_physical(i915);
+ hang = igt_allow_hang(i915, ctx->id, 0);
+ }
+
+ igt_describe("Check fast-copy blit");
+ igt_subtest_with_dynamic("fast-copy") {
+ fast_copy_test(i915, ctx, set);
+ }
+
+ igt_fixture {
+ igt_disallow_hang(i915, hang);
+ close(i915);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index e20a8640..10be556d 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -129,6 +129,7 @@ i915_progs = [
'gem_exec_nop',
'gem_exec_parallel',
'gem_exec_params',
+ 'gem_exercise_blt',
'gen7_exec_parse',
'gen9_exec_parse',
'gem_exec_reloc',
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [igt-dev] [PATCH i-g-t v7 9/9] tests/gem_exercise_blt: Add fast-copy-emit test
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (7 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 8/9] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
@ 2023-01-20 10:14 ` Karolina Stolarek
2023-01-20 11:56 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct (rev7) Patchwork
2023-01-21 17:07 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Karolina Stolarek @ 2023-01-20 10:14 UTC (permalink / raw)
To: igt-dev
Add a subtest where two fast copy commands are executed within the
single batch buffer.
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exercise_blt.c | 184 ++++++++++++++++++++++++++++++++--
1 file changed, 178 insertions(+), 6 deletions(-)
diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
index 193929c1..02c54f85 100644
--- a/tests/i915/gem_exercise_blt.c
+++ b/tests/i915/gem_exercise_blt.c
@@ -37,6 +37,146 @@ static struct param {
if (param.write_png) \
blt_surface_to_png((fd), (id), (name), (obj), (w), (h)); } while (0)
+struct blt_fast_copy_data {
+ int i915;
+ struct blt_copy_object src;
+ struct blt_copy_object mid;
+ struct blt_copy_object dst;
+
+ struct blt_copy_batch bb;
+ enum blt_color_depth color_depth;
+
+ /* debug stuff */
+ bool print_bb;
+};
+
+static int fast_copy_one_bb(int i915,
+ const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint64_t ahnd,
+ const struct blt_fast_copy_data *blt)
+{
+ struct drm_i915_gem_execbuffer2 execbuf = {};
+ struct drm_i915_gem_exec_object2 obj[4] = {};
+ struct blt_copy_data blt_tmp;
+ uint64_t src_offset, mid_offset, dst_offset, bb_offset, alignment;
+ uint64_t bb_pos = 0;
+ uint32_t flags;
+ int ret;
+
+ alignment = gem_detect_safe_alignment(i915);
+
+ src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
+ mid_offset = get_offset(ahnd, blt->mid.handle, blt->mid.size, alignment);
+ dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+ bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
+
+ /* First blit */
+ memset(&blt_tmp, 0, sizeof(blt_tmp));
+ blt_tmp.src = blt->src;
+ blt_tmp.dst = blt->mid;
+ blt_tmp.bb = blt->bb;
+ blt_tmp.color_depth = blt->color_depth;
+ blt_tmp.print_bb = blt->print_bb;
+ bb_pos = emit_blt_fast_copy(i915, ahnd, &blt_tmp, bb_pos, false);
+
+ /* Second blit */
+ memset(&blt_tmp, 0, sizeof(blt_tmp));
+ blt_tmp.src = blt->mid;
+ blt_tmp.dst = blt->dst;
+ blt_tmp.bb = blt->bb;
+ blt_tmp.color_depth = blt->color_depth;
+ blt_tmp.print_bb = blt->print_bb;
+ bb_pos = emit_blt_fast_copy(i915, ahnd, &blt_tmp, bb_pos, true);
+
+ flags = EXEC_OBJECT_PINNED | EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+
+ obj[0].handle = blt->src.handle;
+ obj[0].offset = CANONICAL(src_offset);
+ obj[0].flags = flags;
+
+ obj[1].handle = blt->mid.handle;
+ obj[1].offset = CANONICAL(mid_offset);
+ obj[1].flags = flags;
+
+ obj[2].handle = blt->dst.handle;
+ obj[2].offset = CANONICAL(dst_offset);
+ obj[2].flags = flags | EXEC_OBJECT_WRITE;
+
+ obj[3].handle = blt->bb.handle;
+ obj[3].offset = CANONICAL(bb_offset);
+ obj[3].flags = flags;
+
+ execbuf.buffer_count = 4;
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.rsvd1 = ctx ? ctx->id : 0;
+ execbuf.flags = e ? e->flags : I915_EXEC_BLT;
+ ret = __gem_execbuf(i915, &execbuf);
+
+ gem_sync(i915, blt->bb.handle);
+
+ return ret;
+}
+
+static void fast_copy_emit(int i915, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint32_t region1, uint32_t region2,
+ enum blt_tiling_type mid_tiling)
+{
+ struct blt_fast_copy_data blt = {};
+ struct blt_copy_object *src, *mid, *dst;
+ const uint32_t bpp = 32;
+ uint64_t bb_size = 4096;
+ uint64_t ahnd = intel_allocator_open_full(i915, ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ uint32_t bb, width = param.width, height = param.height;
+ int result;
+
+ igt_assert(__gem_create_in_memory_regions(i915, &bb, &bb_size, region1) == 0);
+
+ src = blt_create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ mid = blt_create_object(i915, region2, width, height, bpp, 0,
+ mid_tiling, COMPRESSION_DISABLED, 0, true);
+ dst = blt_create_object(i915, region1, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ igt_assert(src->size == dst->size);
+
+ PRINT_SURFACE_INFO("src", src);
+ PRINT_SURFACE_INFO("mid", mid);
+ PRINT_SURFACE_INFO("dst", dst);
+
+ blt_surface_fill_rect(i915, src, width, height);
+ WRITE_PNG(i915, mid_tiling, "src", src, width, height);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = CD_32bit;
+ blt.print_bb = param.print_bb;
+ blt_set_copy_object(&blt.src, src);
+ blt_set_copy_object(&blt.mid, mid);
+ blt_set_copy_object(&blt.dst, dst);
+ blt_set_batch(&blt.bb, bb, bb_size, region1);
+
+ fast_copy_one_bb(i915, ctx, e, ahnd, &blt);
+ gem_sync(i915, blt.dst.handle);
+
+ WRITE_PNG(i915, mid_tiling, "mid", &blt.mid, width, height);
+ WRITE_PNG(i915, mid_tiling, "dst", &blt.dst, width, height);
+
+ result = memcmp(src->ptr, blt.dst.ptr, src->size);
+
+ blt_destroy_object(i915, src);
+ blt_destroy_object(i915, mid);
+ blt_destroy_object(i915, dst);
+ gem_close(i915, bb);
+ put_ahnd(ahnd);
+
+ munmap(&bb, bb_size);
+
+ igt_assert_f(!result, "source and destination surfaces differs!\n");
+}
+
static void fast_copy(int i915, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
@@ -101,12 +241,36 @@ static void fast_copy(int i915, const intel_ctx_t *ctx,
igt_assert_f(!result, "source and destination surfaces differs!\n");
}
+enum fast_copy_func {
+ FAST_COPY,
+ FAST_COPY_EMIT
+};
+
+static char
+ *full_subtest_str(char *regtxt, enum blt_tiling_type tiling,
+ enum fast_copy_func func)
+{
+ char *name;
+ uint32_t len;
+
+ len = asprintf(&name, "%s-%s%s", blt_tiling_name(tiling), regtxt,
+ func == FAST_COPY_EMIT ? "-emit" : "");
+
+ igt_assert_f(len >= 0, "asprintf failed!\n");
+
+ return name;
+}
+
static void fast_copy_test(int i915,
const intel_ctx_t *ctx,
- struct igt_collection *set)
+ struct igt_collection *set,
+ enum fast_copy_func func)
{
struct igt_collection *regions;
const struct intel_execution_engine2 *e;
+ void (*copy_func)(int i915, const intel_ctx_t *ctx,
+ const struct intel_execution_engine2 *e,
+ uint32_t r1, uint32_t r2, enum blt_tiling_type tiling);
int tiling;
for_each_tiling(tiling) {
@@ -118,20 +282,23 @@ static void fast_copy_test(int i915,
continue;
for_each_variation_r(regions, 2, set) {
uint32_t region1, region2;
- char *regtxt;
+ char *regtxt, *test_name;
region1 = igt_collection_get_value(regions, 0);
region2 = igt_collection_get_value(regions, 1);
+
+ copy_func = (func == FAST_COPY) ? fast_copy : fast_copy_emit;
regtxt = memregion_dynamic_subtest_name(regions);
+ test_name = full_subtest_str(regtxt, tiling, func);
- igt_dynamic_f("%s-%s",
- blt_tiling_name(tiling), regtxt) {
- fast_copy(i915, ctx, e,
+ igt_dynamic_f("%s", test_name) {
+ copy_func(i915, ctx, e,
region1, region2,
tiling);
}
free(regtxt);
+ free(test_name);
}
}
}
@@ -207,7 +374,12 @@ igt_main_args("b:pst:W:H:", NULL, help_str, opt_handler, NULL)
igt_describe("Check fast-copy blit");
igt_subtest_with_dynamic("fast-copy") {
- fast_copy_test(i915, ctx, set);
+ fast_copy_test(i915, ctx, set, FAST_COPY);
+ }
+
+ igt_describe("Check multiple fast-copy in one batch");
+ igt_subtest_with_dynamic("fast-copy-emit") {
+ fast_copy_test(i915, ctx, set, FAST_COPY_EMIT);
}
igt_fixture {
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type Karolina Stolarek
@ 2023-01-20 11:03 ` Zbigniew Kempczyński
0 siblings, 0 replies; 17+ messages in thread
From: Zbigniew Kempczyński @ 2023-01-20 11:03 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jan 20, 2023 at 11:14:01AM +0100, Karolina Stolarek wrote:
> Make it more clear that blt_tiling enum indicates the tiling type.
Ok, you're preparing for migration to another file.
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/i915_blt.c | 8 ++++----
> lib/i915/i915_blt.h | 8 ++++----
> tests/i915/gem_ccs.c | 10 +++++-----
> tests/i915/gem_lmem_swapping.c | 2 +-
> 4 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 54193565..694c818c 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -217,7 +217,7 @@ bool blt_supports_compression(int i915)
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling)
> +bool blt_supports_tiling(int i915, enum blt_tiling_type tiling)
> {
> uint32_t devid = intel_get_drm_devid(i915);
>
> @@ -245,7 +245,7 @@ bool blt_supports_tiling(int i915, enum blt_tiling tiling)
> * Returns:
> * name of @tiling passed. Useful to build test names.
> */
> -const char *blt_tiling_name(enum blt_tiling tiling)
> +const char *blt_tiling_name(enum blt_tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return "linear";
> @@ -259,7 +259,7 @@ const char *blt_tiling_name(enum blt_tiling tiling)
> return NULL;
> }
>
> -static int __block_tiling(enum blt_tiling tiling)
> +static int __block_tiling(enum blt_tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> @@ -891,7 +891,7 @@ struct gen12_fast_copy_data {
> } dw09;
> };
>
> -static int __fast_tiling(enum blt_tiling tiling)
> +static int __fast_tiling(enum blt_tiling_type tiling)
> {
> switch (tiling) {
> case T_LINEAR: return 0;
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 34db9bb9..747eb093 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -59,7 +59,7 @@ enum blt_color_depth {
> CD_128bit,
> };
>
> -enum blt_tiling {
> +enum blt_tiling_type {
> T_LINEAR,
> T_XMAJOR,
> T_YMAJOR,
> @@ -83,7 +83,7 @@ struct blt_copy_object {
> uint32_t region;
> uint64_t size;
> uint8_t mocs;
> - enum blt_tiling tiling;
> + enum blt_tiling_type tiling;
> enum blt_compression compression; /* BC only */
> enum blt_compression_type compression_type; /* BC only */
> uint32_t pitch;
> @@ -165,8 +165,8 @@ struct blt_ctrl_surf_copy_data {
> };
>
> bool blt_supports_compression(int i915);
> -bool blt_supports_tiling(int i915, enum blt_tiling tiling);
> -const char *blt_tiling_name(enum blt_tiling tiling);
> +bool blt_supports_tiling(int i915, enum blt_tiling_type tiling);
> +const char *blt_tiling_name(enum blt_tiling_type tiling);
>
> uint64_t emit_blt_block_copy(int i915,
> uint64_t ahnd,
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 6ae5ad85..724aa20b 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -46,7 +46,7 @@ struct test_config {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> @@ -108,7 +108,7 @@ static void set_surf_object(struct blt_ctrl_surf_copy_object *obj,
> static struct blt_copy_object *
> create_object(int i915, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> - enum blt_tiling tiling,
> + enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type,
> bool create_mapping)
> @@ -429,7 +429,7 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum blt_tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> @@ -548,7 +548,7 @@ static void block_multicopy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling,
> + enum blt_tiling_type mid_tiling,
> const struct test_config *config)
> {
> struct blt_copy3_data blt3 = {};
> @@ -637,7 +637,7 @@ static const struct {
> const char *suffix;
> void (*copyfn)(int, const intel_ctx_t *,
> const struct intel_execution_engine2 *,
> - uint32_t, uint32_t, enum blt_tiling,
> + uint32_t, uint32_t, enum blt_tiling_type,
> const struct test_config *);
> } copyfns[] = {
> [BLOCK_COPY] = { "", block_copy },
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 75121d41..9388d4de 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -78,7 +78,7 @@ struct object {
>
> static void set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> - uint8_t mocs, enum blt_tiling tiling,
> + uint8_t mocs, enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type)
> {
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type Karolina Stolarek
@ 2023-01-20 11:05 ` Zbigniew Kempczyński
0 siblings, 0 replies; 17+ messages in thread
From: Zbigniew Kempczyński @ 2023-01-20 11:05 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jan 20, 2023 at 11:14:02AM +0100, Karolina Stolarek wrote:
> Introduce a tiling type used by older generation in fast copy command.
> Update functions that use blt_tiling_type to handle this type.
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/i915_blt.c | 10 ++++++++++
> lib/i915/i915_blt.h | 1 +
> 2 files changed, 11 insertions(+)
>
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index 694c818c..a1abc2eb 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -253,6 +253,9 @@ const char *blt_tiling_name(enum blt_tiling_type tiling)
> case T_YMAJOR: return "ymajor";
> case T_TILE4: return "tile4";
> case T_TILE64: return "tile64";
> + case T_YFMAJOR: return "yfmajor";
> + default:
> + break;
> }
>
> igt_warn("invalid tiling passed: %d\n", tiling);
> @@ -267,6 +270,8 @@ static int __block_tiling(enum blt_tiling_type tiling)
> case T_YMAJOR: return 1;
> case T_TILE4: return 2;
> case T_TILE64: return 3;
> + default:
> + break;
> }
>
> igt_warn("invalid tiling passed: %d\n", tiling);
> @@ -898,8 +903,13 @@ static int __fast_tiling(enum blt_tiling_type tiling)
> case T_XMAJOR: return 1;
> case T_YMAJOR: return 2;
> case T_TILE4: return 2;
> + case T_YFMAJOR: return 2;
> case T_TILE64: return 3;
> + default:
> + break;
> }
> +
> + igt_warn("invalid tiling passed: %d\n", tiling);
> return 0;
> }
>
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 747eb093..bc375aba 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -65,6 +65,7 @@ enum blt_tiling_type {
> T_YMAJOR,
> T_TILE4,
> T_TILE64,
> + T_YFMAJOR,
> };
>
> enum blt_compression {
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats Karolina Stolarek
@ 2023-01-20 11:08 ` Zbigniew Kempczyński
0 siblings, 0 replies; 17+ messages in thread
From: Zbigniew Kempczyński @ 2023-01-20 11:08 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jan 20, 2023 at 11:14:04AM +0100, Karolina Stolarek wrote:
> Add structs to describe what blitter commands and tiling formats
> are supported per platform. Move blt_tiling enum to the newly
> created library and update its definition.
LGTM,
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/i915_blt.h | 10 +---
> lib/i915/intel_tiling_info.c | 88 ++++++++++++++++++++++++++++++++++++
> lib/i915/intel_tiling_info.h | 47 +++++++++++++++++++
> lib/meson.build | 5 +-
> 4 files changed, 140 insertions(+), 10 deletions(-)
> create mode 100644 lib/i915/intel_tiling_info.c
> create mode 100644 lib/i915/intel_tiling_info.h
>
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index bc375aba..9837dcac 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -47,6 +47,7 @@
> #include <malloc.h>
> #include "drm.h"
> #include "igt.h"
> +#include "intel_tiling_info.h"
>
> #define CCS_RATIO 256
>
> @@ -59,15 +60,6 @@ enum blt_color_depth {
> CD_128bit,
> };
>
> -enum blt_tiling_type {
> - T_LINEAR,
> - T_XMAJOR,
> - T_YMAJOR,
> - T_TILE4,
> - T_TILE64,
> - T_YFMAJOR,
> -};
> -
> enum blt_compression {
> COMPRESSION_DISABLED,
> COMPRESSION_ENABLED,
> diff --git a/lib/i915/intel_tiling_info.c b/lib/i915/intel_tiling_info.c
> new file mode 100644
> index 00000000..ab1d21d9
> --- /dev/null
> +++ b/lib/i915/intel_tiling_info.c
> @@ -0,0 +1,88 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#include <stdint.h>
> +#include "intel_chipset.h"
> +#include "i915/intel_tiling_info.h"
> +
> +#define BLT_INFO(_cmd, _tiling) { \
> + .blt_cmd_type = _cmd, \
> + .supported_tiling = _tiling \
> + }
> +
> +static const struct blt_tiling_info src_copy = BLT_INFO(SRC_COPY, BIT(T_LINEAR));
> +static const struct blt_tiling_info
> + pre_gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR));
> +static const struct blt_tiling_info
> + gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR) |
> + BIT(T_YMAJOR));
> +static const struct blt_tiling_info
> + gen11_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_YMAJOR) |
> + BIT(T_YFMAJOR) |
> + BIT(T_TILE64));
> +static const struct blt_tiling_info
> + gen12_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_YMAJOR) |
> + BIT(T_TILE4) |
> + BIT(T_TILE64));
> +static const struct blt_tiling_info
> + dg2_xy_fast_copy = BLT_INFO(XY_FAST_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR) |
> + BIT(T_TILE4) |
> + BIT(T_TILE64));
> +static const struct blt_tiling_info
> + gen12_xy_block_copy = BLT_INFO(XY_BLOCK_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_YMAJOR));
> +static const struct blt_tiling_info
> + dg2_xy_block_copy = BLT_INFO(XY_BLOCK_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR) |
> + BIT(T_TILE4) |
> + BIT(T_TILE64));
> +
> +const struct blt_cmd_info pre_gen8_blt_info = {
> + .supported_cmds = {
> + [SRC_COPY] = &src_copy,
> + [XY_SRC_COPY] = &pre_gen8_xy_src_copy
> + }
> +};
> +
> +const struct blt_cmd_info gen8_blt_info = {
> + .supported_cmds = {
> + [XY_SRC_COPY] = &gen8_xy_src_copy,
> + }
> +};
> +
> +const struct blt_cmd_info gen11_blt_info = {
> + .supported_cmds = {
> + [XY_SRC_COPY] = &gen8_xy_src_copy,
> + [XY_FAST_COPY] = &gen11_xy_fast_copy,
> + }
> +};
> +
> +const struct blt_cmd_info gen12_blt_info = {
> + .supported_cmds = {
> + [XY_SRC_COPY] = &gen8_xy_src_copy,
> + [XY_FAST_COPY] = &gen12_xy_fast_copy,
> + [XY_BLOCK_COPY] = &gen12_xy_block_copy,
> + }
> +};
> +
> +const struct blt_cmd_info gen12_dg2_blt_info = {
> + .supported_cmds = {
> + [XY_SRC_COPY] = &gen8_xy_src_copy,
> + [XY_FAST_COPY] = &dg2_xy_fast_copy,
> + [XY_BLOCK_COPY] = &dg2_xy_block_copy,
> + }
> +};
> diff --git a/lib/i915/intel_tiling_info.h b/lib/i915/intel_tiling_info.h
> new file mode 100644
> index 00000000..21ed8761
> --- /dev/null
> +++ b/lib/i915/intel_tiling_info.h
> @@ -0,0 +1,47 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef __INTEL_TILING_INFO_H
> +#define __INTEL_TILING_INFO_H
> +
> +#include <stdint.h>
> +
> +enum blt_tiling_type {
> + T_LINEAR,
> + T_XMAJOR,
> + T_YMAJOR,
> + T_TILE4,
> + T_TILE64,
> + T_YFMAJOR,
> + __BLT_MAX_TILING
> +};
> +
> +enum blt_cmd_type {
> + SRC_COPY,
> + XY_SRC_COPY,
> + XY_FAST_COPY,
> + XY_BLOCK_COPY,
> + __BLT_MAX_CMD
> +};
> +
> +struct blt_tiling_info {
> + enum blt_cmd_type blt_cmd_type;
> + uint32_t supported_tiling;
> +};
> +
> +struct blt_cmd_info {
> + struct blt_tiling_info const *supported_cmds[__BLT_MAX_CMD];
> +};
> +
> +extern const struct blt_cmd_info pre_gen8_blt_info;
> +extern const struct blt_cmd_info gen8_blt_info;
> +extern const struct blt_cmd_info gen11_blt_info;
> +extern const struct blt_cmd_info gen12_blt_info;
> +extern const struct blt_cmd_info gen12_dg2_blt_info;
> +
> +#define for_each_tiling(__tiling) \
> + for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
> +
> +#endif
> diff --git a/lib/meson.build b/lib/meson.build
> index cc784686..22069440 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -14,6 +14,7 @@ lib_sources = [
> 'i915/intel_decode.c',
> 'i915/intel_memory_region.c',
> 'i915/intel_mocs.c',
> + 'i915/intel_tiling_info.c',
> 'i915/i915_blt.c',
> 'i915/i915_crc.c',
> 'igt_collection.c',
> @@ -216,7 +217,8 @@ igt_deps = [ lib_igt ] + lib_deps
>
> lin_igt_chipset_build = static_library('igt_chipset',
> ['intel_chipset.c',
> - 'intel_device_info.c'],
> + 'intel_device_info.c',
> + 'i915/intel_tiling_info.c'],
> include_directories : inc)
>
> lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
> @@ -239,6 +241,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
> 'igt_list.c',
> 'igt_tools_stub.c',
> 'intel_device_info.c',
> + 'i915/intel_tiling_info.c',
> ],
> dependencies : scan_dep,
> include_directories : inc)
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information Karolina Stolarek
@ 2023-01-20 11:10 ` Zbigniew Kempczyński
0 siblings, 0 replies; 17+ messages in thread
From: Zbigniew Kempczyński @ 2023-01-20 11:10 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jan 20, 2023 at 11:14:05AM +0100, Karolina Stolarek wrote:
> Update entries in intel_device_info to store information on
> supported blitter commands and tiling formats. Add a function
> to return tiling information for a device.
Looks almost ok, I don't see MTL update. With this added:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/intel_chipset.h | 4 ++++
> lib/intel_device_info.c | 47 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+)
>
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 9b39472a..cceca929 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -31,6 +31,8 @@
> #include <pciaccess.h>
> #include <stdbool.h>
>
> +#include "i915/intel_tiling_info.h"
> +
> #define BIT(x) (1ul <<(x))
>
> struct pci_device *intel_get_pci_device(void);
> @@ -86,11 +88,13 @@ struct intel_device_info {
> bool is_alderlake_p : 1;
> bool is_alderlake_n : 1;
> bool is_meteorlake : 1;
> + const struct blt_cmd_info *blt_tiling;
> const char *codename;
> };
>
> const struct intel_device_info *intel_get_device_info(uint16_t devid) __attribute__((pure));
>
> +const struct blt_cmd_info *intel_get_blt_info(uint16_t devid) __attribute__((pure));
> unsigned intel_gen(uint16_t devid) __attribute__((pure));
> unsigned intel_graphics_ver(uint16_t devid) __attribute__((pure));
> unsigned intel_display_ver(uint16_t devid) __attribute__((pure));
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 68dd17ee..f1233ee0 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -145,6 +145,7 @@ static const struct intel_device_info intel_sandybridge_info = {
> .graphics_ver = 6,
> .display_ver = 6,
> .is_sandybridge = true,
> + .blt_tiling = &pre_gen8_blt_info,
> .codename = "sandybridge"
> };
> static const struct intel_device_info intel_sandybridge_m_info = {
> @@ -152,6 +153,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
> .display_ver = 6,
> .is_mobile = true,
> .is_sandybridge = true,
> + .blt_tiling = &pre_gen8_blt_info,
> .codename = "sandybridge"
> };
>
> @@ -159,6 +161,7 @@ static const struct intel_device_info intel_ivybridge_info = {
> .graphics_ver = 7,
> .display_ver = 7,
> .is_ivybridge = true,
> + .blt_tiling = &pre_gen8_blt_info,
> .codename = "ivybridge"
> };
> static const struct intel_device_info intel_ivybridge_m_info = {
> @@ -166,6 +169,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
> .display_ver = 7,
> .is_mobile = true,
> .is_ivybridge = true,
> + .blt_tiling = &pre_gen8_blt_info,
> .codename = "ivybridge"
> };
>
> @@ -173,6 +177,7 @@ static const struct intel_device_info intel_valleyview_info = {
> .graphics_ver = 7,
> .display_ver = 7,
> .is_valleyview = true,
> + .blt_tiling = &pre_gen8_blt_info,
> .codename = "valleyview"
> };
>
> @@ -180,6 +185,7 @@ static const struct intel_device_info intel_valleyview_info = {
> .graphics_ver = 7, \
> .display_ver = 7, \
> .is_haswell = true, \
> + .blt_tiling = &pre_gen8_blt_info, \
> .codename = "haswell"
>
> static const struct intel_device_info intel_haswell_gt1_info = {
> @@ -201,6 +207,7 @@ static const struct intel_device_info intel_haswell_gt3_info = {
> .graphics_ver = 8, \
> .display_ver = 8, \
> .is_broadwell = true, \
> + .blt_tiling = &gen8_blt_info, \
> .codename = "broadwell"
>
> static const struct intel_device_info intel_broadwell_gt1_info = {
> @@ -226,12 +233,14 @@ static const struct intel_device_info intel_cherryview_info = {
> .graphics_ver = 8,
> .display_ver = 8,
> .is_cherryview = true,
> + .blt_tiling = &gen8_blt_info,
> .codename = "cherryview"
> };
>
> #define SKYLAKE_FIELDS \
> .graphics_ver = 9, \
> .display_ver = 9, \
> + .blt_tiling = &gen11_blt_info, \
> .codename = "skylake", \
> .is_skylake = true
>
> @@ -259,6 +268,7 @@ static const struct intel_device_info intel_broxton_info = {
> .graphics_ver = 9,
> .display_ver = 9,
> .is_broxton = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "broxton"
> };
>
> @@ -266,6 +276,7 @@ static const struct intel_device_info intel_broxton_info = {
> .graphics_ver = 9, \
> .display_ver = 9, \
> .is_kabylake = true, \
> + .blt_tiling = &gen11_blt_info, \
> .codename = "kabylake"
>
> static const struct intel_device_info intel_kabylake_gt1_info = {
> @@ -292,6 +303,7 @@ static const struct intel_device_info intel_geminilake_info = {
> .graphics_ver = 9,
> .display_ver = 9,
> .is_geminilake = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "geminilake"
> };
>
> @@ -299,6 +311,7 @@ static const struct intel_device_info intel_geminilake_info = {
> .graphics_ver = 9, \
> .display_ver = 9, \
> .is_coffeelake = true, \
> + .blt_tiling = &gen11_blt_info, \
> .codename = "coffeelake"
>
> static const struct intel_device_info intel_coffeelake_gt1_info = {
> @@ -320,6 +333,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = {
> .graphics_ver = 9, \
> .display_ver = 9, \
> .is_cometlake = true, \
> + .blt_tiling = &gen11_blt_info, \
> .codename = "cometlake"
>
> static const struct intel_device_info intel_cometlake_gt1_info = {
> @@ -336,6 +350,7 @@ static const struct intel_device_info intel_cannonlake_info = {
> .graphics_ver = 10,
> .display_ver = 10,
> .is_cannonlake = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "cannonlake"
> };
>
> @@ -343,6 +358,7 @@ static const struct intel_device_info intel_icelake_info = {
> .graphics_ver = 11,
> .display_ver = 11,
> .is_icelake = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "icelake"
> };
>
> @@ -350,6 +366,7 @@ static const struct intel_device_info intel_elkhartlake_info = {
> .graphics_ver = 11,
> .display_ver = 11,
> .is_elkhartlake = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "elkhartlake"
> };
>
> @@ -357,6 +374,7 @@ static const struct intel_device_info intel_jasperlake_info = {
> .graphics_ver = 11,
> .display_ver = 11,
> .is_jasperlake = true,
> + .blt_tiling = &gen11_blt_info,
> .codename = "jasperlake"
> };
>
> @@ -364,6 +382,7 @@ static const struct intel_device_info intel_tigerlake_gt1_info = {
> .graphics_ver = 12,
> .display_ver = 12,
> .is_tigerlake = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "tigerlake",
> .gt = 1,
> };
> @@ -372,6 +391,7 @@ static const struct intel_device_info intel_tigerlake_gt2_info = {
> .graphics_ver = 12,
> .display_ver = 12,
> .is_tigerlake = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "tigerlake",
> .gt = 2,
> };
> @@ -380,6 +400,7 @@ static const struct intel_device_info intel_rocketlake_info = {
> .graphics_ver = 12,
> .display_ver = 12,
> .is_rocketlake = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "rocketlake"
> };
>
> @@ -388,6 +409,7 @@ static const struct intel_device_info intel_dg1_info = {
> .graphics_rel = 10,
> .display_ver = 12,
> .is_dg1 = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "dg1"
> };
>
> @@ -398,6 +420,7 @@ static const struct intel_device_info intel_dg2_info = {
> .has_4tile = true,
> .is_dg2 = true,
> .codename = "dg2",
> + .blt_tiling = &gen12_dg2_blt_info,
> .has_flatccs = true,
> };
>
> @@ -405,6 +428,7 @@ static const struct intel_device_info intel_alderlake_s_info = {
> .graphics_ver = 12,
> .display_ver = 12,
> .is_alderlake_s = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "alderlake_s"
> };
>
> @@ -412,6 +436,7 @@ static const struct intel_device_info intel_raptorlake_s_info = {
> .graphics_ver = 12,
> .display_ver = 12,
> .is_raptorlake_s = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "raptorlake_s"
> };
>
> @@ -419,6 +444,7 @@ static const struct intel_device_info intel_alderlake_p_info = {
> .graphics_ver = 12,
> .display_ver = 13,
> .is_alderlake_p = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "alderlake_p"
> };
>
> @@ -426,6 +452,7 @@ static const struct intel_device_info intel_alderlake_n_info = {
> .graphics_ver = 12,
> .display_ver = 13,
> .is_alderlake_n = true,
> + .blt_tiling = &gen12_blt_info,
> .codename = "alderlake_n"
> };
>
> @@ -436,6 +463,7 @@ static const struct intel_device_info intel_ats_m_info = {
> .is_dg2 = true,
> .has_4tile = true,
> .codename = "ats_m",
> + .blt_tiling = &gen12_dg2_blt_info,
> .has_flatccs = true,
> };
>
> @@ -583,6 +611,25 @@ out:
> return cache;
> }
>
> +/**
> + * intel_get_blt_info:
> + * @devid: pci device id
> + *
> + * Looks up information on blitter commands and tiling formats supported
> + * by the device.
> + *
> + * Returns:
> + * The associated blt_cmd_info, NULL if no such information is found
> + */
> +const struct blt_cmd_info *intel_get_blt_info(uint16_t devid)
> +{
> + const struct intel_device_info *dev_info;
> +
> + dev_info = intel_get_device_info(devid);
> +
> + return dev_info->blt_tiling;
> +}
> +
> /**
> * intel_gen:
> * @devid: pci device id
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported Karolina Stolarek
@ 2023-01-20 11:12 ` Zbigniew Kempczyński
0 siblings, 0 replies; 17+ messages in thread
From: Zbigniew Kempczyński @ 2023-01-20 11:12 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jan 20, 2023 at 11:14:06AM +0100, Karolina Stolarek wrote:
> Add predicates that check if block or fast copy are supported and
> a simple iterator for tiling formats. Update block copy tests to use
> the new checks.
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
> lib/i915/i915_blt.c | 118 ++++++++++++++++++++++++++++++++++++-------
> lib/i915/i915_blt.h | 10 +++-
> tests/i915/gem_ccs.c | 7 +--
> 3 files changed, 113 insertions(+), 22 deletions(-)
>
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index cd7422d1..cd7968a1 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -14,6 +14,7 @@
> #include "i915_blt.h"
>
> #define BITRANGE(start, end) (end - start + 1)
> +#define GET_BLT_INFO(__fd) intel_get_blt_info(intel_get_drm_devid(__fd))
>
> enum blt_special_mode {
> SM_NONE,
> @@ -208,34 +209,115 @@ bool blt_supports_compression(int i915)
> }
>
> /**
> - * blt_supports_tiling:
> + * blt_supports_command:
> + * @info: Blitter command info struct
> + * @cmd: Blitter command enum
> + *
> + * Checks if @info has an entry of supported tiling formats for @cmd command.
> + *
> + * Returns: true if it does, false otherwise
> + */
> +bool blt_supports_command(const struct blt_cmd_info *info,
> + enum blt_cmd_type cmd)
> +{
> + igt_require_f(info, "No config found for the platform\n");
> +
> + return info->supported_cmds[cmd];
> +}
> +
> +/**
> + * blt_cmd_supports_tiling:
> + * @info: Blitter command info struct
> + * @cmd: Blitter command enum
> + * @tiling: tiling format enum
> + *
> + * Checks if a @cmd entry of @info lists @tiling. It also returns false if
> + * no information about the command is stored.
> + *
> + * Returns: true if it does, false otherwise
> + */
> +bool blt_cmd_supports_tiling(const struct blt_cmd_info *info,
> + enum blt_cmd_type cmd,
> + enum blt_tiling_type tiling)
> +{
> + struct blt_tiling_info const *tile_config;
> +
> + if (!info)
> + return false;
> +
> + tile_config = info->supported_cmds[cmd];
> +
> + /* no config means no support for that tiling */
> + if (!tile_config)
> + return false;
> +
> + return tile_config->supported_tiling & BIT(tiling);
> +}
> +
> +/**
> + * blt_has_block_copy
> * @i915: drm fd
> - * @tiling: tiling id
> *
> - * Function checks if blitter supports @tiling on @i915 device.
> + * Check if block copy is supported by @i915 device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_has_block_copy(int i915)
> {
> - uint32_t devid = intel_get_drm_devid(i915);
> + const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
>
> - if (tiling == T_XMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return false;
> - else
> - return true;
> - }
> + return blt_supports_command(blt_info, XY_BLOCK_COPY);
> +}
>
> - if (tiling == T_YMAJOR) {
> - if (IS_TIGERLAKE(devid) || IS_DG1(devid))
> - return true;
> - else
> - return false;
> - }
> +/**
> + * blt_has_fast_copy
> + * @i915: drm fd
> + *
> + * Check if fast copy is supported by @i915 device
> + *
> + * Returns:
> + * true if it does, false otherwise.
> + */
> +bool blt_has_fast_copy(int i915)
> +{
> + const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
> +
> + return blt_supports_command(blt_info, XY_FAST_COPY);
> +}
> +
> +/**
> + * blt_fast_copy_supports_tiling
> + * @i915: drm fd
> + * @tiling: tiling format
> + *
> + * Check if fast copy provided by @i915 device supports @tiling format
> + *
> + * Returns:
> + * true if it does, false otherwise.
> + */
> +bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +{
> + const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
> +
> + return blt_cmd_supports_tiling(blt_info, XY_FAST_COPY, tiling);
> +}
> +
> +/**
> + * blt_block_copy_supports_tiling
> + * @i915: drm fd
> + * @tiling: tiling format
> + *
> + * Check if block copy provided by @i915 device supports @tiling format
> + *
> + * Returns:
> + * true if it does, false otherwise.
> + */
> +bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +{
> + const struct blt_cmd_info *blt_info = GET_BLT_INFO(i915);
>
> - return true;
> + return blt_cmd_supports_tiling(blt_info, XY_BLOCK_COPY, tiling);
> }
>
> /**
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index 9837dcac..1e5061c6 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -158,7 +158,15 @@ struct blt_ctrl_surf_copy_data {
> };
>
> bool blt_supports_compression(int i915);
> -bool blt_supports_tiling(int i915, enum blt_tiling_type tiling);
> +bool blt_supports_command(const struct blt_cmd_info *info,
> + enum blt_cmd_type cmd);
> +bool blt_cmd_supports_tiling(const struct blt_cmd_info *info,
> + enum blt_cmd_type cmd,
> + enum blt_tiling_type tiling);
> +bool blt_has_block_copy(int i915);
> +bool blt_has_fast_copy(int i915);
> +bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> +bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> const char *blt_tiling_name(enum blt_tiling_type tiling);
>
> uint64_t emit_blt_block_copy(int i915,
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 724aa20b..2b60ce31 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -652,6 +652,7 @@ static void block_copy_test(int i915,
> {
> struct igt_collection *regions;
> const struct intel_execution_engine2 *e;
> + int tiling;
>
> if (config->compression && !blt_supports_compression(i915))
> return;
> @@ -659,8 +660,8 @@ static void block_copy_test(int i915,
> if (config->inplace && !config->compression)
> return;
>
> - for (int tiling = T_LINEAR; tiling <= T_TILE64; tiling++) {
> - if (!blt_supports_tiling(i915, tiling) ||
> + for_each_tiling(tiling) {
> + if (!blt_block_copy_supports_tiling(i915, tiling) ||
> (param.tiling >= 0 && param.tiling != tiling))
> continue;
>
> @@ -758,7 +759,7 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> igt_fixture {
> i915 = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(i915);
> - igt_require(AT_LEAST_GEN(intel_get_drm_devid(i915), 12) > 0);
> + igt_require(blt_has_block_copy(i915));
>
> query_info = gem_get_query_memory_regions(i915);
> igt_require(query_info);
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct (rev7)
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (8 preceding siblings ...)
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 9/9] tests/gem_exercise_blt: Add fast-copy-emit test Karolina Stolarek
@ 2023-01-20 11:56 ` Patchwork
2023-01-21 17:07 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2023-01-20 11:56 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 4122 bytes --]
== Series Details ==
Series: Introduce blt_cmd_info struct (rev7)
URL : https://patchwork.freedesktop.org/series/112055/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12616 -> IGTPW_8380
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
Participating hosts (38 -> 37)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8380:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_busy@busy@all-engines:
- {bat-dg2-8}: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/bat-dg2-8/igt@gem_busy@busy@all-engines.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/bat-dg2-8/igt@gem_busy@busy@all-engines.html
Known issues
------------
Here are the changes found in IGTPW_8380 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [PASS][3] -> [DMESG-FAIL][4] ([i915#5334] / [i915#7872])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@ring_submission:
- fi-kbl-soraka: [PASS][5] -> [INCOMPLETE][6] ([i915#7640])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/fi-kbl-soraka/igt@i915_selftest@live@ring_submission.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/fi-kbl-soraka/igt@i915_selftest@live@ring_submission.html
#### Possible fixes ####
* igt@i915_selftest@live@requests:
- {bat-rpls-1}: [INCOMPLETE][7] ([i915#4983] / [i915#6257]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/bat-rpls-1/igt@i915_selftest@live@requests.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/bat-rpls-1/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@reset:
- {bat-rpls-2}: [DMESG-FAIL][9] ([i915#4983]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/bat-rpls-2/igt@i915_selftest@live@reset.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/bat-rpls-2/igt@i915_selftest@live@reset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#7625]: https://gitlab.freedesktop.org/drm/intel/issues/7625
[i915#7640]: https://gitlab.freedesktop.org/drm/intel/issues/7640
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7127 -> IGTPW_8380
CI-20190529: 20190529
CI_DRM_12616: 98179da8401990f46b6dc1277f2b8eb1cf1d5c46 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8380: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
IGT_7127: 99f10de03e984778f3994fc3d05f8fa1f8575b30 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@gem_exercise_blt@fast-copy
+igt@gem_exercise_blt@fast-copy-emit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
[-- Attachment #2: Type: text/html, Size: 4505 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Introduce blt_cmd_info struct (rev7)
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
` (9 preceding siblings ...)
2023-01-20 11:56 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct (rev7) Patchwork
@ 2023-01-21 17:07 ` Patchwork
10 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2023-01-21 17:07 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 28659 bytes --]
== Series Details ==
Series: Introduce blt_cmd_info struct (rev7)
URL : https://patchwork.freedesktop.org/series/112055/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12616_full -> IGTPW_8380_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
Participating hosts (12 -> 9)
------------------------------
Missing (3): shard-rkl0 pig-kbl-iris pig-skl-6260u
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8380_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_ccs@block-multicopy-compressed:
- {shard-rkl}: [SKIP][1] ([i915#5325]) -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-3/igt@gem_ccs@block-multicopy-compressed.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@gem_ccs@block-multicopy-compressed.html
New tests
---------
New tests have been introduced between CI_DRM_12616_full and IGTPW_8380_full:
### New IGT tests (12) ###
* igt@gem_exercise_blt@fast-copy:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit@linear-smem-smem-emit:
- Statuses : 3 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit@tile4-smem-smem-emit:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit@tile64-smem-smem-emit:
- Statuses : 3 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit@yfmajor-smem-smem-emit:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy-emit@ymajor-smem-smem-emit:
- Statuses : 3 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@linear-smem-smem:
- Statuses : 4 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile4-smem-smem:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@tile64-smem-smem:
- Statuses : 4 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@yfmajor-smem-smem:
- Statuses : 2 pass(s)
- Exec time: [0.0] s
* igt@gem_exercise_blt@fast-copy@ymajor-smem-smem:
- Statuses : 4 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_8380_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][3] -> [FAIL][4] ([i915#2846])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-glk2/igt@gem_exec_fair@basic-deadline.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk9/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#2842]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-glk4/igt@gem_exec_fair@basic-pace@vecs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk9/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_lmem_swapping@heavy-verify-multi:
- shard-apl: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl6/igt@gem_lmem_swapping@heavy-verify-multi.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [PASS][8] -> [DMESG-WARN][9] ([i915#5566] / [i915#716])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl3/igt@gen9_exec_parse@allowed-single.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl2/igt@gen9_exec_parse@allowed-single.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3886]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl3/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-apl: [PASS][11] -> [FAIL][12] ([i915#2346]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc:
- shard-apl: NOTRUN -> [FAIL][13] ([i915#4767])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl2/igt@kms_fbcon_fbt@fbc.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp1:
- shard-apl: NOTRUN -> [FAIL][14] ([i915#79])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl7/igt@kms_flip@flip-vs-expired-vblank@a-dp1.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#79]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk1/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-glk: NOTRUN -> [SKIP][17] ([fdo#109271]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][18] ([fdo#109271]) +3 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-snb4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#658])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271]) +99 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl2/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@perf@stress-open-close:
- shard-glk: [PASS][21] -> [INCOMPLETE][22] ([i915#5213])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-glk4/igt@perf@stress-open-close.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk6/igt@perf@stress-open-close.html
* igt@runner@aborted:
- shard-glk: NOTRUN -> [FAIL][23] ([i915#4312])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk6/igt@runner@aborted.html
* igt@sysfs_clients@sema-50:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#2994]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl2/igt@sysfs_clients@sema-50.html
#### Possible fixes ####
* igt@drm_fdinfo@idle@rcs0:
- {shard-rkl}: [FAIL][25] ([i915#7742]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-3/igt@drm_fdinfo@idle@rcs0.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@drm_fdinfo@idle@rcs0.html
* igt@fbdev@info:
- {shard-rkl}: [SKIP][27] ([i915#2582]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-4/igt@fbdev@info.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-2/igt@fbdev@info.html
* igt@feature_discovery@psr1:
- {shard-rkl}: [SKIP][29] ([i915#658]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-1/igt@feature_discovery@psr1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@feature_discovery@psr1.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [FAIL][31] ([i915#2842]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-glk4/igt@gem_exec_fair@basic-none@vecs0.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-glk3/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [FAIL][33] ([i915#2842]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_reloc@basic-gtt-read-noreloc:
- {shard-rkl}: [SKIP][35] ([i915#3281]) -> [PASS][36] +13 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-read-noreloc.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-read-noreloc.html
* igt@gem_mmap_gtt@coherency:
- {shard-rkl}: [SKIP][37] ([fdo#111656]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-4/igt@gem_mmap_gtt@coherency.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@gem_mmap_gtt@coherency.html
* igt@gem_pwrite_snooped:
- {shard-rkl}: [SKIP][39] ([i915#3282]) -> [PASS][40] +4 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-1/igt@gem_pwrite_snooped.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@gem_pwrite_snooped.html
* igt@gen9_exec_parse@secure-batches:
- {shard-rkl}: [SKIP][41] ([i915#2527]) -> [PASS][42] +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-2/igt@gen9_exec_parse@secure-batches.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@gen9_exec_parse@secure-batches.html
* igt@i915_pm_dc@dc9-dpms:
- {shard-rkl}: [SKIP][43] ([i915#3361]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-1/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}: [WARN][45] ([i915#2681]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-1/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-rkl}: [SKIP][47] ([i915#1397]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-3/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_selftest@live@gem_contexts:
- {shard-rkl}: [INCOMPLETE][49] -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-1/igt@i915_selftest@live@gem_contexts.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-4/igt@i915_selftest@live@gem_contexts.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [SKIP][51] ([i915#1845] / [i915#4098]) -> [PASS][52] +21 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-3/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][53] ([i915#1849] / [i915#4098]) -> [PASS][54] +15 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_hdmi_inject@inject-audio:
- {shard-rkl}: [SKIP][55] ([i915#433]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-4/igt@kms_hdmi_inject@inject-audio.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_properties@crtc-properties-atomic:
- {shard-tglu}: [SKIP][57] ([i915#1849]) -> [PASS][58] +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-tglu-6/igt@kms_properties@crtc-properties-atomic.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-tglu-1/igt@kms_properties@crtc-properties-atomic.html
* igt@kms_psr@cursor_blt:
- {shard-rkl}: [SKIP][59] ([i915#1072]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-2/igt@kms_psr@cursor_blt.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@kms_psr@cursor_blt.html
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-a:
- {shard-tglu}: [SKIP][61] ([fdo#109274]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-tglu-6/igt@kms_universal_plane@disable-primary-vs-flip-pipe-a.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-tglu-3/igt@kms_universal_plane@disable-primary-vs-flip-pipe-a.html
* igt@kms_universal_plane@universal-plane-pipe-b-functional:
- {shard-rkl}: [SKIP][63] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-2/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-6/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
* igt@kms_vblank@pipe-a-wait-busy:
- {shard-tglu}: [SKIP][65] ([i915#7651]) -> [PASS][66] +10 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-tglu-6/igt@kms_vblank@pipe-a-wait-busy.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-tglu-3/igt@kms_vblank@pipe-a-wait-busy.html
* igt@kms_vblank@pipe-c-wait-forked:
- {shard-tglu}: [SKIP][67] ([i915#1845] / [i915#7651]) -> [PASS][68] +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-tglu-6/igt@kms_vblank@pipe-c-wait-forked.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-tglu-3/igt@kms_vblank@pipe-c-wait-forked.html
* igt@perf_pmu@rc6-suspend:
- shard-apl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl7/igt@perf_pmu@rc6-suspend.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl3/igt@perf_pmu@rc6-suspend.html
* igt@prime_vgem@coherency-gtt:
- {shard-rkl}: [SKIP][71] ([fdo#109295] / [fdo#111656] / [i915#3708]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-rkl-4/igt@prime_vgem@coherency-gtt.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-rkl-5/igt@prime_vgem@coherency-gtt.html
#### Warnings ####
* igt@i915_pm_dc@dc9-dpms:
- shard-apl: [FAIL][73] ([i915#4275]) -> [SKIP][74] ([fdo#109271])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl6/igt@i915_pm_dc@dc9-dpms.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl1/igt@i915_pm_dc@dc9-dpms.html
* igt@runner@aborted:
- shard-apl: ([FAIL][75], [FAIL][76]) ([fdo#109271] / [i915#180] / [i915#4312]) -> [FAIL][77] ([fdo#109271] / [i915#4312])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl1/igt@runner@aborted.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12616/shard-apl7/igt@runner@aborted.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/shard-apl2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4275]: https://gitlab.freedesktop.org/drm/intel/issues/4275
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
[i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7127 -> IGTPW_8380
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_12616: 98179da8401990f46b6dc1277f2b8eb1cf1d5c46 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8380: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
IGT_7127: 99f10de03e984778f3994fc3d05f8fa1f8575b30 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8380/index.html
[-- Attachment #2: Type: text/html, Size: 23408 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2023-01-21 17:07 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-01-20 10:14 [igt-dev] [PATCH i-g-t v7 0/9] Introduce blt_cmd_info struct Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 1/9] lib/i915_blt: Rename blt_tiling to blt_tiling_type Karolina Stolarek
2023-01-20 11:03 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 2/9] lib/i915_blt: Add T_YFMAJOR tiling type Karolina Stolarek
2023-01-20 11:05 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 3/9] lib/i915_blt: Check for Tile-YF in fast_copy Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 4/9] i915/lib: Add new library for blitter and tiling formats Karolina Stolarek
2023-01-20 11:08 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 5/9] lib/intel_device_info: Update platform definitions with blitter information Karolina Stolarek
2023-01-20 11:10 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 6/9] lib/i915_blt: Add helpers to check if command or tiling is supported Karolina Stolarek
2023-01-20 11:12 ` Zbigniew Kempczyński
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 7/9] lib/i915_blt: Add common functions for blt_copy_object Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 8/9] tests/gem_exercise_blt: Add fast-copy test Karolina Stolarek
2023-01-20 10:14 ` [igt-dev] [PATCH i-g-t v7 9/9] tests/gem_exercise_blt: Add fast-copy-emit test Karolina Stolarek
2023-01-20 11:56 ` [igt-dev] ✓ Fi.CI.BAT: success for Introduce blt_cmd_info struct (rev7) Patchwork
2023-01-21 17:07 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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