[igt-dev] [PATCH i-g-t v4 0/9] Update gem_blits for newer generations

[igt-dev] [PATCH i-g-t v4 0/9] Update gem_blits for newer generations

[Karolina Stolarek]

gem_blits test utilizes XY_SRC_COPY_BLT, a legacy blitter command
that is not available on newer generations such as MTL. To make
sure the test covers such platforms, update it to switch to
XY_FAST_COPY_BLT for blit copy operations.

In addition to this change, the series:
  1) Adds helpers to i915_blt library that check support for
     XY_SRC_COPY_BLT command and its capabilities
  2) Updates the definitions of older platforms to properly list
     all available commands and tilings
  3) Updates gem_blits to use aforementioned helpers to detect
     tiling formats supported by the platform

v4:
  - Dropped patch "tests/i915/gem_blits: Add XY_FAST_COPY_BLT support
    for gem_blits" in favour of "lib/intel_batchbuffer: Handle no
    support for Tile Y", as Zbigniew suggested that the workaround
    should be implemented inside the fast_copy_dword1() function
  - Added an extra patch with headers cleanup, as intel_batchbuffer.c
    had _a lot_ of them included
  - Rewrite conditional statements in gem_blits to first check for
    xy_src_copy support and then for fast copy. Update
    blit_supports_tiling() to reflect that change

v3:
  - Rebase the changes, as they stopped applying cleanly
  - Add static asserts on tiling enums, to make sure that changing
    defines or blt_tiling_type results in a compiler error
  - Reorder T_YFMAJOR value to it directly follows Tile4. Thanks to
    __block_tiling() and __fast_tiling() switches, this change
    shouldn't break gem_ccs/gem_exercise_blt tests

v2:
  - Remove libdrm include in "tests/i915/gem_blits: Add XY_FAST_COPY_BLT
    support for gem_blits". It's not needed and causes compile errors
    on some targets

Arjun Melkaveri (1):
  tests/i915/gem_blits: Use new copy instruction

Karolina Stolarek (7):
  lib/i915_blt: Add helpers to check XY_SRC_COPY support
  lib/intel_cmds_info: Correct tiling formats for XY_SRC_COPY
  lib/intel_device_info: Add tiling information for early gens
  lib/intel_batchbuffer: Remove unused includes
  lib/intel_cmds_info: Reorder blt_tiling_type enum
  lib/intel_batchbuffer: Handle no support for Tile Y
  tests/gem_blits: Use intel_cmds_info library

Vikas Srivastava (1):
  lib/intel_batchbuffer: Add wrapper API to use
    XY_FAST_COPY_BLT/XY_SRC_BLT

 lib/i915/i915_blt.c        |  39 ++++++++++
 lib/i915/i915_blt.h        |   2 +
 lib/i915/intel_cmds_info.c |  24 ++++--
 lib/i915/intel_cmds_info.h |   5 +-
 lib/intel_batchbuffer.c    | 128 +++++++++++++++++++++++--------
 lib/intel_batchbuffer.h    |  28 +++++++
 lib/intel_device_info.c    |  29 +++++--
 tests/i915/gem_blits.c     | 151 ++++++++++++++++++++++++-------------
 8 files changed, 305 insertions(+), 101 deletions(-)

-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 1/9] lib/i915_blt: Add helpers to check XY_SRC_COPY support

[Karolina Stolarek]

Add predicates that check if the command with a specific
tiling format is supported on the current platform.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/i915_blt.c | 33 +++++++++++++++++++++++++++++++++
 lib/i915/i915_blt.h |  2 ++
 2 files changed, 35 insertions(+)

diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 63eba4ac..13105820 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -295,6 +295,22 @@ bool blt_has_fast_copy(int i915)
 	return blt_supports_command(cmds_info, XY_FAST_COPY);
 }
 
+/**
+ * blt_has_xy_src_copy
+ * @i915: drm fd
+ *
+ * Check if XY src copy is supported by @i915 device
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_has_xy_src_copy(int i915)
+{
+	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+
+	return blt_supports_command(cmds_info, XY_SRC_COPY);
+}
+
 /**
  * blt_fast_copy_supports_tiling
  * @i915: drm fd
@@ -329,6 +345,23 @@ bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
 	return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
 }
 
+/**
+ * blt_xy_src_copy_supports_tiling
+ * @i915: drm fd
+ * @tiling: tiling format
+ *
+ * Check if XY src copy provided by @i915 device supports @tiling format
+ *
+ * Returns:
+ * true if it does, false otherwise.
+ */
+bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+{
+	const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+
+	return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
+}
+
 /**
  * blt_block_copy_supports_compression
  * @i915: drm fd
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index 63951db7..a5f0edd1 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -168,9 +168,11 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
 
 bool blt_has_block_copy(int i915);
 bool blt_has_fast_copy(int i915);
+bool blt_has_xy_src_copy(int i915);
 
 bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
 bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
+bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
 bool blt_block_copy_supports_compression(int i915);
 bool blt_uses_extended_block_copy(int i915);
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 2/9] lib/intel_cmds_info: Correct tiling formats for XY_SRC_COPY

[Karolina Stolarek]

Both TileX and TileY are supported since SNB. Update definitions
for pre-SNB and pre-BDW platforms.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/intel_cmds_info.c | 24 ++++++++++++++++--------
 lib/i915/intel_cmds_info.h |  3 ++-
 lib/intel_device_info.c    | 12 ++++++------
 3 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/lib/i915/intel_cmds_info.c b/lib/i915/intel_cmds_info.c
index 2ac6bc2a..08fc981a 100644
--- a/lib/i915/intel_cmds_info.c
+++ b/lib/i915/intel_cmds_info.c
@@ -22,11 +22,11 @@
 
 static const struct blt_cmd_info src_copy = BLT_INFO(SRC_COPY, BIT(T_LINEAR));
 static const struct blt_cmd_info
-		pre_gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+		pre_gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
 						BIT(T_LINEAR) |
 						BIT(T_XMAJOR));
 static const struct blt_cmd_info
-		gen8_xy_src_copy = BLT_INFO(XY_SRC_COPY,
+		gen6_xy_src_copy = BLT_INFO(XY_SRC_COPY,
 					    BIT(T_LINEAR) |
 					    BIT(T_XMAJOR) |
 					    BIT(T_YMAJOR));
@@ -69,29 +69,37 @@ static const struct blt_cmd_info
 						 BIT(T_TILE64),
 						 BLT_CMD_EXTENDED);
 
-const struct intel_cmds_info pre_gen8_cmds_info = {
+const struct intel_cmds_info pre_gen6_cmds_info = {
 	.blt_cmds = {
 		[SRC_COPY] = &src_copy,
-		[XY_SRC_COPY] = &pre_gen8_xy_src_copy
+		[XY_SRC_COPY] = &pre_gen6_xy_src_copy
 	}
 };
 
+const struct intel_cmds_info gen6_cmds_info =  {
+	.blt_cmds = {
+		[SRC_COPY] = &src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy
+	}
+
+};
+
 const struct intel_cmds_info gen8_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 	}
 };
 
 const struct intel_cmds_info gen11_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &gen11_xy_fast_copy,
 	}
 };
 
 const struct intel_cmds_info gen12_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &gen12_xy_fast_copy,
 		[XY_BLOCK_COPY] = &gen12_xy_block_copy,
 	}
@@ -99,7 +107,7 @@ const struct intel_cmds_info gen12_cmds_info = {
 
 const struct intel_cmds_info gen12_dg2_cmds_info = {
 	.blt_cmds = {
-		[XY_SRC_COPY] = &gen8_xy_src_copy,
+		[XY_SRC_COPY] = &gen6_xy_src_copy,
 		[XY_FAST_COPY] = &dg2_xy_fast_copy,
 		[XY_BLOCK_COPY] = &dg2_xy_block_copy,
 	}
diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
index 9bf6ecd5..57e34c4b 100644
--- a/lib/i915/intel_cmds_info.h
+++ b/lib/i915/intel_cmds_info.h
@@ -39,7 +39,8 @@ struct intel_cmds_info {
 	struct blt_cmd_info const *blt_cmds[__BLT_MAX_CMD];
 };
 
-extern const struct intel_cmds_info pre_gen8_cmds_info;
+extern const struct intel_cmds_info pre_gen6_cmds_info;
+extern const struct intel_cmds_info gen6_cmds_info;
 extern const struct intel_cmds_info gen8_cmds_info;
 extern const struct intel_cmds_info gen11_cmds_info;
 extern const struct intel_cmds_info gen12_cmds_info;
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 12b81d48..0baad721 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -145,7 +145,7 @@ static const struct intel_device_info intel_sandybridge_info = {
 	.graphics_ver = 6,
 	.display_ver = 6,
 	.is_sandybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "sandybridge"
 };
 static const struct intel_device_info intel_sandybridge_m_info = {
@@ -153,7 +153,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
 	.display_ver = 6,
 	.is_mobile = true,
 	.is_sandybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "sandybridge"
 };
 
@@ -161,7 +161,7 @@ static const struct intel_device_info intel_ivybridge_info = {
 	.graphics_ver = 7,
 	.display_ver = 7,
 	.is_ivybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "ivybridge"
 };
 static const struct intel_device_info intel_ivybridge_m_info = {
@@ -169,7 +169,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
 	.display_ver = 7,
 	.is_mobile = true,
 	.is_ivybridge = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "ivybridge"
 };
 
@@ -177,7 +177,7 @@ static const struct intel_device_info intel_valleyview_info = {
 	.graphics_ver = 7,
 	.display_ver = 7,
 	.is_valleyview = true,
-	.cmds_info = &pre_gen8_cmds_info,
+	.cmds_info = &gen6_cmds_info,
 	.codename = "valleyview"
 };
 
@@ -185,7 +185,7 @@ static const struct intel_device_info intel_valleyview_info = {
 	.graphics_ver = 7, \
 	.display_ver = 7, \
 	.is_haswell = true, \
-	.cmds_info = &pre_gen8_cmds_info, \
+	.cmds_info = &gen6_cmds_info, \
 	.codename = "haswell"
 
 static const struct intel_device_info intel_haswell_gt1_info = {
-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 3/9] lib/intel_device_info: Add tiling information for early gens

[Karolina Stolarek]

Update relevant intel_device_info entries to store information
on supported tiling formats.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_device_info.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 0baad721..bda4fb63 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -27,12 +27,14 @@ static const struct intel_device_info intel_i830_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_almador = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "almador"
 };
 static const struct intel_device_info intel_i845_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_brookdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "brookdale"
 };
 static const struct intel_device_info intel_i855_info = {
@@ -40,12 +42,14 @@ static const struct intel_device_info intel_i855_info = {
 	.display_ver = 2,
 	.is_mobile = true,
 	.is_montara = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "montara"
 };
 static const struct intel_device_info intel_i865_info = {
 	.graphics_ver = 2,
 	.display_ver = 2,
 	.is_springdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "spingdale"
 };
 
@@ -53,6 +57,7 @@ static const struct intel_device_info intel_i915_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_grantsdale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "grantsdale"
 };
 static const struct intel_device_info intel_i915m_info = {
@@ -60,12 +65,14 @@ static const struct intel_device_info intel_i915m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_alviso = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "alviso"
 };
 static const struct intel_device_info intel_i945_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_lakeport = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "lakeport"
 };
 static const struct intel_device_info intel_i945m_info = {
@@ -73,6 +80,7 @@ static const struct intel_device_info intel_i945m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_calistoga = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "calistoga"
 };
 
@@ -80,6 +88,7 @@ static const struct intel_device_info intel_g33_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_bearlake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "bearlake"
 };
 
@@ -87,6 +96,7 @@ static const struct intel_device_info intel_pineview_g_info = {
 	.graphics_ver = 3,
 	.display_ver = 3,
 	.is_pineview = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "pineview"
 };
 
@@ -95,6 +105,7 @@ static const struct intel_device_info intel_pineview_m_info = {
 	.display_ver = 3,
 	.is_mobile = true,
 	.is_pineview = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "pineview"
 };
 
@@ -102,6 +113,7 @@ static const struct intel_device_info intel_i965_info = {
 	.graphics_ver = 4,
 	.display_ver = 4,
 	.is_broadwater = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "broadwater"
 };
 
@@ -110,6 +122,7 @@ static const struct intel_device_info intel_i965m_info = {
 	.display_ver = 4,
 	.is_mobile = true,
 	.is_crestline = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "crestline"
 };
 
@@ -117,6 +130,7 @@ static const struct intel_device_info intel_g45_info = {
 	.graphics_ver = 4,
 	.display_ver = 4,
 	.is_eaglelake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "eaglelake"
 };
 static const struct intel_device_info intel_gm45_info = {
@@ -124,6 +138,7 @@ static const struct intel_device_info intel_gm45_info = {
 	.display_ver = 4,
 	.is_mobile = true,
 	.is_cantiga = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "cantiga"
 };
 
@@ -131,6 +146,7 @@ static const struct intel_device_info intel_ironlake_info = {
 	.graphics_ver = 5,
 	.display_ver = 5,
 	.is_ironlake = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "ironlake" /* clarkdale? */
 };
 static const struct intel_device_info intel_ironlake_m_info = {
@@ -138,6 +154,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
 	.display_ver = 5,
 	.is_mobile = true,
 	.is_arrandale = true,
+	.cmds_info = &pre_gen6_cmds_info,
 	.codename = "arrandale"
 };
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 4/9] tests/i915/gem_blits: Use new copy instruction

[Karolina Stolarek]

From: Arjun Melkaveri <arjun.melkaveri@intel.com>

The test uses legacy command which is not supported on
newer GPU generations. Use XY_FAST_COPY_BLT on newer GPU generations.

Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
 lib/intel_batchbuffer.c | 10 ++---
 lib/intel_batchbuffer.h |  6 +++
 tests/i915/gem_blits.c  | 90 ++++++++++++++++++++++++++---------------
 3 files changed, 68 insertions(+), 38 deletions(-)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 7bb24c8f..a2bf5d2e 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -92,8 +92,8 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling)
 		return stride;
 }
 
-static uint32_t fast_copy_dword0(unsigned int src_tiling,
-				 unsigned int dst_tiling)
+uint32_t fast_copy_dword0(unsigned int src_tiling,
+			  unsigned int dst_tiling)
 {
 	uint32_t dword0 = 0;
 
@@ -136,9 +136,9 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling,
 	return dword0;
 }
 
-static uint32_t fast_copy_dword1(unsigned int src_tiling,
-				 unsigned int dst_tiling,
-				 int bpp)
+uint32_t fast_copy_dword1(unsigned int src_tiling,
+			  unsigned int dst_tiling,
+			  int bpp)
 {
 	uint32_t dword1 = 0;
 
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 37db0ffa..81830d77 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -31,6 +31,12 @@ enum i915_compression {
 	I915_COMPRESSION_MEDIA,
 };
 
+uint32_t fast_copy_dword0(unsigned int src_tiling,
+			  unsigned int dst_tiling);
+uint32_t fast_copy_dword1(unsigned int src_tiling,
+			  unsigned int dst_tiling,
+			  int bpp);
+
 void igt_blitter_src_copy(int fd,
 			  uint64_t ahnd,
 			  uint32_t ctx,
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 9ea3925c..1414826c 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -22,10 +22,12 @@
  *
  */
 
+#include "intel_batchbuffer.h"
 #include "i915/gem.h"
 #include "i915/gem_create.h"
 #include "igt.h"
 #include "igt_x86.h"
+#include "i915/i915_blt.h"
 
 #define BCS_SWCTRL 0x22200
 #define BCS_SRC_Y (1 << 0)
@@ -145,8 +147,7 @@ static void buffer_set_tiling(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t stride, size, pitch;
-	uint32_t *batch;
+	uint32_t stride, size, pitch, *batch, dword1;
 	int i;
 
 	if (buffer->tiling == tiling)
@@ -207,19 +208,28 @@ static void buffer_set_tiling(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && buffer->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	if (device->gen >= 4 && tiling)
-		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
-
 	pitch = stride;
 	if (device->gen >= 4 && tiling)
 		pitch /= 4;
-	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+
+	if (blt_has_xy_src_copy(device->fd)) {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && buffer->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		if (device->gen >= 4 && tiling)
+			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+	} else if (blt_has_fast_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
+		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
+		batch[i++] = dword1 | pitch;
+	} else {
+		igt_assert_f(0, "No supported blit command found\n");
+	}
+
 	batch[i++] = 0;
 	batch[i++] = buffer->height << 16 | buffer->width;
 	reloc[0].target_handle = obj[0].handle;
@@ -296,8 +306,7 @@ static bool blit_to_linear(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t *batch;
-	uint32_t pitch;
+	uint32_t *batch, pitch, dword1;
 	int i = 0;
 
 	igt_assert(buffer->tiling);
@@ -352,14 +361,22 @@ static bool blit_to_linear(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && buffer->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
+	if (blt_has_xy_src_copy(device->fd)) {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && buffer->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
+	} else if (blt_has_fast_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
+		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
+		batch[i++] = dword1 | buffer->stride;
+	} else {
+		igt_assert_f(0, "No supported blit command found\n");
+	}
 
-	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
 	batch[i++] = 0;
 	batch[i++] = buffer->height << 16 | buffer->width;
 	reloc[0].target_handle = obj[0].handle;
@@ -598,8 +615,7 @@ blit(const struct device *device,
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const bool has_64b_reloc = device->gen >= 8;
-	uint32_t *batch;
-	uint32_t pitch;
+	uint32_t *batch, dword1, pitch;
 	int i = 0;
 
 	if (src_x < 0) {
@@ -687,19 +703,27 @@ blit(const struct device *device,
 		batch[i++] = mask;
 	}
 
-	batch[i] = (XY_SRC_COPY_BLT_CMD |
-		    XY_SRC_COPY_BLT_WRITE_ALPHA |
-		    XY_SRC_COPY_BLT_WRITE_RGB);
-	if (device->gen >= 4 && src->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	if (device->gen >= 4 && dst->tiling)
-		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
-
 	pitch = dst->stride;
 	if (device->gen >= 4 && dst->tiling)
 		pitch /= 4;
-	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+
+	if (blt_has_xy_src_copy(device->fd)) {
+		batch[i] = (XY_SRC_COPY_BLT_CMD |
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB);
+		if (device->gen >= 4 && src->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
+		if (device->gen >= 4 && dst->tiling)
+			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
+		batch[i++] |= 6 + 2 * has_64b_reloc;
+		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
+	} else if (blt_has_fast_copy(device->fd)) {
+		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
+		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
+		batch[i++] = dword1 | pitch;
+	} else {
+		igt_assert_f(0, "No supported blit command found\n");
+	}
 
 	batch[i++] = dst_y << 16 | dst_x;
 	batch[i++] = (height + dst_y) << 16 | (width + dst_x);
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t v4 4/9] tests/i915/gem_blits: Use new copy instruction

[Zbigniew Kempczyński]

On Fri, Mar 17, 2023 at 01:37:06PM +0100, Karolina Stolarek wrote:
> From: Arjun Melkaveri <arjun.melkaveri@intel.com>
> 
> The test uses legacy command which is not supported on
> newer GPU generations. Use XY_FAST_COPY_BLT on newer GPU generations.
> 
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
>  lib/intel_batchbuffer.c | 10 ++---
>  lib/intel_batchbuffer.h |  6 +++
>  tests/i915/gem_blits.c  | 90 ++++++++++++++++++++++++++---------------
>  3 files changed, 68 insertions(+), 38 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 7bb24c8f..a2bf5d2e 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -92,8 +92,8 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling)
>  		return stride;
>  }
>  
> -static uint32_t fast_copy_dword0(unsigned int src_tiling,
> -				 unsigned int dst_tiling)
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling)
>  {
>  	uint32_t dword0 = 0;
>  
> @@ -136,9 +136,9 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling,
>  	return dword0;
>  }
>  
> -static uint32_t fast_copy_dword1(unsigned int src_tiling,
> -				 unsigned int dst_tiling,
> -				 int bpp)
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp)
>  {
>  	uint32_t dword1 = 0;
>  
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 37db0ffa..81830d77 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -31,6 +31,12 @@ enum i915_compression {
>  	I915_COMPRESSION_MEDIA,
>  };
>  
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling);
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp);
> +
>  void igt_blitter_src_copy(int fd,
>  			  uint64_t ahnd,
>  			  uint32_t ctx,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 9ea3925c..1414826c 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -22,10 +22,12 @@
>   *
>   */
>  
> +#include "intel_batchbuffer.h"
>  #include "i915/gem.h"
>  #include "i915/gem_create.h"
>  #include "igt.h"
>  #include "igt_x86.h"
> +#include "i915/i915_blt.h"
>  
>  #define BCS_SWCTRL 0x22200
>  #define BCS_SRC_Y (1 << 0)
> @@ -145,8 +147,7 @@ static void buffer_set_tiling(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t stride, size, pitch;
> -	uint32_t *batch;
> +	uint32_t stride, size, pitch, *batch, dword1;
>  	int i;
>  
>  	if (buffer->tiling == tiling)
> @@ -207,19 +208,28 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = stride;
>  	if (device->gen >= 4 && tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> +		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		batch[i++] = dword1 | pitch;

Ok, now it looks much better for me, especially caller doesn't
change tiling in the call and fast_copy_dword1() is responsible
to adjust appropriate bitfields.

--
Zbigniew

> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
> +
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -296,8 +306,7 @@ static bool blit_to_linear(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, pitch, dword1;
>  	int i = 0;
>  
>  	igt_assert(buffer->tiling);
> @@ -352,14 +361,22 @@ static bool blit_to_linear(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> +		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		batch[i++] = dword1 | buffer->stride;
> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
>  
> -	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -598,8 +615,7 @@ blit(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, dword1, pitch;
>  	int i = 0;
>  
>  	if (src_x < 0) {
> @@ -687,19 +703,27 @@ blit(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && src->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && dst->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = dst->stride;
>  	if (device->gen >= 4 && dst->tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && src->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && dst->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> +		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		batch[i++] = dword1 | pitch;
> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
>  
>  	batch[i++] = dst_y << 16 | dst_x;
>  	batch[i++] = (height + dst_y) << 16 | (width + dst_x);
> -- 
> 2.25.1
> 

Re: [igt-dev] [PATCH i-g-t v4 4/9] tests/i915/gem_blits: Use new copy instruction

[Zbigniew Kempczyński]

On Fri, Mar 17, 2023 at 01:37:06PM +0100, Karolina Stolarek wrote:
> From: Arjun Melkaveri <arjun.melkaveri@intel.com>
> 
> The test uses legacy command which is not supported on
> newer GPU generations. Use XY_FAST_COPY_BLT on newer GPU generations.
> 

Forgot to add in review:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

> Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
>  lib/intel_batchbuffer.c | 10 ++---
>  lib/intel_batchbuffer.h |  6 +++
>  tests/i915/gem_blits.c  | 90 ++++++++++++++++++++++++++---------------
>  3 files changed, 68 insertions(+), 38 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 7bb24c8f..a2bf5d2e 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -92,8 +92,8 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling)
>  		return stride;
>  }
>  
> -static uint32_t fast_copy_dword0(unsigned int src_tiling,
> -				 unsigned int dst_tiling)
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling)
>  {
>  	uint32_t dword0 = 0;
>  
> @@ -136,9 +136,9 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling,
>  	return dword0;
>  }
>  
> -static uint32_t fast_copy_dword1(unsigned int src_tiling,
> -				 unsigned int dst_tiling,
> -				 int bpp)
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp)
>  {
>  	uint32_t dword1 = 0;
>  
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 37db0ffa..81830d77 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -31,6 +31,12 @@ enum i915_compression {
>  	I915_COMPRESSION_MEDIA,
>  };
>  
> +uint32_t fast_copy_dword0(unsigned int src_tiling,
> +			  unsigned int dst_tiling);
> +uint32_t fast_copy_dword1(unsigned int src_tiling,
> +			  unsigned int dst_tiling,
> +			  int bpp);
> +
>  void igt_blitter_src_copy(int fd,
>  			  uint64_t ahnd,
>  			  uint32_t ctx,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 9ea3925c..1414826c 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -22,10 +22,12 @@
>   *
>   */
>  
> +#include "intel_batchbuffer.h"
>  #include "i915/gem.h"
>  #include "i915/gem_create.h"
>  #include "igt.h"
>  #include "igt_x86.h"
> +#include "i915/i915_blt.h"
>  
>  #define BCS_SWCTRL 0x22200
>  #define BCS_SRC_Y (1 << 0)
> @@ -145,8 +147,7 @@ static void buffer_set_tiling(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t stride, size, pitch;
> -	uint32_t *batch;
> +	uint32_t stride, size, pitch, *batch, dword1;
>  	int i;
>  
>  	if (buffer->tiling == tiling)
> @@ -207,19 +208,28 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = stride;
>  	if (device->gen >= 4 && tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> +		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		batch[i++] = dword1 | pitch;
> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
> +
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -296,8 +306,7 @@ static bool blit_to_linear(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, pitch, dword1;
>  	int i = 0;
>  
>  	igt_assert(buffer->tiling);
> @@ -352,14 +361,22 @@ static bool blit_to_linear(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && buffer->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && buffer->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> +		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		batch[i++] = dword1 | buffer->stride;
> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
>  
> -	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>  	batch[i++] = 0;
>  	batch[i++] = buffer->height << 16 | buffer->width;
>  	reloc[0].target_handle = obj[0].handle;
> @@ -598,8 +615,7 @@ blit(const struct device *device,
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
>  	const bool has_64b_reloc = device->gen >= 8;
> -	uint32_t *batch;
> -	uint32_t pitch;
> +	uint32_t *batch, dword1, pitch;
>  	int i = 0;
>  
>  	if (src_x < 0) {
> @@ -687,19 +703,27 @@ blit(const struct device *device,
>  		batch[i++] = mask;
>  	}
>  
> -	batch[i] = (XY_SRC_COPY_BLT_CMD |
> -		    XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		    XY_SRC_COPY_BLT_WRITE_RGB);
> -	if (device->gen >= 4 && src->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	if (device->gen >= 4 && dst->tiling)
> -		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> -
>  	pitch = dst->stride;
>  	if (device->gen >= 4 && dst->tiling)
>  		pitch /= 4;
> -	batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +
> +	if (blt_has_xy_src_copy(device->fd)) {
> +		batch[i] = (XY_SRC_COPY_BLT_CMD |
> +			    XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			    XY_SRC_COPY_BLT_WRITE_RGB);
> +		if (device->gen >= 4 && src->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> +		if (device->gen >= 4 && dst->tiling)
> +			batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> +		batch[i++] |= 6 + 2 * has_64b_reloc;
> +		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
> +	} else if (blt_has_fast_copy(device->fd)) {
> +		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> +		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		batch[i++] = dword1 | pitch;
> +	} else {
> +		igt_assert_f(0, "No supported blit command found\n");
> +	}
>  
>  	batch[i++] = dst_y << 16 | dst_x;
>  	batch[i++] = (height + dst_y) << 16 | (width + dst_x);
> -- 
> 2.25.1
> 

[igt-dev] [PATCH i-g-t v4 5/9] lib/intel_batchbuffer: Add wrapper API to use XY_FAST_COPY_BLT/XY_SRC_BLT

[Karolina Stolarek]

From: Vikas Srivastava <vikas.srivastava@intel.com>

Add wrapper API in intel_batchbuffer to call respective copy functions
for XY_FAST_COPY_BLT or XY_SRC_BLT based on platform on which its
supported.

Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_batchbuffer.c | 72 +++++++++++++++++++++++++++++++++++++++++
 lib/intel_batchbuffer.h | 22 +++++++++++++
 2 files changed, 94 insertions(+)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index a2bf5d2e..a5157194 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -277,6 +277,78 @@ static uint32_t src_copy_dword1(uint32_t dst_pitch, uint32_t bpp)
 	return dword1;
 }
 
+/**
+ * igt_blitter_copy:
+ * @fd: file descriptor of the i915 driver
+ * @ahnd: handle to an allocator
+ * @ctx: context within which execute copy blit
+ * @src_handle: GEM handle of the source buffer
+ * @src_delta: offset into the source GEM bo, in bytes
+ * @src_stride: Stride (in bytes) of the source buffer
+ * @src_tiling: Tiling mode of the source buffer
+ * @src_x: X coordinate of the source region to copy
+ * @src_y: Y coordinate of the source region to copy
+ * @src_size: size of the src bo required for allocator and softpin
+ * @width: Width of the region to copy
+ * @height: Height of the region to copy
+ * @bpp: source and destination bits per pixel
+ * @dst_handle: GEM handle of the destination buffer
+ * @dst_delta: offset into the destination GEM bo, in bytes
+ * @dst_stride: Stride (in bytes) of the destination buffer
+ * @dst_tiling: Tiling mode of the destination buffer
+ * @dst_x: X coordinate of destination
+ * @dst_y: Y coordinate of destination
+ * @dst_size: size of the dst bo required for allocator and softpin
+ *
+ * Wrapper API to call appropriate blitter copy function.
+ */
+
+void igt_blitter_copy(int fd,
+		      uint64_t ahnd,
+		      uint32_t ctx,
+		      const intel_ctx_cfg_t *cfg,
+		      /* src */
+		      uint32_t src_handle,
+		      uint32_t src_delta,
+		      uint32_t src_stride,
+		      uint32_t src_tiling,
+		      uint32_t src_x, uint32_t src_y,
+		      uint64_t src_size,
+		      /* size */
+		      uint32_t width, uint32_t height,
+		      /* bpp */
+		      uint32_t bpp,
+		      /* dst */
+		      uint32_t dst_handle,
+		      uint32_t dst_delta,
+		      uint32_t dst_stride,
+		      uint32_t dst_tiling,
+		      uint32_t dst_x, uint32_t dst_y,
+		      uint64_t dst_size)
+{
+	uint32_t devid;
+
+	devid = intel_get_drm_devid(fd);
+
+	if (intel_graphics_ver(devid) >= IP_VER(12, 60))
+		igt_blitter_fast_copy__raw(fd, ahnd, ctx, NULL,
+					   src_handle, src_delta,
+					   src_stride, src_tiling,
+					   src_x, src_y, src_size,
+					   width, height, bpp,
+					   dst_handle, dst_delta,
+					   dst_stride, dst_tiling,
+					   dst_x, dst_y, dst_size);
+	else
+		igt_blitter_src_copy(fd, ahnd, ctx, NULL,
+				     src_handle, src_delta,
+				     src_stride, src_tiling,
+				     src_x, src_y, src_size,
+				     width, height, bpp,
+				     dst_handle, dst_delta,
+				     dst_stride, dst_tiling,
+				     dst_x, dst_y, dst_size);
+}
 /**
  * igt_blitter_src_copy:
  * @fd: file descriptor of the i915 driver
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 81830d77..aed1d575 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -36,6 +36,28 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
 uint32_t fast_copy_dword1(unsigned int src_tiling,
 			  unsigned int dst_tiling,
 			  int bpp);
+void igt_blitter_copy(int fd,
+		      uint64_t ahnd,
+		      uint32_t ctx,
+		      const intel_ctx_cfg_t *cfg,
+		      /* src */
+		      uint32_t src_handle,
+		      uint32_t src_delta,
+		      uint32_t src_stride,
+		      uint32_t src_tiling,
+		      uint32_t src_x, uint32_t src_y,
+		      uint64_t src_size,
+		      /* size */
+		      uint32_t width, uint32_t height,
+		      /* bpp */
+		      uint32_t bpp,
+		      /* dst */
+		      uint32_t dst_handle,
+		      uint32_t dst_delta,
+		      uint32_t dst_stride,
+		      uint32_t dst_tiling,
+		      uint32_t dst_x, uint32_t dst_y,
+		      uint64_t dst_size);
 
 void igt_blitter_src_copy(int fd,
 			  uint64_t ahnd,
-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 6/9] lib/intel_batchbuffer: Remove unused includes

[Karolina Stolarek]

The library includes a lot of headers and most of them are
not needed.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
---
 lib/intel_batchbuffer.c | 22 ++++------------------
 1 file changed, 4 insertions(+), 18 deletions(-)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index a5157194..1b999ca5 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -25,35 +25,21 @@
  *
  **************************************************************************/
 
-#include <inttypes.h>
-#include <poll.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
 #include <search.h>
+#include <glib.h>
 
-#include "drm.h"
-#include "drmtest.h"
 #include "i915/gem_create.h"
 #include "intel_batchbuffer.h"
 #include "intel_bufops.h"
 #include "intel_chipset.h"
-#include "intel_reg.h"
-#include "veboxcopy.h"
 #include "rendercopy.h"
 #include "media_fill.h"
-#include "ioctl_wrappers.h"
-#include "sw_sync.h"
-#include "i915/gem_mman.h"
 #include "media_spin.h"
+#include "i915/gem_mman.h"
+#include "veboxcopy.h"
+#include "sw_sync.h"
 #include "gpgpu_fill.h"
-#include "igt_aux.h"
-#include "i830_reg.h"
 #include "huc_copy.h"
-#include <glib.h>
-
-#include <i915_drm.h>
 
 #define BCS_SWCTRL 0x22200
 #define BCS_SRC_Y (1 << 0)
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t v4 6/9] lib/intel_batchbuffer: Remove unused includes

[Zbigniew Kempczyński]

On Fri, Mar 17, 2023 at 01:37:08PM +0100, Karolina Stolarek wrote:
> The library includes a lot of headers and most of them are
> not needed.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> ---
>  lib/intel_batchbuffer.c | 22 ++++------------------
>  1 file changed, 4 insertions(+), 18 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index a5157194..1b999ca5 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -25,35 +25,21 @@
>   *
>   **************************************************************************/
>  
> -#include <inttypes.h>
> -#include <poll.h>
> -#include <stdlib.h>
> -#include <stdio.h>
> -#include <string.h>
> -#include <assert.h>
>  #include <search.h>
> +#include <glib.h>
>  
> -#include "drm.h"
> -#include "drmtest.h"
>  #include "i915/gem_create.h"
>  #include "intel_batchbuffer.h"
>  #include "intel_bufops.h"
>  #include "intel_chipset.h"
> -#include "intel_reg.h"
> -#include "veboxcopy.h"
>  #include "rendercopy.h"
>  #include "media_fill.h"
> -#include "ioctl_wrappers.h"
> -#include "sw_sync.h"
> -#include "i915/gem_mman.h"
>  #include "media_spin.h"
> +#include "i915/gem_mman.h"
> +#include "veboxcopy.h"

Those two changed place, not a blocker at all:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew


> +#include "sw_sync.h"
>  #include "gpgpu_fill.h"
> -#include "igt_aux.h"
> -#include "i830_reg.h"
>  #include "huc_copy.h"
> -#include <glib.h>
> -
> -#include <i915_drm.h>
>  
>  #define BCS_SWCTRL 0x22200
>  #define BCS_SRC_Y (1 << 0)
> -- 
> 2.25.1
> 

[igt-dev] [PATCH i-g-t v4 7/9] lib/intel_cmds_info: Reorder blt_tiling_type enum

[Karolina Stolarek]

Move Yf Major up so it follows the order of tiling definitions
in intel_batchbuffer.h

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/intel_cmds_info.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/i915/intel_cmds_info.h b/lib/i915/intel_cmds_info.h
index 57e34c4b..9af2f2d9 100644
--- a/lib/i915/intel_cmds_info.h
+++ b/lib/i915/intel_cmds_info.h
@@ -13,8 +13,8 @@ enum blt_tiling_type {
 	T_XMAJOR,
 	T_YMAJOR,
 	T_TILE4,
-	T_TILE64,
 	T_YFMAJOR,
+	T_TILE64,
 	__BLT_MAX_TILING
 };
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t v4 8/9] lib/intel_batchbuffer: Handle no support for Tile Y

[Karolina Stolarek]

Newer generations stopped supporting legacy Tile Y format.
In order to do a Y-Major blit, the command has to use Tile4
format, which requires setting specific blits in the first
bit group of the XY_FAST_COPY_BLT command.

Rewrite fast_copy_dword1 function to always set them when
a platform doesn't support the legacy format. Update calls
to the function to include file descriptor parameter.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/intel_batchbuffer.c | 26 +++++++++++++++++---------
 lib/intel_batchbuffer.h |  2 +-
 tests/i915/gem_blits.c  |  9 ++++++---
 3 files changed, 24 insertions(+), 13 deletions(-)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 1b999ca5..24728d4a 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -32,7 +32,6 @@
 #include "intel_batchbuffer.h"
 #include "intel_bufops.h"
 #include "intel_chipset.h"
-#include "rendercopy.h"
 #include "media_fill.h"
 #include "media_spin.h"
 #include "i915/gem_mman.h"
@@ -40,6 +39,7 @@
 #include "sw_sync.h"
 #include "gpgpu_fill.h"
 #include "huc_copy.h"
+#include "i915/i915_blt.h"
 
 #define BCS_SWCTRL 0x22200
 #define BCS_SRC_Y (1 << 0)
@@ -122,18 +122,26 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
 	return dword0;
 }
 
+static bool new_tile_y_format(unsigned int tiling)
+{
+	return tiling == T_YFMAJOR || tiling == T_TILE4;
+}
+
 uint32_t fast_copy_dword1(unsigned int src_tiling,
 			  unsigned int dst_tiling,
-			  int bpp)
+			  int bpp, int fd)
 {
 	uint32_t dword1 = 0;
 
-	if (src_tiling == I915_TILING_Yf || src_tiling == I915_TILING_4)
-		/* Repurposed as Tile-4 on DG2 */
-		dword1 |= XY_FAST_COPY_SRC_TILING_Yf;
-	if (dst_tiling == I915_TILING_Yf || dst_tiling == I915_TILING_4)
-		/* Repurposed as Tile-4 on DG2 */
-		dword1 |= XY_FAST_COPY_DST_TILING_Yf;
+	if (blt_fast_copy_supports_tiling(fd, T_YMAJOR)) {
+		dword1 |= new_tile_y_format(src_tiling)
+				? XY_FAST_COPY_SRC_TILING_Yf : 0;
+		dword1 |= new_tile_y_format(dst_tiling)
+				? XY_FAST_COPY_DST_TILING_Yf : 0;
+	} else {
+		/* Always set bits for platforms that don't support legacy TileY */
+		dword1 |= XY_FAST_COPY_SRC_TILING_Yf | XY_FAST_COPY_DST_TILING_Yf;
+	}
 
 	switch (bpp) {
 	case 8:
@@ -582,7 +590,7 @@ void igt_blitter_fast_copy__raw(int fd,
 	src_pitch = fast_copy_pitch(src_stride, src_tiling);
 	dst_pitch = fast_copy_pitch(dst_stride, dst_tiling);
 	dword0 = fast_copy_dword0(src_tiling, dst_tiling);
-	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp);
+	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp, fd);
 
 	CHECK_RANGE(src_x); CHECK_RANGE(src_y);
 	CHECK_RANGE(dst_x); CHECK_RANGE(dst_y);
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index aed1d575..fb244c2b 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -35,7 +35,7 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
 			  unsigned int dst_tiling);
 uint32_t fast_copy_dword1(unsigned int src_tiling,
 			  unsigned int dst_tiling,
-			  int bpp);
+			  int bpp, int fd);
 void igt_blitter_copy(int fd,
 		      uint64_t ahnd,
 		      uint32_t ctx,
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 1414826c..0d4655f8 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -224,7 +224,8 @@ static void buffer_set_tiling(const struct device *device,
 		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
 	} else if (blt_has_fast_copy(device->fd)) {
 		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
-		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
+		dword1 = fast_copy_dword1(buffer->tiling, tiling,
+					  32, device->fd);
 		batch[i++] = dword1 | pitch;
 	} else {
 		igt_assert_f(0, "No supported blit command found\n");
@@ -371,7 +372,8 @@ static bool blit_to_linear(const struct device *device,
 		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
 	} else if (blt_has_fast_copy(device->fd)) {
 		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
-		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
+		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE,
+					  32, device->fd);
 		batch[i++] = dword1 | buffer->stride;
 	} else {
 		igt_assert_f(0, "No supported blit command found\n");
@@ -719,7 +721,8 @@ blit(const struct device *device,
 		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
 	} else if (blt_has_fast_copy(device->fd)) {
 		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
-		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
+		dword1 = fast_copy_dword1(src->tiling, dst->tiling,
+					  32, device->fd);
 		batch[i++] = dword1 | pitch;
 	} else {
 		igt_assert_f(0, "No supported blit command found\n");
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t v4 8/9] lib/intel_batchbuffer: Handle no support for Tile Y

[Das, Nirmoy]

On 3/17/2023 1:37 PM, Karolina Stolarek wrote:
> Newer generations stopped supporting legacy Tile Y format.
> In order to do a Y-Major blit, the command has to use Tile4
> format, which requires setting specific blits in the first
> bit group of the XY_FAST_COPY_BLT command.
>
> Rewrite fast_copy_dword1 function to always set them when
> a platform doesn't support the legacy format. Update calls
> to the function to include file descriptor parameter.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>   lib/intel_batchbuffer.c | 26 +++++++++++++++++---------
>   lib/intel_batchbuffer.h |  2 +-
>   tests/i915/gem_blits.c  |  9 ++++++---
>   3 files changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 1b999ca5..24728d4a 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -32,7 +32,6 @@
>   #include "intel_batchbuffer.h"
>   #include "intel_bufops.h"
>   #include "intel_chipset.h"
> -#include "rendercopy.h"
>   #include "media_fill.h"
>   #include "media_spin.h"
>   #include "i915/gem_mman.h"
> @@ -40,6 +39,7 @@
>   #include "sw_sync.h"
>   #include "gpgpu_fill.h"
>   #include "huc_copy.h"
> +#include "i915/i915_blt.h"
>   
>   #define BCS_SWCTRL 0x22200
>   #define BCS_SRC_Y (1 << 0)
> @@ -122,18 +122,26 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>   	return dword0;
>   }
>   
> +static bool new_tile_y_format(unsigned int tiling)
> +{
> +	return tiling == T_YFMAJOR || tiling == T_TILE4;
> +}
> +
>   uint32_t fast_copy_dword1(unsigned int src_tiling,
>   			  unsigned int dst_tiling,
> -			  int bpp)
> +			  int bpp, int fd)
>   {
>   	uint32_t dword1 = 0;
>   
> -	if (src_tiling == I915_TILING_Yf || src_tiling == I915_TILING_4)
> -		/* Repurposed as Tile-4 on DG2 */
> -		dword1 |= XY_FAST_COPY_SRC_TILING_Yf;
> -	if (dst_tiling == I915_TILING_Yf || dst_tiling == I915_TILING_4)
> -		/* Repurposed as Tile-4 on DG2 */
> -		dword1 |= XY_FAST_COPY_DST_TILING_Yf;
> +	if (blt_fast_copy_supports_tiling(fd, T_YMAJOR)) {
> +		dword1 |= new_tile_y_format(src_tiling)
> +				? XY_FAST_COPY_SRC_TILING_Yf : 0;


nit: Let it new_tile_y_format()  return "0 or 
XY_FAST_COPY_SRC_TILING_Yf" to avoid extra line.


Regards,

Nirmoy


> +		dword1 |= new_tile_y_format(dst_tiling)
> +				? XY_FAST_COPY_DST_TILING_Yf : 0;
> +	} else {
> +		/* Always set bits for platforms that don't support legacy TileY */
> +		dword1 |= XY_FAST_COPY_SRC_TILING_Yf | XY_FAST_COPY_DST_TILING_Yf;
> +	}
>   
>   	switch (bpp) {
>   	case 8:
> @@ -582,7 +590,7 @@ void igt_blitter_fast_copy__raw(int fd,
>   	src_pitch = fast_copy_pitch(src_stride, src_tiling);
>   	dst_pitch = fast_copy_pitch(dst_stride, dst_tiling);
>   	dword0 = fast_copy_dword0(src_tiling, dst_tiling);
> -	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp);
> +	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp, fd);
>   
>   	CHECK_RANGE(src_x); CHECK_RANGE(src_y);
>   	CHECK_RANGE(dst_x); CHECK_RANGE(dst_y);
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index aed1d575..fb244c2b 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -35,7 +35,7 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>   			  unsigned int dst_tiling);
>   uint32_t fast_copy_dword1(unsigned int src_tiling,
>   			  unsigned int dst_tiling,
> -			  int bpp);
> +			  int bpp, int fd);
>   void igt_blitter_copy(int fd,
>   		      uint64_t ahnd,
>   		      uint32_t ctx,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 1414826c..0d4655f8 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -224,7 +224,8 @@ static void buffer_set_tiling(const struct device *device,
>   		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>   	} else if (blt_has_fast_copy(device->fd)) {
>   		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> -		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		dword1 = fast_copy_dword1(buffer->tiling, tiling,
> +					  32, device->fd);
>   		batch[i++] = dword1 | pitch;
>   	} else {
>   		igt_assert_f(0, "No supported blit command found\n");
> @@ -371,7 +372,8 @@ static bool blit_to_linear(const struct device *device,
>   		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>   	} else if (blt_has_fast_copy(device->fd)) {
>   		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> -		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE,
> +					  32, device->fd);
>   		batch[i++] = dword1 | buffer->stride;
>   	} else {
>   		igt_assert_f(0, "No supported blit command found\n");
> @@ -719,7 +721,8 @@ blit(const struct device *device,
>   		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>   	} else if (blt_has_fast_copy(device->fd)) {
>   		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> -		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		dword1 = fast_copy_dword1(src->tiling, dst->tiling,
> +					  32, device->fd);
>   		batch[i++] = dword1 | pitch;
>   	} else {
>   		igt_assert_f(0, "No supported blit command found\n");

Re: [igt-dev] [PATCH i-g-t v4 8/9] lib/intel_batchbuffer: Handle no support for Tile Y

[Karolina Stolarek]

Hi Nirmoy,

Thanks for taking a look at the series :)

On 17.03.2023 15:16, Das, Nirmoy wrote:
> 
> On 3/17/2023 1:37 PM, Karolina Stolarek wrote:
>> Newer generations stopped supporting legacy Tile Y format.
>> In order to do a Y-Major blit, the command has to use Tile4
>> format, which requires setting specific blits in the first
>> bit group of the XY_FAST_COPY_BLT command.
>>
>> Rewrite fast_copy_dword1 function to always set them when
>> a platform doesn't support the legacy format. Update calls
>> to the function to include file descriptor parameter.
>>
>> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
>> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>> ---
>>   lib/intel_batchbuffer.c | 26 +++++++++++++++++---------
>>   lib/intel_batchbuffer.h |  2 +-
>>   tests/i915/gem_blits.c  |  9 ++++++---
>>   3 files changed, 24 insertions(+), 13 deletions(-)
>>
>> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
>> index 1b999ca5..24728d4a 100644
>> --- a/lib/intel_batchbuffer.c
>> +++ b/lib/intel_batchbuffer.c
>> @@ -32,7 +32,6 @@
>>   #include "intel_batchbuffer.h"
>>   #include "intel_bufops.h"
>>   #include "intel_chipset.h"
>> -#include "rendercopy.h"
>>   #include "media_fill.h"
>>   #include "media_spin.h"
>>   #include "i915/gem_mman.h"
>> @@ -40,6 +39,7 @@
>>   #include "sw_sync.h"
>>   #include "gpgpu_fill.h"
>>   #include "huc_copy.h"
>> +#include "i915/i915_blt.h"
>>   #define BCS_SWCTRL 0x22200
>>   #define BCS_SRC_Y (1 << 0)
>> @@ -122,18 +122,26 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>>       return dword0;
>>   }
>> +static bool new_tile_y_format(unsigned int tiling)
>> +{
>> +    return tiling == T_YFMAJOR || tiling == T_TILE4;
>> +}
>> +
>>   uint32_t fast_copy_dword1(unsigned int src_tiling,
>>                 unsigned int dst_tiling,
>> -              int bpp)
>> +              int bpp, int fd)
>>   {
>>       uint32_t dword1 = 0;
>> -    if (src_tiling == I915_TILING_Yf || src_tiling == I915_TILING_4)
>> -        /* Repurposed as Tile-4 on DG2 */
>> -        dword1 |= XY_FAST_COPY_SRC_TILING_Yf;
>> -    if (dst_tiling == I915_TILING_Yf || dst_tiling == I915_TILING_4)
>> -        /* Repurposed as Tile-4 on DG2 */
>> -        dword1 |= XY_FAST_COPY_DST_TILING_Yf;
>> +    if (blt_fast_copy_supports_tiling(fd, T_YMAJOR)) {
>> +        dword1 |= new_tile_y_format(src_tiling)
>> +                ? XY_FAST_COPY_SRC_TILING_Yf : 0;
> 
> 
> nit: Let it new_tile_y_format()  return "0 or 
> XY_FAST_COPY_SRC_TILING_Yf" to avoid extra line.

hm, I'm not sure if I follow. XY_FAST_COPY_SRC_TILING_Yf and 
XY_FAST_COPY_DST_TILING_Yf set different bits in dword1 (31 and 30 
respectively), so I think I want to just check the tile format in that 
function. Hope it's fine if I keep it this way.

All the best,
Karolina

> 
> 
> Regards,
> 
> Nirmoy
> 
> 
>> +        dword1 |= new_tile_y_format(dst_tiling)
>> +                ? XY_FAST_COPY_DST_TILING_Yf : 0;
>> +    } else {
>> +        /* Always set bits for platforms that don't support legacy 
>> TileY */
>> +        dword1 |= XY_FAST_COPY_SRC_TILING_Yf | 
>> XY_FAST_COPY_DST_TILING_Yf;
>> +    }
>>       switch (bpp) {
>>       case 8:
>> @@ -582,7 +590,7 @@ void igt_blitter_fast_copy__raw(int fd,
>>       src_pitch = fast_copy_pitch(src_stride, src_tiling);
>>       dst_pitch = fast_copy_pitch(dst_stride, dst_tiling);
>>       dword0 = fast_copy_dword0(src_tiling, dst_tiling);
>> -    dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp);
>> +    dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp, fd);
>>       CHECK_RANGE(src_x); CHECK_RANGE(src_y);
>>       CHECK_RANGE(dst_x); CHECK_RANGE(dst_y);
>> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
>> index aed1d575..fb244c2b 100644
>> --- a/lib/intel_batchbuffer.h
>> +++ b/lib/intel_batchbuffer.h
>> @@ -35,7 +35,7 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>>                 unsigned int dst_tiling);
>>   uint32_t fast_copy_dword1(unsigned int src_tiling,
>>                 unsigned int dst_tiling,
>> -              int bpp);
>> +              int bpp, int fd);
>>   void igt_blitter_copy(int fd,
>>                 uint64_t ahnd,
>>                 uint32_t ctx,
>> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
>> index 1414826c..0d4655f8 100644
>> --- a/tests/i915/gem_blits.c
>> +++ b/tests/i915/gem_blits.c
>> @@ -224,7 +224,8 @@ static void buffer_set_tiling(const struct device 
>> *device,
>>           batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>>       } else if (blt_has_fast_copy(device->fd)) {
>>           batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
>> -        dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
>> +        dword1 = fast_copy_dword1(buffer->tiling, tiling,
>> +                      32, device->fd);
>>           batch[i++] = dword1 | pitch;
>>       } else {
>>           igt_assert_f(0, "No supported blit command found\n");
>> @@ -371,7 +372,8 @@ static bool blit_to_linear(const struct device 
>> *device,
>>           batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>>       } else if (blt_has_fast_copy(device->fd)) {
>>           batch[i++] = fast_copy_dword0(buffer->tiling, 
>> I915_TILING_NONE);
>> -        dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
>> +        dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE,
>> +                      32, device->fd);
>>           batch[i++] = dword1 | buffer->stride;
>>       } else {
>>           igt_assert_f(0, "No supported blit command found\n");
>> @@ -719,7 +721,8 @@ blit(const struct device *device,
>>           batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>>       } else if (blt_has_fast_copy(device->fd)) {
>>           batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
>> -        dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
>> +        dword1 = fast_copy_dword1(src->tiling, dst->tiling,
>> +                      32, device->fd);
>>           batch[i++] = dword1 | pitch;
>>       } else {
>>           igt_assert_f(0, "No supported blit command found\n");

Re: [igt-dev] [PATCH i-g-t v4 8/9] lib/intel_batchbuffer: Handle no support for Tile Y

[Zbigniew Kempczyński]

On Fri, Mar 17, 2023 at 01:37:10PM +0100, Karolina Stolarek wrote:
> Newer generations stopped supporting legacy Tile Y format.
> In order to do a Y-Major blit, the command has to use Tile4
> format, which requires setting specific blits in the first
> bit group of the XY_FAST_COPY_BLT command.
> 
> Rewrite fast_copy_dword1 function to always set them when
> a platform doesn't support the legacy format. Update calls
> to the function to include file descriptor parameter.
> 
> Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/intel_batchbuffer.c | 26 +++++++++++++++++---------
>  lib/intel_batchbuffer.h |  2 +-
>  tests/i915/gem_blits.c  |  9 ++++++---
>  3 files changed, 24 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 1b999ca5..24728d4a 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -32,7 +32,6 @@
>  #include "intel_batchbuffer.h"
>  #include "intel_bufops.h"
>  #include "intel_chipset.h"
> -#include "rendercopy.h"
>  #include "media_fill.h"
>  #include "media_spin.h"
>  #include "i915/gem_mman.h"
> @@ -40,6 +39,7 @@
>  #include "sw_sync.h"
>  #include "gpgpu_fill.h"
>  #include "huc_copy.h"
> +#include "i915/i915_blt.h"
>  
>  #define BCS_SWCTRL 0x22200
>  #define BCS_SRC_Y (1 << 0)
> @@ -122,18 +122,26 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>  	return dword0;
>  }
>  
> +static bool new_tile_y_format(unsigned int tiling)
> +{
> +	return tiling == T_YFMAJOR || tiling == T_TILE4;
> +}
> +
>  uint32_t fast_copy_dword1(unsigned int src_tiling,
>  			  unsigned int dst_tiling,
> -			  int bpp)
> +			  int bpp, int fd)

Use fd as first argument, other api also uses it as first arg;
then:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

>  {
>  	uint32_t dword1 = 0;
>  
> -	if (src_tiling == I915_TILING_Yf || src_tiling == I915_TILING_4)
> -		/* Repurposed as Tile-4 on DG2 */
> -		dword1 |= XY_FAST_COPY_SRC_TILING_Yf;
> -	if (dst_tiling == I915_TILING_Yf || dst_tiling == I915_TILING_4)
> -		/* Repurposed as Tile-4 on DG2 */
> -		dword1 |= XY_FAST_COPY_DST_TILING_Yf;
> +	if (blt_fast_copy_supports_tiling(fd, T_YMAJOR)) {
> +		dword1 |= new_tile_y_format(src_tiling)
> +				? XY_FAST_COPY_SRC_TILING_Yf : 0;
> +		dword1 |= new_tile_y_format(dst_tiling)
> +				? XY_FAST_COPY_DST_TILING_Yf : 0;
> +	} else {
> +		/* Always set bits for platforms that don't support legacy TileY */
> +		dword1 |= XY_FAST_COPY_SRC_TILING_Yf | XY_FAST_COPY_DST_TILING_Yf;
> +	}
>  
>  	switch (bpp) {
>  	case 8:
> @@ -582,7 +590,7 @@ void igt_blitter_fast_copy__raw(int fd,
>  	src_pitch = fast_copy_pitch(src_stride, src_tiling);
>  	dst_pitch = fast_copy_pitch(dst_stride, dst_tiling);
>  	dword0 = fast_copy_dword0(src_tiling, dst_tiling);
> -	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp);
> +	dword1 = fast_copy_dword1(src_tiling, dst_tiling, bpp, fd);
>  
>  	CHECK_RANGE(src_x); CHECK_RANGE(src_y);
>  	CHECK_RANGE(dst_x); CHECK_RANGE(dst_y);
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index aed1d575..fb244c2b 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -35,7 +35,7 @@ uint32_t fast_copy_dword0(unsigned int src_tiling,
>  			  unsigned int dst_tiling);
>  uint32_t fast_copy_dword1(unsigned int src_tiling,
>  			  unsigned int dst_tiling,
> -			  int bpp);
> +			  int bpp, int fd);
>  void igt_blitter_copy(int fd,
>  		      uint64_t ahnd,
>  		      uint32_t ctx,
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 1414826c..0d4655f8 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -224,7 +224,8 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>  	} else if (blt_has_fast_copy(device->fd)) {
>  		batch[i++] = fast_copy_dword0(buffer->tiling, tiling);
> -		dword1 = fast_copy_dword1(buffer->tiling, tiling, 32);
> +		dword1 = fast_copy_dword1(buffer->tiling, tiling,
> +					  32, device->fd);
>  		batch[i++] = dword1 | pitch;
>  	} else {
>  		igt_assert_f(0, "No supported blit command found\n");
> @@ -371,7 +372,8 @@ static bool blit_to_linear(const struct device *device,
>  		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>  	} else if (blt_has_fast_copy(device->fd)) {
>  		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
> -		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE, 32);
> +		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE,
> +					  32, device->fd);
>  		batch[i++] = dword1 | buffer->stride;
>  	} else {
>  		igt_assert_f(0, "No supported blit command found\n");
> @@ -719,7 +721,8 @@ blit(const struct device *device,
>  		batch[i++] = 3 << 24 | 0xcc << 16 | pitch;
>  	} else if (blt_has_fast_copy(device->fd)) {
>  		batch[i++] = fast_copy_dword0(src->tiling, dst->tiling);
> -		dword1 = fast_copy_dword1(src->tiling, dst->tiling, 32);
> +		dword1 = fast_copy_dword1(src->tiling, dst->tiling,
> +					  32, device->fd);
>  		batch[i++] = dword1 | pitch;
>  	} else {
>  		igt_assert_f(0, "No supported blit command found\n");
> -- 
> 2.25.1
> 

[igt-dev] [PATCH i-g-t v4 9/9] tests/gem_blits: Use intel_cmds_info library

[Karolina Stolarek]

Update the test to use blt_tiling_type values. Make it skip
if a copy command doesn't support a specific tiling format.

Signed-off-by: Karolina Stolarek <karolina.stolarek@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/i915_blt.c    |  6 ++++
 tests/i915/gem_blits.c | 62 ++++++++++++++++++++++++++----------------
 2 files changed, 45 insertions(+), 23 deletions(-)

diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index 13105820..ef67fe26 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -16,6 +16,12 @@
 #define BITRANGE(start, end) (end - start + 1)
 #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
 
+/* Blitter tiling definitions sanity checks */
+static_assert(T_LINEAR == I915_TILING_NONE, "Linear definitions have to match");
+static_assert(T_XMAJOR == I915_TILING_X, "TileX definitions have to match");
+static_assert(T_YMAJOR == I915_TILING_Y, "TileY definitions have to match");
+static_assert(T_YFMAJOR == I915_TILING_Yf, "TileYf definitions have to match");
+
 enum blt_special_mode {
 	SM_NONE,
 	SM_FULL_RESOLVE,
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 0d4655f8..a90ad4c9 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -70,7 +70,7 @@ get_tiling_stride(const struct device *device,
 	if (tiling) {
 		if (device->gen < 3)
 			stride = ALIGN(stride, 128);
-		else if (device->gen < 4 || tiling == I915_TILING_X)
+		else if (device->gen < 4 || tiling == T_XMAJOR)
 			stride = ALIGN(stride, 512);
 		else
 			stride = ALIGN(stride, 128);
@@ -94,7 +94,7 @@ get_tiling_height(const struct device *device,
 
 	if (device->gen < 3)
 		return ALIGN(height, 16);
-	else if (device->gen < 4 || tiling == I915_TILING_X)
+	else if (device->gen < 4 || tiling == T_XMAJOR)
 		return ALIGN(height, 8);
 	else
 		return ALIGN(height, 32);
@@ -115,8 +115,8 @@ static struct buffer *buffer_create(const struct device *device,
 	buffer->width = width;
 	buffer->height = height;
 
-	buffer->tiling = I915_TILING_NONE;
-	buffer->stride = get_tiling_stride(device, width, I915_TILING_NONE);
+	buffer->tiling = T_LINEAR;
+	buffer->stride = get_tiling_stride(device, width, T_LINEAR);
 	buffer->size = ALIGN(buffer->stride * height, 4096);
 	buffer->handle = gem_create(device->fd, buffer->size);
 	buffer->caching = device->llc;
@@ -194,16 +194,16 @@ static void buffer_set_tiling(const struct device *device,
 
 	i = 0;
 
-	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
+	if ((tiling | buffer->tiling) >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (buffer->tiling == I915_TILING_Y)
+		if (buffer->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
-		if (tiling == I915_TILING_Y)
+		if (tiling == T_YMAJOR)
 			mask |= BCS_DST_Y;
 		batch[i++] = mask;
 	}
@@ -255,7 +255,7 @@ static void buffer_set_tiling(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
+	if ((tiling | buffer->tiling) >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -350,14 +350,14 @@ static bool blit_to_linear(const struct device *device,
 
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
-	if (buffer->tiling >= I915_TILING_Y) {
+	if (buffer->tiling >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (buffer->tiling == I915_TILING_Y)
+		if (buffer->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
 		batch[i++] = mask;
 	}
@@ -371,8 +371,8 @@ static bool blit_to_linear(const struct device *device,
 		batch[i++] |= 6 + 2 * has_64b_reloc;
 		batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
 	} else if (blt_has_fast_copy(device->fd)) {
-		batch[i++] = fast_copy_dword0(buffer->tiling, I915_TILING_NONE);
-		dword1 = fast_copy_dword1(buffer->tiling, I915_TILING_NONE,
+		batch[i++] = fast_copy_dword0(buffer->tiling, T_LINEAR);
+		dword1 = fast_copy_dword1(buffer->tiling, T_LINEAR,
 					  32, device->fd);
 		batch[i++] = dword1 | buffer->stride;
 	} else {
@@ -403,7 +403,7 @@ static bool blit_to_linear(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if (buffer->tiling >= I915_TILING_Y) {
+	if (buffer->tiling >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -691,16 +691,16 @@ blit(const struct device *device,
 	}
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
-	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
+	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
 		unsigned int mask;
 
 		batch[i++] = MI_LOAD_REGISTER_IMM(1);
 		batch[i++] = BCS_SWCTRL;
 
 		mask = (BCS_SRC_Y | BCS_DST_Y) << 16;
-		if (src->tiling == I915_TILING_Y)
+		if (src->tiling == T_YMAJOR)
 			mask |= BCS_SRC_Y;
-		if (dst->tiling == I915_TILING_Y)
+		if (dst->tiling == T_YMAJOR)
 			mask |= BCS_DST_Y;
 		batch[i++] = mask;
 	}
@@ -752,7 +752,7 @@ blit(const struct device *device,
 	if (has_64b_reloc)
 		batch[i++] = obj[1].offset >> 32;
 
-	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
+	if ((src->tiling | dst->tiling) >= T_YMAJOR) {
 		igt_assert(device->gen >= 6);
 		batch[i++] = MI_FLUSH_DW_CMD | 2;
 		batch[i++] = 0;
@@ -800,6 +800,17 @@ static int start_at(int x, enum start s)
 	}
 }
 
+static bool blit_supports_tiling(int fd, enum blt_tiling_type tiling)
+{
+	if (blt_has_xy_src_copy(fd)) {
+		return blt_xy_src_copy_supports_tiling(fd, tiling);
+	} else if (blt_has_fast_copy(fd)) {
+		return blt_fast_copy_supports_tiling(fd, tiling);
+	} else {
+		igt_assert_f(0, "No supported blit command found\n");
+	}
+}
+
 igt_main
 {
 	struct device device;
@@ -830,15 +841,20 @@ igt_main
 								    width * 16, height * 4);
 
 						y = start_at(height, y0);
-						for (unsigned int src_tiling = I915_TILING_NONE;
-						     src_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
-						     src_tiling++) {
+
+						for (unsigned int src_tiling = T_LINEAR;
+						     src_tiling <= T_YMAJOR; src_tiling++) {
+							if (!blit_supports_tiling(device.fd, src_tiling))
+								continue;
+
 							buffer_set_tiling(&device, src, src_tiling);
 
 							x = start_at(width, x0);
-							for (unsigned int dst_tiling = I915_TILING_NONE;
-							     dst_tiling <= (device.gen >= 6 ? I915_TILING_Y : I915_TILING_X);
-							     dst_tiling++) {
+							for (unsigned int dst_tiling = T_LINEAR;
+							     dst_tiling <= T_YMAJOR; dst_tiling++) {
+								if (!blit_supports_tiling(device.fd, dst_tiling))
+									continue;
+
 								buffer_set_tiling(&device, dst, dst_tiling);
 
 								for (enum mode down = CPU; down <= WC; down++) {
-- 
2.25.1

[igt-dev] ✓ Fi.CI.BAT: success for Update gem_blits for newer generations (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3753 bytes --]

== Series Details ==

Series: Update gem_blits for newer generations (rev4)
URL   : https://patchwork.freedesktop.org/series/114776/
State : success

== Summary ==

CI Bug Log - changes from IGT_7204 -> IGTPW_8632
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html

Participating hosts (36 -> 34)
------------------------------

  Missing    (2): bat-adlm-1 fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8632:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@i915_selftest@live@gt_tlb}:
    - bat-jsl-3:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/bat-jsl-3/igt@i915_selftest@live@gt_tlb.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-jsl-3/igt@i915_selftest@live@gt_tlb.html

  
Known issues
------------

  Here are the changes found in IGTPW_8632 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-rpls-1:         NOTRUN -> [SKIP][3] ([i915#7828])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-rpls-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-rpls-1:         NOTRUN -> [SKIP][4] ([i915#1845])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-rpls-1/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-rpls-1:         [ABORT][5] ([i915#6687] / [i915#7978]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@migrate:
    - bat-adlp-9:         [DMESG-FAIL][7] ([i915#7699]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/bat-adlp-9/igt@i915_selftest@live@migrate.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-adlp-9/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [DMESG-FAIL][9] ([i915#6997]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/bat-rpls-1/igt@i915_selftest@live@slpc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7204 -> IGTPW_8632

  CI-20190529: 20190529
  CI_DRM_12873: b97925f47e2a20e1b79bc7c8cc236ded1bd431df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8632: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html
  IGT_7204: 0dc71800a0dd867e1fa32ee01c2dbf42b46ec3e2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html

[-- Attachment #2: Type: text/html, Size: 4504 bytes --]

[igt-dev] ✓ Fi.CI.IGT: success for Update gem_blits for newer generations (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 25111 bytes --]

== Series Details ==

Series: Update gem_blits for newer generations (rev4)
URL   : https://patchwork.freedesktop.org/series/114776/
State : success

== Summary ==

CI Bug Log - changes from IGT_7204_full -> IGTPW_8632_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html

Participating hosts (8 -> 7)
------------------------------

  Missing    (1): shard-rkl0 

Known issues
------------

  Here are the changes found in IGTPW_8632_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-glk:          [PASS][1] -> [FAIL][2] ([i915#2842]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-glk3/igt@gem_exec_fair@basic-pace@vcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk4/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-glk:          NOTRUN -> [SKIP][3] ([fdo#109271]) +30 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk4/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-snb:          [PASS][4] -> [INCOMPLETE][5] ([i915#3297])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-snb5/igt@gem_userptr_blits@coherency-sync.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-snb5/igt@gem_userptr_blits@coherency-sync.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [PASS][6] -> [SKIP][7] ([fdo#109271]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-apl1/igt@i915_pm_dc@dc9-dpms.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-apl7/igt@i915_pm_dc@dc9-dpms.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-snb:          NOTRUN -> [SKIP][8] ([fdo#109271]) +28 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-snb4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#3886])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk6/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_flip@flip-vs-panning-interruptible@b-dp1:
    - shard-apl:          [PASS][10] -> [DMESG-WARN][11] ([i915#62]) +11 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-apl1/igt@kms_flip@flip-vs-panning-interruptible@b-dp1.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-apl6/igt@kms_flip@flip-vs-panning-interruptible@b-dp1.html

  * igt@perf_pmu@module-unload:
    - shard-apl:          [PASS][12] -> [DMESG-WARN][13] ([i915#1982] / [i915#62]) +1 similar issue
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-apl7/igt@perf_pmu@module-unload.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-apl6/igt@perf_pmu@module-unload.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@idle@rcs0:
    - {shard-rkl}:        [FAIL][14] ([i915#7742]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-4/igt@drm_fdinfo@idle@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-2/igt@drm_fdinfo@idle@rcs0.html

  * igt@fbdev@unaligned-read:
    - {shard-tglu}:       [SKIP][16] ([i915#2582]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-9/igt@fbdev@unaligned-read.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-5/igt@fbdev@unaligned-read.html

  * {igt@gem_barrier_race@remote-request@rcs0}:
    - shard-glk:          [ABORT][18] ([i915#8211]) -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-glk9/igt@gem_barrier_race@remote-request@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk4/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_eio@in-flight-suspend:
    - {shard-rkl}:        [FAIL][20] ([fdo#103375]) -> [PASS][21] +2 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-3/igt@gem_eio@in-flight-suspend.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-1/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@reset-stress:
    - {shard-dg1}:        [FAIL][22] ([i915#5784]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-dg1-16/igt@gem_eio@reset-stress.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-dg1-13/igt@gem_eio@reset-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - {shard-rkl}:        [FAIL][24] ([i915#2846]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-4/igt@gem_exec_fair@basic-deadline.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-3/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - {shard-rkl}:        [FAIL][26] ([i915#2842]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-3/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][28] ([i915#2842]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - {shard-rkl}:        [SKIP][30] ([fdo#109313]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-1/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - {shard-rkl}:        [SKIP][32] ([i915#3281]) -> [PASS][33] +5 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-1/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_mmap_gtt@coherency:
    - {shard-rkl}:        [SKIP][34] ([fdo#111656]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-3/igt@gem_mmap_gtt@coherency.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gem_mmap_gtt@coherency.html

  * igt@gem_mmap_gtt@fault-concurrent-x:
    - shard-snb:          [ABORT][36] ([i915#5161]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-snb5/igt@gem_mmap_gtt@fault-concurrent-x.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-snb7/igt@gem_mmap_gtt@fault-concurrent-x.html

  * igt@gem_pwrite@basic-self:
    - {shard-rkl}:        [SKIP][38] ([i915#3282]) -> [PASS][39] +5 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-2/igt@gem_pwrite@basic-self.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gem_pwrite@basic-self.html

  * igt@gen9_exec_parse@valid-registers:
    - {shard-rkl}:        [SKIP][40] ([i915#2527]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-1/igt@gen9_exec_parse@valid-registers.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html

  * igt@i915_pm_rpm@dpms-lpsp:
    - {shard-rkl}:        [SKIP][42] ([i915#1397]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-1/igt@i915_pm_rpm@dpms-lpsp.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-6/igt@i915_pm_rpm@dpms-lpsp.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-tglu}:       [SKIP][44] ([i915#1397]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-10/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@i915_pm_rpm@pm-tiling:
    - {shard-tglu}:       [SKIP][46] ([i915#3547]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-10/igt@i915_pm_rpm@pm-tiling.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-8/igt@i915_pm_rpm@pm-tiling.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - {shard-rkl}:        [SKIP][48] ([i915#1845] / [i915#4098]) -> [PASS][49] +11 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
    - {shard-tglu}:       [SKIP][50] ([i915#1845]) -> [PASS][51] +34 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-10/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-8/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [FAIL][52] ([i915#2346]) -> [PASS][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - {shard-rkl}:        [SKIP][54] ([i915#1849] / [i915#4098]) -> [PASS][55] +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
    - {shard-tglu}:       [SKIP][56] ([i915#1849]) -> [PASS][57] +18 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_plane@plane-panning-bottom-right@pipe-a-planes:
    - {shard-rkl}:        [SKIP][58] ([i915#1849]) -> [PASS][59] +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-2/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-6/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html

  * igt@kms_psr@dpms:
    - {shard-rkl}:        [SKIP][60] ([i915#1072]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-4/igt@kms_psr@dpms.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-6/igt@kms_psr@dpms.html

  * igt@kms_universal_plane@universal-plane-pipe-c-sanity:
    - {shard-tglu}:       [SKIP][62] ([fdo#109274]) -> [PASS][63] +6 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-9/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-5/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html

  * igt@kms_vblank@pipe-a-wait-busy:
    - {shard-tglu}:       [SKIP][64] ([i915#1845] / [i915#7651]) -> [PASS][65] +29 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-9/igt@kms_vblank@pipe-a-wait-busy.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-2/igt@kms_vblank@pipe-a-wait-busy.html

  * igt@perf_pmu@idle@rcs0:
    - {shard-dg1}:        [FAIL][66] ([i915#4349]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-dg1-13/igt@perf_pmu@idle@rcs0.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-dg1-13/igt@perf_pmu@idle@rcs0.html

  * igt@prime_vgem@basic-fence-flip:
    - {shard-tglu}:       [SKIP][68] ([fdo#109295]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-tglu-10/igt@prime_vgem@basic-fence-flip.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-tglu-3/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-read:
    - {shard-rkl}:        [SKIP][70] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-rkl-3/igt@prime_vgem@basic-fence-read.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-rkl-5/igt@prime_vgem@basic-fence-read.html

  * igt@sysfs_timeslice_duration@timeout@rcs0:
    - {shard-dg1}:        [FAIL][72] ([i915#1755]) -> [PASS][73] +3 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7204/shard-dg1-18/igt@sysfs_timeslice_duration@timeout@rcs0.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/shard-dg1-13/igt@sysfs_timeslice_duration@timeout@rcs0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4521]: https://gitlab.freedesktop.org/drm/intel/issues/4521
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
  [i915#5161]: https://gitlab.freedesktop.org/drm/intel/issues/5161
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5431]: https://gitlab.freedesktop.org/drm/intel/issues/5431
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
  [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
  [i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
  [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
  [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
  [i915#8154]: https://gitlab.freedesktop.org/drm/intel/issues/8154
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8282]: https://gitlab.freedesktop.org/drm/intel/issues/8282
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7204 -> IGTPW_8632

  CI-20190529: 20190529
  CI_DRM_12873: b97925f47e2a20e1b79bc7c8cc236ded1bd431df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8632: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html
  IGT_7204: 0dc71800a0dd867e1fa32ee01c2dbf42b46ec3e2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8632/index.html

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