* [igt-dev] ✗ Fi.CI.BUILD: failure for Compression support for Lunarlake (rev3)
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
@ 2023-11-30 2:31 ` Patchwork
2023-11-30 2:33 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
` (6 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-11-30 2:31 UTC (permalink / raw)
To: Akshata Jahagirdar; +Cc: igt-dev
== Series Details ==
Series: Compression support for Lunarlake (rev3)
URL : https://patchwork.freedesktop.org/series/126254/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1d3bb21672bde1a423133738dc56611531ba7535 tests/intel-ci/xe: add pat and caching related tests
Tail of build.log:
[267/1662] Compiling C object 'lib/76b5a35@@igt-runnercomms_c@sta/runnercomms.c.o'.
[268/1662] Compiling C object 'lib/76b5a35@@igt-igt_infoframe_c@sta/igt_infoframe.c.o'.
[269/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_i915_c@sta/rendercopy_i915.c.o'.
[270/1662] Compiling C object 'lib/76b5a35@@igt-xe_xe_gt_c@sta/xe_xe_gt.c.o'.
[271/1662] Compiling C object 'tests/59830eb@@kms_lease@exe/kms_lease.c.o'.
[272/1662] Compiling C object 'lib/76b5a35@@igt-intel_allocator_simple_c@sta/intel_allocator_simple.c.o'.
[273/1662] Compiling C object 'lib/76b5a35@@igt-igt_panfrost_c@sta/igt_panfrost.c.o'.
[274/1662] Compiling C object 'lib/76b5a35@@igt-igt_psr_c@sta/igt_psr.c.o'.
[275/1662] Compiling C object 'lib/76b5a35@@igt-intel_aux_pgtable_c@sta/intel_aux_pgtable.c.o'.
[276/1662] Compiling C object 'lib/76b5a35@@igt-igt_eld_c@sta/igt_eld.c.o'.
[277/1662] Compiling C object 'lib/76b5a35@@igt-igt_ktap_c@sta/igt_ktap.c.o'.
[278/1662] Compiling C object 'lib/76b5a35@@igt-igt_dsc_c@sta/igt_dsc.c.o'.
[279/1662] Compiling C object 'lib/76b5a35@@igt-igt_msm_c@sta/igt_msm.c.o'.
[280/1662] Compiling C object 'lib/76b5a35@@igt-igt_edid_c@sta/igt_edid.c.o'.
[281/1662] Compiling C object 'lib/76b5a35@@igt-intel_compute_c@sta/intel_compute.c.o'.
[282/1662] Compiling C object 'lib/76b5a35@@igt-ioctl_wrappers_c@sta/ioctl_wrappers.c.o'.
[283/1662] Compiling C object 'lib/76b5a35@@igt-igt_vc4_c@sta/igt_vc4.c.o'.
[284/1662] Compiling C object 'lib/76b5a35@@igt-igt_dummyload_c@sta/igt_dummyload.c.o'.
[285/1662] Compiling C object 'lib/76b5a35@@igt-igt_aux_c@sta/igt_aux.c.o'.
[286/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_gen4_c@sta/rendercopy_gen4.c.o'.
[287/1662] Compiling C object 'lib/76b5a35@@igt-intel_allocator_c@sta/intel_allocator.c.o'.
[288/1662] Compiling C object 'lib/76b5a35@@igt-veboxcopy_gen12_c@sta/veboxcopy_gen12.c.o'.
[289/1662] Compiling C object 'lib/76b5a35@@igt-igt_v3d_c@sta/igt_v3d.c.o'.
[290/1662] Compiling C object 'tests/59830eb@@kms_plane_scaling@exe/kms_plane_scaling.c.o'.
[291/1662] Compiling C object 'lib/76b5a35@@igt-instdone_c@sta/instdone.c.o'.
[292/1662] Compiling C object 'lib/76b5a35@@igt-igt_draw_c@sta/igt_draw.c.o'.
[293/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_gen6_c@sta/rendercopy_gen6.c.o'.
[294/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_gen7_c@sta/rendercopy_gen7.c.o'.
[295/1662] Compiling C object 'lib/76b5a35@@igt-igt_device_scan_c@sta/igt_device_scan.c.o'.
[296/1662] Compiling C object 'tests/59830eb@@kms_flip@exe/kms_flip.c.o'.
[297/1662] Compiling C object 'lib/76b5a35@@igt-gpu_cmds_c@sta/gpu_cmds.c.o'.
[298/1662] Compiling C object 'lib/76b5a35@@igt-igt_vmwgfx_c@sta/igt_vmwgfx.c.o'.
[299/1662] Compiling C object 'lib/76b5a35@@igt-intel_bufops_c@sta/intel_bufops.c.o'.
[300/1662] Compiling C object 'lib/76b5a35@@igt-igt_pm_c@sta/igt_pm.c.o'.
[301/1662] Compiling C object 'lib/76b5a35@@igt-igt_kmod_c@sta/igt_kmod.c.o'.
[302/1662] Generating i915-perf-registers-acmgt3 with a custom command.
[303/1662] Compiling C object 'lib/76b5a35@@igt-igt_amd_c@sta/igt_amd.c.o'.
[304/1662] Compiling C object 'tests/59830eb@@kms_atomic@exe/kms_atomic.c.o'.
[305/1662] Generating i915-perf-metrics-acmgt3 with a custom command.
[306/1662] Compiling C object 'tests/59830eb@@kms_cursor_legacy@exe/kms_cursor_legacy.c.o'.
[307/1662] Compiling C object 'lib/76b5a35@@igt-intel_batchbuffer_c@sta/intel_batchbuffer.c.o'.
[308/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_gen8_c@sta/rendercopy_gen8.c.o'.
[309/1662] Compiling C object 'lib/76b5a35@@igt-rendercopy_gen9_c@sta/rendercopy_gen9.c.o'.
[310/1662] Compiling C object 'lib/76b5a35@@igt-igt_core_c@sta/igt_core.c.o'.
[311/1662] Compiling C object 'tests/59830eb@@gem_userptr_blits@exe/intel_gem_userptr_blits.c.o'.
[312/1662] Compiling C object 'lib/76b5a35@@igt-i915_intel_decode_c@sta/i915_intel_decode.c.o'.
[313/1662] Compiling C object 'lib/76b5a35@@igt-igt_fb_c@sta/igt_fb.c.o'.
[314/1662] Compiling C object 'lib/76b5a35@@igt-igt_kms_c@sta/igt_kms.c.o'.
[315/1662] Generating i915-perf-equations with a custom command.
ninja: build stopped: subcommand failed.
^ permalink raw reply [flat|nested] 13+ messages in thread* [igt-dev] ✗ GitLab.Pipeline: warning for Compression support for Lunarlake (rev3)
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
2023-11-30 2:31 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Compression support for Lunarlake (rev3) Patchwork
@ 2023-11-30 2:33 ` Patchwork
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake Akshata Jahagirdar
` (5 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-11-30 2:33 UTC (permalink / raw)
To: Akshata Jahagirdar; +Cc: igt-dev
== Series Details ==
Series: Compression support for Lunarlake (rev3)
URL : https://patchwork.freedesktop.org/series/126254/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1045659 for the overview.
build:tests-debian-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171905):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^~~
min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^~~~~~~~~~~~~~~~~~~~~~~
intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311566:step_script
section_start:1701311566:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311567:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171908):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^~~
min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^~~~~~~~~~~~~~~~~~~~~~~
intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311572:step_script
section_start:1701311572:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311572:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171907):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^~~
min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^~~~~~~~~~~~~~~~~~~~~~~
intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311567:step_script
section_start:1701311567:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311567:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-meson-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171909):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^~~
min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^~~~~~~~~~~~~~~~~~~~~~~
intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311564:step_script
section_start:1701311564:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311565:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-debian-minimal has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171906):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^~~
min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^~~~~~~~~~~~~~~~~~~~~~~
intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311560:step_script
section_start:1701311560:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311560:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171900):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
210 | #define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
| ^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
1810 | if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
| ^~~
| min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
1811 | pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
| ^~~~~~~~~~~~~~~~~~~~~~~
| intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311567:step_script
section_start:1701311567:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311569:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-clang has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171904):
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^
../lib/intel_blt.c:1810:51: error: use of undeclared identifier 'mid'
if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
^
../lib/intel_blt.c:1811:16: error: implicit declaration of function 'xe2_get_pat_idx_uc_comp' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
^
../lib/intel_blt.c:1811:16: note: did you mean 'intel_get_pat_idx_uc_comp'?
../lib/intel_pat.h:19:9: note: 'intel_get_pat_idx_uc_comp' declared here
uint8_t intel_get_pat_idx_uc_comp(int fd);
^
4 warnings and 3 errors generated.
ninja: build stopped: subcommand failed.
section_end:1701311568:step_script
section_start:1701311568:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311569:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libdrm-nouveau has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171903):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
210 | #define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
| ^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
1810 | if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
| ^~~
| min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
1811 | pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
| ^~~~~~~~~~~~~~~~~~~~~~~
| intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311563:step_script
section_start:1701311563:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311564:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-no-libunwind has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171901):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
210 | #define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
| ^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
1810 | if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
| ^~~
| min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
1811 | pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
| ^~~~~~~~~~~~~~~~~~~~~~~
| intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311570:step_script
section_start:1701311570:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311570:cleanup_file_variables
ERROR: Job failed: exit code 1
build:tests-fedora-oldest-meson has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/52171902):
../lib/intel_chipset.h:210:55: note: in definition of macro ‘AT_LEAST_GEN’
210 | #define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->graphics_ver >= x)
| ^~~~~
../lib/intel_blt.c:1810:51: error: ‘mid’ undeclared (first use in this function); did you mean ‘min’?
1810 | if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
| ^~~
| min
../lib/intel_blt.c:1811:16: error: implicit declaration of function ‘xe2_get_pat_idx_uc_comp’; did you mean ‘intel_get_pat_idx_uc_comp’? [-Werror=implicit-function-declaration]
1811 | pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
| ^~~~~~~~~~~~~~~~~~~~~~~
| intel_get_pat_idx_uc_comp
../lib/intel_blt.c:1811:16: warning: nested extern declaration of ‘xe2_get_pat_idx_uc_comp’ [-Wnested-externs]
cc1: some warnings being treated as errors
ninja: build stopped: subcommand failed.
section_end:1701311568:step_script
section_start:1701311568:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1701311569:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1045659
^ permalink raw reply [flat|nested] 13+ messages in thread* [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
2023-11-30 2:31 ` [igt-dev] ✗ Fi.CI.BUILD: failure for Compression support for Lunarlake (rev3) Patchwork
2023-11-30 2:33 ` [igt-dev] ✗ GitLab.Pipeline: warning " Patchwork
@ 2023-11-30 12:35 ` Akshata Jahagirdar
2023-11-30 7:40 ` Karolina Stolarek
2023-12-11 7:16 ` Zbigniew Kempczyński
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 2/6] lib/intel_blt: Update calculation of ccs_size and size_of_ctrl_copy Akshata Jahagirdar
` (4 subsequent siblings)
7 siblings, 2 replies; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
Add blt_cmd_info structs to describe properties of XY_BLOCK_COPY and XY_FAST_COPY blitter commands for XE2 platform. Updated the definitions for Lunarlake.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
lib/intel_cmds_info.c | 17 +++++++++++++++++
lib/intel_cmds_info.h | 1 +
lib/intel_device_info.c | 2 +-
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/lib/intel_cmds_info.c b/lib/intel_cmds_info.c
index 2e51ec081..7c8790d8e 100644
--- a/lib/intel_cmds_info.c
+++ b/lib/intel_cmds_info.c
@@ -67,6 +67,15 @@ static const struct blt_cmd_info
BLT_CMD_EXTENDED |
BLT_CMD_SUPPORTS_COMPRESSION);
+static const struct blt_cmd_info
+ xe2_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
+ BIT(T_LINEAR) |
+ BIT(T_XMAJOR) |
+ BIT(T_TILE4) |
+ BIT(T_TILE64),
+ BLT_CMD_EXTENDED |
+ BLT_CMD_SUPPORTS_COMPRESSION);
+
static const struct blt_cmd_info
mtl_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
BIT(T_LINEAR) |
@@ -169,6 +178,14 @@ const struct intel_cmds_info gen12_pvc_cmds_info = {
}
};
+
+const struct intel_cmds_info xe2_cmds_info = {
+ .blt_cmds = {
+ [XY_FAST_COPY] = &dg2_xy_fast_copy,
+ [XY_BLOCK_COPY] = &xe2_xy_block_copy,
+ }
+};
+
const struct blt_cmd_info *blt_get_cmd_info(const struct intel_cmds_info *cmds_info,
enum blt_cmd_type cmd)
{
diff --git a/lib/intel_cmds_info.h b/lib/intel_cmds_info.h
index f9e3932d1..0a83b6a44 100644
--- a/lib/intel_cmds_info.h
+++ b/lib/intel_cmds_info.h
@@ -55,6 +55,7 @@ extern const struct intel_cmds_info gen12_cmds_info;
extern const struct intel_cmds_info gen12_dg2_cmds_info;
extern const struct intel_cmds_info gen12_mtl_cmds_info;
extern const struct intel_cmds_info gen12_pvc_cmds_info;
+extern const struct intel_cmds_info xe2_cmds_info;
#define for_each_tiling(__tiling) \
for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index 34817f7b6..a669797c3 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -511,7 +511,7 @@ static const struct intel_device_info intel_lunarlake_info = {
.has_4tile = true,
.is_lunarlake = true,
.codename = "lunarlake",
- .cmds_info = &gen12_pvc_cmds_info,
+ .cmds_info = &xe2_cmds_info,
};
static const struct pci_id_match intel_device_match[] = {
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake Akshata Jahagirdar
@ 2023-11-30 7:40 ` Karolina Stolarek
2023-12-07 0:33 ` Jahagirdar, Akshata
2023-12-11 7:16 ` Zbigniew Kempczyński
1 sibling, 1 reply; 13+ messages in thread
From: Karolina Stolarek @ 2023-11-30 7:40 UTC (permalink / raw)
To: Akshata Jahagirdar; +Cc: igt-dev, ayaz.siddiqui, Mmatthew.auld
On 30.11.2023 13:35, Akshata Jahagirdar wrote:
> Add blt_cmd_info structs to describe properties of XY_BLOCK_COPY and XY_FAST_COPY blitter commands for XE2 platform. Updated the definitions for Lunarlake.
>
> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
> ---
> lib/intel_cmds_info.c | 17 +++++++++++++++++
> lib/intel_cmds_info.h | 1 +
> lib/intel_device_info.c | 2 +-
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/lib/intel_cmds_info.c b/lib/intel_cmds_info.c
> index 2e51ec081..7c8790d8e 100644
> --- a/lib/intel_cmds_info.c
> +++ b/lib/intel_cmds_info.c
> @@ -67,6 +67,15 @@ static const struct blt_cmd_info
> BLT_CMD_EXTENDED |
> BLT_CMD_SUPPORTS_COMPRESSION);
>
> +static const struct blt_cmd_info
> + xe2_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR) |
> + BIT(T_TILE4) |
> + BIT(T_TILE64),
> + BLT_CMD_EXTENDED |
> + BLT_CMD_SUPPORTS_COMPRESSION);
> +
> static const struct blt_cmd_info
> mtl_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
> BIT(T_LINEAR) |
> @@ -169,6 +178,14 @@ const struct intel_cmds_info gen12_pvc_cmds_info = {
> }
> };
>
> +
This blank line is unnecessary. Once you fix that and wrap the commit
message to 80 chars, feel free to add my:
Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
All the best,
Karolina
> +const struct intel_cmds_info xe2_cmds_info = {
> + .blt_cmds = {
> + [XY_FAST_COPY] = &dg2_xy_fast_copy,
> + [XY_BLOCK_COPY] = &xe2_xy_block_copy,
> + }
> +};
> +
> const struct blt_cmd_info *blt_get_cmd_info(const struct intel_cmds_info *cmds_info,
> enum blt_cmd_type cmd)
> {
> diff --git a/lib/intel_cmds_info.h b/lib/intel_cmds_info.h
> index f9e3932d1..0a83b6a44 100644
> --- a/lib/intel_cmds_info.h
> +++ b/lib/intel_cmds_info.h
> @@ -55,6 +55,7 @@ extern const struct intel_cmds_info gen12_cmds_info;
> extern const struct intel_cmds_info gen12_dg2_cmds_info;
> extern const struct intel_cmds_info gen12_mtl_cmds_info;
> extern const struct intel_cmds_info gen12_pvc_cmds_info;
> +extern const struct intel_cmds_info xe2_cmds_info;
>
> #define for_each_tiling(__tiling) \
> for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 34817f7b6..a669797c3 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -511,7 +511,7 @@ static const struct intel_device_info intel_lunarlake_info = {
> .has_4tile = true,
> .is_lunarlake = true,
> .codename = "lunarlake",
> - .cmds_info = &gen12_pvc_cmds_info,
> + .cmds_info = &xe2_cmds_info,
> };
>
> static const struct pci_id_match intel_device_match[] = {
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake
2023-11-30 7:40 ` Karolina Stolarek
@ 2023-12-07 0:33 ` Jahagirdar, Akshata
0 siblings, 0 replies; 13+ messages in thread
From: Jahagirdar, Akshata @ 2023-12-07 0:33 UTC (permalink / raw)
To: Stolarek, Karolina; +Cc: igt-dev@lists.freedesktop.org
>-----Original Message-----
>From: Stolarek, Karolina <karolina.stolarek@intel.com>
>Sent: Wednesday, November 29, 2023 11:41 PM
>To: Jahagirdar, Akshata <akshata.jahagirdar@intel.com>
>Cc: igt-dev@lists.freedesktop.org; Siddiqui, Ayaz A <ayaz.siddiqui@intel.com>; Mmatthew.auld@intel.com; Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com>; >Mishra, Pallavi <pallavi.mishra@intel.com>
>Subject: Re: [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake
>
>
>On 30.11.2023 13:35, Akshata Jahagirdar wrote:
>> Add blt_cmd_info structs to describe properties of XY_BLOCK_COPY and XY_FAST_COPY blitter commands for XE2 platform. Updated the definitions for Lunarlake.
>>
>> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
>> ---
>> lib/intel_cmds_info.c | 17 +++++++++++++++++
>> lib/intel_cmds_info.h | 1 +
>> lib/intel_device_info.c | 2 +-
>> 3 files changed, 19 insertions(+), 1 deletion(-)
>>
>> diff --git a/lib/intel_cmds_info.c b/lib/intel_cmds_info.c index
>> 2e51ec081..7c8790d8e 100644
>> --- a/lib/intel_cmds_info.c
>> +++ b/lib/intel_cmds_info.c
>> @@ -67,6 +67,15 @@ static const struct blt_cmd_info
>> BLT_CMD_EXTENDED |
>> BLT_CMD_SUPPORTS_COMPRESSION);
>>
>> +static const struct blt_cmd_info
>> + xe2_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
>> + BIT(T_LINEAR) |
>> + BIT(T_XMAJOR) |
>> + BIT(T_TILE4) |
>> + BIT(T_TILE64),
>> + BLT_CMD_EXTENDED |
>> + BLT_CMD_SUPPORTS_COMPRESSION);
>> +
>> static const struct blt_cmd_info
>> mtl_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
>> BIT(T_LINEAR) |
>> @@ -169,6 +178,14 @@ const struct intel_cmds_info gen12_pvc_cmds_info = {
>> }
>> };
>>
>> +
>
>This blank line is unnecessary. Once you fix that and wrap the commit message to 80 chars, feel free to add my:
>
>Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
>
>All the best,
>Karolina
>
Sure, will change it. Thank you.
Best,
Akshata.
>> +const struct intel_cmds_info xe2_cmds_info = {
>> + .blt_cmds = {
>> + [XY_FAST_COPY] = &dg2_xy_fast_copy,
>> + [XY_BLOCK_COPY] = &xe2_xy_block_copy,
>> + }
>> +};
>> +
>> const struct blt_cmd_info *blt_get_cmd_info(const struct intel_cmds_info *cmds_info,
>> enum blt_cmd_type cmd)
>> {
>> diff --git a/lib/intel_cmds_info.h b/lib/intel_cmds_info.h index
>> f9e3932d1..0a83b6a44 100644
>> --- a/lib/intel_cmds_info.h
>> +++ b/lib/intel_cmds_info.h
>> @@ -55,6 +55,7 @@ extern const struct intel_cmds_info gen12_cmds_info;
>> extern const struct intel_cmds_info gen12_dg2_cmds_info;
>> extern const struct intel_cmds_info gen12_mtl_cmds_info;
>> extern const struct intel_cmds_info gen12_pvc_cmds_info;
>> +extern const struct intel_cmds_info xe2_cmds_info;
>>
>> #define for_each_tiling(__tiling) \
>> for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
>> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c index
>> 34817f7b6..a669797c3 100644
>> --- a/lib/intel_device_info.c
>> +++ b/lib/intel_device_info.c
>> @@ -511,7 +511,7 @@ static const struct intel_device_info intel_lunarlake_info = {
>> .has_4tile = true,
>> .is_lunarlake = true,
>> .codename = "lunarlake",
>> - .cmds_info = &gen12_pvc_cmds_info,
>> + .cmds_info = &xe2_cmds_info,
>> };
>>
>> static const struct pci_id_match intel_device_match[] = {
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake Akshata Jahagirdar
2023-11-30 7:40 ` Karolina Stolarek
@ 2023-12-11 7:16 ` Zbigniew Kempczyński
1 sibling, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-12-11 7:16 UTC (permalink / raw)
To: Akshata Jahagirdar; +Cc: igt-dev, ayaz.siddiqui, Mmatthew.auld
On Thu, Nov 30, 2023 at 04:35:25AM -0800, Akshata Jahagirdar wrote:
> Add blt_cmd_info structs to describe properties of XY_BLOCK_COPY and XY_FAST_COPY blitter commands for XE2 platform. Updated the definitions for Lunarlake.
>
> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
> ---
> lib/intel_cmds_info.c | 17 +++++++++++++++++
> lib/intel_cmds_info.h | 1 +
> lib/intel_device_info.c | 2 +-
> 3 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/lib/intel_cmds_info.c b/lib/intel_cmds_info.c
> index 2e51ec081..7c8790d8e 100644
> --- a/lib/intel_cmds_info.c
> +++ b/lib/intel_cmds_info.c
> @@ -67,6 +67,15 @@ static const struct blt_cmd_info
> BLT_CMD_EXTENDED |
> BLT_CMD_SUPPORTS_COMPRESSION);
>
> +static const struct blt_cmd_info
Trailing spaces. Please use kernel scripts/checkpatch.pl before
sending series.
Fix this and you may add my r-b along with Karolina rb:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> + xe2_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
> + BIT(T_LINEAR) |
> + BIT(T_XMAJOR) |
> + BIT(T_TILE4) |
> + BIT(T_TILE64),
> + BLT_CMD_EXTENDED |
> + BLT_CMD_SUPPORTS_COMPRESSION);
> +
> static const struct blt_cmd_info
> mtl_xy_block_copy = BLT_INFO_EXT(XY_BLOCK_COPY,
> BIT(T_LINEAR) |
> @@ -169,6 +178,14 @@ const struct intel_cmds_info gen12_pvc_cmds_info = {
> }
> };
>
> +
> +const struct intel_cmds_info xe2_cmds_info = {
> + .blt_cmds = {
> + [XY_FAST_COPY] = &dg2_xy_fast_copy,
> + [XY_BLOCK_COPY] = &xe2_xy_block_copy,
> + }
> +};
> +
> const struct blt_cmd_info *blt_get_cmd_info(const struct intel_cmds_info *cmds_info,
> enum blt_cmd_type cmd)
> {
> diff --git a/lib/intel_cmds_info.h b/lib/intel_cmds_info.h
> index f9e3932d1..0a83b6a44 100644
> --- a/lib/intel_cmds_info.h
> +++ b/lib/intel_cmds_info.h
> @@ -55,6 +55,7 @@ extern const struct intel_cmds_info gen12_cmds_info;
> extern const struct intel_cmds_info gen12_dg2_cmds_info;
> extern const struct intel_cmds_info gen12_mtl_cmds_info;
> extern const struct intel_cmds_info gen12_pvc_cmds_info;
> +extern const struct intel_cmds_info xe2_cmds_info;
>
> #define for_each_tiling(__tiling) \
> for (__tiling = T_LINEAR; __tiling < __BLT_MAX_TILING; __tiling++)
> diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
> index 34817f7b6..a669797c3 100644
> --- a/lib/intel_device_info.c
> +++ b/lib/intel_device_info.c
> @@ -511,7 +511,7 @@ static const struct intel_device_info intel_lunarlake_info = {
> .has_4tile = true,
> .is_lunarlake = true,
> .codename = "lunarlake",
> - .cmds_info = &gen12_pvc_cmds_info,
> + .cmds_info = &xe2_cmds_info,
> };
>
> static const struct pci_id_match intel_device_match[] = {
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t v3 2/6] lib/intel_blt: Update calculation of ccs_size and size_of_ctrl_copy
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
` (2 preceding siblings ...)
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 1/6] lib: Add blt command properties for lunarlake Akshata Jahagirdar
@ 2023-11-30 12:35 ` Akshata Jahagirdar
2023-12-11 8:02 ` Zbigniew Kempczyński
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 3/6] lib/intel_pat: Add uc_comp pat_index Akshata Jahagirdar
` (3 subsequent siblings)
7 siblings, 1 reply; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
The Main-to-CCS Ratio for XE2 has been changed to 512:1.
Update the CCS_RATIO macro to select relevant ratio based on platform.
Since the PAGE_SIZE of sysmem is 4K, update the size of ctrl_copy to reflect this change.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
lib/intel_blt.c | 14 ++++++++------
lib/intel_blt.h | 2 +-
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index c0593930c..938165063 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -948,15 +948,16 @@ int blt_block_copy(int fd,
return ret;
}
-static uint16_t __ccs_size(const struct blt_ctrl_surf_copy_data *surf)
+static uint16_t __ccs_size(int fd, const struct blt_ctrl_surf_copy_data *surf)
{
uint32_t src_size, dst_size;
+ uint16_t ccsratio = CCS_RATIO(fd);
src_size = surf->src.access_type == DIRECT_ACCESS ?
- surf->src.size : surf->src.size / CCS_RATIO;
+ surf->src.size : surf->src.size / ccsratio;
dst_size = surf->dst.access_type == DIRECT_ACCESS ?
- surf->dst.size : surf->dst.size / CCS_RATIO;
+ surf->dst.size : surf->dst.size / ccsratio;
igt_assert_f(src_size <= dst_size, "dst size must be >= src size for CCS copy\n");
@@ -1118,6 +1119,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
uint64_t dst_offset, src_offset, bb_offset, alignment;
uint32_t bbe = MI_BATCH_BUFFER_END;
uint32_t *bb;
+ uint16_t num_ccs_blocks = xe_get_default_alignment(fd) / (CCS_RATIO(fd));
igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
@@ -1136,7 +1138,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
data.xe2.dw00.dst_access_type = surf->dst.access_type;
/* Ensure dst has size capable to keep src ccs aux */
- data.xe2.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
+ data.xe2.dw00.size_of_ctrl_copy = __ccs_size(fd, surf) / num_ccs_blocks - 1;
data.xe2.dw00.length = 0x3;
data.xe2.dw01.src_address_lo = src_offset;
@@ -1155,7 +1157,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
data.gen12.dw00.dst_access_type = surf->dst.access_type;
/* Ensure dst has size capable to keep src ccs aux */
- data.gen12.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
+ data.gen12.dw00.size_of_ctrl_copy = __ccs_size(fd,surf) / num_ccs_blocks - 1;
data.gen12.dw00.length = 0x3;
data.gen12.dw01.src_address_lo = src_offset;
@@ -1808,7 +1810,7 @@ blt_create_object(const struct blt_copy_data *blt, uint32_t region,
flags |= XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM;
size = ALIGN(size, xe_get_default_alignment(blt->fd));
- handle = xe_bo_create_flags(blt->fd, 0, size, flags);
+ handle = xe_bo_create_flags(blt->fd, 0, size, region);
} else {
igt_assert(__gem_create_in_memory_regions(blt->fd, &handle,
&size, region) == 0);
diff --git a/lib/intel_blt.h b/lib/intel_blt.h
index 5934ccd67..a7aeab595 100644
--- a/lib/intel_blt.h
+++ b/lib/intel_blt.h
@@ -52,7 +52,7 @@
#include "igt.h"
#include "intel_cmds_info.h"
-#define CCS_RATIO 256
+#define CCS_RATIO(xe) AT_LEAST_GEN(intel_get_drm_devid(xe), 20) ? 512 : 256
enum blt_color_depth {
CD_8bit,
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH i-g-t v3 2/6] lib/intel_blt: Update calculation of ccs_size and size_of_ctrl_copy
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 2/6] lib/intel_blt: Update calculation of ccs_size and size_of_ctrl_copy Akshata Jahagirdar
@ 2023-12-11 8:02 ` Zbigniew Kempczyński
0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-12-11 8:02 UTC (permalink / raw)
To: Akshata Jahagirdar; +Cc: igt-dev, ayaz.siddiqui, matthew.auld
On Thu, Nov 30, 2023 at 04:35:26AM -0800, Akshata Jahagirdar wrote:
> The Main-to-CCS Ratio for XE2 has been changed to 512:1.
> Update the CCS_RATIO macro to select relevant ratio based on platform.
> Since the PAGE_SIZE of sysmem is 4K, update the size of ctrl_copy to reflect this change.
Please keep commit message max to 80 columns.
And according to documentation 8B of ccs covers 4K, so I would drop
PAGE_SIZE sentence as this doesn't occur in the patch itself and is
confusing (at least for me). Information about ratio is imo enough.
>
> Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
> ---
> lib/intel_blt.c | 14 ++++++++------
> lib/intel_blt.h | 2 +-
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/lib/intel_blt.c b/lib/intel_blt.c
> index c0593930c..938165063 100644
> --- a/lib/intel_blt.c
> +++ b/lib/intel_blt.c
> @@ -948,15 +948,16 @@ int blt_block_copy(int fd,
> return ret;
> }
>
> -static uint16_t __ccs_size(const struct blt_ctrl_surf_copy_data *surf)
> +static uint16_t __ccs_size(int fd, const struct blt_ctrl_surf_copy_data *surf)
> {
> uint32_t src_size, dst_size;
> + uint16_t ccsratio = CCS_RATIO(fd);
>
> src_size = surf->src.access_type == DIRECT_ACCESS ?
> - surf->src.size : surf->src.size / CCS_RATIO;
> + surf->src.size : surf->src.size / ccsratio;
>
> dst_size = surf->dst.access_type == DIRECT_ACCESS ?
> - surf->dst.size : surf->dst.size / CCS_RATIO;
> + surf->dst.size : surf->dst.size / ccsratio;
>
> igt_assert_f(src_size <= dst_size, "dst size must be >= src size for CCS copy\n");
>
> @@ -1118,6 +1119,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
> uint64_t dst_offset, src_offset, bb_offset, alignment;
> uint32_t bbe = MI_BATCH_BUFFER_END;
> uint32_t *bb;
> + uint16_t num_ccs_blocks = xe_get_default_alignment(fd) / (CCS_RATIO(fd));
>
> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
> @@ -1136,7 +1138,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
> data.xe2.dw00.dst_access_type = surf->dst.access_type;
>
> /* Ensure dst has size capable to keep src ccs aux */
> - data.xe2.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
> + data.xe2.dw00.size_of_ctrl_copy = __ccs_size(fd, surf) / num_ccs_blocks - 1;
> data.xe2.dw00.length = 0x3;
>
> data.xe2.dw01.src_address_lo = src_offset;
> @@ -1155,7 +1157,7 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
> data.gen12.dw00.dst_access_type = surf->dst.access_type;
>
> /* Ensure dst has size capable to keep src ccs aux */
> - data.gen12.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
> + data.gen12.dw00.size_of_ctrl_copy = __ccs_size(fd,surf) / num_ccs_blocks - 1;
^---
missing
space
> data.gen12.dw00.length = 0x3;
>
> data.gen12.dw01.src_address_lo = src_offset;
> @@ -1808,7 +1810,7 @@ blt_create_object(const struct blt_copy_data *blt, uint32_t region,
> flags |= XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM;
>
> size = ALIGN(size, xe_get_default_alignment(blt->fd));
> - handle = xe_bo_create_flags(blt->fd, 0, size, flags);
> + handle = xe_bo_create_flags(blt->fd, 0, size, region);
> } else {
> igt_assert(__gem_create_in_memory_regions(blt->fd, &handle,
> &size, region) == 0);
> diff --git a/lib/intel_blt.h b/lib/intel_blt.h
> index 5934ccd67..a7aeab595 100644
> --- a/lib/intel_blt.h
> +++ b/lib/intel_blt.h
> @@ -52,7 +52,7 @@
> #include "igt.h"
> #include "intel_cmds_info.h"
>
> -#define CCS_RATIO 256
> +#define CCS_RATIO(xe) AT_LEAST_GEN(intel_get_drm_devid(xe), 20) ? 512 : 256
Define with brackets to avoid side effects on user, I mean
#define CCS_RATIO(xe) (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) ? 512 : 256)
BTW fix CC Mmatthew to matthew as reply lead to mailing list daemon
delivery failure.
--
Zbigniew
>
> enum blt_color_depth {
> CD_8bit,
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] [PATCH i-g-t v3 3/6] lib/intel_pat: Add uc_comp pat_index
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
` (3 preceding siblings ...)
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 2/6] lib/intel_blt: Update calculation of ccs_size and size_of_ctrl_copy Akshata Jahagirdar
@ 2023-11-30 12:35 ` Akshata Jahagirdar
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 4/6] lib/intel_blt: Update caching mode and pat_index Akshata Jahagirdar
` (2 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
Compression in XE2 is programmed through pat-index attribute.
Add a dedicated pat-index for compression for XE2 and later platforms.
The caller to this helper function ensures GFX version is correct.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
lib/intel_pat.c | 14 +++++++++++++-
lib/intel_pat.h | 2 ++
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/lib/intel_pat.c b/lib/intel_pat.c
index 2b892ee52..8ec8b72a8 100644
--- a/lib/intel_pat.c
+++ b/lib/intel_pat.c
@@ -11,7 +11,7 @@ struct intel_pat_cache {
uint8_t uc; /* UC + COH_NONE */
uint8_t wt; /* WT + COH_NONE */
uint8_t wb; /* WB + COH_AT_LEAST_1WAY */
-
+ uint8_t uc_comp; /* UC + COH_NONE + COMPRESSION, XE2 and later*/
uint8_t max_index;
};
@@ -23,6 +23,7 @@ static void intel_get_pat_idx(int fd, struct intel_pat_cache *pat)
pat->uc = 3;
pat->wt = 15; /* Compressed + WB-transient */
pat->wb = 2;
+ pat->uc_comp = 12; /* Compressed + UC, XE2 and later */
pat->max_index = 31;
} else if (IS_METEORLAKE(dev_id)) {
pat->uc = 2;
@@ -60,6 +61,17 @@ uint8_t intel_get_pat_idx_uc(int fd)
return pat.uc;
}
+uint8_t intel_get_pat_idx_uc_comp(int fd)
+{
+ struct intel_pat_cache pat = {};
+
+ uint16_t dev_id = intel_get_drm_devid(fd);
+ igt_assert(AT_LEAST_GEN(dev_id, 20));
+
+ intel_get_pat_idx(fd, &pat);
+ return pat.uc_comp;
+}
+
uint8_t intel_get_pat_idx_wt(int fd)
{
struct intel_pat_cache pat = {};
diff --git a/lib/intel_pat.h b/lib/intel_pat.h
index c24dbc275..eb48cbc65 100644
--- a/lib/intel_pat.h
+++ b/lib/intel_pat.h
@@ -16,4 +16,6 @@ uint8_t intel_get_pat_idx_uc(int fd);
uint8_t intel_get_pat_idx_wt(int fd);
uint8_t intel_get_pat_idx_wb(int fd);
+uint8_t intel_get_pat_idx_uc_comp(int fd);
+
#endif /* INTEL_PAT_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [igt-dev] [PATCH i-g-t v3 4/6] lib/intel_blt: Update caching mode and pat_index
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
` (4 preceding siblings ...)
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 3/6] lib/intel_pat: Add uc_comp pat_index Akshata Jahagirdar
@ 2023-11-30 12:35 ` Akshata Jahagirdar
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 5/6] tests/intel/gem_ccs: Add compression support for Lunarlake Akshata Jahagirdar
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 6/6] tests/intel/xe_ccs: " Akshata Jahagirdar
7 siblings, 0 replies; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
The pat-index and caching mode for compression need to change to uc_comp and WC in case
of compression, else they just take the default value of pat_index and WB.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
lib/intel_blt.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index 938165063..764b27213 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -1796,7 +1796,8 @@ blt_create_object(const struct blt_copy_data *blt, uint32_t region,
uint64_t size = width * height * bpp / 8;
uint32_t stride = tiling == T_LINEAR ? width * 4 : width;
uint32_t handle;
-
+ uint8_t pat_index = intel_get_pat_idx_uc(blt->fd);
+ uint16_t cpu_caching = DRM_XE_GEM_CPU_CACHING_WB;
igt_assert_f(blt->driver, "Driver isn't set, have you called blt_copy_init()?\n");
obj = calloc(1, sizeof(*obj));
@@ -1806,17 +1807,21 @@ blt_create_object(const struct blt_copy_data *blt, uint32_t region,
if (blt->driver == INTEL_DRIVER_XE) {
uint64_t flags = region;
+ if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
+ pat_index = xe2_get_pat_idx_uc_comp(blt->fd);
+ cpu_caching = DRM_XE_GEM_CPU_CACHING_WC;
+ }
if (create_mapping && region != system_memory(blt->fd))
flags |= XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM;
size = ALIGN(size, xe_get_default_alignment(blt->fd));
- handle = xe_bo_create_flags(blt->fd, 0, size, region);
+ handle = xe_bo_create_caching(blt->fd, 0, size, region, cpu_caching);
} else {
igt_assert(__gem_create_in_memory_regions(blt->fd, &handle,
&size, region) == 0);
}
- blt_set_object(obj, handle, size, region, mocs_index, DEFAULT_PAT_INDEX, tiling,
+ blt_set_object(obj, handle, size, region, mocs_index, pat_index, tiling,
compression, compression_type);
blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [igt-dev] [PATCH i-g-t v3 5/6] tests/intel/gem_ccs: Add compression support for Lunarlake
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
` (5 preceding siblings ...)
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 4/6] lib/intel_blt: Update caching mode and pat_index Akshata Jahagirdar
@ 2023-11-30 12:35 ` Akshata Jahagirdar
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 6/6] tests/intel/xe_ccs: " Akshata Jahagirdar
7 siblings, 0 replies; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
Update the ccs_ratio call to get value according to platform.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
tests/intel/gem_ccs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/intel/gem_ccs.c b/tests/intel/gem_ccs.c
index 0a691778d..5a17be4cb 100644
--- a/tests/intel/gem_ccs.c
+++ b/tests/intel/gem_ccs.c
@@ -99,7 +99,7 @@ static void surf_copy(int i915,
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
uint32_t bb1, bb2, ccs, ccs2, *ccsmap, *ccsmap2;
- uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
+ uint64_t bb_size, ccssize = mid->size / (CCS_RATIO(i915));
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs_index(i915);
int result;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [igt-dev] [PATCH i-g-t v3 6/6] tests/intel/xe_ccs: Add compression support for Lunarlake
2023-11-30 12:35 [igt-dev] [PATCH i-g-t v3 0/6] Compression support for Lunarlake Akshata Jahagirdar
` (6 preceding siblings ...)
2023-11-30 12:35 ` [igt-dev] [PATCH i-g-t v3 5/6] tests/intel/gem_ccs: Add compression support for Lunarlake Akshata Jahagirdar
@ 2023-11-30 12:35 ` Akshata Jahagirdar
7 siblings, 0 replies; 13+ messages in thread
From: Akshata Jahagirdar @ 2023-11-30 12:35 UTC (permalink / raw)
Cc: Mmatthew.auld, igt-dev, ayaz.siddiqui, Akshata Jahagirdar
In XE2 IGFX platform, sysmem also participates in compression.
So, create all blt objects in sysmem itself, and update the pat-index to reflect
the compression status. Since we need to align the buffer object size with page
size and also have the src size and dst size of CCS copy to be equal, change the
default width and height to 1024.
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com>
---
tests/intel/xe_ccs.c | 44 +++++++++++++++++++++++++-------------------
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/tests/intel/xe_ccs.c b/tests/intel/xe_ccs.c
index 647a6bd2e..bcf6cbd29 100644
--- a/tests/intel/xe_ccs.c
+++ b/tests/intel/xe_ccs.c
@@ -63,8 +63,8 @@ static struct param {
.write_png = false,
.print_bb = false,
.print_surface_info = false,
- .width = 512,
- .height = 512,
+ .width = 1024,
+ .height = 1024,
};
struct test_config {
@@ -95,21 +95,27 @@ static void surf_copy(int xe,
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
uint32_t bb1, bb2, ccs, ccs2, *ccsmap, *ccsmap2;
- uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
+ uint64_t bb_size, ccssize = mid->size / (CCS_RATIO(xe));
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs_index(xe);
+ uint8_t comp_pat_index = DEFAULT_PAT_INDEX;
+ uint16_t cpu_caching = DRM_XE_GEM_CPU_CACHING_WB;
uint32_t sysmem = system_memory(xe);
int result;
igt_assert(mid->compression);
+ if(AT_LEAST_GEN(intel_get_drm_devid(xe), 20) && mid->compression){
+ comp_pat_index = xe2_get_pat_idx_uc_comp(xe);
+ cpu_caching = DRM_XE_GEM_CPU_CACHING_WC;
+ }
ccscopy = (uint32_t *) malloc(ccssize);
- ccs = xe_bo_create_flags(xe, 0, ccssize, sysmem);
- ccs2 = xe_bo_create_flags(xe, 0, ccssize, sysmem);
+ ccs = xe_bo_create_caching(xe, 0, ccssize, sysmem, cpu_caching);
+ ccs2 = xe_bo_create_caching(xe, 0, ccssize, sysmem, cpu_caching);
blt_ctrl_surf_copy_init(xe, &surf);
surf.print_bb = param.print_bb;
blt_set_ctrl_surf_object(&surf.src, mid->handle, mid->region, mid->size,
- uc_mocs, DEFAULT_PAT_INDEX, BLT_INDIRECT_ACCESS);
+ uc_mocs, comp_pat_index, BLT_INDIRECT_ACCESS);
blt_set_ctrl_surf_object(&surf.dst, ccs, sysmem, ccssize, uc_mocs,
DEFAULT_PAT_INDEX, DIRECT_ACCESS);
bb_size = xe_get_default_alignment(xe);
@@ -157,7 +163,7 @@ static void surf_copy(int xe,
blt_set_ctrl_surf_object(&surf.src, ccs, sysmem, ccssize,
uc_mocs, DEFAULT_PAT_INDEX, DIRECT_ACCESS);
blt_set_ctrl_surf_object(&surf.dst, mid->handle, mid->region, mid->size,
- uc_mocs, DEFAULT_PAT_INDEX, INDIRECT_ACCESS);
+ uc_mocs, comp_pat_index, INDIRECT_ACCESS);
blt_ctrl_surf_copy(xe, ctx, NULL, ahnd, &surf);
intel_ctx_xe_sync(ctx, true);
@@ -234,10 +240,10 @@ static int blt_block_copy3(int xe,
igt_assert_f(blt3, "block-copy3 requires data to do blit\n");
alignment = xe_get_default_alignment(xe);
- get_offset(ahnd, blt3->src.handle, blt3->src.size, alignment);
- get_offset(ahnd, blt3->mid.handle, blt3->mid.size, alignment);
- get_offset(ahnd, blt3->dst.handle, blt3->dst.size, alignment);
- get_offset(ahnd, blt3->final.handle, blt3->final.size, alignment);
+ get_offset_pat_index(ahnd, blt3->src.handle, blt3->src.size, alignment, blt3->src.pat_index);
+ get_offset_pat_index(ahnd, blt3->mid.handle, blt3->mid.size, alignment, blt3->mid.pat_index);
+ get_offset_pat_index(ahnd, blt3->dst.handle, blt3->dst.size, alignment, blt3->dst.pat_index);
+ get_offset_pat_index(ahnd, blt3->final.handle, blt3->final.size, alignment, blt3->final.pat_index);
bb_offset = get_offset(ahnd, blt3->bb.handle, blt3->bb.size, alignment);
/* First blit src -> mid */
@@ -291,8 +297,8 @@ static void block_copy(int xe,
uint64_t bb_size = xe_get_default_alignment(xe);
uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
uint32_t run_id = mid_tiling;
- uint32_t mid_region = region2, bb;
- uint32_t width = param.width, height = param.height;
+ uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) & !xe_has_vram(xe)) ? region1 : region2;
+ uint32_t width = param.width, height = param.height, bb;
enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
@@ -413,8 +419,8 @@ static void block_multicopy(int xe,
uint64_t bb_size = xe_get_default_alignment(xe);
uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
uint32_t run_id = mid_tiling;
- uint32_t mid_region = region2, bb;
- uint32_t width = param.width, height = param.height;
+ uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) & !xe_has_vram(xe)) ? region1 : region2;
+ uint32_t width = param.width, height = param.height, bb;
enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
@@ -539,8 +545,8 @@ static void block_copy_test(int xe,
region1 = igt_collection_get_value(regions, 0);
region2 = igt_collection_get_value(regions, 1);
- /* Compressed surface must be in device memory */
- if (config->compression && !XE_IS_VRAM_MEMORY_REGION(xe, region2))
+ /* if not XE2, then Compressed surface must be in device memory */
+ if (config->compression && !(AT_LEAST_GEN((intel_get_drm_devid(xe)), 20)) && !XE_IS_VRAM_MEMORY_REGION(xe, region2))
continue;
regtxt = xe_memregion_dynamic_subtest_name(xe, regions);
@@ -621,8 +627,8 @@ const char *help_str =
" -p\tWrite PNG\n"
" -s\tPrint surface info\n"
" -t\tTiling format (0 - linear, 1 - XMAJOR, 2 - YMAJOR, 3 - TILE4, 4 - TILE64)\n"
- " -W\tWidth (default 512)\n"
- " -H\tHeight (default 512)"
+ " -W\tWidth (default 1024)\n"
+ " -H\tHeight (default 1024)"
;
igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread