* [PATCH 0/6] Implement compression support on BMG @ 2024-07-11 12:21 Akshata Jahagirdar 2024-07-11 12:21 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar 0 siblings, 1 reply; 5+ messages in thread From: Akshata Jahagirdar @ 2024-07-11 12:21 UTC (permalink / raw) To: igt-dev; +Cc: akshatajahagirdar6, Akshata Jahagirdar According to the SAS for BMG compression, we need to decompress during eviction, and not recompress on restore. Due to this, we need to introduce encoding pat_index in case of vram too. This patch explores the solution of setting up an additional identity map for the vram, this time at the end of previous mapping offset and with compressed pat_index. We then select the appropriate mapping during eviction/restore/clear. Akshata Jahagirdar (6): drm/xe/xe2: Introduce identity map for compressed pat for vram drm/xe/migrate: Handle clear ccs logic for xe2 dgfx drm/xe/migrate: Add kunit to test clear functionality drm/xe/xe_migrate: Handle migration logic for xe2+ dgfx drm/xe/migrate: Add kunit to test migration functionality for BMG drm/xe/xe2: Do not run xe_bo_test for xe2+ dgfx drivers/gpu/drm/xe/tests/xe_bo.c | 6 + drivers/gpu/drm/xe/tests/xe_migrate.c | 388 +++++++++++++++++++++ drivers/gpu/drm/xe/tests/xe_migrate_test.c | 1 + drivers/gpu/drm/xe/tests/xe_migrate_test.h | 1 + drivers/gpu/drm/xe/xe_device.h | 5 + drivers/gpu/drm/xe/xe_migrate.c | 66 +++- 6 files changed, 449 insertions(+), 18 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx 2024-07-11 12:21 [PATCH 0/6] Implement compression support on BMG Akshata Jahagirdar @ 2024-07-11 12:21 ` Akshata Jahagirdar 2024-07-12 12:33 ` Piecielska, Katarzyna 0 siblings, 1 reply; 5+ messages in thread From: Akshata Jahagirdar @ 2024-07-11 12:21 UTC (permalink / raw) To: igt-dev; +Cc: akshatajahagirdar6, Akshata Jahagirdar For Xe2 dGPU, we clear the bo by modifying the VRAM using an uncompressed pat index which then indirectly updates the compression status as uncompressed i.e zeroed CCS. So xe_migrate_clear() should be updated for BMG to not emit CCS surf copy commands. Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com> --- drivers/gpu/drm/xe/xe_device.h | 5 +++++ drivers/gpu/drm/xe/xe_migrate.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h index 0a2a3e7fd402..c3093506c28c 100644 --- a/drivers/gpu/drm/xe/xe_device.h +++ b/drivers/gpu/drm/xe/xe_device.h @@ -144,6 +144,11 @@ static inline bool xe_device_has_flat_ccs(struct xe_device *xe) return xe->info.has_flat_ccs; } +static inline bool xe_device_needs_ccs_emit(struct xe_device *xe) +{ + return xe_device_has_flat_ccs(xe) && !(GRAPHICS_VER(xe) >= 20 && IS_DGFX(xe)); +} + static inline bool xe_device_has_sriov(struct xe_device *xe) { return xe->info.has_sriov; diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index fa23a7e7ec43..2fc2cf375b1e 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -420,7 +420,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile) return ERR_PTR(err); if (IS_DGFX(xe)) { - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) /* min chunk size corresponds to 4K of CCS Metadata */ m->min_chunk_size = SZ_4K * SZ_64K / xe_device_ccs_bytes(xe, SZ_64K); @@ -1034,7 +1034,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, clear_system_ccs ? 0 : emit_clear_cmd_len(gt), 0, avail_pts); - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) batch_size += EMIT_COPY_CCS_DW; /* Clear commands */ @@ -1062,7 +1062,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, if (!clear_system_ccs) emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram); - if (xe_device_has_flat_ccs(xe)) { + if (xe_device_needs_ccs_emit(xe)) { emit_copy_ccs(gt, bb, clear_L0_ofs, true, m->cleared_mem_ofs, false, clear_L0); flush_flags = MI_FLUSH_DW_CCS; -- 2.34.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx 2024-07-11 12:21 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar @ 2024-07-12 12:33 ` Piecielska, Katarzyna 2024-07-16 2:15 ` Jahagirdar, Akshata 0 siblings, 1 reply; 5+ messages in thread From: Piecielska, Katarzyna @ 2024-07-12 12:33 UTC (permalink / raw) To: Jahagirdar, Akshata, igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com, Jahagirdar, Akshata Hello, Ashata, please verify results from patchwork as our infrastructure is not able to process whole logs. Example - https://gfx-ci.igk.intel.com/cibuglog-ng/testresult/1840022997?query_key=5010e5e29d437861d2c89e0d98eda884b16111d8 Looks like whole memory dumped to dmesg? Please check your series before sending at least on 1 machine to avoid such situations. Patchwork cannot be a way to test your code. Thanks! Kasia -----Original Message----- From: igt-dev <igt-dev-bounces@lists.freedesktop.org> On Behalf Of Akshata Jahagirdar Sent: Thursday, July 11, 2024 2:22 PM To: igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com; Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Subject: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx For Xe2 dGPU, we clear the bo by modifying the VRAM using an uncompressed pat index which then indirectly updates the compression status as uncompressed i.e zeroed CCS. So xe_migrate_clear() should be updated for BMG to not emit CCS surf copy commands. Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com> --- drivers/gpu/drm/xe/xe_device.h | 5 +++++ drivers/gpu/drm/xe/xe_migrate.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h index 0a2a3e7fd402..c3093506c28c 100644 --- a/drivers/gpu/drm/xe/xe_device.h +++ b/drivers/gpu/drm/xe/xe_device.h @@ -144,6 +144,11 @@ static inline bool xe_device_has_flat_ccs(struct xe_device *xe) return xe->info.has_flat_ccs; } +static inline bool xe_device_needs_ccs_emit(struct xe_device *xe) { + return xe_device_has_flat_ccs(xe) && !(GRAPHICS_VER(xe) >= 20 && +IS_DGFX(xe)); } + static inline bool xe_device_has_sriov(struct xe_device *xe) { return xe->info.has_sriov; diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index fa23a7e7ec43..2fc2cf375b1e 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -420,7 +420,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile) return ERR_PTR(err); if (IS_DGFX(xe)) { - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) /* min chunk size corresponds to 4K of CCS Metadata */ m->min_chunk_size = SZ_4K * SZ_64K / xe_device_ccs_bytes(xe, SZ_64K); @@ -1034,7 +1034,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, clear_system_ccs ? 0 : emit_clear_cmd_len(gt), 0, avail_pts); - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) batch_size += EMIT_COPY_CCS_DW; /* Clear commands */ @@ -1062,7 +1062,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, if (!clear_system_ccs) emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram); - if (xe_device_has_flat_ccs(xe)) { + if (xe_device_needs_ccs_emit(xe)) { emit_copy_ccs(gt, bb, clear_L0_ofs, true, m->cleared_mem_ofs, false, clear_L0); flush_flags = MI_FLUSH_DW_CCS; -- 2.34.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx 2024-07-12 12:33 ` Piecielska, Katarzyna @ 2024-07-16 2:15 ` Jahagirdar, Akshata 2024-07-16 5:59 ` Piecielska, Katarzyna 0 siblings, 1 reply; 5+ messages in thread From: Jahagirdar, Akshata @ 2024-07-16 2:15 UTC (permalink / raw) To: Piecielska, Katarzyna, igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com Hello Kasia, This patch is actually meant for the intel-xe and not the igt-dev patchwork. Due to some unknown reasons, my emails are not getting through to the intel-xe mailing list. I sent it to the igt-dev list as a test patch to confirm if the issue is solely with the intel-xe list or with igt-dev as well. I am still trying to understand why this might be happening and apologize for any inconvenience caused. Could you please let me know if these failures are solely due to my patch, or are they also being reported on the latest kernel or other patches? If it's only due to my patch, we can safely ignore it. Let me know if further debugging is needed. Thank you. Best, Akshata Jahagirdar -----Original Message----- From: Piecielska, Katarzyna <katarzyna.piecielska@intel.com> Sent: Friday, July 12, 2024 5:33 AM To: Jahagirdar, Akshata <akshata.jahagirdar@intel.com>; igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com; Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Subject: RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Hello, Ashata, please verify results from patchwork as our infrastructure is not able to process whole logs. Example - https://gfx-ci.igk.intel.com/cibuglog-ng/testresult/1840022997?query_key=5010e5e29d437861d2c89e0d98eda884b16111d8 Looks like whole memory dumped to dmesg? Please check your series before sending at least on 1 machine to avoid such situations. Patchwork cannot be a way to test your code. Thanks! Kasia -----Original Message----- From: igt-dev <igt-dev-bounces@lists.freedesktop.org> On Behalf Of Akshata Jahagirdar Sent: Thursday, July 11, 2024 2:22 PM To: igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com; Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Subject: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx For Xe2 dGPU, we clear the bo by modifying the VRAM using an uncompressed pat index which then indirectly updates the compression status as uncompressed i.e zeroed CCS. So xe_migrate_clear() should be updated for BMG to not emit CCS surf copy commands. Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com> --- drivers/gpu/drm/xe/xe_device.h | 5 +++++ drivers/gpu/drm/xe/xe_migrate.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h index 0a2a3e7fd402..c3093506c28c 100644 --- a/drivers/gpu/drm/xe/xe_device.h +++ b/drivers/gpu/drm/xe/xe_device.h @@ -144,6 +144,11 @@ static inline bool xe_device_has_flat_ccs(struct xe_device *xe) return xe->info.has_flat_ccs; } +static inline bool xe_device_needs_ccs_emit(struct xe_device *xe) { + return xe_device_has_flat_ccs(xe) && !(GRAPHICS_VER(xe) >= 20 && +IS_DGFX(xe)); } + static inline bool xe_device_has_sriov(struct xe_device *xe) { return xe->info.has_sriov; diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index fa23a7e7ec43..2fc2cf375b1e 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -420,7 +420,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile) return ERR_PTR(err); if (IS_DGFX(xe)) { - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) /* min chunk size corresponds to 4K of CCS Metadata */ m->min_chunk_size = SZ_4K * SZ_64K / xe_device_ccs_bytes(xe, SZ_64K); @@ -1034,7 +1034,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, clear_system_ccs ? 0 : emit_clear_cmd_len(gt), 0, avail_pts); - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) batch_size += EMIT_COPY_CCS_DW; /* Clear commands */ @@ -1062,7 +1062,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, if (!clear_system_ccs) emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram); - if (xe_device_has_flat_ccs(xe)) { + if (xe_device_needs_ccs_emit(xe)) { emit_copy_ccs(gt, bb, clear_L0_ofs, true, m->cleared_mem_ofs, false, clear_L0); flush_flags = MI_FLUSH_DW_CCS; -- 2.34.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx 2024-07-16 2:15 ` Jahagirdar, Akshata @ 2024-07-16 5:59 ` Piecielska, Katarzyna 0 siblings, 0 replies; 5+ messages in thread From: Piecielska, Katarzyna @ 2024-07-16 5:59 UTC (permalink / raw) To: Jahagirdar, Akshata, igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com Hello Akshata, It is something that was noticed only in patchwork. It is not observed in regular CI execution. So please look closer in you series before sending for review. Kasia -----Original Message----- From: Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Sent: Tuesday, July 16, 2024 4:16 AM To: Piecielska, Katarzyna <katarzyna.piecielska@intel.com>; igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com Subject: RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Hello Kasia, This patch is actually meant for the intel-xe and not the igt-dev patchwork. Due to some unknown reasons, my emails are not getting through to the intel-xe mailing list. I sent it to the igt-dev list as a test patch to confirm if the issue is solely with the intel-xe list or with igt-dev as well. I am still trying to understand why this might be happening and apologize for any inconvenience caused. Could you please let me know if these failures are solely due to my patch, or are they also being reported on the latest kernel or other patches? If it's only due to my patch, we can safely ignore it. Let me know if further debugging is needed. Thank you. Best, Akshata Jahagirdar -----Original Message----- From: Piecielska, Katarzyna <katarzyna.piecielska@intel.com> Sent: Friday, July 12, 2024 5:33 AM To: Jahagirdar, Akshata <akshata.jahagirdar@intel.com>; igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com; Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Subject: RE: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Hello, Ashata, please verify results from patchwork as our infrastructure is not able to process whole logs. Example - https://gfx-ci.igk.intel.com/cibuglog-ng/testresult/1840022997?query_key=5010e5e29d437861d2c89e0d98eda884b16111d8 Looks like whole memory dumped to dmesg? Please check your series before sending at least on 1 machine to avoid such situations. Patchwork cannot be a way to test your code. Thanks! Kasia -----Original Message----- From: igt-dev <igt-dev-bounces@lists.freedesktop.org> On Behalf Of Akshata Jahagirdar Sent: Thursday, July 11, 2024 2:22 PM To: igt-dev@lists.freedesktop.org Cc: akshatajahagirdar6@gmail.com; Jahagirdar, Akshata <akshata.jahagirdar@intel.com> Subject: [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx For Xe2 dGPU, we clear the bo by modifying the VRAM using an uncompressed pat index which then indirectly updates the compression status as uncompressed i.e zeroed CCS. So xe_migrate_clear() should be updated for BMG to not emit CCS surf copy commands. Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com> --- drivers/gpu/drm/xe/xe_device.h | 5 +++++ drivers/gpu/drm/xe/xe_migrate.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h index 0a2a3e7fd402..c3093506c28c 100644 --- a/drivers/gpu/drm/xe/xe_device.h +++ b/drivers/gpu/drm/xe/xe_device.h @@ -144,6 +144,11 @@ static inline bool xe_device_has_flat_ccs(struct xe_device *xe) return xe->info.has_flat_ccs; } +static inline bool xe_device_needs_ccs_emit(struct xe_device *xe) { + return xe_device_has_flat_ccs(xe) && !(GRAPHICS_VER(xe) >= 20 && +IS_DGFX(xe)); } + static inline bool xe_device_has_sriov(struct xe_device *xe) { return xe->info.has_sriov; diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index fa23a7e7ec43..2fc2cf375b1e 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -420,7 +420,7 @@ struct xe_migrate *xe_migrate_init(struct xe_tile *tile) return ERR_PTR(err); if (IS_DGFX(xe)) { - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) /* min chunk size corresponds to 4K of CCS Metadata */ m->min_chunk_size = SZ_4K * SZ_64K / xe_device_ccs_bytes(xe, SZ_64K); @@ -1034,7 +1034,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, clear_system_ccs ? 0 : emit_clear_cmd_len(gt), 0, avail_pts); - if (xe_device_has_flat_ccs(xe)) + if (xe_device_needs_ccs_emit(xe)) batch_size += EMIT_COPY_CCS_DW; /* Clear commands */ @@ -1062,7 +1062,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, if (!clear_system_ccs) emit_clear(gt, bb, clear_L0_ofs, clear_L0, XE_PAGE_SIZE, clear_vram); - if (xe_device_has_flat_ccs(xe)) { + if (xe_device_needs_ccs_emit(xe)) { emit_copy_ccs(gt, bb, clear_L0_ofs, true, m->cleared_mem_ofs, false, clear_L0); flush_flags = MI_FLUSH_DW_CCS; -- 2.34.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-07-16 5:59 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-07-11 12:21 [PATCH 0/6] Implement compression support on BMG Akshata Jahagirdar 2024-07-11 12:21 ` [PATCH 1/6] drm/xe/migrate: Handle clear ccs logic for xe2 dgfx Akshata Jahagirdar 2024-07-12 12:33 ` Piecielska, Katarzyna 2024-07-16 2:15 ` Jahagirdar, Akshata 2024-07-16 5:59 ` Piecielska, Katarzyna
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