[PATCH v1 0/2] Enable amd filtering

[PATCH v1 0/2] Enable amd filtering

[vitaly.prosyak]

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

Enable amd filterting and some fixes

Vitaly Prosyak (2):
  tests/amdgpu: initialize platform filtering for amd_basic
  lib/amdgpu/amd_gfx: skip CE IB tests when kernel blocks CE CS

 lib/amdgpu/amd_gfx.c     | 22 ++++++++++++++++++++++
 tests/amdgpu/amd_basic.c |  5 +++--
 2 files changed, 25 insertions(+), 2 deletions(-)

-- 
2.54.0

[PATCH v1 1/2] tests/amdgpu: initialize platform filtering for amd_basic

[vitaly.prosyak]

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

The tests for user queues are always enable and not depend of
env AMDGPU_ENABLE_USERQTEST=1

Cc: Jesse Zhang <jesse.zhang@amd.com>
Cc: Michael Strawbridge <michael.strawbridge@amd.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
---
 tests/amdgpu/amd_basic.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index 84a6d8618..59ec3880f 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -19,6 +19,7 @@
 #include "lib/amdgpu/compute_utils/amd_dispatch.h"
 #include "lib/amdgpu/amdgpu_asic_addr.h"
 #include "lib/amdgpu/amd_utils.h"
+#include "lib//amdgpu/amd_platform.h"
 
 #define BUFFER_SIZE (8 * 1024)
 
@@ -858,9 +859,8 @@ int igt_main()
 	bool userq_arr_cap[AMD_IP_MAX] = {0};
 	bool enable_test = false;
 #ifdef AMDGPU_USERQ_ENABLED
-	const char *env = getenv("AMDGPU_ENABLE_USERQTEST");
 
-	enable_test = env && atoi(env);
+	enable_test = true;
 #endif
 
 	igt_fixture() {
@@ -884,6 +884,7 @@ int igt_main()
 		igt_assert_eq(r, 0);
 		asic_rings_readness(device, 1, arr_cap);
 		asic_userq_readiness(device, userq_arr_cap);
+		amd_platform_filter_init(&gpu_info);
 	}
 	igt_describe("Check-alloc-free-VRAM-visible-non-visible-GART-write-combined-cached");
 	igt_subtest("memory-alloc")
-- 
2.54.0

Re: [PATCH v1 1/2] tests/amdgpu: initialize platform filtering for amd_basic

[Strawbridge, Michael]

[-- Attachment #1: Type: text/plain, Size: 2084 bytes --]

AMD General

Hi Vitaly,

Feel free to add:
Reviewed-by: Michael Strawbridge <michael.strawbridge@amd.com>
________________________________
From: vitaly.prosyak@amd.com <vitaly.prosyak@amd.com>
Sent: 27 August 2026 1:57 PM
To: igt-dev@lists.freedesktop.org <igt-dev@lists.freedesktop.org>
Cc: Prosyak, Vitaly <Vitaly.Prosyak@amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang@amd.com>; Strawbridge, Michael <Michael.Strawbridge@amd.com>
Subject: [PATCH v1 1/2] tests/amdgpu: initialize platform filtering for amd_basic

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

The tests for user queues are always enable and not depend of
env AMDGPU_ENABLE_USERQTEST=1

Cc: Jesse Zhang <jesse.zhang@amd.com>
Cc: Michael Strawbridge <michael.strawbridge@amd.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
---
 tests/amdgpu/amd_basic.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index 84a6d8618..59ec3880f 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -19,6 +19,7 @@
 #include "lib/amdgpu/compute_utils/amd_dispatch.h"
 #include "lib/amdgpu/amdgpu_asic_addr.h"
 #include "lib/amdgpu/amd_utils.h"
+#include "lib//amdgpu/amd_platform.h"

 #define BUFFER_SIZE (8 * 1024)

@@ -858,9 +859,8 @@ int igt_main()
         bool userq_arr_cap[AMD_IP_MAX] = {0};
         bool enable_test = false;
 #ifdef AMDGPU_USERQ_ENABLED
-       const char *env = getenv("AMDGPU_ENABLE_USERQTEST");

-       enable_test = env && atoi(env);
+       enable_test = true;
 #endif

         igt_fixture() {
@@ -884,6 +884,7 @@ int igt_main()
                 igt_assert_eq(r, 0);
                 asic_rings_readness(device, 1, arr_cap);
                 asic_userq_readiness(device, userq_arr_cap);
+               amd_platform_filter_init(&gpu_info);
         }
         igt_describe("Check-alloc-free-VRAM-visible-non-visible-GART-write-combined-cached");
         igt_subtest("memory-alloc")
--
2.54.0


[-- Attachment #2: Type: text/html, Size: 4898 bytes --]

[PATCH v1 2/2] lib/amdgpu/amd_gfx: skip CE IB tests when kernel blocks CE CS

[vitaly.prosyak]

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

The kernel guards CE CS behind debug_enable_ce_cs, set via the amdgpu
debug_mask module parameter (bit 0x400). Without it, any submission with
AMDGPU_IB_FLAG_CE returns -EINVAL:

  amdgpu 0000:03:00.0: CE CS is blocked, use debug=0x400 to override

The sysfs parameter file /sys/module/amdgpu/parameters/debug_mask is
read-only (0444); it cannot be changed at runtime and must be set at
module load time:

  modprobe amdgpu debug_mask=0x400

Add amdgpu_ce_cs_enabled() which reads the sysfs parameter at test
entry to check whether bit 0x400 is set. Both
amdgpu_command_submission_gfx_separate_ibs() and
amdgpu_command_submission_gfx_shared_ib() call igt_require_f() with
this check so the subtests are skipped early with a clear message rather
than failing as CRITICAL after allocating resources.

Cc: Michael Strawbridge <michael.strawbridge@amd.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Change-Id: Idbc7a5388602fceac7ba0b67274bff076cbb7d08
---
 lib/amdgpu/amd_gfx.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/lib/amdgpu/amd_gfx.c b/lib/amdgpu/amd_gfx.c
index f133e2459..10bc74b5c 100644
--- a/lib/amdgpu/amd_gfx.c
+++ b/lib/amdgpu/amd_gfx.c
@@ -26,6 +26,22 @@
 #include "amd_memory.h"
 #include "amd_gfx.h"
 
+#define AMDGPU_DEBUG_ENABLE_CE_CS 0x400
+
+/* Returns true if kernel allows CE CS (amdgpu debug_mask has bit 0x400 set). */
+static bool amdgpu_ce_cs_enabled(void)
+{
+	FILE *f;
+	unsigned int mask = 0;
+
+	f = fopen("/sys/module/amdgpu/parameters/debug_mask", "r");
+	if (!f)
+		return false;
+	fscanf(f, "%u", &mask);
+	fclose(f);
+	return (mask & AMDGPU_DEBUG_ENABLE_CE_CS) != 0;
+}
+
 /**
  *
  * @param device
@@ -45,6 +61,9 @@ void amdgpu_command_submission_gfx_separate_ibs(amdgpu_device_handle device)
 	amdgpu_va_handle va_handle, va_handle_ce;
 	int r;
 
+	igt_require_f(amdgpu_ce_cs_enabled(),
+		      "CE CS blocked; reload amdgpu with debug_mask=0x400 to enable\n");
+
 	r = amdgpu_cs_ctx_create(device, &context_handle);
 	igt_assert_eq(r, 0);
 
@@ -134,6 +153,9 @@ void amdgpu_command_submission_gfx_shared_ib(amdgpu_device_handle device)
 	amdgpu_va_handle va_handle;
 	int r;
 
+	igt_require_f(amdgpu_ce_cs_enabled(),
+		      "CE CS blocked; reload amdgpu with debug_mask=0x400 to enable\n");
+
 	r = amdgpu_cs_ctx_create(device, &context_handle);
 	igt_assert_eq(r, 0);
 
-- 
2.54.0

✗ Fi.CI.BAT: failure for Enable amd filtering

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 212 bytes --]

== Series Details ==

Series: Enable amd filtering
URL   : https://patchwork.freedesktop.org/series/172905/
State : failure

== Summary ==

Series 172905 revision 1 was fully merged or fully failed: no git log



[-- Attachment #2: Type: text/html, Size: 681 bytes --]