* [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
@ 2023-06-23 8:46 Zbigniew Kempczyński
2023-06-23 9:11 ` Karolina Stolarek
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-06-23 8:46 UTC (permalink / raw)
To: igt-dev
Migrate i915/i915_blt -> intel_blt as a preparation step before
extending to support xe. It is a simple move of files and rename
of i915 -> fd field.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
---
.../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
lib/intel_batchbuffer.c | 2 +-
lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
lib/intel_chipset.h | 2 +-
lib/{i915 => }/intel_cmds_info.c | 2 +-
lib/{i915 => }/intel_cmds_info.h | 0
lib/meson.build | 8 +-
tests/i915/api_intel_bb.c | 2 +-
tests/i915/gem_blits.c | 2 +-
tests/i915/gem_caching.c | 2 +-
tests/i915/gem_ccs.c | 4 +-
tests/i915/gem_exercise_blt.c | 2 +-
tests/i915/gem_linear_blits.c | 2 +-
tests/i915/gem_lmem_swapping.c | 2 +-
tests/i915/gem_userptr_blits.c | 2 +-
16 files changed, 116 insertions(+), 111 deletions(-)
rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
rename lib/{i915 => }/intel_cmds_info.c (99%)
rename lib/{i915 => }/intel_cmds_info.h (100%)
diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
index 102c8a8978..9085eb924e 100644
--- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
+++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
@@ -64,7 +64,7 @@
<xi:include href="xml/gem_engine_topology.xml"/>
<xi:include href="xml/gem_scheduler.xml"/>
<xi:include href="xml/gem_submission.xml"/>
- <xi:include href="xml/i915_blt.xml"/>
+ <xi:include href="xml/intel_blt.xml"/>
<xi:include href="xml/i915_crc.xml"/>
<xi:include href="xml/intel_ctx.xml"/>
</chapter>
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 3cd680072e..186f65affe 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -32,7 +32,7 @@
#include "huc_copy.h"
#include "i915/gem_create.h"
#include "i915/gem_mman.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
#include "igt_aux.h"
#include "igt_syncobj.h"
#include "intel_batchbuffer.h"
diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
similarity index 92%
rename from lib/i915/i915_blt.c
rename to lib/intel_blt.c
index ef67fe26f3..28a7400942 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/intel_blt.c
@@ -10,8 +10,8 @@
#include <cairo.h>
#include "drm.h"
#include "igt.h"
-#include "gem_create.h"
-#include "i915_blt.h"
+#include "i915/gem_create.h"
+#include "intel_blt.h"
#define BITRANGE(start, end) (end - start + 1)
#define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
@@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
/**
* blt_has_block_copy
- * @i915: drm fd
+ * @fd: drm fd
*
- * Check if block copy is supported by @i915 device
+ * Check if block copy is supported by @fd device
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_has_block_copy(int i915)
+bool blt_has_block_copy(int fd)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_supports_command(cmds_info, XY_BLOCK_COPY);
}
/**
* blt_has_fast_copy
- * @i915: drm fd
+ * @fd: drm fd
*
- * Check if fast copy is supported by @i915 device
+ * Check if fast copy is supported by @fd device
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_has_fast_copy(int i915)
+bool blt_has_fast_copy(int fd)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_supports_command(cmds_info, XY_FAST_COPY);
}
/**
* blt_has_xy_src_copy
- * @i915: drm fd
+ * @fd: drm fd
*
- * Check if XY src copy is supported by @i915 device
+ * Check if XY src copy is supported by @fd device
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_has_xy_src_copy(int i915)
+bool blt_has_xy_src_copy(int fd)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_supports_command(cmds_info, XY_SRC_COPY);
}
/**
* blt_fast_copy_supports_tiling
- * @i915: drm fd
+ * @fd: drm fd
* @tiling: tiling format
*
- * Check if fast copy provided by @i915 device supports @tiling format
+ * Check if fast copy provided by @fd device supports @tiling format
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
}
/**
* blt_block_copy_supports_tiling
- * @i915: drm fd
+ * @fd: drm fd
* @tiling: tiling format
*
- * Check if block copy provided by @i915 device supports @tiling format
+ * Check if block copy provided by @fd device supports @tiling format
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
}
/**
* blt_xy_src_copy_supports_tiling
- * @i915: drm fd
+ * @fd: drm fd
* @tiling: tiling format
*
- * Check if XY src copy provided by @i915 device supports @tiling format
+ * Check if XY src copy provided by @fd device supports @tiling format
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
+bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
}
/**
* blt_block_copy_supports_compression
- * @i915: drm fd
+ * @fd: drm fd
*
- * Check if block copy provided by @i915 device supports compression.
+ * Check if block copy provided by @fd device supports compression.
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_block_copy_supports_compression(int i915)
+bool blt_block_copy_supports_compression(int fd)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
BLT_CMD_SUPPORTS_COMPRESSION);
@@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
/**
* blt_uses_extended_block_copy
- * @i915: drm fd
+ * @fd: drm fd
*
- * Check if block copy provided by @i915 device uses an extended version
+ * Check if block copy provided by @fd device uses an extended version
* of the command.
*
* Returns:
* true if it does, false otherwise.
*/
-bool blt_uses_extended_block_copy(int i915)
+bool blt_uses_extended_block_copy(int fd)
{
- const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
+ const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
}
@@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
/**
* emit_blt_block_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ahnd: allocator handle
* @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
* @ext: extended blitter data (for DG2+, supports flatccs compression)
@@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
* Returns:
* Next write position in batch.
*/
-uint64_t emit_blt_block_copy(int i915,
+uint64_t emit_blt_block_copy(int fd,
uint64_t ahnd,
const struct blt_copy_data *blt,
const struct blt_block_copy_data_ext *ext,
@@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
igt_assert_f(ahnd, "block-copy supports softpin only\n");
igt_assert_f(blt, "block-copy requires data to do blit\n");
- alignment = gem_detect_safe_alignment(i915);
+ alignment = gem_detect_safe_alignment(fd);
src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
fill_data(&data, blt, src_offset, dst_offset, ext);
- bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
+ bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
PROT_READ | PROT_WRITE);
igt_assert(bb_pos + sizeof(data) < blt->bb.size);
@@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
/**
* blt_block_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ctx: intel_ctx_t context
* @e: blitter engine for @ctx
* @ahnd: allocator handle
@@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
* Returns:
* execbuffer status.
*/
-int blt_block_copy(int i915,
+int blt_block_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
@@ -779,12 +779,12 @@ int blt_block_copy(int i915,
igt_assert_f(ahnd, "block-copy supports softpin only\n");
igt_assert_f(blt, "block-copy requires data to do blit\n");
- alignment = gem_detect_safe_alignment(i915);
+ alignment = gem_detect_safe_alignment(fd);
src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
- emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
+ emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -800,7 +800,7 @@ int blt_block_copy(int i915,
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.rsvd1 = ctx ? ctx->id : 0;
execbuf.flags = e ? e->flags : I915_EXEC_BLT;
- ret = __gem_execbuf(i915, &execbuf);
+ ret = __gem_execbuf(fd, &execbuf);
return ret;
}
@@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
/**
* emit_blt_ctrl_surf_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ahnd: allocator handle
* @surf: blitter data for ctrl-surf-copy
* @bb_pos: position at which insert block copy commands
@@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
* Returns:
* Next write position in batch.
*/
-uint64_t emit_blt_ctrl_surf_copy(int i915,
+uint64_t emit_blt_ctrl_surf_copy(int fd,
uint64_t ahnd,
const struct blt_ctrl_surf_copy_data *surf,
uint64_t bb_pos,
@@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
- alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
+ alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
data.dw00.client = 0x2;
data.dw00.opcode = 0x48;
@@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
data.dw04.dst_address_hi = dst_offset >> 32;
data.dw04.dst_mocs = surf->dst.mocs;
- bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
+ bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
PROT_READ | PROT_WRITE);
igt_assert(bb_pos + sizeof(data) < surf->bb.size);
@@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
/**
* blt_ctrl_surf_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ctx: intel_ctx_t context
* @e: blitter engine for @ctx
* @ahnd: allocator handle
@@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
* Returns:
* execbuffer status.
*/
-int blt_ctrl_surf_copy(int i915,
+int blt_ctrl_surf_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
@@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
- alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
+ alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
- emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
+ emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.flags = e ? e->flags : I915_EXEC_BLT;
execbuf.rsvd1 = ctx ? ctx->id : 0;
- gem_execbuf(i915, &execbuf);
+ gem_execbuf(fd, &execbuf);
put_offset(ahnd, surf->dst.handle);
put_offset(ahnd, surf->src.handle);
put_offset(ahnd, surf->bb.handle);
@@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
/**
* emit_blt_fast_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ahnd: allocator handle
* @blt: blitter data for fast-copy (same as for block-copy but doesn't use
* compression fields).
@@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
* Returns:
* Next write position in batch.
*/
-uint64_t emit_blt_fast_copy(int i915,
+uint64_t emit_blt_fast_copy(int fd,
uint64_t ahnd,
const struct blt_copy_data *blt,
uint64_t bb_pos,
@@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
uint32_t bbe = MI_BATCH_BUFFER_END;
uint32_t *bb;
- alignment = gem_detect_safe_alignment(i915);
+ alignment = gem_detect_safe_alignment(fd);
data.dw00.client = 0x2;
data.dw00.opcode = 0x42;
@@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
data.dw08.src_address_lo = src_offset;
data.dw09.src_address_hi = src_offset >> 32;
- bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
+ bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
PROT_READ | PROT_WRITE);
igt_assert(bb_pos + sizeof(data) < blt->bb.size);
@@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
/**
* blt_fast_copy:
- * @i915: drm fd
+ * @fd: drm fd
* @ctx: intel_ctx_t context
* @e: blitter engine for @ctx
* @ahnd: allocator handle
@@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
* Returns:
* execbuffer status.
*/
-int blt_fast_copy(int i915,
+int blt_fast_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
@@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
uint64_t dst_offset, src_offset, bb_offset, alignment;
int ret;
- alignment = gem_detect_safe_alignment(i915);
+ alignment = gem_detect_safe_alignment(fd);
src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
- emit_blt_fast_copy(i915, ahnd, blt, 0, true);
+ emit_blt_fast_copy(fd, ahnd, blt, 0, true);
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.rsvd1 = ctx ? ctx->id : 0;
execbuf.flags = e ? e->flags : I915_EXEC_BLT;
- ret = __gem_execbuf(i915, &execbuf);
+ ret = __gem_execbuf(fd, &execbuf);
put_offset(ahnd, blt->dst.handle);
put_offset(ahnd, blt->src.handle);
put_offset(ahnd, blt->bb.handle);
@@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
}
struct blt_copy_object *
-blt_create_object(int i915, uint32_t region,
+blt_create_object(int fd, uint32_t region,
uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
enum blt_tiling_type tiling,
enum blt_compression compression,
@@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
obj = calloc(1, sizeof(*obj));
obj->size = size;
- igt_assert(__gem_create_in_memory_regions(i915, &handle,
+ igt_assert(__gem_create_in_memory_regions(fd, &handle,
&size, region) == 0);
blt_set_object(obj, handle, size, region, mocs, tiling,
@@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
if (create_mapping)
- obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
+ obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
PROT_READ | PROT_WRITE);
return obj;
}
-void blt_destroy_object(int i915, struct blt_copy_object *obj)
+void blt_destroy_object(int fd, struct blt_copy_object *obj)
{
if (obj->ptr)
munmap(obj->ptr, obj->size);
- gem_close(i915, obj->handle);
+ gem_close(fd, obj->handle);
free(obj);
}
@@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
/**
* blt_surface_fill_rect:
- * @i915: drm fd
+ * @fd: drm fd
* @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
* @width: width
* @height: height
@@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
* Function fills surface @width x @height * 24bpp with color gradient
* (internally uses ARGB where A == 0xff, see Cairo docs).
*/
-void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
+void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
uint32_t width, uint32_t height)
{
cairo_surface_t *surface;
@@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
void *map = obj->ptr;
if (!map)
- map = gem_mmap__device_coherent(i915, obj->handle, 0,
+ map = gem_mmap__device_coherent(fd, obj->handle, 0,
obj->size, PROT_READ | PROT_WRITE);
surface = cairo_image_surface_create_for_data(map,
@@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
/**
* blt_surface_to_png:
- * @i915: drm fd
+ * @fd: drm fd
* @run_id: prefix id to allow grouping files stored from single run
* @fileid: file identifier
* @obj: blitter copy object (@blt_copy_object) to save to png
@@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
*
* Function save surface to png file. Assumes ARGB format where A == 0xff.
*/
-void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
+void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
const struct blt_copy_object *obj,
uint32_t width, uint32_t height)
{
@@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
obj->compression ? "compressed" : "uncompressed");
if (!map)
- map = gem_mmap__device_coherent(i915, obj->handle, 0,
+ map = gem_mmap__device_coherent(fd, obj->handle, 0,
obj->size, PROT_READ);
format = CAIRO_FORMAT_RGB24;
surface = cairo_image_surface_create_for_data(map,
diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
similarity index 86%
rename from lib/i915/i915_blt.h
rename to lib/intel_blt.h
index a5f0edd154..0cbe881f4a 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/intel_blt.h
@@ -3,11 +3,14 @@
* Copyright © 2022 Intel Corporation
*/
+#ifndef __INTEL_BLT_H__
+#define __INTEL_BLT_H__
+
/**
- * SECTION:i915_blt
+ * SECTION:intel_blt
* @short_description: i915 blitter library
* @title: Blitter library
- * @include: i915_blt.h
+ * @include: intel_blt.h
*
* # Introduction
*
@@ -95,7 +98,7 @@ struct blt_copy_batch {
/* Common for block-copy and fast-copy */
struct blt_copy_data {
- int i915;
+ int fd;
struct blt_copy_object src;
struct blt_copy_object dst;
struct blt_copy_batch bb;
@@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
};
struct blt_ctrl_surf_copy_data {
- int i915;
+ int fd;
struct blt_ctrl_surf_copy_object src;
struct blt_ctrl_surf_copy_object dst;
struct blt_copy_batch bb;
@@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
enum blt_cmd_type cmd,
uint32_t prop);
-bool blt_has_block_copy(int i915);
-bool blt_has_fast_copy(int i915);
-bool blt_has_xy_src_copy(int i915);
+bool blt_has_block_copy(int fd);
+bool blt_has_fast_copy(int fd);
+bool blt_has_xy_src_copy(int fd);
-bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
-bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
-bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
-bool blt_block_copy_supports_compression(int i915);
-bool blt_uses_extended_block_copy(int i915);
+bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
+bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
+bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
+bool blt_block_copy_supports_compression(int fd);
+bool blt_uses_extended_block_copy(int fd);
const char *blt_tiling_name(enum blt_tiling_type tiling);
-uint64_t emit_blt_block_copy(int i915,
+uint64_t emit_blt_block_copy(int fd,
uint64_t ahnd,
const struct blt_copy_data *blt,
const struct blt_block_copy_data_ext *ext,
uint64_t bb_pos,
bool emit_bbe);
-int blt_block_copy(int i915,
+int blt_block_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
const struct blt_copy_data *blt,
const struct blt_block_copy_data_ext *ext);
-uint64_t emit_blt_ctrl_surf_copy(int i915,
+uint64_t emit_blt_ctrl_surf_copy(int fd,
uint64_t ahnd,
const struct blt_ctrl_surf_copy_data *surf,
uint64_t bb_pos,
bool emit_bbe);
-int blt_ctrl_surf_copy(int i915,
+int blt_ctrl_surf_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
const struct blt_ctrl_surf_copy_data *surf);
-uint64_t emit_blt_fast_copy(int i915,
+uint64_t emit_blt_fast_copy(int fd,
uint64_t ahnd,
const struct blt_copy_data *blt,
uint64_t bb_pos,
bool emit_bbe);
-int blt_fast_copy(int i915,
+int blt_fast_copy(int fd,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint64_t ahnd,
@@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
uint32_t handle, uint64_t size, uint32_t region);
struct blt_copy_object *
-blt_create_object(int i915, uint32_t region,
+blt_create_object(int fd, uint32_t region,
uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
enum blt_tiling_type tiling,
enum blt_compression compression,
enum blt_compression_type compression_type,
bool create_mapping);
-void blt_destroy_object(int i915, struct blt_copy_object *obj);
+void blt_destroy_object(int fd, struct blt_copy_object *obj);
void blt_set_object(struct blt_copy_object *obj,
uint32_t handle, uint64_t size, uint32_t region,
uint8_t mocs, enum blt_tiling_type tiling,
@@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
void blt_surface_info(const char *info,
const struct blt_copy_object *obj);
-void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
+void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
uint32_t width, uint32_t height);
-void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
+void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
const struct blt_copy_object *obj,
uint32_t width, uint32_t height);
+
+#endif
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index accfa90ef0..84cf1799e9 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -31,7 +31,7 @@
#include <pciaccess.h>
#include <stdbool.h>
-#include "i915/intel_cmds_info.h"
+#include "intel_cmds_info.h"
#define BIT(x) (1ul <<(x))
diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
similarity index 99%
rename from lib/i915/intel_cmds_info.c
rename to lib/intel_cmds_info.c
index 166fb4740c..151cb5f724 100644
--- a/lib/i915/intel_cmds_info.c
+++ b/lib/intel_cmds_info.c
@@ -7,7 +7,7 @@
#include <stddef.h>
#include "intel_chipset.h"
-#include "i915/intel_cmds_info.h"
+#include "intel_cmds_info.h"
#define BLT_INFO(_cmd, _tiling) { \
.blt_cmd_type = _cmd, \
diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
similarity index 100%
rename from lib/i915/intel_cmds_info.h
rename to lib/intel_cmds_info.h
diff --git a/lib/meson.build b/lib/meson.build
index 8e99770837..3e1ecdee2b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -13,8 +13,6 @@ lib_sources = [
'i915/gem_vm.c',
'i915/intel_decode.c',
'i915/intel_memory_region.c',
- 'i915/intel_cmds_info.c',
- 'i915/i915_blt.c',
'i915/i915_crc.c',
'igt_collection.c',
'igt_color_encoding.c',
@@ -54,8 +52,10 @@ lib_sources = [
'intel_allocator_reloc.c',
'intel_allocator_simple.c',
'intel_batchbuffer.c',
+ 'intel_blt.c',
'intel_bufops.c',
'intel_chipset.c',
+ 'intel_cmds_info.c',
'intel_ctx.c',
'intel_device_info.c',
'intel_mmio.c',
@@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
lin_igt_chipset_build = static_library('igt_chipset',
['intel_chipset.c',
'intel_device_info.c',
- 'i915/intel_cmds_info.c'],
+ 'intel_cmds_info.c'],
include_directories : inc)
lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
@@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
'igt_list.c',
'igt_tools_stub.c',
'intel_device_info.c',
- 'i915/intel_cmds_info.c',
+ 'intel_cmds_info.c',
],
dependencies : scan_dep,
include_directories : inc)
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index 85ca86eed1..fefb5d996f 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -40,7 +40,7 @@
#include "intel_bufops.h"
#include "i915/gem_vm.h"
#include "i915/i915_crc.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
/**
* TEST: api intel bb
* Description: intel_bb API check.
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 681fe04666..f058644ba5 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -27,7 +27,7 @@
#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
/**
* TEST: gem blits
* Category: Infrastructure
diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
index 7af427d7e4..55e466a3ee 100644
--- a/tests/i915/gem_caching.c
+++ b/tests/i915/gem_caching.c
@@ -39,7 +39,7 @@
#include "i915/gem.h"
#include "igt.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
/**
* TEST: gem caching
* Category: Desktop client
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index d38ab49a4b..1b2311f698 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -13,7 +13,7 @@
#include "i915/gem.h"
#include "i915/gem_create.h"
#include "lib/intel_chipset.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
#include "intel_mocs.h"
/**
* TEST: gem ccs
@@ -167,7 +167,7 @@ static void surf_copy(int i915,
ccs = gem_create(i915, ccssize);
ccs2 = gem_create(i915, ccssize);
- surf.i915 = i915;
+ surf.fd = i915;
surf.print_bb = param.print_bb;
set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
uc_mocs, BLT_INDIRECT_ACCESS);
diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
index 89f89d212b..3ec02c22e2 100644
--- a/tests/i915/gem_exercise_blt.c
+++ b/tests/i915/gem_exercise_blt.c
@@ -8,7 +8,7 @@
#include "i915/gem.h"
#include "i915/gem_create.h"
#include "lib/intel_chipset.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
#include "intel_mocs.h"
/**
* TEST: gem exercise blt
diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
index bdbbf99efe..32b9052507 100644
--- a/tests/i915/gem_linear_blits.c
+++ b/tests/i915/gem_linear_blits.c
@@ -48,7 +48,7 @@
#include "i915/gem_create.h"
#include "igt.h"
#include "igt_types.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
/**
* TEST: gem linear blits
* Description: Test doing many blits with a working set larger than the aperture size.
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 8211edbe30..0ef1ceb13f 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -22,7 +22,7 @@
#include <sys/time.h>
#include <sys/wait.h>
#include "drm.h"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
#include "intel_mocs.h"
/**
* TEST: gem lmem swapping
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index e9235a6898..4f9b854cc0 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -66,7 +66,7 @@
#include "sw_sync.h"
#include "eviction_common.c"
-#include "i915/i915_blt.h"
+#include "intel_blt.h"
/**
* TEST: gem userptr blits
* Run type: FULL
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
@ 2023-06-23 9:11 ` Karolina Stolarek
2023-06-23 10:10 ` Zbigniew Kempczyński
2023-06-23 9:33 ` Karolina Stolarek
` (4 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Karolina Stolarek @ 2023-06-23 9:11 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
Hi Zbigniew,
First of all, did you use any script/sed/whatever to rename fields? If
so, it would be good to mention it in the commit message.
Just started to review it, but for now, I have only comment (see below).
On 23.06.2023 10:46, Zbigniew Kempczyński wrote:
> Migrate i915/i915_blt -> intel_blt as a preparation step before
> extending to support xe. It is a simple move of files and rename
> of i915 -> fd field.
>
> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> ---
> .../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
> lib/intel_batchbuffer.c | 2 +-
> lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
> lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
> lib/intel_chipset.h | 2 +-
> lib/{i915 => }/intel_cmds_info.c | 2 +-
> lib/{i915 => }/intel_cmds_info.h | 0
> lib/meson.build | 8 +-
> tests/i915/api_intel_bb.c | 2 +-
> tests/i915/gem_blits.c | 2 +-
> tests/i915/gem_caching.c | 2 +-
> tests/i915/gem_ccs.c | 4 +-
> tests/i915/gem_exercise_blt.c | 2 +-
> tests/i915/gem_linear_blits.c | 2 +-
> tests/i915/gem_lmem_swapping.c | 2 +-
> tests/i915/gem_userptr_blits.c | 2 +-
> 16 files changed, 116 insertions(+), 111 deletions(-)
> rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
> rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
> rename lib/{i915 => }/intel_cmds_info.c (99%)
> rename lib/{i915 => }/intel_cmds_info.h (100%)
>
> diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> index 102c8a8978..9085eb924e 100644
> --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> @@ -64,7 +64,7 @@
> <xi:include href="xml/gem_engine_topology.xml"/>
> <xi:include href="xml/gem_scheduler.xml"/>
> <xi:include href="xml/gem_submission.xml"/>
> - <xi:include href="xml/i915_blt.xml"/>
> + <xi:include href="xml/intel_blt.xml"/>
> <xi:include href="xml/i915_crc.xml"/>
> <xi:include href="xml/intel_ctx.xml"/>
> </chapter>
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 3cd680072e..186f65affe 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -32,7 +32,7 @@
> #include "huc_copy.h"
> #include "i915/gem_create.h"
> #include "i915/gem_mman.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "igt_aux.h"
> #include "igt_syncobj.h"
> #include "intel_batchbuffer.h"
> diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
> similarity index 92%
> rename from lib/i915/i915_blt.c
> rename to lib/intel_blt.c
> index ef67fe26f3..28a7400942 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/intel_blt.c
> @@ -10,8 +10,8 @@
> #include <cairo.h>
> #include "drm.h"
> #include "igt.h"
> -#include "gem_create.h"
> -#include "i915_blt.h"
> +#include "i915/gem_create.h"
> +#include "intel_blt.h"
>
> #define BITRANGE(start, end) (end - start + 1)
> #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
> @@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
>
> /**
> * blt_has_block_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy is supported by @i915 device
> + * Check if block copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_block_copy(int i915)
> +bool blt_has_block_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_BLOCK_COPY);
> }
>
> /**
> * blt_has_fast_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if fast copy is supported by @i915 device
> + * Check if fast copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_fast_copy(int i915)
> +bool blt_has_fast_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_FAST_COPY);
> }
>
> /**
> * blt_has_xy_src_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if XY src copy is supported by @i915 device
> + * Check if XY src copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_xy_src_copy(int i915)
> +bool blt_has_xy_src_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_SRC_COPY);
> }
>
> /**
> * blt_fast_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if fast copy provided by @i915 device supports @tiling format
> + * Check if fast copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
> }
>
> /**
> * blt_block_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if block copy provided by @i915 device supports @tiling format
> + * Check if block copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
> }
>
> /**
> * blt_xy_src_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if XY src copy provided by @i915 device supports @tiling format
> + * Check if XY src copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
> }
>
> /**
> * blt_block_copy_supports_compression
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy provided by @i915 device supports compression.
> + * Check if block copy provided by @fd device supports compression.
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_block_copy_supports_compression(int i915)
> +bool blt_block_copy_supports_compression(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
> BLT_CMD_SUPPORTS_COMPRESSION);
> @@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
>
> /**
> * blt_uses_extended_block_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy provided by @i915 device uses an extended version
> + * Check if block copy provided by @fd device uses an extended version
> * of the command.
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_uses_extended_block_copy(int i915)
> +bool blt_uses_extended_block_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
> }
> @@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
>
> /**
> * emit_blt_block_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
> * @ext: extended blitter data (for DG2+, supports flatccs compression)
> @@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_block_copy(int i915,
> +uint64_t emit_blt_block_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext,
> @@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
> igt_assert_f(ahnd, "block-copy supports softpin only\n");
> igt_assert_f(blt, "block-copy requires data to do blit\n");
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> fill_data(&data, blt, src_offset, dst_offset, ext);
>
> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> @@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
>
> /**
> * blt_block_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_block_copy(int i915,
> +int blt_block_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -779,12 +779,12 @@ int blt_block_copy(int i915,
> igt_assert_f(ahnd, "block-copy supports softpin only\n");
> igt_assert_f(blt, "block-copy requires data to do blit\n");
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> - emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
> + emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -800,7 +800,7 @@ int blt_block_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> - ret = __gem_execbuf(i915, &execbuf);
> + ret = __gem_execbuf(fd, &execbuf);
>
> return ret;
> }
> @@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
>
> /**
> * emit_blt_ctrl_surf_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @surf: blitter data for ctrl-surf-copy
> * @bb_pos: position at which insert block copy commands
> @@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_ctrl_surf_copy(int i915,
> +uint64_t emit_blt_ctrl_surf_copy(int fd,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf,
> uint64_t bb_pos,
> @@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>
> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
>
> data.dw00.client = 0x2;
> data.dw00.opcode = 0x48;
> @@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> data.dw04.dst_address_hi = dst_offset >> 32;
> data.dw04.dst_mocs = surf->dst.mocs;
>
> - bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
> + bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < surf->bb.size);
> @@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>
> /**
> * blt_ctrl_surf_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_ctrl_surf_copy(int i915,
> +int blt_ctrl_surf_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>
> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
> dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
> bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
>
> - emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
> + emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> - gem_execbuf(i915, &execbuf);
> + gem_execbuf(fd, &execbuf);
> put_offset(ahnd, surf->dst.handle);
> put_offset(ahnd, surf->src.handle);
> put_offset(ahnd, surf->bb.handle);
> @@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
>
> /**
> * emit_blt_fast_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @blt: blitter data for fast-copy (same as for block-copy but doesn't use
> * compression fields).
> @@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_fast_copy(int i915,
> +uint64_t emit_blt_fast_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> uint64_t bb_pos,
> @@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
> uint32_t bbe = MI_BATCH_BUFFER_END;
> uint32_t *bb;
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
>
> data.dw00.client = 0x2;
> data.dw00.opcode = 0x42;
> @@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
> data.dw08.src_address_lo = src_offset;
> data.dw09.src_address_hi = src_offset >> 32;
>
> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> @@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
>
> /**
> * blt_fast_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_fast_copy(int i915,
> +int blt_fast_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
> uint64_t dst_offset, src_offset, bb_offset, alignment;
> int ret;
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
>
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> - emit_blt_fast_copy(i915, ahnd, blt, 0, true);
> + emit_blt_fast_copy(fd, ahnd, blt, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> - ret = __gem_execbuf(i915, &execbuf);
> + ret = __gem_execbuf(fd, &execbuf);
> put_offset(ahnd, blt->dst.handle);
> put_offset(ahnd, blt->src.handle);
> put_offset(ahnd, blt->bb.handle);
> @@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
> }
>
> struct blt_copy_object *
> -blt_create_object(int i915, uint32_t region,
> +blt_create_object(int fd, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> enum blt_tiling_type tiling,
> enum blt_compression compression,
> @@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
> obj = calloc(1, sizeof(*obj));
>
> obj->size = size;
> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> + igt_assert(__gem_create_in_memory_regions(fd, &handle,
> &size, region) == 0);
>
> blt_set_object(obj, handle, size, region, mocs, tiling,
> @@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
> blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
>
> if (create_mapping)
> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> + obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
> PROT_READ | PROT_WRITE);
>
> return obj;
> }
>
> -void blt_destroy_object(int i915, struct blt_copy_object *obj)
> +void blt_destroy_object(int fd, struct blt_copy_object *obj)
> {
> if (obj->ptr)
> munmap(obj->ptr, obj->size);
>
> - gem_close(i915, obj->handle);
> + gem_close(fd, obj->handle);
> free(obj);
> }
>
> @@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>
> /**
> * blt_surface_fill_rect:
> - * @i915: drm fd
> + * @fd: drm fd
> * @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
> * @width: width
> * @height: height
> @@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> * Function fills surface @width x @height * 24bpp with color gradient
> * (internally uses ARGB where A == 0xff, see Cairo docs).
> */
> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> uint32_t width, uint32_t height)
> {
> cairo_surface_t *surface;
> @@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> void *map = obj->ptr;
>
> if (!map)
> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> obj->size, PROT_READ | PROT_WRITE);
>
> surface = cairo_image_surface_create_for_data(map,
> @@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
>
> /**
> * blt_surface_to_png:
> - * @i915: drm fd
> + * @fd: drm fd
> * @run_id: prefix id to allow grouping files stored from single run
> * @fileid: file identifier
> * @obj: blitter copy object (@blt_copy_object) to save to png
> @@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> *
> * Function save surface to png file. Assumes ARGB format where A == 0xff.
> */
> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> const struct blt_copy_object *obj,
> uint32_t width, uint32_t height)
> {
> @@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> obj->compression ? "compressed" : "uncompressed");
>
> if (!map)
> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> obj->size, PROT_READ);
> format = CAIRO_FORMAT_RGB24;
> surface = cairo_image_surface_create_for_data(map,
> diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
> similarity index 86%
> rename from lib/i915/i915_blt.h
> rename to lib/intel_blt.h
> index a5f0edd154..0cbe881f4a 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/intel_blt.h
> @@ -3,11 +3,14 @@
> * Copyright © 2022 Intel Corporation
> */
>
> +#ifndef __INTEL_BLT_H__
> +#define __INTEL_BLT_H__
> +
> /**
> - * SECTION:i915_blt
> + * SECTION:intel_blt
> * @short_description: i915 blitter library
You've missed that line, could you please update it?
Thanks,
Karolina
> * @title: Blitter library
> - * @include: i915_blt.h
> + * @include: intel_blt.h
> *
> * # Introduction
> *
> @@ -95,7 +98,7 @@ struct blt_copy_batch {
>
> /* Common for block-copy and fast-copy */
> struct blt_copy_data {
> - int i915;
> + int fd;
> struct blt_copy_object src;
> struct blt_copy_object dst;
> struct blt_copy_batch bb;
> @@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
> };
>
> struct blt_ctrl_surf_copy_data {
> - int i915;
> + int fd;
> struct blt_ctrl_surf_copy_object src;
> struct blt_ctrl_surf_copy_object dst;
> struct blt_copy_batch bb;
> @@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> enum blt_cmd_type cmd,
> uint32_t prop);
>
> -bool blt_has_block_copy(int i915);
> -bool blt_has_fast_copy(int i915);
> -bool blt_has_xy_src_copy(int i915);
> +bool blt_has_block_copy(int fd);
> +bool blt_has_fast_copy(int fd);
> +bool blt_has_xy_src_copy(int fd);
>
> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_block_copy_supports_compression(int i915);
> -bool blt_uses_extended_block_copy(int i915);
> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_block_copy_supports_compression(int fd);
> +bool blt_uses_extended_block_copy(int fd);
>
> const char *blt_tiling_name(enum blt_tiling_type tiling);
>
> -uint64_t emit_blt_block_copy(int i915,
> +uint64_t emit_blt_block_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_block_copy(int i915,
> +int blt_block_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext);
>
> -uint64_t emit_blt_ctrl_surf_copy(int i915,
> +uint64_t emit_blt_ctrl_surf_copy(int fd,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_ctrl_surf_copy(int i915,
> +int blt_ctrl_surf_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf);
>
> -uint64_t emit_blt_fast_copy(int i915,
> +uint64_t emit_blt_fast_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_fast_copy(int i915,
> +int blt_fast_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
> uint32_t handle, uint64_t size, uint32_t region);
>
> struct blt_copy_object *
> -blt_create_object(int i915, uint32_t region,
> +blt_create_object(int fd, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type,
> bool create_mapping);
> -void blt_destroy_object(int i915, struct blt_copy_object *obj);
> +void blt_destroy_object(int fd, struct blt_copy_object *obj);
> void blt_set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> uint8_t mocs, enum blt_tiling_type tiling,
> @@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>
> void blt_surface_info(const char *info,
> const struct blt_copy_object *obj);
> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> uint32_t width, uint32_t height);
> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> const struct blt_copy_object *obj,
> uint32_t width, uint32_t height);
> +
> +#endif
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index accfa90ef0..84cf1799e9 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -31,7 +31,7 @@
> #include <pciaccess.h>
> #include <stdbool.h>
>
> -#include "i915/intel_cmds_info.h"
> +#include "intel_cmds_info.h"
>
> #define BIT(x) (1ul <<(x))
>
> diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
> similarity index 99%
> rename from lib/i915/intel_cmds_info.c
> rename to lib/intel_cmds_info.c
> index 166fb4740c..151cb5f724 100644
> --- a/lib/i915/intel_cmds_info.c
> +++ b/lib/intel_cmds_info.c
> @@ -7,7 +7,7 @@
> #include <stddef.h>
>
> #include "intel_chipset.h"
> -#include "i915/intel_cmds_info.h"
> +#include "intel_cmds_info.h"
>
> #define BLT_INFO(_cmd, _tiling) { \
> .blt_cmd_type = _cmd, \
> diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
> similarity index 100%
> rename from lib/i915/intel_cmds_info.h
> rename to lib/intel_cmds_info.h
> diff --git a/lib/meson.build b/lib/meson.build
> index 8e99770837..3e1ecdee2b 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -13,8 +13,6 @@ lib_sources = [
> 'i915/gem_vm.c',
> 'i915/intel_decode.c',
> 'i915/intel_memory_region.c',
> - 'i915/intel_cmds_info.c',
> - 'i915/i915_blt.c',
> 'i915/i915_crc.c',
> 'igt_collection.c',
> 'igt_color_encoding.c',
> @@ -54,8 +52,10 @@ lib_sources = [
> 'intel_allocator_reloc.c',
> 'intel_allocator_simple.c',
> 'intel_batchbuffer.c',
> + 'intel_blt.c',
> 'intel_bufops.c',
> 'intel_chipset.c',
> + 'intel_cmds_info.c',
> 'intel_ctx.c',
> 'intel_device_info.c',
> 'intel_mmio.c',
> @@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
> lin_igt_chipset_build = static_library('igt_chipset',
> ['intel_chipset.c',
> 'intel_device_info.c',
> - 'i915/intel_cmds_info.c'],
> + 'intel_cmds_info.c'],
> include_directories : inc)
>
> lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
> @@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
> 'igt_list.c',
> 'igt_tools_stub.c',
> 'intel_device_info.c',
> - 'i915/intel_cmds_info.c',
> + 'intel_cmds_info.c',
> ],
> dependencies : scan_dep,
> include_directories : inc)
> diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
> index 85ca86eed1..fefb5d996f 100644
> --- a/tests/i915/api_intel_bb.c
> +++ b/tests/i915/api_intel_bb.c
> @@ -40,7 +40,7 @@
> #include "intel_bufops.h"
> #include "i915/gem_vm.h"
> #include "i915/i915_crc.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: api intel bb
> * Description: intel_bb API check.
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 681fe04666..f058644ba5 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -27,7 +27,7 @@
> #include "i915/gem_create.h"
> #include "igt.h"
> #include "igt_x86.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem blits
> * Category: Infrastructure
> diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
> index 7af427d7e4..55e466a3ee 100644
> --- a/tests/i915/gem_caching.c
> +++ b/tests/i915/gem_caching.c
> @@ -39,7 +39,7 @@
>
> #include "i915/gem.h"
> #include "igt.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem caching
> * Category: Desktop client
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index d38ab49a4b..1b2311f698 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -13,7 +13,7 @@
> #include "i915/gem.h"
> #include "i915/gem_create.h"
> #include "lib/intel_chipset.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem ccs
> @@ -167,7 +167,7 @@ static void surf_copy(int i915,
> ccs = gem_create(i915, ccssize);
> ccs2 = gem_create(i915, ccssize);
>
> - surf.i915 = i915;
> + surf.fd = i915;
> surf.print_bb = param.print_bb;
> set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
> uc_mocs, BLT_INDIRECT_ACCESS);
> diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
> index 89f89d212b..3ec02c22e2 100644
> --- a/tests/i915/gem_exercise_blt.c
> +++ b/tests/i915/gem_exercise_blt.c
> @@ -8,7 +8,7 @@
> #include "i915/gem.h"
> #include "i915/gem_create.h"
> #include "lib/intel_chipset.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem exercise blt
> diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
> index bdbbf99efe..32b9052507 100644
> --- a/tests/i915/gem_linear_blits.c
> +++ b/tests/i915/gem_linear_blits.c
> @@ -48,7 +48,7 @@
> #include "i915/gem_create.h"
> #include "igt.h"
> #include "igt_types.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem linear blits
> * Description: Test doing many blits with a working set larger than the aperture size.
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 8211edbe30..0ef1ceb13f 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -22,7 +22,7 @@
> #include <sys/time.h>
> #include <sys/wait.h>
> #include "drm.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem lmem swapping
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index e9235a6898..4f9b854cc0 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -66,7 +66,7 @@
> #include "sw_sync.h"
>
> #include "eviction_common.c"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem userptr blits
> * Run type: FULL
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
2023-06-23 9:11 ` Karolina Stolarek
@ 2023-06-23 9:33 ` Karolina Stolarek
2023-06-23 11:02 ` Zbigniew Kempczyński
2023-06-23 10:06 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Karolina Stolarek @ 2023-06-23 9:33 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
Hi Zbigniew,
I read through this, and apart from that "@short_description" line in
intel_blt.h, I think the re-name went well. Once you fixed it, you have my:
Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
The only other nit would be the patch subject. I'd say that it renames
the blit library to be more generic, and keep the description as it is.
But it's a minor thing, and the final decision is yours.
A follow-up question -- do you plan to change or update blitter lib
tests to support Xe? gem_exercise_blt/gem_ccs tests still refer to i915.
All the best,
Karolina
On 23.06.2023 10:46, Zbigniew Kempczyński wrote:
> Migrate i915/i915_blt -> intel_blt as a preparation step before
> extending to support xe. It is a simple move of files and rename
> of i915 -> fd field.
>
> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> ---
> .../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
> lib/intel_batchbuffer.c | 2 +-
> lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
> lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
> lib/intel_chipset.h | 2 +-
> lib/{i915 => }/intel_cmds_info.c | 2 +-
> lib/{i915 => }/intel_cmds_info.h | 0
> lib/meson.build | 8 +-
> tests/i915/api_intel_bb.c | 2 +-
> tests/i915/gem_blits.c | 2 +-
> tests/i915/gem_caching.c | 2 +-
> tests/i915/gem_ccs.c | 4 +-
> tests/i915/gem_exercise_blt.c | 2 +-
> tests/i915/gem_linear_blits.c | 2 +-
> tests/i915/gem_lmem_swapping.c | 2 +-
> tests/i915/gem_userptr_blits.c | 2 +-
> 16 files changed, 116 insertions(+), 111 deletions(-)
> rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
> rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
> rename lib/{i915 => }/intel_cmds_info.c (99%)
> rename lib/{i915 => }/intel_cmds_info.h (100%)
>
> diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> index 102c8a8978..9085eb924e 100644
> --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> @@ -64,7 +64,7 @@
> <xi:include href="xml/gem_engine_topology.xml"/>
> <xi:include href="xml/gem_scheduler.xml"/>
> <xi:include href="xml/gem_submission.xml"/>
> - <xi:include href="xml/i915_blt.xml"/>
> + <xi:include href="xml/intel_blt.xml"/>
> <xi:include href="xml/i915_crc.xml"/>
> <xi:include href="xml/intel_ctx.xml"/>
> </chapter>
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 3cd680072e..186f65affe 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -32,7 +32,7 @@
> #include "huc_copy.h"
> #include "i915/gem_create.h"
> #include "i915/gem_mman.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "igt_aux.h"
> #include "igt_syncobj.h"
> #include "intel_batchbuffer.h"
> diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
> similarity index 92%
> rename from lib/i915/i915_blt.c
> rename to lib/intel_blt.c
> index ef67fe26f3..28a7400942 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/intel_blt.c
> @@ -10,8 +10,8 @@
> #include <cairo.h>
> #include "drm.h"
> #include "igt.h"
> -#include "gem_create.h"
> -#include "i915_blt.h"
> +#include "i915/gem_create.h"
> +#include "intel_blt.h"
>
> #define BITRANGE(start, end) (end - start + 1)
> #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
> @@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
>
> /**
> * blt_has_block_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy is supported by @i915 device
> + * Check if block copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_block_copy(int i915)
> +bool blt_has_block_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_BLOCK_COPY);
> }
>
> /**
> * blt_has_fast_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if fast copy is supported by @i915 device
> + * Check if fast copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_fast_copy(int i915)
> +bool blt_has_fast_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_FAST_COPY);
> }
>
> /**
> * blt_has_xy_src_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if XY src copy is supported by @i915 device
> + * Check if XY src copy is supported by @fd device
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_has_xy_src_copy(int i915)
> +bool blt_has_xy_src_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_supports_command(cmds_info, XY_SRC_COPY);
> }
>
> /**
> * blt_fast_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if fast copy provided by @i915 device supports @tiling format
> + * Check if fast copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
> }
>
> /**
> * blt_block_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if block copy provided by @i915 device supports @tiling format
> + * Check if block copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
> }
>
> /**
> * blt_xy_src_copy_supports_tiling
> - * @i915: drm fd
> + * @fd: drm fd
> * @tiling: tiling format
> *
> - * Check if XY src copy provided by @i915 device supports @tiling format
> + * Check if XY src copy provided by @fd device supports @tiling format
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
> }
>
> /**
> * blt_block_copy_supports_compression
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy provided by @i915 device supports compression.
> + * Check if block copy provided by @fd device supports compression.
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_block_copy_supports_compression(int i915)
> +bool blt_block_copy_supports_compression(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
> BLT_CMD_SUPPORTS_COMPRESSION);
> @@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
>
> /**
> * blt_uses_extended_block_copy
> - * @i915: drm fd
> + * @fd: drm fd
> *
> - * Check if block copy provided by @i915 device uses an extended version
> + * Check if block copy provided by @fd device uses an extended version
> * of the command.
> *
> * Returns:
> * true if it does, false otherwise.
> */
> -bool blt_uses_extended_block_copy(int i915)
> +bool blt_uses_extended_block_copy(int fd)
> {
> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>
> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
> }
> @@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
>
> /**
> * emit_blt_block_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
> * @ext: extended blitter data (for DG2+, supports flatccs compression)
> @@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_block_copy(int i915,
> +uint64_t emit_blt_block_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext,
> @@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
> igt_assert_f(ahnd, "block-copy supports softpin only\n");
> igt_assert_f(blt, "block-copy requires data to do blit\n");
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> fill_data(&data, blt, src_offset, dst_offset, ext);
>
> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> @@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
>
> /**
> * blt_block_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_block_copy(int i915,
> +int blt_block_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -779,12 +779,12 @@ int blt_block_copy(int i915,
> igt_assert_f(ahnd, "block-copy supports softpin only\n");
> igt_assert_f(blt, "block-copy requires data to do blit\n");
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> - emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
> + emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -800,7 +800,7 @@ int blt_block_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> - ret = __gem_execbuf(i915, &execbuf);
> + ret = __gem_execbuf(fd, &execbuf);
>
> return ret;
> }
> @@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
>
> /**
> * emit_blt_ctrl_surf_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @surf: blitter data for ctrl-surf-copy
> * @bb_pos: position at which insert block copy commands
> @@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_ctrl_surf_copy(int i915,
> +uint64_t emit_blt_ctrl_surf_copy(int fd,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf,
> uint64_t bb_pos,
> @@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>
> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
>
> data.dw00.client = 0x2;
> data.dw00.opcode = 0x48;
> @@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> data.dw04.dst_address_hi = dst_offset >> 32;
> data.dw04.dst_mocs = surf->dst.mocs;
>
> - bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
> + bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < surf->bb.size);
> @@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>
> /**
> * blt_ctrl_surf_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_ctrl_surf_copy(int i915,
> +int blt_ctrl_surf_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>
> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
> dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
> bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
>
> - emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
> + emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> - gem_execbuf(i915, &execbuf);
> + gem_execbuf(fd, &execbuf);
> put_offset(ahnd, surf->dst.handle);
> put_offset(ahnd, surf->src.handle);
> put_offset(ahnd, surf->bb.handle);
> @@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
>
> /**
> * emit_blt_fast_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ahnd: allocator handle
> * @blt: blitter data for fast-copy (same as for block-copy but doesn't use
> * compression fields).
> @@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> * Returns:
> * Next write position in batch.
> */
> -uint64_t emit_blt_fast_copy(int i915,
> +uint64_t emit_blt_fast_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> uint64_t bb_pos,
> @@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
> uint32_t bbe = MI_BATCH_BUFFER_END;
> uint32_t *bb;
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
>
> data.dw00.client = 0x2;
> data.dw00.opcode = 0x42;
> @@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
> data.dw08.src_address_lo = src_offset;
> data.dw09.src_address_hi = src_offset >> 32;
>
> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> PROT_READ | PROT_WRITE);
>
> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> @@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
>
> /**
> * blt_fast_copy:
> - * @i915: drm fd
> + * @fd: drm fd
> * @ctx: intel_ctx_t context
> * @e: blitter engine for @ctx
> * @ahnd: allocator handle
> @@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
> * Returns:
> * execbuffer status.
> */
> -int blt_fast_copy(int i915,
> +int blt_fast_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
> uint64_t dst_offset, src_offset, bb_offset, alignment;
> int ret;
>
> - alignment = gem_detect_safe_alignment(i915);
> + alignment = gem_detect_safe_alignment(fd);
>
> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>
> - emit_blt_fast_copy(i915, ahnd, blt, 0, true);
> + emit_blt_fast_copy(fd, ahnd, blt, 0, true);
>
> obj[0].offset = CANONICAL(dst_offset);
> obj[1].offset = CANONICAL(src_offset);
> @@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.rsvd1 = ctx ? ctx->id : 0;
> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> - ret = __gem_execbuf(i915, &execbuf);
> + ret = __gem_execbuf(fd, &execbuf);
> put_offset(ahnd, blt->dst.handle);
> put_offset(ahnd, blt->src.handle);
> put_offset(ahnd, blt->bb.handle);
> @@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
> }
>
> struct blt_copy_object *
> -blt_create_object(int i915, uint32_t region,
> +blt_create_object(int fd, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> enum blt_tiling_type tiling,
> enum blt_compression compression,
> @@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
> obj = calloc(1, sizeof(*obj));
>
> obj->size = size;
> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> + igt_assert(__gem_create_in_memory_regions(fd, &handle,
> &size, region) == 0);
>
> blt_set_object(obj, handle, size, region, mocs, tiling,
> @@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
> blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
>
> if (create_mapping)
> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> + obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
> PROT_READ | PROT_WRITE);
>
> return obj;
> }
>
> -void blt_destroy_object(int i915, struct blt_copy_object *obj)
> +void blt_destroy_object(int fd, struct blt_copy_object *obj)
> {
> if (obj->ptr)
> munmap(obj->ptr, obj->size);
>
> - gem_close(i915, obj->handle);
> + gem_close(fd, obj->handle);
> free(obj);
> }
>
> @@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>
> /**
> * blt_surface_fill_rect:
> - * @i915: drm fd
> + * @fd: drm fd
> * @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
> * @width: width
> * @height: height
> @@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> * Function fills surface @width x @height * 24bpp with color gradient
> * (internally uses ARGB where A == 0xff, see Cairo docs).
> */
> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> uint32_t width, uint32_t height)
> {
> cairo_surface_t *surface;
> @@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> void *map = obj->ptr;
>
> if (!map)
> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> obj->size, PROT_READ | PROT_WRITE);
>
> surface = cairo_image_surface_create_for_data(map,
> @@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
>
> /**
> * blt_surface_to_png:
> - * @i915: drm fd
> + * @fd: drm fd
> * @run_id: prefix id to allow grouping files stored from single run
> * @fileid: file identifier
> * @obj: blitter copy object (@blt_copy_object) to save to png
> @@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> *
> * Function save surface to png file. Assumes ARGB format where A == 0xff.
> */
> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> const struct blt_copy_object *obj,
> uint32_t width, uint32_t height)
> {
> @@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> obj->compression ? "compressed" : "uncompressed");
>
> if (!map)
> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> obj->size, PROT_READ);
> format = CAIRO_FORMAT_RGB24;
> surface = cairo_image_surface_create_for_data(map,
> diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
> similarity index 86%
> rename from lib/i915/i915_blt.h
> rename to lib/intel_blt.h
> index a5f0edd154..0cbe881f4a 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/intel_blt.h
> @@ -3,11 +3,14 @@
> * Copyright © 2022 Intel Corporation
> */
>
> +#ifndef __INTEL_BLT_H__
> +#define __INTEL_BLT_H__
> +
> /**
> - * SECTION:i915_blt
> + * SECTION:intel_blt
> * @short_description: i915 blitter library
> * @title: Blitter library
> - * @include: i915_blt.h
> + * @include: intel_blt.h
> *
> * # Introduction
> *
> @@ -95,7 +98,7 @@ struct blt_copy_batch {
>
> /* Common for block-copy and fast-copy */
> struct blt_copy_data {
> - int i915;
> + int fd;
> struct blt_copy_object src;
> struct blt_copy_object dst;
> struct blt_copy_batch bb;
> @@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
> };
>
> struct blt_ctrl_surf_copy_data {
> - int i915;
> + int fd;
> struct blt_ctrl_surf_copy_object src;
> struct blt_ctrl_surf_copy_object dst;
> struct blt_copy_batch bb;
> @@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> enum blt_cmd_type cmd,
> uint32_t prop);
>
> -bool blt_has_block_copy(int i915);
> -bool blt_has_fast_copy(int i915);
> -bool blt_has_xy_src_copy(int i915);
> +bool blt_has_block_copy(int fd);
> +bool blt_has_fast_copy(int fd);
> +bool blt_has_xy_src_copy(int fd);
>
> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> -bool blt_block_copy_supports_compression(int i915);
> -bool blt_uses_extended_block_copy(int i915);
> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> +bool blt_block_copy_supports_compression(int fd);
> +bool blt_uses_extended_block_copy(int fd);
>
> const char *blt_tiling_name(enum blt_tiling_type tiling);
>
> -uint64_t emit_blt_block_copy(int i915,
> +uint64_t emit_blt_block_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_block_copy(int i915,
> +int blt_block_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> const struct blt_block_copy_data_ext *ext);
>
> -uint64_t emit_blt_ctrl_surf_copy(int i915,
> +uint64_t emit_blt_ctrl_surf_copy(int fd,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_ctrl_surf_copy(int i915,
> +int blt_ctrl_surf_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> const struct blt_ctrl_surf_copy_data *surf);
>
> -uint64_t emit_blt_fast_copy(int i915,
> +uint64_t emit_blt_fast_copy(int fd,
> uint64_t ahnd,
> const struct blt_copy_data *blt,
> uint64_t bb_pos,
> bool emit_bbe);
>
> -int blt_fast_copy(int i915,
> +int blt_fast_copy(int fd,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint64_t ahnd,
> @@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
> uint32_t handle, uint64_t size, uint32_t region);
>
> struct blt_copy_object *
> -blt_create_object(int i915, uint32_t region,
> +blt_create_object(int fd, uint32_t region,
> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> enum blt_tiling_type tiling,
> enum blt_compression compression,
> enum blt_compression_type compression_type,
> bool create_mapping);
> -void blt_destroy_object(int i915, struct blt_copy_object *obj);
> +void blt_destroy_object(int fd, struct blt_copy_object *obj);
> void blt_set_object(struct blt_copy_object *obj,
> uint32_t handle, uint64_t size, uint32_t region,
> uint8_t mocs, enum blt_tiling_type tiling,
> @@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>
> void blt_surface_info(const char *info,
> const struct blt_copy_object *obj);
> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> uint32_t width, uint32_t height);
> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> const struct blt_copy_object *obj,
> uint32_t width, uint32_t height);
> +
> +#endif
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index accfa90ef0..84cf1799e9 100644
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -31,7 +31,7 @@
> #include <pciaccess.h>
> #include <stdbool.h>
>
> -#include "i915/intel_cmds_info.h"
> +#include "intel_cmds_info.h"
>
> #define BIT(x) (1ul <<(x))
>
> diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
> similarity index 99%
> rename from lib/i915/intel_cmds_info.c
> rename to lib/intel_cmds_info.c
> index 166fb4740c..151cb5f724 100644
> --- a/lib/i915/intel_cmds_info.c
> +++ b/lib/intel_cmds_info.c
> @@ -7,7 +7,7 @@
> #include <stddef.h>
>
> #include "intel_chipset.h"
> -#include "i915/intel_cmds_info.h"
> +#include "intel_cmds_info.h"
>
> #define BLT_INFO(_cmd, _tiling) { \
> .blt_cmd_type = _cmd, \
> diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
> similarity index 100%
> rename from lib/i915/intel_cmds_info.h
> rename to lib/intel_cmds_info.h
> diff --git a/lib/meson.build b/lib/meson.build
> index 8e99770837..3e1ecdee2b 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -13,8 +13,6 @@ lib_sources = [
> 'i915/gem_vm.c',
> 'i915/intel_decode.c',
> 'i915/intel_memory_region.c',
> - 'i915/intel_cmds_info.c',
> - 'i915/i915_blt.c',
> 'i915/i915_crc.c',
> 'igt_collection.c',
> 'igt_color_encoding.c',
> @@ -54,8 +52,10 @@ lib_sources = [
> 'intel_allocator_reloc.c',
> 'intel_allocator_simple.c',
> 'intel_batchbuffer.c',
> + 'intel_blt.c',
> 'intel_bufops.c',
> 'intel_chipset.c',
> + 'intel_cmds_info.c',
> 'intel_ctx.c',
> 'intel_device_info.c',
> 'intel_mmio.c',
> @@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
> lin_igt_chipset_build = static_library('igt_chipset',
> ['intel_chipset.c',
> 'intel_device_info.c',
> - 'i915/intel_cmds_info.c'],
> + 'intel_cmds_info.c'],
> include_directories : inc)
>
> lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
> @@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
> 'igt_list.c',
> 'igt_tools_stub.c',
> 'intel_device_info.c',
> - 'i915/intel_cmds_info.c',
> + 'intel_cmds_info.c',
> ],
> dependencies : scan_dep,
> include_directories : inc)
> diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
> index 85ca86eed1..fefb5d996f 100644
> --- a/tests/i915/api_intel_bb.c
> +++ b/tests/i915/api_intel_bb.c
> @@ -40,7 +40,7 @@
> #include "intel_bufops.h"
> #include "i915/gem_vm.h"
> #include "i915/i915_crc.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: api intel bb
> * Description: intel_bb API check.
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 681fe04666..f058644ba5 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -27,7 +27,7 @@
> #include "i915/gem_create.h"
> #include "igt.h"
> #include "igt_x86.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem blits
> * Category: Infrastructure
> diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
> index 7af427d7e4..55e466a3ee 100644
> --- a/tests/i915/gem_caching.c
> +++ b/tests/i915/gem_caching.c
> @@ -39,7 +39,7 @@
>
> #include "i915/gem.h"
> #include "igt.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem caching
> * Category: Desktop client
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index d38ab49a4b..1b2311f698 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -13,7 +13,7 @@
> #include "i915/gem.h"
> #include "i915/gem_create.h"
> #include "lib/intel_chipset.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem ccs
> @@ -167,7 +167,7 @@ static void surf_copy(int i915,
> ccs = gem_create(i915, ccssize);
> ccs2 = gem_create(i915, ccssize);
>
> - surf.i915 = i915;
> + surf.fd = i915;
> surf.print_bb = param.print_bb;
> set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
> uc_mocs, BLT_INDIRECT_ACCESS);
> diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
> index 89f89d212b..3ec02c22e2 100644
> --- a/tests/i915/gem_exercise_blt.c
> +++ b/tests/i915/gem_exercise_blt.c
> @@ -8,7 +8,7 @@
> #include "i915/gem.h"
> #include "i915/gem_create.h"
> #include "lib/intel_chipset.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem exercise blt
> diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
> index bdbbf99efe..32b9052507 100644
> --- a/tests/i915/gem_linear_blits.c
> +++ b/tests/i915/gem_linear_blits.c
> @@ -48,7 +48,7 @@
> #include "i915/gem_create.h"
> #include "igt.h"
> #include "igt_types.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem linear blits
> * Description: Test doing many blits with a working set larger than the aperture size.
> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> index 8211edbe30..0ef1ceb13f 100644
> --- a/tests/i915/gem_lmem_swapping.c
> +++ b/tests/i915/gem_lmem_swapping.c
> @@ -22,7 +22,7 @@
> #include <sys/time.h>
> #include <sys/wait.h>
> #include "drm.h"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> #include "intel_mocs.h"
> /**
> * TEST: gem lmem swapping
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index e9235a6898..4f9b854cc0 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -66,7 +66,7 @@
> #include "sw_sync.h"
>
> #include "eviction_common.c"
> -#include "i915/i915_blt.h"
> +#include "intel_blt.h"
> /**
> * TEST: gem userptr blits
> * Run type: FULL
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
2023-06-23 9:11 ` Karolina Stolarek
2023-06-23 9:33 ` Karolina Stolarek
@ 2023-06-23 10:06 ` Patchwork
2023-06-23 10:36 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-06-23 10:06 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
== Series Details ==
Series: lib/intel_blt: Prepare blt library to support xe
URL : https://patchwork.freedesktop.org/series/119792/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/916829 for the overview.
build-containers:build-debian has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44300730):
time="2023-06-23T10:03:37Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-23T10:03:42Z" level=warning msg="signal: killed"
time="2023-06-23T10:03:42Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1687514622:step_script
section_start:1687514622:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1687514623:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44300732):
time="2023-06-23T10:04:02Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-23T10:04:08Z" level=warning msg="signal: killed"
time="2023-06-23T10:04:08Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1687514649:step_script
section_start:1687514649:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1687514650:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44300731):
time="2023-06-23T10:03:57Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-23T10:04:02Z" level=warning msg="signal: killed"
time="2023-06-23T10:04:02Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1687514642:step_script
section_start:1687514642:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1687514643:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44300733):
time="2023-06-23T10:04:11Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:ac8bb7e1a32398e26c129ce64e2ddc3e7ec6c34d93424b247f16049f5a91cff4
Copying config sha256:49ae9acb659161695228c0667681983289fc1a40d5056e99a72eb66538086c15
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-06-23T10:04:17Z" level=warning msg="signal: killed"
time="2023-06-23T10:04:17Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1687514659:step_script
section_start:1687514659:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1687514661:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/44300734):
time="2023-06-23T10:04:11Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM fedora:31
Getting image source signatures
Copying blob sha256:854946d575a439a894349addd141568875d7c1e673d3286b08250f3dde002e6a
Copying config sha256:7e94ed77b448a8d2ff08b92d3ca743e4e862c744892d6886c73487581eb5863a
Writing manifest to image destination
Storing signatures
STEP 2: RUN dnf install -y gcc flex bison libatomic meson ninja-build xdotool 'pkgconfig(libdrm)' 'pkgconfig(pciaccess)' 'pkgconfig(libkmod)' 'pkgconfig(libprocps)' 'pkgconfig(libunwind)' 'pkgconfig(libdw)' 'pkgconfig(pixman-1)' 'pkgconfig(valgrind)' 'pkgconfig(cairo)' 'pkgconfig(libudev)' 'pkgconfig(glib-2.0)' 'pkgconfig(gsl)' 'pkgconfig(alsa)' 'pkgconfig(xmlrpc)' 'pkgconfig(xmlrpc_util)' 'pkgconfig(xmlrpc_client)' 'pkgconfig(json-c)' 'pkgconfig(gtk-doc)' 'pkgconfig(xv)' 'pkgconfig(xrandr)' python3-docutils
error running container: error creating container for [/bin/sh -c dnf install -y gcc flex bison libatomic meson ninja-build xdotool 'pkgconfig(libdrm)' 'pkgconfig(pciaccess)' 'pkgconfig(libkmod)' 'pkgconfig(libprocps)' 'pkgconfig(libunwind)' 'pkgconfig(libdw)' 'pkgconfig(pixman-1)' 'pkgconfig(valgrind)' 'pkgconfig(cairo)' 'pkgconfig(libudev)' 'pkgconfig(glib-2.0)' 'pkgconfig(gsl)' 'pkgconfig(alsa)' 'pkgconfig(xmlrpc)' 'pkgconfig(xmlrpc_util)' 'pkgconfig(xmlrpc_client)' 'pkgconfig(json-c)' 'pkgconfig(gtk-doc)' 'pkgconfig(xv)' 'pkgconfig(xrandr)' python3-docutils]: time="2023-06-23T10:04:19Z" level=warning msg="signal: killed"
time="2023-06-23T10:04:19Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN dnf install -y gcc flex bison libatomic meson ninja-build xdotool 'pkgconfig(libdrm)' 'pkgconfig(pciaccess)' 'pkgconfig(libkmod)' 'pkgconfig(libprocps)' 'pkgconfig(libunwind)' 'pkgconfig(libdw)' 'pkgconfig(pixman-1)' 'pkgconfig(valgrind)' 'pkgconfig(cairo)' 'pkgconfig(libudev)' 'pkgconfig(glib-2.0)' 'pkgconfig(gsl)' 'pkgconfig(alsa)' 'pkgconfig(xmlrpc)' 'pkgconfig(xmlrpc_util)' 'pkgconfig(xmlrpc_client)' 'pkgconfig(json-c)' 'pkgconfig(gtk-doc)' 'pkgconfig(xv)' 'pkgconfig(xrandr)' python3-docutils": error while running runtime: exit status 1
section_end:1687514660:step_script
section_start:1687514660:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1687514663:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/916829
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
2023-06-23 9:11 ` Karolina Stolarek
@ 2023-06-23 10:10 ` Zbigniew Kempczyński
0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-06-23 10:10 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jun 23, 2023 at 11:11:08AM +0200, Karolina Stolarek wrote:
> Hi Zbigniew,
>
> First of all, did you use any script/sed/whatever to rename fields? If so,
> it would be good to mention it in the commit message.
No, I've just walked through the code and I did manual change. I wanted
to reinspect the code too (there were some drm_i915_* structs).
--
Zbigniew
>
> Just started to review it, but for now, I have only comment (see below).
>
> On 23.06.2023 10:46, Zbigniew Kempczyński wrote:
> > Migrate i915/i915_blt -> intel_blt as a preparation step before
> > extending to support xe. It is a simple move of files and rename
> > of i915 -> fd field.
> >
> > Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> > Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > ---
> > .../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
> > lib/intel_batchbuffer.c | 2 +-
> > lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
> > lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
> > lib/intel_chipset.h | 2 +-
> > lib/{i915 => }/intel_cmds_info.c | 2 +-
> > lib/{i915 => }/intel_cmds_info.h | 0
> > lib/meson.build | 8 +-
> > tests/i915/api_intel_bb.c | 2 +-
> > tests/i915/gem_blits.c | 2 +-
> > tests/i915/gem_caching.c | 2 +-
> > tests/i915/gem_ccs.c | 4 +-
> > tests/i915/gem_exercise_blt.c | 2 +-
> > tests/i915/gem_linear_blits.c | 2 +-
> > tests/i915/gem_lmem_swapping.c | 2 +-
> > tests/i915/gem_userptr_blits.c | 2 +-
> > 16 files changed, 116 insertions(+), 111 deletions(-)
> > rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
> > rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
> > rename lib/{i915 => }/intel_cmds_info.c (99%)
> > rename lib/{i915 => }/intel_cmds_info.h (100%)
> >
> > diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > index 102c8a8978..9085eb924e 100644
> > --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > @@ -64,7 +64,7 @@
> > <xi:include href="xml/gem_engine_topology.xml"/>
> > <xi:include href="xml/gem_scheduler.xml"/>
> > <xi:include href="xml/gem_submission.xml"/>
> > - <xi:include href="xml/i915_blt.xml"/>
> > + <xi:include href="xml/intel_blt.xml"/>
> > <xi:include href="xml/i915_crc.xml"/>
> > <xi:include href="xml/intel_ctx.xml"/>
> > </chapter>
> > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> > index 3cd680072e..186f65affe 100644
> > --- a/lib/intel_batchbuffer.c
> > +++ b/lib/intel_batchbuffer.c
> > @@ -32,7 +32,7 @@
> > #include "huc_copy.h"
> > #include "i915/gem_create.h"
> > #include "i915/gem_mman.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "igt_aux.h"
> > #include "igt_syncobj.h"
> > #include "intel_batchbuffer.h"
> > diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
> > similarity index 92%
> > rename from lib/i915/i915_blt.c
> > rename to lib/intel_blt.c
> > index ef67fe26f3..28a7400942 100644
> > --- a/lib/i915/i915_blt.c
> > +++ b/lib/intel_blt.c
> > @@ -10,8 +10,8 @@
> > #include <cairo.h>
> > #include "drm.h"
> > #include "igt.h"
> > -#include "gem_create.h"
> > -#include "i915_blt.h"
> > +#include "i915/gem_create.h"
> > +#include "intel_blt.h"
> > #define BITRANGE(start, end) (end - start + 1)
> > #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
> > @@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> > /**
> > * blt_has_block_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy is supported by @i915 device
> > + * Check if block copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_block_copy(int i915)
> > +bool blt_has_block_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_BLOCK_COPY);
> > }
> > /**
> > * blt_has_fast_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if fast copy is supported by @i915 device
> > + * Check if fast copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_fast_copy(int i915)
> > +bool blt_has_fast_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_FAST_COPY);
> > }
> > /**
> > * blt_has_xy_src_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if XY src copy is supported by @i915 device
> > + * Check if XY src copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_xy_src_copy(int i915)
> > +bool blt_has_xy_src_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_SRC_COPY);
> > }
> > /**
> > * blt_fast_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if fast copy provided by @i915 device supports @tiling format
> > + * Check if fast copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
> > }
> > /**
> > * blt_block_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if block copy provided by @i915 device supports @tiling format
> > + * Check if block copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
> > }
> > /**
> > * blt_xy_src_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if XY src copy provided by @i915 device supports @tiling format
> > + * Check if XY src copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
> > }
> > /**
> > * blt_block_copy_supports_compression
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy provided by @i915 device supports compression.
> > + * Check if block copy provided by @fd device supports compression.
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_block_copy_supports_compression(int i915)
> > +bool blt_block_copy_supports_compression(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
> > BLT_CMD_SUPPORTS_COMPRESSION);
> > @@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
> > /**
> > * blt_uses_extended_block_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy provided by @i915 device uses an extended version
> > + * Check if block copy provided by @fd device uses an extended version
> > * of the command.
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_uses_extended_block_copy(int i915)
> > +bool blt_uses_extended_block_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
> > }
> > @@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> > /**
> > * emit_blt_block_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
> > * @ext: extended blitter data (for DG2+, supports flatccs compression)
> > @@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_block_copy(int i915,
> > +uint64_t emit_blt_block_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext,
> > @@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
> > igt_assert_f(ahnd, "block-copy supports softpin only\n");
> > igt_assert_f(blt, "block-copy requires data to do blit\n");
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > fill_data(&data, blt, src_offset, dst_offset, ext);
> > - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> > + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> > @@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
> > /**
> > * blt_block_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_block_copy(int i915,
> > +int blt_block_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -779,12 +779,12 @@ int blt_block_copy(int i915,
> > igt_assert_f(ahnd, "block-copy supports softpin only\n");
> > igt_assert_f(blt, "block-copy requires data to do blit\n");
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > - emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
> > + emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -800,7 +800,7 @@ int blt_block_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > - ret = __gem_execbuf(i915, &execbuf);
> > + ret = __gem_execbuf(fd, &execbuf);
> > return ret;
> > }
> > @@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> > /**
> > * emit_blt_ctrl_surf_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @surf: blitter data for ctrl-surf-copy
> > * @bb_pos: position at which insert block copy commands
> > @@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_ctrl_surf_copy(int i915,
> > +uint64_t emit_blt_ctrl_surf_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf,
> > uint64_t bb_pos,
> > @@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> > igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
> > - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> > + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> > data.dw00.client = 0x2;
> > data.dw00.opcode = 0x48;
> > @@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > data.dw04.dst_address_hi = dst_offset >> 32;
> > data.dw04.dst_mocs = surf->dst.mocs;
> > - bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
> > + bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < surf->bb.size);
> > @@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > /**
> > * blt_ctrl_surf_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_ctrl_surf_copy(int i915,
> > +int blt_ctrl_surf_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
> > igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> > igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
> > - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> > + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> > src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
> > dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
> > bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
> > - emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
> > + emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > - gem_execbuf(i915, &execbuf);
> > + gem_execbuf(fd, &execbuf);
> > put_offset(ahnd, surf->dst.handle);
> > put_offset(ahnd, surf->src.handle);
> > put_offset(ahnd, surf->bb.handle);
> > @@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> > /**
> > * emit_blt_fast_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @blt: blitter data for fast-copy (same as for block-copy but doesn't use
> > * compression fields).
> > @@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_fast_copy(int i915,
> > +uint64_t emit_blt_fast_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > uint64_t bb_pos,
> > @@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > uint32_t bbe = MI_BATCH_BUFFER_END;
> > uint32_t *bb;
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > data.dw00.client = 0x2;
> > data.dw00.opcode = 0x42;
> > @@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > data.dw08.src_address_lo = src_offset;
> > data.dw09.src_address_hi = src_offset >> 32;
> > - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> > + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> > @@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > /**
> > * blt_fast_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_fast_copy(int i915,
> > +int blt_fast_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
> > uint64_t dst_offset, src_offset, bb_offset, alignment;
> > int ret;
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > - emit_blt_fast_copy(i915, ahnd, blt, 0, true);
> > + emit_blt_fast_copy(fd, ahnd, blt, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > - ret = __gem_execbuf(i915, &execbuf);
> > + ret = __gem_execbuf(fd, &execbuf);
> > put_offset(ahnd, blt->dst.handle);
> > put_offset(ahnd, blt->src.handle);
> > put_offset(ahnd, blt->bb.handle);
> > @@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
> > }
> > struct blt_copy_object *
> > -blt_create_object(int i915, uint32_t region,
> > +blt_create_object(int fd, uint32_t region,
> > uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > enum blt_tiling_type tiling,
> > enum blt_compression compression,
> > @@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
> > obj = calloc(1, sizeof(*obj));
> > obj->size = size;
> > - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> > + igt_assert(__gem_create_in_memory_regions(fd, &handle,
> > &size, region) == 0);
> > blt_set_object(obj, handle, size, region, mocs, tiling,
> > @@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
> > blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
> > if (create_mapping)
> > - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> > + obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
> > PROT_READ | PROT_WRITE);
> > return obj;
> > }
> > -void blt_destroy_object(int i915, struct blt_copy_object *obj)
> > +void blt_destroy_object(int fd, struct blt_copy_object *obj)
> > {
> > if (obj->ptr)
> > munmap(obj->ptr, obj->size);
> > - gem_close(i915, obj->handle);
> > + gem_close(fd, obj->handle);
> > free(obj);
> > }
> > @@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > /**
> > * blt_surface_fill_rect:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
> > * @width: width
> > * @height: height
> > @@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > * Function fills surface @width x @height * 24bpp with color gradient
> > * (internally uses ARGB where A == 0xff, see Cairo docs).
> > */
> > -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height)
> > {
> > cairo_surface_t *surface;
> > @@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > void *map = obj->ptr;
> > if (!map)
> > - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> > + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> > obj->size, PROT_READ | PROT_WRITE);
> > surface = cairo_image_surface_create_for_data(map,
> > @@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> > /**
> > * blt_surface_to_png:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @run_id: prefix id to allow grouping files stored from single run
> > * @fileid: file identifier
> > * @obj: blitter copy object (@blt_copy_object) to save to png
> > @@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> > *
> > * Function save surface to png file. Assumes ARGB format where A == 0xff.
> > */
> > -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> > const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height)
> > {
> > @@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > obj->compression ? "compressed" : "uncompressed");
> > if (!map)
> > - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> > + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> > obj->size, PROT_READ);
> > format = CAIRO_FORMAT_RGB24;
> > surface = cairo_image_surface_create_for_data(map,
> > diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
> > similarity index 86%
> > rename from lib/i915/i915_blt.h
> > rename to lib/intel_blt.h
> > index a5f0edd154..0cbe881f4a 100644
> > --- a/lib/i915/i915_blt.h
> > +++ b/lib/intel_blt.h
> > @@ -3,11 +3,14 @@
> > * Copyright © 2022 Intel Corporation
> > */
> > +#ifndef __INTEL_BLT_H__
> > +#define __INTEL_BLT_H__
> > +
> > /**
> > - * SECTION:i915_blt
> > + * SECTION:intel_blt
> > * @short_description: i915 blitter library
>
> You've missed that line, could you please update it?
>
> Thanks,
> Karolina
>
> > * @title: Blitter library
> > - * @include: i915_blt.h
> > + * @include: intel_blt.h
> > *
> > * # Introduction
> > *
> > @@ -95,7 +98,7 @@ struct blt_copy_batch {
> > /* Common for block-copy and fast-copy */
> > struct blt_copy_data {
> > - int i915;
> > + int fd;
> > struct blt_copy_object src;
> > struct blt_copy_object dst;
> > struct blt_copy_batch bb;
> > @@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
> > };
> > struct blt_ctrl_surf_copy_data {
> > - int i915;
> > + int fd;
> > struct blt_ctrl_surf_copy_object src;
> > struct blt_ctrl_surf_copy_object dst;
> > struct blt_copy_batch bb;
> > @@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> > enum blt_cmd_type cmd,
> > uint32_t prop);
> > -bool blt_has_block_copy(int i915);
> > -bool blt_has_fast_copy(int i915);
> > -bool blt_has_xy_src_copy(int i915);
> > +bool blt_has_block_copy(int fd);
> > +bool blt_has_fast_copy(int fd);
> > +bool blt_has_xy_src_copy(int fd);
> > -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_block_copy_supports_compression(int i915);
> > -bool blt_uses_extended_block_copy(int i915);
> > +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_block_copy_supports_compression(int fd);
> > +bool blt_uses_extended_block_copy(int fd);
> > const char *blt_tiling_name(enum blt_tiling_type tiling);
> > -uint64_t emit_blt_block_copy(int i915,
> > +uint64_t emit_blt_block_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_block_copy(int i915,
> > +int blt_block_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext);
> > -uint64_t emit_blt_ctrl_surf_copy(int i915,
> > +uint64_t emit_blt_ctrl_surf_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_ctrl_surf_copy(int i915,
> > +int blt_ctrl_surf_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf);
> > -uint64_t emit_blt_fast_copy(int i915,
> > +uint64_t emit_blt_fast_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_fast_copy(int i915,
> > +int blt_fast_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
> > uint32_t handle, uint64_t size, uint32_t region);
> > struct blt_copy_object *
> > -blt_create_object(int i915, uint32_t region,
> > +blt_create_object(int fd, uint32_t region,
> > uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > enum blt_tiling_type tiling,
> > enum blt_compression compression,
> > enum blt_compression_type compression_type,
> > bool create_mapping);
> > -void blt_destroy_object(int i915, struct blt_copy_object *obj);
> > +void blt_destroy_object(int fd, struct blt_copy_object *obj);
> > void blt_set_object(struct blt_copy_object *obj,
> > uint32_t handle, uint64_t size, uint32_t region,
> > uint8_t mocs, enum blt_tiling_type tiling,
> > @@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > void blt_surface_info(const char *info,
> > const struct blt_copy_object *obj);
> > -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height);
> > -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> > const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height);
> > +
> > +#endif
> > diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> > index accfa90ef0..84cf1799e9 100644
> > --- a/lib/intel_chipset.h
> > +++ b/lib/intel_chipset.h
> > @@ -31,7 +31,7 @@
> > #include <pciaccess.h>
> > #include <stdbool.h>
> > -#include "i915/intel_cmds_info.h"
> > +#include "intel_cmds_info.h"
> > #define BIT(x) (1ul <<(x))
> > diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
> > similarity index 99%
> > rename from lib/i915/intel_cmds_info.c
> > rename to lib/intel_cmds_info.c
> > index 166fb4740c..151cb5f724 100644
> > --- a/lib/i915/intel_cmds_info.c
> > +++ b/lib/intel_cmds_info.c
> > @@ -7,7 +7,7 @@
> > #include <stddef.h>
> > #include "intel_chipset.h"
> > -#include "i915/intel_cmds_info.h"
> > +#include "intel_cmds_info.h"
> > #define BLT_INFO(_cmd, _tiling) { \
> > .blt_cmd_type = _cmd, \
> > diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
> > similarity index 100%
> > rename from lib/i915/intel_cmds_info.h
> > rename to lib/intel_cmds_info.h
> > diff --git a/lib/meson.build b/lib/meson.build
> > index 8e99770837..3e1ecdee2b 100644
> > --- a/lib/meson.build
> > +++ b/lib/meson.build
> > @@ -13,8 +13,6 @@ lib_sources = [
> > 'i915/gem_vm.c',
> > 'i915/intel_decode.c',
> > 'i915/intel_memory_region.c',
> > - 'i915/intel_cmds_info.c',
> > - 'i915/i915_blt.c',
> > 'i915/i915_crc.c',
> > 'igt_collection.c',
> > 'igt_color_encoding.c',
> > @@ -54,8 +52,10 @@ lib_sources = [
> > 'intel_allocator_reloc.c',
> > 'intel_allocator_simple.c',
> > 'intel_batchbuffer.c',
> > + 'intel_blt.c',
> > 'intel_bufops.c',
> > 'intel_chipset.c',
> > + 'intel_cmds_info.c',
> > 'intel_ctx.c',
> > 'intel_device_info.c',
> > 'intel_mmio.c',
> > @@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
> > lin_igt_chipset_build = static_library('igt_chipset',
> > ['intel_chipset.c',
> > 'intel_device_info.c',
> > - 'i915/intel_cmds_info.c'],
> > + 'intel_cmds_info.c'],
> > include_directories : inc)
> > lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
> > @@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
> > 'igt_list.c',
> > 'igt_tools_stub.c',
> > 'intel_device_info.c',
> > - 'i915/intel_cmds_info.c',
> > + 'intel_cmds_info.c',
> > ],
> > dependencies : scan_dep,
> > include_directories : inc)
> > diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
> > index 85ca86eed1..fefb5d996f 100644
> > --- a/tests/i915/api_intel_bb.c
> > +++ b/tests/i915/api_intel_bb.c
> > @@ -40,7 +40,7 @@
> > #include "intel_bufops.h"
> > #include "i915/gem_vm.h"
> > #include "i915/i915_crc.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: api intel bb
> > * Description: intel_bb API check.
> > diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> > index 681fe04666..f058644ba5 100644
> > --- a/tests/i915/gem_blits.c
> > +++ b/tests/i915/gem_blits.c
> > @@ -27,7 +27,7 @@
> > #include "i915/gem_create.h"
> > #include "igt.h"
> > #include "igt_x86.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem blits
> > * Category: Infrastructure
> > diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
> > index 7af427d7e4..55e466a3ee 100644
> > --- a/tests/i915/gem_caching.c
> > +++ b/tests/i915/gem_caching.c
> > @@ -39,7 +39,7 @@
> > #include "i915/gem.h"
> > #include "igt.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem caching
> > * Category: Desktop client
> > diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> > index d38ab49a4b..1b2311f698 100644
> > --- a/tests/i915/gem_ccs.c
> > +++ b/tests/i915/gem_ccs.c
> > @@ -13,7 +13,7 @@
> > #include "i915/gem.h"
> > #include "i915/gem_create.h"
> > #include "lib/intel_chipset.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem ccs
> > @@ -167,7 +167,7 @@ static void surf_copy(int i915,
> > ccs = gem_create(i915, ccssize);
> > ccs2 = gem_create(i915, ccssize);
> > - surf.i915 = i915;
> > + surf.fd = i915;
> > surf.print_bb = param.print_bb;
> > set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
> > uc_mocs, BLT_INDIRECT_ACCESS);
> > diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
> > index 89f89d212b..3ec02c22e2 100644
> > --- a/tests/i915/gem_exercise_blt.c
> > +++ b/tests/i915/gem_exercise_blt.c
> > @@ -8,7 +8,7 @@
> > #include "i915/gem.h"
> > #include "i915/gem_create.h"
> > #include "lib/intel_chipset.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem exercise blt
> > diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
> > index bdbbf99efe..32b9052507 100644
> > --- a/tests/i915/gem_linear_blits.c
> > +++ b/tests/i915/gem_linear_blits.c
> > @@ -48,7 +48,7 @@
> > #include "i915/gem_create.h"
> > #include "igt.h"
> > #include "igt_types.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem linear blits
> > * Description: Test doing many blits with a working set larger than the aperture size.
> > diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> > index 8211edbe30..0ef1ceb13f 100644
> > --- a/tests/i915/gem_lmem_swapping.c
> > +++ b/tests/i915/gem_lmem_swapping.c
> > @@ -22,7 +22,7 @@
> > #include <sys/time.h>
> > #include <sys/wait.h>
> > #include "drm.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem lmem swapping
> > diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> > index e9235a6898..4f9b854cc0 100644
> > --- a/tests/i915/gem_userptr_blits.c
> > +++ b/tests/i915/gem_userptr_blits.c
> > @@ -66,7 +66,7 @@
> > #include "sw_sync.h"
> > #include "eviction_common.c"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem userptr blits
> > * Run type: FULL
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
` (2 preceding siblings ...)
2023-06-23 10:06 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
@ 2023-06-23 10:36 ` Patchwork
2023-06-23 11:12 ` Zbigniew Kempczyński
2023-06-23 11:53 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-06-23 15:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2023-06-23 10:36 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 10628 bytes --]
== Series Details ==
Series: lib/intel_blt: Prepare blt library to support xe
URL : https://patchwork.freedesktop.org/series/119792/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13312 -> IGTPW_9245
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_9245 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_9245, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
Participating hosts (41 -> 41)
------------------------------
Additional (1): bat-dg1-8
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_9245:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gtt:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-atsm-1/igt@i915_selftest@live@gtt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-atsm-1/igt@i915_selftest@live@gtt.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_create@create-massive-size}:
- {bat-dg1-8}: NOTRUN -> [FAIL][3] +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-dg1-8/igt@xe_create@create-massive-size.html
Known issues
------------
Here are the changes found in IGTPW_9245 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-adlp-11: NOTRUN -> [SKIP][4] ([i915#7456])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@debugfs_test@basic-hwmon.html
* igt@gem_tiled_pread_basic:
- bat-adlp-11: NOTRUN -> [SKIP][5] ([i915#3282])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@gem_tiled_pread_basic.html
* igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: [PASS][6] -> [DMESG-FAIL][7] ([i915#7059])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
- bat-mtlp-6: [PASS][8] -> [DMESG-FAIL][9] ([i915#7059])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@guc:
- bat-rpls-2: NOTRUN -> [DMESG-WARN][10] ([i915#7852])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@guc.html
* igt@i915_selftest@live@slpc:
- bat-mtlp-6: [PASS][11] -> [DMESG-WARN][12] ([i915#6367])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-6/igt@i915_selftest@live@slpc.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-6/igt@i915_selftest@live@slpc.html
- bat-rpls-2: NOTRUN -> [DMESG-WARN][13] ([i915#6367])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@slpc.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-rpls-2: NOTRUN -> [ABORT][14] ([i915#6687] / [i915#8668])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- bat-adlp-11: NOTRUN -> [SKIP][15] ([i915#7828]) +7 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-adlm-1: NOTRUN -> [SKIP][16] ([i915#7828])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- bat-adlp-11: NOTRUN -> [SKIP][17] ([i915#3546])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11: NOTRUN -> [SKIP][18] ([i915#4103])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_flip@basic-plain-flip@d-dp6:
- bat-adlp-11: NOTRUN -> [ABORT][19] ([i915#4423])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_flip@basic-plain-flip@d-dp6.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][20] ([i915#1845])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html
#### Possible fixes ####
* igt@dmabuf@all-tests@dma_fence:
- bat-adlm-1: [DMESG-FAIL][21] ([i915#8189]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlm-1/igt@dmabuf@all-tests@dma_fence.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@dmabuf@all-tests@dma_fence.html
* igt@dmabuf@all-tests@sanitycheck:
- bat-adlm-1: [ABORT][23] ([i915#8423]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlm-1/igt@dmabuf@all-tests@sanitycheck.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@dmabuf@all-tests@sanitycheck.html
* igt@gem_exec_suspend@basic-s0@smem:
- fi-rkl-11600: [FAIL][25] ([fdo#103375] / [i915#8011]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_module_load@load:
- bat-adlp-11: [ABORT][27] ([i915#4423]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlp-11/igt@i915_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@i915_module_load@load.html
* igt@i915_selftest@live@migrate:
- bat-mtlp-8: [DMESG-FAIL][29] ([i915#7699]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@migrate.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [DMESG-FAIL][31] ([i915#8497]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@requests.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@requests.html
- bat-rpls-2: [ABORT][33] ([i915#4983] / [i915#7913]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-rpls-2/igt@i915_selftest@live@requests.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: [DMESG-WARN][35] ([i915#6367]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-rpls-1/igt@i915_selftest@live@slpc.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-1/igt@i915_selftest@live@slpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8423]: https://gitlab.freedesktop.org/drm/intel/issues/8423
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
[i915#8513]: https://gitlab.freedesktop.org/drm/intel/issues/8513
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8676]: https://gitlab.freedesktop.org/drm/intel/issues/8676
[i915#8678]: https://gitlab.freedesktop.org/drm/intel/issues/8678
[i915#8679]: https://gitlab.freedesktop.org/drm/intel/issues/8679
[i915#8698]: https://gitlab.freedesktop.org/drm/intel/issues/8698
[i915#8699]: https://gitlab.freedesktop.org/drm/intel/issues/8699
[i915#8700]: https://gitlab.freedesktop.org/drm/intel/issues/8700
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7347 -> IGTPW_9245
CI-20190529: 20190529
CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
[-- Attachment #2: Type: text/html, Size: 11364 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
2023-06-23 9:33 ` Karolina Stolarek
@ 2023-06-23 11:02 ` Zbigniew Kempczyński
2023-06-23 11:11 ` Karolina Stolarek
0 siblings, 1 reply; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-06-23 11:02 UTC (permalink / raw)
To: Karolina Stolarek; +Cc: igt-dev
On Fri, Jun 23, 2023 at 11:33:20AM +0200, Karolina Stolarek wrote:
> Hi Zbigniew,
>
> I read through this, and apart from that "@short_description" line in
> intel_blt.h, I think the re-name went well. Once you fixed it, you have my:
I couldn't add 'i915/Xe' as it wouldn't be true.
>
> Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
>
> The only other nit would be the patch subject. I'd say that it renames the
> blit library to be more generic, and keep the description as it is. But it's
> a minor thing, and the final decision is yours.
That's the preparation step to extend to xe, not the extension itself.
>
> A follow-up question -- do you plan to change or update blitter lib tests to
> support Xe? gem_exercise_blt/gem_ccs tests still refer to i915.
Due to some differences in setup path for block-copy() and others
I'm going to copy those tests to xe_exercise_blt + xe_ccs. Main
problem for Xe path is explicit binding/unbinding especially
when client of the code wants to achieve pipelining (without stalls).
Thank you for the review. I'm going to merge as it is, especially
that's doesn't change the code logic.
--
Zbigniew
>
> All the best,
> Karolina
>
> On 23.06.2023 10:46, Zbigniew Kempczyński wrote:
> > Migrate i915/i915_blt -> intel_blt as a preparation step before
> > extending to support xe. It is a simple move of files and rename
> > of i915 -> fd field.
> >
> > Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> > Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > ---
> > .../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
> > lib/intel_batchbuffer.c | 2 +-
> > lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
> > lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
> > lib/intel_chipset.h | 2 +-
> > lib/{i915 => }/intel_cmds_info.c | 2 +-
> > lib/{i915 => }/intel_cmds_info.h | 0
> > lib/meson.build | 8 +-
> > tests/i915/api_intel_bb.c | 2 +-
> > tests/i915/gem_blits.c | 2 +-
> > tests/i915/gem_caching.c | 2 +-
> > tests/i915/gem_ccs.c | 4 +-
> > tests/i915/gem_exercise_blt.c | 2 +-
> > tests/i915/gem_linear_blits.c | 2 +-
> > tests/i915/gem_lmem_swapping.c | 2 +-
> > tests/i915/gem_userptr_blits.c | 2 +-
> > 16 files changed, 116 insertions(+), 111 deletions(-)
> > rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
> > rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
> > rename lib/{i915 => }/intel_cmds_info.c (99%)
> > rename lib/{i915 => }/intel_cmds_info.h (100%)
> >
> > diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > index 102c8a8978..9085eb924e 100644
> > --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
> > @@ -64,7 +64,7 @@
> > <xi:include href="xml/gem_engine_topology.xml"/>
> > <xi:include href="xml/gem_scheduler.xml"/>
> > <xi:include href="xml/gem_submission.xml"/>
> > - <xi:include href="xml/i915_blt.xml"/>
> > + <xi:include href="xml/intel_blt.xml"/>
> > <xi:include href="xml/i915_crc.xml"/>
> > <xi:include href="xml/intel_ctx.xml"/>
> > </chapter>
> > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> > index 3cd680072e..186f65affe 100644
> > --- a/lib/intel_batchbuffer.c
> > +++ b/lib/intel_batchbuffer.c
> > @@ -32,7 +32,7 @@
> > #include "huc_copy.h"
> > #include "i915/gem_create.h"
> > #include "i915/gem_mman.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "igt_aux.h"
> > #include "igt_syncobj.h"
> > #include "intel_batchbuffer.h"
> > diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
> > similarity index 92%
> > rename from lib/i915/i915_blt.c
> > rename to lib/intel_blt.c
> > index ef67fe26f3..28a7400942 100644
> > --- a/lib/i915/i915_blt.c
> > +++ b/lib/intel_blt.c
> > @@ -10,8 +10,8 @@
> > #include <cairo.h>
> > #include "drm.h"
> > #include "igt.h"
> > -#include "gem_create.h"
> > -#include "i915_blt.h"
> > +#include "i915/gem_create.h"
> > +#include "intel_blt.h"
> > #define BITRANGE(start, end) (end - start + 1)
> > #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
> > @@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> > /**
> > * blt_has_block_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy is supported by @i915 device
> > + * Check if block copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_block_copy(int i915)
> > +bool blt_has_block_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_BLOCK_COPY);
> > }
> > /**
> > * blt_has_fast_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if fast copy is supported by @i915 device
> > + * Check if fast copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_fast_copy(int i915)
> > +bool blt_has_fast_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_FAST_COPY);
> > }
> > /**
> > * blt_has_xy_src_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if XY src copy is supported by @i915 device
> > + * Check if XY src copy is supported by @fd device
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_has_xy_src_copy(int i915)
> > +bool blt_has_xy_src_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_supports_command(cmds_info, XY_SRC_COPY);
> > }
> > /**
> > * blt_fast_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if fast copy provided by @i915 device supports @tiling format
> > + * Check if fast copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
> > }
> > /**
> > * blt_block_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if block copy provided by @i915 device supports @tiling format
> > + * Check if block copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
> > }
> > /**
> > * blt_xy_src_copy_supports_tiling
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @tiling: tiling format
> > *
> > - * Check if XY src copy provided by @i915 device supports @tiling format
> > + * Check if XY src copy provided by @fd device supports @tiling format
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
> > +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
> > }
> > /**
> > * blt_block_copy_supports_compression
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy provided by @i915 device supports compression.
> > + * Check if block copy provided by @fd device supports compression.
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_block_copy_supports_compression(int i915)
> > +bool blt_block_copy_supports_compression(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
> > BLT_CMD_SUPPORTS_COMPRESSION);
> > @@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
> > /**
> > * blt_uses_extended_block_copy
> > - * @i915: drm fd
> > + * @fd: drm fd
> > *
> > - * Check if block copy provided by @i915 device uses an extended version
> > + * Check if block copy provided by @fd device uses an extended version
> > * of the command.
> > *
> > * Returns:
> > * true if it does, false otherwise.
> > */
> > -bool blt_uses_extended_block_copy(int i915)
> > +bool blt_uses_extended_block_copy(int fd)
> > {
> > - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
> > + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
> > return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
> > }
> > @@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> > /**
> > * emit_blt_block_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
> > * @ext: extended blitter data (for DG2+, supports flatccs compression)
> > @@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_block_copy(int i915,
> > +uint64_t emit_blt_block_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext,
> > @@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
> > igt_assert_f(ahnd, "block-copy supports softpin only\n");
> > igt_assert_f(blt, "block-copy requires data to do blit\n");
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > fill_data(&data, blt, src_offset, dst_offset, ext);
> > - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> > + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> > @@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
> > /**
> > * blt_block_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_block_copy(int i915,
> > +int blt_block_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -779,12 +779,12 @@ int blt_block_copy(int i915,
> > igt_assert_f(ahnd, "block-copy supports softpin only\n");
> > igt_assert_f(blt, "block-copy requires data to do blit\n");
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > - emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
> > + emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -800,7 +800,7 @@ int blt_block_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > - ret = __gem_execbuf(i915, &execbuf);
> > + ret = __gem_execbuf(fd, &execbuf);
> > return ret;
> > }
> > @@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> > /**
> > * emit_blt_ctrl_surf_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @surf: blitter data for ctrl-surf-copy
> > * @bb_pos: position at which insert block copy commands
> > @@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_ctrl_surf_copy(int i915,
> > +uint64_t emit_blt_ctrl_surf_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf,
> > uint64_t bb_pos,
> > @@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> > igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
> > - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> > + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> > data.dw00.client = 0x2;
> > data.dw00.opcode = 0x48;
> > @@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > data.dw04.dst_address_hi = dst_offset >> 32;
> > data.dw04.dst_mocs = surf->dst.mocs;
> > - bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
> > + bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < surf->bb.size);
> > @@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > /**
> > * blt_ctrl_surf_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_ctrl_surf_copy(int i915,
> > +int blt_ctrl_surf_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
> > igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
> > igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
> > - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
> > + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
> > src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
> > dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
> > bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
> > - emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
> > + emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > - gem_execbuf(i915, &execbuf);
> > + gem_execbuf(fd, &execbuf);
> > put_offset(ahnd, surf->dst.handle);
> > put_offset(ahnd, surf->src.handle);
> > put_offset(ahnd, surf->bb.handle);
> > @@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> > /**
> > * emit_blt_fast_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ahnd: allocator handle
> > * @blt: blitter data for fast-copy (same as for block-copy but doesn't use
> > * compression fields).
> > @@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
> > * Returns:
> > * Next write position in batch.
> > */
> > -uint64_t emit_blt_fast_copy(int i915,
> > +uint64_t emit_blt_fast_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > uint64_t bb_pos,
> > @@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > uint32_t bbe = MI_BATCH_BUFFER_END;
> > uint32_t *bb;
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > data.dw00.client = 0x2;
> > data.dw00.opcode = 0x42;
> > @@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > data.dw08.src_address_lo = src_offset;
> > data.dw09.src_address_hi = src_offset >> 32;
> > - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
> > + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
> > PROT_READ | PROT_WRITE);
> > igt_assert(bb_pos + sizeof(data) < blt->bb.size);
> > @@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > /**
> > * blt_fast_copy:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @ctx: intel_ctx_t context
> > * @e: blitter engine for @ctx
> > * @ahnd: allocator handle
> > @@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
> > * Returns:
> > * execbuffer status.
> > */
> > -int blt_fast_copy(int i915,
> > +int blt_fast_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
> > uint64_t dst_offset, src_offset, bb_offset, alignment;
> > int ret;
> > - alignment = gem_detect_safe_alignment(i915);
> > + alignment = gem_detect_safe_alignment(fd);
> > src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> > dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> > bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
> > - emit_blt_fast_copy(i915, ahnd, blt, 0, true);
> > + emit_blt_fast_copy(fd, ahnd, blt, 0, true);
> > obj[0].offset = CANONICAL(dst_offset);
> > obj[1].offset = CANONICAL(src_offset);
> > @@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
> > execbuf.buffers_ptr = to_user_pointer(obj);
> > execbuf.rsvd1 = ctx ? ctx->id : 0;
> > execbuf.flags = e ? e->flags : I915_EXEC_BLT;
> > - ret = __gem_execbuf(i915, &execbuf);
> > + ret = __gem_execbuf(fd, &execbuf);
> > put_offset(ahnd, blt->dst.handle);
> > put_offset(ahnd, blt->src.handle);
> > put_offset(ahnd, blt->bb.handle);
> > @@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
> > }
> > struct blt_copy_object *
> > -blt_create_object(int i915, uint32_t region,
> > +blt_create_object(int fd, uint32_t region,
> > uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > enum blt_tiling_type tiling,
> > enum blt_compression compression,
> > @@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
> > obj = calloc(1, sizeof(*obj));
> > obj->size = size;
> > - igt_assert(__gem_create_in_memory_regions(i915, &handle,
> > + igt_assert(__gem_create_in_memory_regions(fd, &handle,
> > &size, region) == 0);
> > blt_set_object(obj, handle, size, region, mocs, tiling,
> > @@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
> > blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
> > if (create_mapping)
> > - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
> > + obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
> > PROT_READ | PROT_WRITE);
> > return obj;
> > }
> > -void blt_destroy_object(int i915, struct blt_copy_object *obj)
> > +void blt_destroy_object(int fd, struct blt_copy_object *obj)
> > {
> > if (obj->ptr)
> > munmap(obj->ptr, obj->size);
> > - gem_close(i915, obj->handle);
> > + gem_close(fd, obj->handle);
> > free(obj);
> > }
> > @@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > /**
> > * blt_surface_fill_rect:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
> > * @width: width
> > * @height: height
> > @@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > * Function fills surface @width x @height * 24bpp with color gradient
> > * (internally uses ARGB where A == 0xff, see Cairo docs).
> > */
> > -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height)
> > {
> > cairo_surface_t *surface;
> > @@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > void *map = obj->ptr;
> > if (!map)
> > - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> > + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> > obj->size, PROT_READ | PROT_WRITE);
> > surface = cairo_image_surface_create_for_data(map,
> > @@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> > /**
> > * blt_surface_to_png:
> > - * @i915: drm fd
> > + * @fd: drm fd
> > * @run_id: prefix id to allow grouping files stored from single run
> > * @fileid: file identifier
> > * @obj: blitter copy object (@blt_copy_object) to save to png
> > @@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
> > *
> > * Function save surface to png file. Assumes ARGB format where A == 0xff.
> > */
> > -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> > const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height)
> > {
> > @@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > obj->compression ? "compressed" : "uncompressed");
> > if (!map)
> > - map = gem_mmap__device_coherent(i915, obj->handle, 0,
> > + map = gem_mmap__device_coherent(fd, obj->handle, 0,
> > obj->size, PROT_READ);
> > format = CAIRO_FORMAT_RGB24;
> > surface = cairo_image_surface_create_for_data(map,
> > diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
> > similarity index 86%
> > rename from lib/i915/i915_blt.h
> > rename to lib/intel_blt.h
> > index a5f0edd154..0cbe881f4a 100644
> > --- a/lib/i915/i915_blt.h
> > +++ b/lib/intel_blt.h
> > @@ -3,11 +3,14 @@
> > * Copyright © 2022 Intel Corporation
> > */
> > +#ifndef __INTEL_BLT_H__
> > +#define __INTEL_BLT_H__
> > +
> > /**
> > - * SECTION:i915_blt
> > + * SECTION:intel_blt
> > * @short_description: i915 blitter library
> > * @title: Blitter library
> > - * @include: i915_blt.h
> > + * @include: intel_blt.h
> > *
> > * # Introduction
> > *
> > @@ -95,7 +98,7 @@ struct blt_copy_batch {
> > /* Common for block-copy and fast-copy */
> > struct blt_copy_data {
> > - int i915;
> > + int fd;
> > struct blt_copy_object src;
> > struct blt_copy_object dst;
> > struct blt_copy_batch bb;
> > @@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
> > };
> > struct blt_ctrl_surf_copy_data {
> > - int i915;
> > + int fd;
> > struct blt_ctrl_surf_copy_object src;
> > struct blt_ctrl_surf_copy_object dst;
> > struct blt_copy_batch bb;
> > @@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
> > enum blt_cmd_type cmd,
> > uint32_t prop);
> > -bool blt_has_block_copy(int i915);
> > -bool blt_has_fast_copy(int i915);
> > -bool blt_has_xy_src_copy(int i915);
> > +bool blt_has_block_copy(int fd);
> > +bool blt_has_fast_copy(int fd);
> > +bool blt_has_xy_src_copy(int fd);
> > -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
> > -bool blt_block_copy_supports_compression(int i915);
> > -bool blt_uses_extended_block_copy(int i915);
> > +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
> > +bool blt_block_copy_supports_compression(int fd);
> > +bool blt_uses_extended_block_copy(int fd);
> > const char *blt_tiling_name(enum blt_tiling_type tiling);
> > -uint64_t emit_blt_block_copy(int i915,
> > +uint64_t emit_blt_block_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_block_copy(int i915,
> > +int blt_block_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > const struct blt_block_copy_data_ext *ext);
> > -uint64_t emit_blt_ctrl_surf_copy(int i915,
> > +uint64_t emit_blt_ctrl_surf_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_ctrl_surf_copy(int i915,
> > +int blt_ctrl_surf_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > const struct blt_ctrl_surf_copy_data *surf);
> > -uint64_t emit_blt_fast_copy(int i915,
> > +uint64_t emit_blt_fast_copy(int fd,
> > uint64_t ahnd,
> > const struct blt_copy_data *blt,
> > uint64_t bb_pos,
> > bool emit_bbe);
> > -int blt_fast_copy(int i915,
> > +int blt_fast_copy(int fd,
> > const intel_ctx_t *ctx,
> > const struct intel_execution_engine2 *e,
> > uint64_t ahnd,
> > @@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
> > uint32_t handle, uint64_t size, uint32_t region);
> > struct blt_copy_object *
> > -blt_create_object(int i915, uint32_t region,
> > +blt_create_object(int fd, uint32_t region,
> > uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
> > enum blt_tiling_type tiling,
> > enum blt_compression compression,
> > enum blt_compression_type compression_type,
> > bool create_mapping);
> > -void blt_destroy_object(int i915, struct blt_copy_object *obj);
> > +void blt_destroy_object(int fd, struct blt_copy_object *obj);
> > void blt_set_object(struct blt_copy_object *obj,
> > uint32_t handle, uint64_t size, uint32_t region,
> > uint8_t mocs, enum blt_tiling_type tiling,
> > @@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
> > void blt_surface_info(const char *info,
> > const struct blt_copy_object *obj);
> > -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
> > +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height);
> > -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
> > +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
> > const struct blt_copy_object *obj,
> > uint32_t width, uint32_t height);
> > +
> > +#endif
> > diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> > index accfa90ef0..84cf1799e9 100644
> > --- a/lib/intel_chipset.h
> > +++ b/lib/intel_chipset.h
> > @@ -31,7 +31,7 @@
> > #include <pciaccess.h>
> > #include <stdbool.h>
> > -#include "i915/intel_cmds_info.h"
> > +#include "intel_cmds_info.h"
> > #define BIT(x) (1ul <<(x))
> > diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
> > similarity index 99%
> > rename from lib/i915/intel_cmds_info.c
> > rename to lib/intel_cmds_info.c
> > index 166fb4740c..151cb5f724 100644
> > --- a/lib/i915/intel_cmds_info.c
> > +++ b/lib/intel_cmds_info.c
> > @@ -7,7 +7,7 @@
> > #include <stddef.h>
> > #include "intel_chipset.h"
> > -#include "i915/intel_cmds_info.h"
> > +#include "intel_cmds_info.h"
> > #define BLT_INFO(_cmd, _tiling) { \
> > .blt_cmd_type = _cmd, \
> > diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
> > similarity index 100%
> > rename from lib/i915/intel_cmds_info.h
> > rename to lib/intel_cmds_info.h
> > diff --git a/lib/meson.build b/lib/meson.build
> > index 8e99770837..3e1ecdee2b 100644
> > --- a/lib/meson.build
> > +++ b/lib/meson.build
> > @@ -13,8 +13,6 @@ lib_sources = [
> > 'i915/gem_vm.c',
> > 'i915/intel_decode.c',
> > 'i915/intel_memory_region.c',
> > - 'i915/intel_cmds_info.c',
> > - 'i915/i915_blt.c',
> > 'i915/i915_crc.c',
> > 'igt_collection.c',
> > 'igt_color_encoding.c',
> > @@ -54,8 +52,10 @@ lib_sources = [
> > 'intel_allocator_reloc.c',
> > 'intel_allocator_simple.c',
> > 'intel_batchbuffer.c',
> > + 'intel_blt.c',
> > 'intel_bufops.c',
> > 'intel_chipset.c',
> > + 'intel_cmds_info.c',
> > 'intel_ctx.c',
> > 'intel_device_info.c',
> > 'intel_mmio.c',
> > @@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
> > lin_igt_chipset_build = static_library('igt_chipset',
> > ['intel_chipset.c',
> > 'intel_device_info.c',
> > - 'i915/intel_cmds_info.c'],
> > + 'intel_cmds_info.c'],
> > include_directories : inc)
> > lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
> > @@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
> > 'igt_list.c',
> > 'igt_tools_stub.c',
> > 'intel_device_info.c',
> > - 'i915/intel_cmds_info.c',
> > + 'intel_cmds_info.c',
> > ],
> > dependencies : scan_dep,
> > include_directories : inc)
> > diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
> > index 85ca86eed1..fefb5d996f 100644
> > --- a/tests/i915/api_intel_bb.c
> > +++ b/tests/i915/api_intel_bb.c
> > @@ -40,7 +40,7 @@
> > #include "intel_bufops.h"
> > #include "i915/gem_vm.h"
> > #include "i915/i915_crc.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: api intel bb
> > * Description: intel_bb API check.
> > diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> > index 681fe04666..f058644ba5 100644
> > --- a/tests/i915/gem_blits.c
> > +++ b/tests/i915/gem_blits.c
> > @@ -27,7 +27,7 @@
> > #include "i915/gem_create.h"
> > #include "igt.h"
> > #include "igt_x86.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem blits
> > * Category: Infrastructure
> > diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
> > index 7af427d7e4..55e466a3ee 100644
> > --- a/tests/i915/gem_caching.c
> > +++ b/tests/i915/gem_caching.c
> > @@ -39,7 +39,7 @@
> > #include "i915/gem.h"
> > #include "igt.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem caching
> > * Category: Desktop client
> > diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> > index d38ab49a4b..1b2311f698 100644
> > --- a/tests/i915/gem_ccs.c
> > +++ b/tests/i915/gem_ccs.c
> > @@ -13,7 +13,7 @@
> > #include "i915/gem.h"
> > #include "i915/gem_create.h"
> > #include "lib/intel_chipset.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem ccs
> > @@ -167,7 +167,7 @@ static void surf_copy(int i915,
> > ccs = gem_create(i915, ccssize);
> > ccs2 = gem_create(i915, ccssize);
> > - surf.i915 = i915;
> > + surf.fd = i915;
> > surf.print_bb = param.print_bb;
> > set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
> > uc_mocs, BLT_INDIRECT_ACCESS);
> > diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
> > index 89f89d212b..3ec02c22e2 100644
> > --- a/tests/i915/gem_exercise_blt.c
> > +++ b/tests/i915/gem_exercise_blt.c
> > @@ -8,7 +8,7 @@
> > #include "i915/gem.h"
> > #include "i915/gem_create.h"
> > #include "lib/intel_chipset.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem exercise blt
> > diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
> > index bdbbf99efe..32b9052507 100644
> > --- a/tests/i915/gem_linear_blits.c
> > +++ b/tests/i915/gem_linear_blits.c
> > @@ -48,7 +48,7 @@
> > #include "i915/gem_create.h"
> > #include "igt.h"
> > #include "igt_types.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem linear blits
> > * Description: Test doing many blits with a working set larger than the aperture size.
> > diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
> > index 8211edbe30..0ef1ceb13f 100644
> > --- a/tests/i915/gem_lmem_swapping.c
> > +++ b/tests/i915/gem_lmem_swapping.c
> > @@ -22,7 +22,7 @@
> > #include <sys/time.h>
> > #include <sys/wait.h>
> > #include "drm.h"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > #include "intel_mocs.h"
> > /**
> > * TEST: gem lmem swapping
> > diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> > index e9235a6898..4f9b854cc0 100644
> > --- a/tests/i915/gem_userptr_blits.c
> > +++ b/tests/i915/gem_userptr_blits.c
> > @@ -66,7 +66,7 @@
> > #include "sw_sync.h"
> > #include "eviction_common.c"
> > -#include "i915/i915_blt.h"
> > +#include "intel_blt.h"
> > /**
> > * TEST: gem userptr blits
> > * Run type: FULL
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe
2023-06-23 11:02 ` Zbigniew Kempczyński
@ 2023-06-23 11:11 ` Karolina Stolarek
0 siblings, 0 replies; 13+ messages in thread
From: Karolina Stolarek @ 2023-06-23 11:11 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
On 23.06.2023 13:02, Zbigniew Kempczyński wrote:
> On Fri, Jun 23, 2023 at 11:33:20AM +0200, Karolina Stolarek wrote:
>> Hi Zbigniew,
>>
>> I read through this, and apart from that "@short_description" line in
>> intel_blt.h, I think the re-name went well. Once you fixed it, you have my:
>
> I couldn't add 'i915/Xe' as it wouldn't be true.
Or say Intel graphics ;)
>
>>
>> Reviewed-by: Karolina Stolarek <karolina.stolarek@intel.com>
>>
>> The only other nit would be the patch subject. I'd say that it renames the
>> blit library to be more generic, and keep the description as it is. But it's
>> a minor thing, and the final decision is yours.
>
> That's the preparation step to extend to xe, not the extension itself. >
>>
>> A follow-up question -- do you plan to change or update blitter lib tests to
>> support Xe? gem_exercise_blt/gem_ccs tests still refer to i915.
>
> Due to some differences in setup path for block-copy() and others
> I'm going to copy those tests to xe_exercise_blt + xe_ccs. Main
> problem for Xe path is explicit binding/unbinding especially
> when client of the code wants to achieve pipelining (without stalls).
Right, we'd get quite a long setup... your solution makes sense
>
> Thank you for the review. I'm going to merge as it is, especially
> that's doesn't change the code logic.
You're welcome. Yeah, and it compiles with no issues on my side. Gitlab
pipeline was a bit upset earlier today about this series, but it looks
more like a CI issue.
All the best,
Karolina
>
> --
> Zbigniew
>
>>
>> All the best,
>> Karolina
>>
>> On 23.06.2023 10:46, Zbigniew Kempczyński wrote:
>>> Migrate i915/i915_blt -> intel_blt as a preparation step before
>>> extending to support xe. It is a simple move of files and rename
>>> of i915 -> fd field.
>>>
>>> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
>>> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
>>> ---
>>> .../igt-gpu-tools/igt-gpu-tools-docs.xml | 2 +-
>>> lib/intel_batchbuffer.c | 2 +-
>>> lib/{i915/i915_blt.c => intel_blt.c} | 144 +++++++++---------
>>> lib/{i915/i915_blt.h => intel_blt.h} | 49 +++---
>>> lib/intel_chipset.h | 2 +-
>>> lib/{i915 => }/intel_cmds_info.c | 2 +-
>>> lib/{i915 => }/intel_cmds_info.h | 0
>>> lib/meson.build | 8 +-
>>> tests/i915/api_intel_bb.c | 2 +-
>>> tests/i915/gem_blits.c | 2 +-
>>> tests/i915/gem_caching.c | 2 +-
>>> tests/i915/gem_ccs.c | 4 +-
>>> tests/i915/gem_exercise_blt.c | 2 +-
>>> tests/i915/gem_linear_blits.c | 2 +-
>>> tests/i915/gem_lmem_swapping.c | 2 +-
>>> tests/i915/gem_userptr_blits.c | 2 +-
>>> 16 files changed, 116 insertions(+), 111 deletions(-)
>>> rename lib/{i915/i915_blt.c => intel_blt.c} (92%)
>>> rename lib/{i915/i915_blt.h => intel_blt.h} (86%)
>>> rename lib/{i915 => }/intel_cmds_info.c (99%)
>>> rename lib/{i915 => }/intel_cmds_info.h (100%)
>>>
>>> diff --git a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
>>> index 102c8a8978..9085eb924e 100644
>>> --- a/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
>>> +++ b/docs/reference/igt-gpu-tools/igt-gpu-tools-docs.xml
>>> @@ -64,7 +64,7 @@
>>> <xi:include href="xml/gem_engine_topology.xml"/>
>>> <xi:include href="xml/gem_scheduler.xml"/>
>>> <xi:include href="xml/gem_submission.xml"/>
>>> - <xi:include href="xml/i915_blt.xml"/>
>>> + <xi:include href="xml/intel_blt.xml"/>
>>> <xi:include href="xml/i915_crc.xml"/>
>>> <xi:include href="xml/intel_ctx.xml"/>
>>> </chapter>
>>> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
>>> index 3cd680072e..186f65affe 100644
>>> --- a/lib/intel_batchbuffer.c
>>> +++ b/lib/intel_batchbuffer.c
>>> @@ -32,7 +32,7 @@
>>> #include "huc_copy.h"
>>> #include "i915/gem_create.h"
>>> #include "i915/gem_mman.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> #include "igt_aux.h"
>>> #include "igt_syncobj.h"
>>> #include "intel_batchbuffer.h"
>>> diff --git a/lib/i915/i915_blt.c b/lib/intel_blt.c
>>> similarity index 92%
>>> rename from lib/i915/i915_blt.c
>>> rename to lib/intel_blt.c
>>> index ef67fe26f3..28a7400942 100644
>>> --- a/lib/i915/i915_blt.c
>>> +++ b/lib/intel_blt.c
>>> @@ -10,8 +10,8 @@
>>> #include <cairo.h>
>>> #include "drm.h"
>>> #include "igt.h"
>>> -#include "gem_create.h"
>>> -#include "i915_blt.h"
>>> +#include "i915/gem_create.h"
>>> +#include "intel_blt.h"
>>> #define BITRANGE(start, end) (end - start + 1)
>>> #define GET_CMDS_INFO(__fd) intel_get_cmds_info(intel_get_drm_devid(__fd))
>>> @@ -271,115 +271,115 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
>>> /**
>>> * blt_has_block_copy
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> *
>>> - * Check if block copy is supported by @i915 device
>>> + * Check if block copy is supported by @fd device
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_has_block_copy(int i915)
>>> +bool blt_has_block_copy(int fd)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_supports_command(cmds_info, XY_BLOCK_COPY);
>>> }
>>> /**
>>> * blt_has_fast_copy
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> *
>>> - * Check if fast copy is supported by @i915 device
>>> + * Check if fast copy is supported by @fd device
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_has_fast_copy(int i915)
>>> +bool blt_has_fast_copy(int fd)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_supports_command(cmds_info, XY_FAST_COPY);
>>> }
>>> /**
>>> * blt_has_xy_src_copy
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> *
>>> - * Check if XY src copy is supported by @i915 device
>>> + * Check if XY src copy is supported by @fd device
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_has_xy_src_copy(int i915)
>>> +bool blt_has_xy_src_copy(int fd)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_supports_command(cmds_info, XY_SRC_COPY);
>>> }
>>> /**
>>> * blt_fast_copy_supports_tiling
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @tiling: tiling format
>>> *
>>> - * Check if fast copy provided by @i915 device supports @tiling format
>>> + * Check if fast copy provided by @fd device supports @tiling format
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
>>> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_cmd_supports_tiling(cmds_info, XY_FAST_COPY, tiling);
>>> }
>>> /**
>>> * blt_block_copy_supports_tiling
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @tiling: tiling format
>>> *
>>> - * Check if block copy provided by @i915 device supports @tiling format
>>> + * Check if block copy provided by @fd device supports @tiling format
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
>>> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_cmd_supports_tiling(cmds_info, XY_BLOCK_COPY, tiling);
>>> }
>>> /**
>>> * blt_xy_src_copy_supports_tiling
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @tiling: tiling format
>>> *
>>> - * Check if XY src copy provided by @i915 device supports @tiling format
>>> + * Check if XY src copy provided by @fd device supports @tiling format
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling)
>>> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_cmd_supports_tiling(cmds_info, XY_SRC_COPY, tiling);
>>> }
>>> /**
>>> * blt_block_copy_supports_compression
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> *
>>> - * Check if block copy provided by @i915 device supports compression.
>>> + * Check if block copy provided by @fd device supports compression.
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_block_copy_supports_compression(int i915)
>>> +bool blt_block_copy_supports_compression(int fd)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY,
>>> BLT_CMD_SUPPORTS_COMPRESSION);
>>> @@ -387,17 +387,17 @@ bool blt_block_copy_supports_compression(int i915)
>>> /**
>>> * blt_uses_extended_block_copy
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> *
>>> - * Check if block copy provided by @i915 device uses an extended version
>>> + * Check if block copy provided by @fd device uses an extended version
>>> * of the command.
>>> *
>>> * Returns:
>>> * true if it does, false otherwise.
>>> */
>>> -bool blt_uses_extended_block_copy(int i915)
>>> +bool blt_uses_extended_block_copy(int fd)
>>> {
>>> - const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(i915);
>>> + const struct intel_cmds_info *cmds_info = GET_CMDS_INFO(fd);
>>> return blt_cmd_has_property(cmds_info, XY_BLOCK_COPY, BLT_CMD_EXTENDED);
>>> }
>>> @@ -678,7 +678,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
>>> /**
>>> * emit_blt_block_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ahnd: allocator handle
>>> * @blt: basic blitter data (for TGL/DG1 which doesn't support ext version)
>>> * @ext: extended blitter data (for DG2+, supports flatccs compression)
>>> @@ -691,7 +691,7 @@ static void dump_bb_ext(struct gen12_block_copy_data_ext *data)
>>> * Returns:
>>> * Next write position in batch.
>>> */
>>> -uint64_t emit_blt_block_copy(int i915,
>>> +uint64_t emit_blt_block_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_copy_data *blt,
>>> const struct blt_block_copy_data_ext *ext,
>>> @@ -707,14 +707,14 @@ uint64_t emit_blt_block_copy(int i915,
>>> igt_assert_f(ahnd, "block-copy supports softpin only\n");
>>> igt_assert_f(blt, "block-copy requires data to do blit\n");
>>> - alignment = gem_detect_safe_alignment(i915);
>>> + alignment = gem_detect_safe_alignment(fd);
>>> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
>>> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
>>> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>>> fill_data(&data, blt, src_offset, dst_offset, ext);
>>> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
>>> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
>>> PROT_READ | PROT_WRITE);
>>> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
>>> @@ -752,7 +752,7 @@ uint64_t emit_blt_block_copy(int i915,
>>> /**
>>> * blt_block_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ctx: intel_ctx_t context
>>> * @e: blitter engine for @ctx
>>> * @ahnd: allocator handle
>>> @@ -764,7 +764,7 @@ uint64_t emit_blt_block_copy(int i915,
>>> * Returns:
>>> * execbuffer status.
>>> */
>>> -int blt_block_copy(int i915,
>>> +int blt_block_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> @@ -779,12 +779,12 @@ int blt_block_copy(int i915,
>>> igt_assert_f(ahnd, "block-copy supports softpin only\n");
>>> igt_assert_f(blt, "block-copy requires data to do blit\n");
>>> - alignment = gem_detect_safe_alignment(i915);
>>> + alignment = gem_detect_safe_alignment(fd);
>>> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
>>> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
>>> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>>> - emit_blt_block_copy(i915, ahnd, blt, ext, 0, true);
>>> + emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
>>> obj[0].offset = CANONICAL(dst_offset);
>>> obj[1].offset = CANONICAL(src_offset);
>>> @@ -800,7 +800,7 @@ int blt_block_copy(int i915,
>>> execbuf.buffers_ptr = to_user_pointer(obj);
>>> execbuf.rsvd1 = ctx ? ctx->id : 0;
>>> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
>>> - ret = __gem_execbuf(i915, &execbuf);
>>> + ret = __gem_execbuf(fd, &execbuf);
>>> return ret;
>>> }
>>> @@ -873,7 +873,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
>>> /**
>>> * emit_blt_ctrl_surf_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ahnd: allocator handle
>>> * @surf: blitter data for ctrl-surf-copy
>>> * @bb_pos: position at which insert block copy commands
>>> @@ -886,7 +886,7 @@ static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
>>> * Returns:
>>> * Next write position in batch.
>>> */
>>> -uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> +uint64_t emit_blt_ctrl_surf_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_ctrl_surf_copy_data *surf,
>>> uint64_t bb_pos,
>>> @@ -900,7 +900,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
>>> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>>> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
>>> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
>>> data.dw00.client = 0x2;
>>> data.dw00.opcode = 0x48;
>>> @@ -923,7 +923,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> data.dw04.dst_address_hi = dst_offset >> 32;
>>> data.dw04.dst_mocs = surf->dst.mocs;
>>> - bb = gem_mmap__device_coherent(i915, surf->bb.handle, 0, surf->bb.size,
>>> + bb = gem_mmap__device_coherent(fd, surf->bb.handle, 0, surf->bb.size,
>>> PROT_READ | PROT_WRITE);
>>> igt_assert(bb_pos + sizeof(data) < surf->bb.size);
>>> @@ -952,7 +952,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> /**
>>> * blt_ctrl_surf_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ctx: intel_ctx_t context
>>> * @e: blitter engine for @ctx
>>> * @ahnd: allocator handle
>>> @@ -964,7 +964,7 @@ uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> * Returns:
>>> * execbuffer status.
>>> */
>>> -int blt_ctrl_surf_copy(int i915,
>>> +int blt_ctrl_surf_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> @@ -977,12 +977,12 @@ int blt_ctrl_surf_copy(int i915,
>>> igt_assert_f(ahnd, "ctrl-surf-copy supports softpin only\n");
>>> igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
>>> - alignment = max_t(uint64_t, gem_detect_safe_alignment(i915), 1ull << 16);
>>> + alignment = max_t(uint64_t, gem_detect_safe_alignment(fd), 1ull << 16);
>>> src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
>>> dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
>>> bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
>>> - emit_blt_ctrl_surf_copy(i915, ahnd, surf, 0, true);
>>> + emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
>>> obj[0].offset = CANONICAL(dst_offset);
>>> obj[1].offset = CANONICAL(src_offset);
>>> @@ -998,7 +998,7 @@ int blt_ctrl_surf_copy(int i915,
>>> execbuf.buffers_ptr = to_user_pointer(obj);
>>> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
>>> execbuf.rsvd1 = ctx ? ctx->id : 0;
>>> - gem_execbuf(i915, &execbuf);
>>> + gem_execbuf(fd, &execbuf);
>>> put_offset(ahnd, surf->dst.handle);
>>> put_offset(ahnd, surf->src.handle);
>>> put_offset(ahnd, surf->bb.handle);
>>> @@ -1133,7 +1133,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
>>> /**
>>> * emit_blt_fast_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ahnd: allocator handle
>>> * @blt: blitter data for fast-copy (same as for block-copy but doesn't use
>>> * compression fields).
>>> @@ -1147,7 +1147,7 @@ static void dump_bb_fast_cmd(struct gen12_fast_copy_data *data)
>>> * Returns:
>>> * Next write position in batch.
>>> */
>>> -uint64_t emit_blt_fast_copy(int i915,
>>> +uint64_t emit_blt_fast_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_copy_data *blt,
>>> uint64_t bb_pos,
>>> @@ -1158,7 +1158,7 @@ uint64_t emit_blt_fast_copy(int i915,
>>> uint32_t bbe = MI_BATCH_BUFFER_END;
>>> uint32_t *bb;
>>> - alignment = gem_detect_safe_alignment(i915);
>>> + alignment = gem_detect_safe_alignment(fd);
>>> data.dw00.client = 0x2;
>>> data.dw00.opcode = 0x42;
>>> @@ -1194,7 +1194,7 @@ uint64_t emit_blt_fast_copy(int i915,
>>> data.dw08.src_address_lo = src_offset;
>>> data.dw09.src_address_hi = src_offset >> 32;
>>> - bb = gem_mmap__device_coherent(i915, blt->bb.handle, 0, blt->bb.size,
>>> + bb = gem_mmap__device_coherent(fd, blt->bb.handle, 0, blt->bb.size,
>>> PROT_READ | PROT_WRITE);
>>> igt_assert(bb_pos + sizeof(data) < blt->bb.size);
>>> @@ -1222,7 +1222,7 @@ uint64_t emit_blt_fast_copy(int i915,
>>> /**
>>> * blt_fast_copy:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @ctx: intel_ctx_t context
>>> * @e: blitter engine for @ctx
>>> * @ahnd: allocator handle
>>> @@ -1234,7 +1234,7 @@ uint64_t emit_blt_fast_copy(int i915,
>>> * Returns:
>>> * execbuffer status.
>>> */
>>> -int blt_fast_copy(int i915,
>>> +int blt_fast_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> @@ -1245,13 +1245,13 @@ int blt_fast_copy(int i915,
>>> uint64_t dst_offset, src_offset, bb_offset, alignment;
>>> int ret;
>>> - alignment = gem_detect_safe_alignment(i915);
>>> + alignment = gem_detect_safe_alignment(fd);
>>> src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
>>> dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
>>> bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>>> - emit_blt_fast_copy(i915, ahnd, blt, 0, true);
>>> + emit_blt_fast_copy(fd, ahnd, blt, 0, true);
>>> obj[0].offset = CANONICAL(dst_offset);
>>> obj[1].offset = CANONICAL(src_offset);
>>> @@ -1267,7 +1267,7 @@ int blt_fast_copy(int i915,
>>> execbuf.buffers_ptr = to_user_pointer(obj);
>>> execbuf.rsvd1 = ctx ? ctx->id : 0;
>>> execbuf.flags = e ? e->flags : I915_EXEC_BLT;
>>> - ret = __gem_execbuf(i915, &execbuf);
>>> + ret = __gem_execbuf(fd, &execbuf);
>>> put_offset(ahnd, blt->dst.handle);
>>> put_offset(ahnd, blt->src.handle);
>>> put_offset(ahnd, blt->bb.handle);
>>> @@ -1297,7 +1297,7 @@ void blt_set_batch(struct blt_copy_batch *batch,
>>> }
>>> struct blt_copy_object *
>>> -blt_create_object(int i915, uint32_t region,
>>> +blt_create_object(int fd, uint32_t region,
>>> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>> enum blt_tiling_type tiling,
>>> enum blt_compression compression,
>>> @@ -1312,7 +1312,7 @@ blt_create_object(int i915, uint32_t region,
>>> obj = calloc(1, sizeof(*obj));
>>> obj->size = size;
>>> - igt_assert(__gem_create_in_memory_regions(i915, &handle,
>>> + igt_assert(__gem_create_in_memory_regions(fd, &handle,
>>> &size, region) == 0);
>>> blt_set_object(obj, handle, size, region, mocs, tiling,
>>> @@ -1320,18 +1320,18 @@ blt_create_object(int i915, uint32_t region,
>>> blt_set_geom(obj, stride, 0, 0, width, height, 0, 0);
>>> if (create_mapping)
>>> - obj->ptr = gem_mmap__device_coherent(i915, handle, 0, size,
>>> + obj->ptr = gem_mmap__device_coherent(fd, handle, 0, size,
>>> PROT_READ | PROT_WRITE);
>>> return obj;
>>> }
>>> -void blt_destroy_object(int i915, struct blt_copy_object *obj)
>>> +void blt_destroy_object(int fd, struct blt_copy_object *obj)
>>> {
>>> if (obj->ptr)
>>> munmap(obj->ptr, obj->size);
>>> - gem_close(i915, obj->handle);
>>> + gem_close(fd, obj->handle);
>>> free(obj);
>>> }
>>> @@ -1372,7 +1372,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>>> /**
>>> * blt_surface_fill_rect:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @obj: blitter copy object (@blt_copy_object) to fill with gradient pattern
>>> * @width: width
>>> * @height: height
>>> @@ -1380,7 +1380,7 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>>> * Function fills surface @width x @height * 24bpp with color gradient
>>> * (internally uses ARGB where A == 0xff, see Cairo docs).
>>> */
>>> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
>>> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
>>> uint32_t width, uint32_t height)
>>> {
>>> cairo_surface_t *surface;
>>> @@ -1389,7 +1389,7 @@ void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
>>> void *map = obj->ptr;
>>> if (!map)
>>> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
>>> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
>>> obj->size, PROT_READ | PROT_WRITE);
>>> surface = cairo_image_surface_create_for_data(map,
>>> @@ -1445,7 +1445,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
>>> /**
>>> * blt_surface_to_png:
>>> - * @i915: drm fd
>>> + * @fd: drm fd
>>> * @run_id: prefix id to allow grouping files stored from single run
>>> * @fileid: file identifier
>>> * @obj: blitter copy object (@blt_copy_object) to save to png
>>> @@ -1454,7 +1454,7 @@ void blt_surface_info(const char *info, const struct blt_copy_object *obj)
>>> *
>>> * Function save surface to png file. Assumes ARGB format where A == 0xff.
>>> */
>>> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
>>> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
>>> const struct blt_copy_object *obj,
>>> uint32_t width, uint32_t height)
>>> {
>>> @@ -1470,7 +1470,7 @@ void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
>>> obj->compression ? "compressed" : "uncompressed");
>>> if (!map)
>>> - map = gem_mmap__device_coherent(i915, obj->handle, 0,
>>> + map = gem_mmap__device_coherent(fd, obj->handle, 0,
>>> obj->size, PROT_READ);
>>> format = CAIRO_FORMAT_RGB24;
>>> surface = cairo_image_surface_create_for_data(map,
>>> diff --git a/lib/i915/i915_blt.h b/lib/intel_blt.h
>>> similarity index 86%
>>> rename from lib/i915/i915_blt.h
>>> rename to lib/intel_blt.h
>>> index a5f0edd154..0cbe881f4a 100644
>>> --- a/lib/i915/i915_blt.h
>>> +++ b/lib/intel_blt.h
>>> @@ -3,11 +3,14 @@
>>> * Copyright © 2022 Intel Corporation
>>> */
>>> +#ifndef __INTEL_BLT_H__
>>> +#define __INTEL_BLT_H__
>>> +
>>> /**
>>> - * SECTION:i915_blt
>>> + * SECTION:intel_blt
>>> * @short_description: i915 blitter library
>>> * @title: Blitter library
>>> - * @include: i915_blt.h
>>> + * @include: intel_blt.h
>>> *
>>> * # Introduction
>>> *
>>> @@ -95,7 +98,7 @@ struct blt_copy_batch {
>>> /* Common for block-copy and fast-copy */
>>> struct blt_copy_data {
>>> - int i915;
>>> + int fd;
>>> struct blt_copy_object src;
>>> struct blt_copy_object dst;
>>> struct blt_copy_batch bb;
>>> @@ -148,7 +151,7 @@ struct blt_ctrl_surf_copy_object {
>>> };
>>> struct blt_ctrl_surf_copy_data {
>>> - int i915;
>>> + int fd;
>>> struct blt_ctrl_surf_copy_object src;
>>> struct blt_ctrl_surf_copy_object dst;
>>> struct blt_copy_batch bb;
>>> @@ -166,51 +169,51 @@ bool blt_cmd_has_property(const struct intel_cmds_info *cmds_info,
>>> enum blt_cmd_type cmd,
>>> uint32_t prop);
>>> -bool blt_has_block_copy(int i915);
>>> -bool blt_has_fast_copy(int i915);
>>> -bool blt_has_xy_src_copy(int i915);
>>> +bool blt_has_block_copy(int fd);
>>> +bool blt_has_fast_copy(int fd);
>>> +bool blt_has_xy_src_copy(int fd);
>>> -bool blt_fast_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
>>> -bool blt_block_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
>>> -bool blt_xy_src_copy_supports_tiling(int i915, enum blt_tiling_type tiling);
>>> -bool blt_block_copy_supports_compression(int i915);
>>> -bool blt_uses_extended_block_copy(int i915);
>>> +bool blt_fast_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
>>> +bool blt_block_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
>>> +bool blt_xy_src_copy_supports_tiling(int fd, enum blt_tiling_type tiling);
>>> +bool blt_block_copy_supports_compression(int fd);
>>> +bool blt_uses_extended_block_copy(int fd);
>>> const char *blt_tiling_name(enum blt_tiling_type tiling);
>>> -uint64_t emit_blt_block_copy(int i915,
>>> +uint64_t emit_blt_block_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_copy_data *blt,
>>> const struct blt_block_copy_data_ext *ext,
>>> uint64_t bb_pos,
>>> bool emit_bbe);
>>> -int blt_block_copy(int i915,
>>> +int blt_block_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> const struct blt_copy_data *blt,
>>> const struct blt_block_copy_data_ext *ext);
>>> -uint64_t emit_blt_ctrl_surf_copy(int i915,
>>> +uint64_t emit_blt_ctrl_surf_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_ctrl_surf_copy_data *surf,
>>> uint64_t bb_pos,
>>> bool emit_bbe);
>>> -int blt_ctrl_surf_copy(int i915,
>>> +int blt_ctrl_surf_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> const struct blt_ctrl_surf_copy_data *surf);
>>> -uint64_t emit_blt_fast_copy(int i915,
>>> +uint64_t emit_blt_fast_copy(int fd,
>>> uint64_t ahnd,
>>> const struct blt_copy_data *blt,
>>> uint64_t bb_pos,
>>> bool emit_bbe);
>>> -int blt_fast_copy(int i915,
>>> +int blt_fast_copy(int fd,
>>> const intel_ctx_t *ctx,
>>> const struct intel_execution_engine2 *e,
>>> uint64_t ahnd,
>>> @@ -223,13 +226,13 @@ void blt_set_batch(struct blt_copy_batch *batch,
>>> uint32_t handle, uint64_t size, uint32_t region);
>>> struct blt_copy_object *
>>> -blt_create_object(int i915, uint32_t region,
>>> +blt_create_object(int fd, uint32_t region,
>>> uint32_t width, uint32_t height, uint32_t bpp, uint8_t mocs,
>>> enum blt_tiling_type tiling,
>>> enum blt_compression compression,
>>> enum blt_compression_type compression_type,
>>> bool create_mapping);
>>> -void blt_destroy_object(int i915, struct blt_copy_object *obj);
>>> +void blt_destroy_object(int fd, struct blt_copy_object *obj);
>>> void blt_set_object(struct blt_copy_object *obj,
>>> uint32_t handle, uint64_t size, uint32_t region,
>>> uint8_t mocs, enum blt_tiling_type tiling,
>>> @@ -244,8 +247,10 @@ void blt_set_copy_object(struct blt_copy_object *obj,
>>> void blt_surface_info(const char *info,
>>> const struct blt_copy_object *obj);
>>> -void blt_surface_fill_rect(int i915, const struct blt_copy_object *obj,
>>> +void blt_surface_fill_rect(int fd, const struct blt_copy_object *obj,
>>> uint32_t width, uint32_t height);
>>> -void blt_surface_to_png(int i915, uint32_t run_id, const char *fileid,
>>> +void blt_surface_to_png(int fd, uint32_t run_id, const char *fileid,
>>> const struct blt_copy_object *obj,
>>> uint32_t width, uint32_t height);
>>> +
>>> +#endif
>>> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
>>> index accfa90ef0..84cf1799e9 100644
>>> --- a/lib/intel_chipset.h
>>> +++ b/lib/intel_chipset.h
>>> @@ -31,7 +31,7 @@
>>> #include <pciaccess.h>
>>> #include <stdbool.h>
>>> -#include "i915/intel_cmds_info.h"
>>> +#include "intel_cmds_info.h"
>>> #define BIT(x) (1ul <<(x))
>>> diff --git a/lib/i915/intel_cmds_info.c b/lib/intel_cmds_info.c
>>> similarity index 99%
>>> rename from lib/i915/intel_cmds_info.c
>>> rename to lib/intel_cmds_info.c
>>> index 166fb4740c..151cb5f724 100644
>>> --- a/lib/i915/intel_cmds_info.c
>>> +++ b/lib/intel_cmds_info.c
>>> @@ -7,7 +7,7 @@
>>> #include <stddef.h>
>>> #include "intel_chipset.h"
>>> -#include "i915/intel_cmds_info.h"
>>> +#include "intel_cmds_info.h"
>>> #define BLT_INFO(_cmd, _tiling) { \
>>> .blt_cmd_type = _cmd, \
>>> diff --git a/lib/i915/intel_cmds_info.h b/lib/intel_cmds_info.h
>>> similarity index 100%
>>> rename from lib/i915/intel_cmds_info.h
>>> rename to lib/intel_cmds_info.h
>>> diff --git a/lib/meson.build b/lib/meson.build
>>> index 8e99770837..3e1ecdee2b 100644
>>> --- a/lib/meson.build
>>> +++ b/lib/meson.build
>>> @@ -13,8 +13,6 @@ lib_sources = [
>>> 'i915/gem_vm.c',
>>> 'i915/intel_decode.c',
>>> 'i915/intel_memory_region.c',
>>> - 'i915/intel_cmds_info.c',
>>> - 'i915/i915_blt.c',
>>> 'i915/i915_crc.c',
>>> 'igt_collection.c',
>>> 'igt_color_encoding.c',
>>> @@ -54,8 +52,10 @@ lib_sources = [
>>> 'intel_allocator_reloc.c',
>>> 'intel_allocator_simple.c',
>>> 'intel_batchbuffer.c',
>>> + 'intel_blt.c',
>>> 'intel_bufops.c',
>>> 'intel_chipset.c',
>>> + 'intel_cmds_info.c',
>>> 'intel_ctx.c',
>>> 'intel_device_info.c',
>>> 'intel_mmio.c',
>>> @@ -232,7 +232,7 @@ igt_deps = [ lib_igt ] + lib_deps
>>> lin_igt_chipset_build = static_library('igt_chipset',
>>> ['intel_chipset.c',
>>> 'intel_device_info.c',
>>> - 'i915/intel_cmds_info.c'],
>>> + 'intel_cmds_info.c'],
>>> include_directories : inc)
>>> lib_igt_chipset = declare_dependency(link_with : lin_igt_chipset_build,
>>> @@ -255,7 +255,7 @@ lib_igt_device_scan_build = static_library('igt_device_scan',
>>> 'igt_list.c',
>>> 'igt_tools_stub.c',
>>> 'intel_device_info.c',
>>> - 'i915/intel_cmds_info.c',
>>> + 'intel_cmds_info.c',
>>> ],
>>> dependencies : scan_dep,
>>> include_directories : inc)
>>> diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
>>> index 85ca86eed1..fefb5d996f 100644
>>> --- a/tests/i915/api_intel_bb.c
>>> +++ b/tests/i915/api_intel_bb.c
>>> @@ -40,7 +40,7 @@
>>> #include "intel_bufops.h"
>>> #include "i915/gem_vm.h"
>>> #include "i915/i915_crc.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> /**
>>> * TEST: api intel bb
>>> * Description: intel_bb API check.
>>> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
>>> index 681fe04666..f058644ba5 100644
>>> --- a/tests/i915/gem_blits.c
>>> +++ b/tests/i915/gem_blits.c
>>> @@ -27,7 +27,7 @@
>>> #include "i915/gem_create.h"
>>> #include "igt.h"
>>> #include "igt_x86.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> /**
>>> * TEST: gem blits
>>> * Category: Infrastructure
>>> diff --git a/tests/i915/gem_caching.c b/tests/i915/gem_caching.c
>>> index 7af427d7e4..55e466a3ee 100644
>>> --- a/tests/i915/gem_caching.c
>>> +++ b/tests/i915/gem_caching.c
>>> @@ -39,7 +39,7 @@
>>> #include "i915/gem.h"
>>> #include "igt.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> /**
>>> * TEST: gem caching
>>> * Category: Desktop client
>>> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
>>> index d38ab49a4b..1b2311f698 100644
>>> --- a/tests/i915/gem_ccs.c
>>> +++ b/tests/i915/gem_ccs.c
>>> @@ -13,7 +13,7 @@
>>> #include "i915/gem.h"
>>> #include "i915/gem_create.h"
>>> #include "lib/intel_chipset.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> #include "intel_mocs.h"
>>> /**
>>> * TEST: gem ccs
>>> @@ -167,7 +167,7 @@ static void surf_copy(int i915,
>>> ccs = gem_create(i915, ccssize);
>>> ccs2 = gem_create(i915, ccssize);
>>> - surf.i915 = i915;
>>> + surf.fd = i915;
>>> surf.print_bb = param.print_bb;
>>> set_surf_object(&surf.src, mid->handle, mid->region, mid->size,
>>> uc_mocs, BLT_INDIRECT_ACCESS);
>>> diff --git a/tests/i915/gem_exercise_blt.c b/tests/i915/gem_exercise_blt.c
>>> index 89f89d212b..3ec02c22e2 100644
>>> --- a/tests/i915/gem_exercise_blt.c
>>> +++ b/tests/i915/gem_exercise_blt.c
>>> @@ -8,7 +8,7 @@
>>> #include "i915/gem.h"
>>> #include "i915/gem_create.h"
>>> #include "lib/intel_chipset.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> #include "intel_mocs.h"
>>> /**
>>> * TEST: gem exercise blt
>>> diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
>>> index bdbbf99efe..32b9052507 100644
>>> --- a/tests/i915/gem_linear_blits.c
>>> +++ b/tests/i915/gem_linear_blits.c
>>> @@ -48,7 +48,7 @@
>>> #include "i915/gem_create.h"
>>> #include "igt.h"
>>> #include "igt_types.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> /**
>>> * TEST: gem linear blits
>>> * Description: Test doing many blits with a working set larger than the aperture size.
>>> diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
>>> index 8211edbe30..0ef1ceb13f 100644
>>> --- a/tests/i915/gem_lmem_swapping.c
>>> +++ b/tests/i915/gem_lmem_swapping.c
>>> @@ -22,7 +22,7 @@
>>> #include <sys/time.h>
>>> #include <sys/wait.h>
>>> #include "drm.h"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> #include "intel_mocs.h"
>>> /**
>>> * TEST: gem lmem swapping
>>> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
>>> index e9235a6898..4f9b854cc0 100644
>>> --- a/tests/i915/gem_userptr_blits.c
>>> +++ b/tests/i915/gem_userptr_blits.c
>>> @@ -66,7 +66,7 @@
>>> #include "sw_sync.h"
>>> #include "eviction_common.c"
>>> -#include "i915/i915_blt.h"
>>> +#include "intel_blt.h"
>>> /**
>>> * TEST: gem userptr blits
>>> * Run type: FULL
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.BAT: failure for lib/intel_blt: Prepare blt library to support xe
2023-06-23 10:36 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
@ 2023-06-23 11:12 ` Zbigniew Kempczyński
2023-06-23 12:21 ` Yedireswarapu, SaiX Nandan
0 siblings, 1 reply; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-06-23 11:12 UTC (permalink / raw)
To: igt-dev; +Cc: SaiX Nandan Yedireswarapu
On Fri, Jun 23, 2023 at 10:36:07AM +0000, Patchwork wrote:
> Patch Details
>
> Series: lib/intel_blt: Prepare blt library to support xe
> URL: https://patchwork.freedesktop.org/series/119792/
> State: failure
> Details: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> CI Bug Log - changes from CI_DRM_13312 -> IGTPW_9245
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with IGTPW_9245 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_9245, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in
> CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> Participating hosts (41 -> 41)
>
> Additional (1): bat-dg1-8
> Missing (1): fi-snb-2520m
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in IGTPW_9245:
>
> IGT changes
>
> Possible regressions
>
> * igt@i915_selftest@live@gtt:
> * bat-atsm-1: PASS -> INCOMPLETE
Change doesn't touch the above.
--
Zbigniew
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * {igt@xe_create@create-massive-size}:
> * {bat-dg1-8}: NOTRUN -> FAIL +2 similar issues
>
> Known issues
>
> Here are the changes found in IGTPW_9245 that come from known issues:
>
> IGT changes
>
> Issues hit
>
> * igt@debugfs_test@basic-hwmon:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#7456)
> * igt@gem_tiled_pread_basic:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#3282)
> * igt@i915_selftest@live@gt_mocs:
>
> * bat-mtlp-8: PASS -> DMESG-FAIL (i915#7059)
>
> * bat-mtlp-6: PASS -> DMESG-FAIL (i915#7059)
>
> * igt@i915_selftest@live@guc:
>
> * bat-rpls-2: NOTRUN -> DMESG-WARN (i915#7852)
> * igt@i915_selftest@live@slpc:
>
> * bat-mtlp-6: PASS -> DMESG-WARN (i915#6367)
>
> * bat-rpls-2: NOTRUN -> DMESG-WARN (i915#6367)
>
> * igt@i915_suspend@basic-s2idle-without-i915:
>
> * bat-rpls-2: NOTRUN -> ABORT (i915#6687 / i915#8668)
> * igt@kms_chamelium_frames@hdmi-crc-fast:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#7828) +7 similar issues
> * igt@kms_chamelium_hpd@common-hpd-after-suspend:
>
> * bat-adlm-1: NOTRUN -> SKIP (i915#7828)
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#3546)
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#4103)
> * igt@kms_flip@basic-plain-flip@d-dp6:
>
> * bat-adlp-11: NOTRUN -> ABORT (i915#4423)
> * igt@kms_pipe_crc_basic@suspend-read-crc:
>
> * bat-adlm-1: NOTRUN -> SKIP (i915#1845)
>
> Possible fixes
>
> * igt@dmabuf@all-tests@dma_fence:
>
> * bat-adlm-1: DMESG-FAIL (i915#8189) -> PASS
> * igt@dmabuf@all-tests@sanitycheck:
>
> * bat-adlm-1: ABORT (i915#8423) -> PASS
> * igt@gem_exec_suspend@basic-s0@smem:
>
> * fi-rkl-11600: FAIL (fdo#103375 / i915#8011) -> PASS
> * igt@i915_module_load@load:
>
> * bat-adlp-11: ABORT (i915#4423) -> PASS
> * igt@i915_selftest@live@migrate:
>
> * bat-mtlp-8: DMESG-FAIL (i915#7699) -> PASS
> * igt@i915_selftest@live@requests:
>
> * bat-mtlp-8: DMESG-FAIL (i915#8497) -> PASS
>
> * bat-rpls-2: ABORT (i915#4983 / i915#7913) -> PASS
>
> * igt@i915_selftest@live@slpc:
>
> * bat-rpls-1: DMESG-WARN (i915#6367) -> PASS
>
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7347 -> IGTPW_9245
>
> CI-20190529: 20190529
> CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
> IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
` (3 preceding siblings ...)
2023-06-23 10:36 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
@ 2023-06-23 11:53 ` Patchwork
2023-06-23 15:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-06-23 11:53 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 10316 bytes --]
== Series Details ==
Series: lib/intel_blt: Prepare blt library to support xe
URL : https://patchwork.freedesktop.org/series/119792/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13312 -> IGTPW_9245
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
Participating hosts (41 -> 41)
------------------------------
Additional (1): bat-dg1-8
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_9245:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_create@create-massive-size}:
- {bat-dg1-8}: NOTRUN -> [FAIL][1] +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-dg1-8/igt@xe_create@create-massive-size.html
Known issues
------------
Here are the changes found in IGTPW_9245 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-adlp-11: NOTRUN -> [SKIP][2] ([i915#7456])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@debugfs_test@basic-hwmon.html
* igt@gem_tiled_pread_basic:
- bat-adlp-11: NOTRUN -> [SKIP][3] ([i915#3282])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@gem_tiled_pread_basic.html
* igt@i915_selftest@live@gt_mocs:
- bat-mtlp-8: [PASS][4] -> [DMESG-FAIL][5] ([i915#7059])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@gt_mocs.html
- bat-mtlp-6: [PASS][6] -> [DMESG-FAIL][7] ([i915#7059])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@gtt:
- bat-atsm-1: [PASS][8] -> [INCOMPLETE][9] ([i915#7913])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-atsm-1/igt@i915_selftest@live@gtt.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-atsm-1/igt@i915_selftest@live@gtt.html
* igt@i915_selftest@live@guc:
- bat-rpls-2: NOTRUN -> [DMESG-WARN][10] ([i915#7852])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@guc.html
* igt@i915_selftest@live@slpc:
- bat-mtlp-6: [PASS][11] -> [DMESG-WARN][12] ([i915#6367])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-6/igt@i915_selftest@live@slpc.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-6/igt@i915_selftest@live@slpc.html
- bat-rpls-2: NOTRUN -> [DMESG-WARN][13] ([i915#6367])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@slpc.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-rpls-2: NOTRUN -> [ABORT][14] ([i915#6687] / [i915#8668])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- bat-adlp-11: NOTRUN -> [SKIP][15] ([i915#7828]) +7 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-adlm-1: NOTRUN -> [SKIP][16] ([i915#7828])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- bat-adlp-11: NOTRUN -> [SKIP][17] ([i915#3546])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11: NOTRUN -> [SKIP][18] ([i915#4103])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_flip@basic-plain-flip@d-dp6:
- bat-adlp-11: NOTRUN -> [ABORT][19] ([i915#4423])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@kms_flip@basic-plain-flip@d-dp6.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][20] ([i915#1845])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html
#### Possible fixes ####
* igt@dmabuf@all-tests@dma_fence:
- bat-adlm-1: [DMESG-FAIL][21] ([i915#8189]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlm-1/igt@dmabuf@all-tests@dma_fence.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@dmabuf@all-tests@dma_fence.html
* igt@dmabuf@all-tests@sanitycheck:
- bat-adlm-1: [ABORT][23] ([i915#8423]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlm-1/igt@dmabuf@all-tests@sanitycheck.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlm-1/igt@dmabuf@all-tests@sanitycheck.html
* igt@gem_exec_suspend@basic-s0@smem:
- fi-rkl-11600: [FAIL][25] ([fdo#103375] / [i915#8011]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_module_load@load:
- bat-adlp-11: [ABORT][27] ([i915#4423]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-adlp-11/igt@i915_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-adlp-11/igt@i915_module_load@load.html
* igt@i915_selftest@live@migrate:
- bat-mtlp-8: [DMESG-FAIL][29] ([i915#7699]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@migrate.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@requests:
- bat-mtlp-8: [DMESG-FAIL][31] ([i915#8497]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-mtlp-8/igt@i915_selftest@live@requests.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-mtlp-8/igt@i915_selftest@live@requests.html
- bat-rpls-2: [ABORT][33] ([i915#4983] / [i915#7913]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-rpls-2/igt@i915_selftest@live@requests.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-2/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: [DMESG-WARN][35] ([i915#6367]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/bat-rpls-1/igt@i915_selftest@live@slpc.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/bat-rpls-1/igt@i915_selftest@live@slpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8423]: https://gitlab.freedesktop.org/drm/intel/issues/8423
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
[i915#8513]: https://gitlab.freedesktop.org/drm/intel/issues/8513
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8676]: https://gitlab.freedesktop.org/drm/intel/issues/8676
[i915#8678]: https://gitlab.freedesktop.org/drm/intel/issues/8678
[i915#8679]: https://gitlab.freedesktop.org/drm/intel/issues/8679
[i915#8698]: https://gitlab.freedesktop.org/drm/intel/issues/8698
[i915#8699]: https://gitlab.freedesktop.org/drm/intel/issues/8699
[i915#8700]: https://gitlab.freedesktop.org/drm/intel/issues/8700
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7347 -> IGTPW_9245
CI-20190529: 20190529
CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
[-- Attachment #2: Type: text/html, Size: 11100 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.BAT: failure for lib/intel_blt: Prepare blt library to support xe
2023-06-23 11:12 ` Zbigniew Kempczyński
@ 2023-06-23 12:21 ` Yedireswarapu, SaiX Nandan
0 siblings, 0 replies; 13+ messages in thread
From: Yedireswarapu, SaiX Nandan @ 2023-06-23 12:21 UTC (permalink / raw)
To: Kempczynski, Zbigniew, igt-dev@lists.freedesktop.org
Hi,
Issue re-reported, https://patchwork.freedesktop.org/series/119792/
Thanks,
Y Sai Nandan
-----Original Message-----
From: Kempczynski, Zbigniew <zbigniew.kempczynski@intel.com>
Sent: Friday, June 23, 2023 4:42 PM
To: igt-dev@lists.freedesktop.org
Cc: Yedireswarapu, SaiX Nandan <saix.nandan.yedireswarapu@intel.com>
Subject: Re: ✗ Fi.CI.BAT: failure for lib/intel_blt: Prepare blt library to support xe
On Fri, Jun 23, 2023 at 10:36:07AM +0000, Patchwork wrote:
> Patch Details
>
> Series: lib/intel_blt: Prepare blt library to support xe
> URL: https://patchwork.freedesktop.org/series/119792/
> State: failure
> Details: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> CI Bug Log - changes from CI_DRM_13312 -> IGTPW_9245
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with IGTPW_9245 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_9245, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in
> CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> Participating hosts (41 -> 41)
>
> Additional (1): bat-dg1-8
> Missing (1): fi-snb-2520m
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in IGTPW_9245:
>
> IGT changes
>
> Possible regressions
>
> * igt@i915_selftest@live@gtt:
> * bat-atsm-1: PASS -> INCOMPLETE
Change doesn't touch the above.
--
Zbigniew
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * {igt@xe_create@create-massive-size}:
> * {bat-dg1-8}: NOTRUN -> FAIL +2 similar issues
>
> Known issues
>
> Here are the changes found in IGTPW_9245 that come from known issues:
>
> IGT changes
>
> Issues hit
>
> * igt@debugfs_test@basic-hwmon:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#7456)
> * igt@gem_tiled_pread_basic:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#3282)
> * igt@i915_selftest@live@gt_mocs:
>
> * bat-mtlp-8: PASS -> DMESG-FAIL (i915#7059)
>
> * bat-mtlp-6: PASS -> DMESG-FAIL (i915#7059)
>
> * igt@i915_selftest@live@guc:
>
> * bat-rpls-2: NOTRUN -> DMESG-WARN (i915#7852)
> * igt@i915_selftest@live@slpc:
>
> * bat-mtlp-6: PASS -> DMESG-WARN (i915#6367)
>
> * bat-rpls-2: NOTRUN -> DMESG-WARN (i915#6367)
>
> * igt@i915_suspend@basic-s2idle-without-i915:
>
> * bat-rpls-2: NOTRUN -> ABORT (i915#6687 / i915#8668)
> * igt@kms_chamelium_frames@hdmi-crc-fast:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#7828) +7 similar issues
> * igt@kms_chamelium_hpd@common-hpd-after-suspend:
>
> * bat-adlm-1: NOTRUN -> SKIP (i915#7828)
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#3546)
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
>
> * bat-adlp-11: NOTRUN -> SKIP (i915#4103)
> * igt@kms_flip@basic-plain-flip@d-dp6:
>
> * bat-adlp-11: NOTRUN -> ABORT (i915#4423)
> * igt@kms_pipe_crc_basic@suspend-read-crc:
>
> * bat-adlm-1: NOTRUN -> SKIP (i915#1845)
>
> Possible fixes
>
> * igt@dmabuf@all-tests@dma_fence:
>
> * bat-adlm-1: DMESG-FAIL (i915#8189) -> PASS
> * igt@dmabuf@all-tests@sanitycheck:
>
> * bat-adlm-1: ABORT (i915#8423) -> PASS
> * igt@gem_exec_suspend@basic-s0@smem:
>
> * fi-rkl-11600: FAIL (fdo#103375 / i915#8011) -> PASS
> * igt@i915_module_load@load:
>
> * bat-adlp-11: ABORT (i915#4423) -> PASS
> * igt@i915_selftest@live@migrate:
>
> * bat-mtlp-8: DMESG-FAIL (i915#7699) -> PASS
> * igt@i915_selftest@live@requests:
>
> * bat-mtlp-8: DMESG-FAIL (i915#8497) -> PASS
>
> * bat-rpls-2: ABORT (i915#4983 / i915#7913) -> PASS
>
> * igt@i915_selftest@live@slpc:
>
> * bat-rpls-1: DMESG-WARN (i915#6367) -> PASS
>
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7347 -> IGTPW_9245
>
> CI-20190529: 20190529
> CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
> IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
^ permalink raw reply [flat|nested] 13+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for lib/intel_blt: Prepare blt library to support xe
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
` (4 preceding siblings ...)
2023-06-23 11:53 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-06-23 15:34 ` Patchwork
2023-06-26 6:06 ` Zbigniew Kempczyński
5 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2023-06-23 15:34 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 48401 bytes --]
== Series Details ==
Series: lib/intel_blt: Prepare blt library to support xe
URL : https://patchwork.freedesktop.org/series/119792/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13312_full -> IGTPW_9245_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_9245_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_9245_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
Participating hosts (9 -> 8)
------------------------------
Missing (1): shard-tglu0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_9245_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_pm_rps@reset:
- shard-tglu: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-4/igt@i915_pm_rps@reset.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-8/igt@i915_pm_rps@reset.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rps@reset:
- {shard-dg2}: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg2-12/igt@i915_pm_rps@reset.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg2-3/igt@i915_pm_rps@reset.html
New tests
---------
New tests have been introduced between CI_DRM_13312_full and IGTPW_9245_full:
### New IGT tests (2) ###
* igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-2:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-c-dp-2:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_9245_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-rkl: NOTRUN -> [SKIP][5] ([i915#8411])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu: NOTRUN -> [SKIP][6] ([i915#7701])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [PASS][7] -> [FAIL][8] ([i915#7742])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_bad_reloc@negative-reloc-lut:
- shard-rkl: NOTRUN -> [SKIP][9] ([i915#3281]) +2 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@gem_bad_reloc@negative-reloc-lut.html
* igt@gem_ccs@ctrl-surf-copy:
- shard-tglu: NOTRUN -> [SKIP][10] ([i915#3555] / [i915#4579] / [i915#5325])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@gem_ccs@ctrl-surf-copy.html
* igt@gem_ccs@suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][11] ([i915#4579] / [i915#5325])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@gem_ccs@suspend-resume.html
- shard-tglu: NOTRUN -> [SKIP][12] ([i915#4579] / [i915#5325])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@gem_ccs@suspend-resume.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-rkl: [PASS][13] -> [FAIL][14] ([i915#6268])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-6/igt@gem_ctx_exec@basic-nohangcheck.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][15] ([i915#4525])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_endless@dispatch@vcs1:
- shard-tglu: [PASS][16] -> [TIMEOUT][17] ([i915#3778])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-5/igt@gem_exec_endless@dispatch@vcs1.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-8/igt@gem_exec_endless@dispatch@vcs1.html
* igt@gem_exec_fair@basic-deadline:
- shard-rkl: [PASS][18] -> [FAIL][19] ([i915#2846])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-4/igt@gem_exec_fair@basic-deadline.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-rkl: [PASS][20] -> [FAIL][21] ([i915#2842]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-2/igt@gem_exec_fair@basic-none@vecs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-glk: [PASS][22] -> [FAIL][23] ([i915#2842]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk2/igt@gem_exec_fair@basic-pace@vcs0.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk6/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-glk: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#2190])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk6/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@massive:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#4613]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@smem-oom:
- shard-tglu: NOTRUN -> [SKIP][26] ([i915#4613]) +3 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-snb: [PASS][27] -> [DMESG-FAIL][28] ([i915#8295])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-snb6/igt@gem_ppgtt@blt-vs-render-ctx0.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-snb1/igt@gem_ppgtt@blt-vs-render-ctx0.html
* igt@gem_pxp@create-valid-protected-context:
- shard-rkl: NOTRUN -> [SKIP][29] ([i915#4270]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-tglu: NOTRUN -> [SKIP][30] ([i915#4270]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_set_tiling_vs_pwrite:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#3282]) +4 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@gem_set_tiling_vs_pwrite.html
* igt@gem_softpin@evict-snoop:
- shard-rkl: NOTRUN -> [SKIP][32] ([fdo#109312])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@gem_softpin@evict-snoop.html
- shard-tglu: NOTRUN -> [SKIP][33] ([fdo#109312])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@gem_softpin@evict-snoop.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-tglu: NOTRUN -> [SKIP][34] ([i915#3323])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@readonly-pwrite-unsync:
- shard-tglu: NOTRUN -> [SKIP][35] ([i915#3297])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@gem_userptr_blits@readonly-pwrite-unsync.html
* igt@gen9_exec_parse@allowed-all:
- shard-tglu: NOTRUN -> [SKIP][36] ([i915#2527] / [i915#2856]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-8/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-rkl: NOTRUN -> [SKIP][37] ([i915#2527])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_backlight@bad-brightness:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#7561])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@i915_pm_backlight@bad-brightness.html
* igt@i915_pm_dc@dc5-psr:
- shard-rkl: NOTRUN -> [SKIP][39] ([i915#658])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@i915_pm_dc@dc5-psr.html
- shard-tglu: NOTRUN -> [SKIP][40] ([i915#658])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@i915_pm_dc@dc5-psr.html
* igt@i915_pm_dc@dc6-dpms:
- shard-tglu: [PASS][41] -> [FAIL][42] ([i915#3989] / [i915#454])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-4/igt@i915_pm_dc@dc6-dpms.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-rkl: [PASS][43] -> [SKIP][44] ([i915#1397]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-4/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: NOTRUN -> [SKIP][45] ([i915#1397])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
- shard-tglu: NOTRUN -> [SKIP][46] ([fdo#111644] / [i915#1397])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglu: NOTRUN -> [SKIP][47] ([fdo#109506])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_query@query-topology-unsupported:
- shard-tglu: NOTRUN -> [SKIP][48] ([fdo#109302])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-7/igt@i915_query@query-topology-unsupported.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-rkl: [PASS][49] -> [FAIL][50] ([fdo#103375])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-1/igt@i915_suspend@basic-s3-without-i915.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@i915_suspend@basic-s3-without-i915.html
* igt@i915_suspend@fence-restore-untiled:
- shard-tglu: [PASS][51] -> [ABORT][52] ([i915#5122])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-6/igt@i915_suspend@fence-restore-untiled.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-2/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y-rc_ccs:
- shard-rkl: NOTRUN -> [SKIP][53] ([i915#8502]) +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y-rc_ccs.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: NOTRUN -> [SKIP][54] ([fdo#111615] / [i915#5286]) +3 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
- shard-rkl: NOTRUN -> [SKIP][55] ([i915#5286])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][56] ([fdo#111614] / [i915#3638]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-tglu: NOTRUN -> [SKIP][57] ([fdo#111614]) +3 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-rkl: [PASS][58] -> [FAIL][59] ([i915#3743]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-glk: NOTRUN -> [SKIP][60] ([fdo#109271]) +46 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk8/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-rkl: NOTRUN -> [SKIP][61] ([fdo#111615])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglu: NOTRUN -> [SKIP][62] ([fdo#111615]) +3 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
- shard-rkl: NOTRUN -> [SKIP][63] ([fdo#110723])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_mtl_mc_ccs:
- shard-rkl: NOTRUN -> [SKIP][64] ([i915#5354] / [i915#6095]) +7 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_mtl_mc_ccs.html
* igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs:
- shard-tglu: NOTRUN -> [SKIP][65] ([i915#3689] / [i915#5354] / [i915#6095]) +8 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-8/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#3886]) +4 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk9/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-4_tiled_mtl_rc_ccs_cc:
- shard-tglu: NOTRUN -> [SKIP][67] ([i915#5354] / [i915#6095]) +24 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@kms_ccs@pipe-b-missing-ccs-buffer-4_tiled_mtl_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-tglu: NOTRUN -> [SKIP][68] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
- shard-rkl: NOTRUN -> [SKIP][69] ([i915#5354]) +10 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs:
- shard-tglu: NOTRUN -> [SKIP][70] ([fdo#111615] / [i915#3689] / [i915#5354] / [i915#6095]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-3/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-tglu: NOTRUN -> [SKIP][71] ([fdo#111827])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-tglu: NOTRUN -> [SKIP][72] ([i915#7828]) +5 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-7/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
- shard-rkl: NOTRUN -> [SKIP][73] ([i915#7828])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_content_protection@atomic-dpms:
- shard-tglu: NOTRUN -> [SKIP][74] ([i915#4579] / [i915#6944] / [i915#7116] / [i915#7118])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@kms_content_protection@atomic-dpms.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-tglu: NOTRUN -> [SKIP][75] ([i915#3359])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-rkl: NOTRUN -> [SKIP][76] ([i915#3555] / [i915#4579]) +3 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-tglu: NOTRUN -> [SKIP][77] ([fdo#109274])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-tglu: NOTRUN -> [SKIP][78] ([fdo#109274] / [fdo#111767])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-apl: [PASS][79] -> [FAIL][80] ([i915#2346])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [PASS][81] -> [FAIL][82] ([i915#2346])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@forked-move@pipe-b:
- shard-rkl: [PASS][83] -> [INCOMPLETE][84] ([i915#8011])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-1/igt@kms_cursor_legacy@forked-move@pipe-b.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_cursor_legacy@forked-move@pipe-b.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#4103])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-tglu: NOTRUN -> [SKIP][86] ([i915#4579])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-tglu: NOTRUN -> [SKIP][87] ([i915#3840] / [i915#4579])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
- shard-rkl: NOTRUN -> [SKIP][88] ([fdo#111825]) +2 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][89] -> [FAIL][90] ([i915#79]) +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-tglu: NOTRUN -> [SKIP][91] ([fdo#109274] / [i915#3637]) +5 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-2/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][92] ([i915#2672] / [i915#4579])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
- shard-tglu: NOTRUN -> [SKIP][93] ([i915#2587] / [i915#2672] / [i915#4579]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling@pipe-a-valid-mode:
- shard-glk: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#4579]) +4 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk7/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][95] ([i915#3023]) +8 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-tglu: NOTRUN -> [SKIP][96] ([fdo#109280]) +21 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][97] ([fdo#110189]) +21 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][98] ([fdo#111825] / [i915#1825]) +9 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_hdmi_inject@inject-audio:
- shard-tglu: [PASS][99] -> [SKIP][100] ([i915#433])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-7/igt@kms_hdmi_inject@inject-audio.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-4/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@invalid-hdr:
- shard-rkl: NOTRUN -> [SKIP][101] ([i915#4579] / [i915#6953] / [i915#8228])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#4579] / [i915#6953] / [i915#8228])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_panel_fitting@legacy:
- shard-tglu: NOTRUN -> [SKIP][103] ([i915#4579] / [i915#6301])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
- shard-tglu: [PASS][104] -> [FAIL][105] ([i915#8292])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-6/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-6/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][106] ([i915#5176]) +2 similar issues
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#4579] / [i915#5176]) +2 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][108] ([fdo#109271]) +22 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-snb6/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][109] ([fdo#109271] / [i915#4579]) +12 similar issues
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-snb6/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][110] ([i915#5176]) +2 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][111] ([i915#4579] / [i915#5176])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][112] ([i915#5235]) +2 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][113] ([i915#4579] / [i915#5235])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-9/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][114] ([i915#5235]) +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][115] ([i915#4579] / [i915#5235]) +2 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-rkl: NOTRUN -> [SKIP][116] ([fdo#111068] / [i915#658])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-7/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-tglu: NOTRUN -> [SKIP][117] ([fdo#111068] / [i915#658]) +1 similar issue
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-rkl: NOTRUN -> [SKIP][118] ([i915#1072]) +1 similar issue
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-2/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-tglu: NOTRUN -> [SKIP][119] ([fdo#111615] / [i915#5289])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#3555] / [i915#4579]) +4 similar issues
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-8/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu: NOTRUN -> [SKIP][121] ([i915#8623]) +1 similar issue
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-rkl: NOTRUN -> [SKIP][122] ([i915#8623])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vblank@pipe-d-query-idle-hang:
- shard-rkl: NOTRUN -> [SKIP][123] ([i915#4070] / [i915#533] / [i915#6768])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@kms_vblank@pipe-d-query-idle-hang.html
* igt@kms_writeback@writeback-check-output:
- shard-glk: NOTRUN -> [SKIP][124] ([fdo#109271] / [i915#2437])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk4/igt@kms_writeback@writeback-check-output.html
* igt@prime_vgem@coherency-gtt:
- shard-tglu: NOTRUN -> [SKIP][125] ([fdo#109295] / [fdo#111656])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@prime_vgem@coherency-gtt.html
* igt@prime_vgem@fence-write-hang:
- shard-tglu: NOTRUN -> [SKIP][126] ([fdo#109295])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-7/igt@prime_vgem@fence-write-hang.html
* igt@v3d/v3d_job_submission@threaded-job-submission:
- shard-rkl: NOTRUN -> [SKIP][127] ([fdo#109315]) +4 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-2/igt@v3d/v3d_job_submission@threaded-job-submission.html
* igt@v3d/v3d_submit_cl@valid-submission:
- shard-tglu: NOTRUN -> [SKIP][128] ([fdo#109315] / [i915#2575]) +9 similar issues
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@v3d/v3d_submit_cl@valid-submission.html
* igt@vc4/vc4_perfmon@get-values-invalid-pointer:
- shard-tglu: NOTRUN -> [SKIP][129] ([i915#2575]) +5 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@vc4/vc4_perfmon@get-values-invalid-pointer.html
* igt@vc4/vc4_tiling@get-bad-handle:
- shard-rkl: NOTRUN -> [SKIP][130] ([i915#7711]) +1 similar issue
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@vc4/vc4_tiling@get-bad-handle.html
#### Possible fixes ####
* igt@gem_barrier_race@remote-request@rcs0:
- shard-rkl: [ABORT][131] ([i915#7461] / [i915#8211]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-2/igt@gem_barrier_race@remote-request@rcs0.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@gem_barrier_race@remote-request@rcs0.html
- shard-tglu: [ABORT][133] ([i915#8211] / [i915#8234]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-7/igt@gem_barrier_race@remote-request@rcs0.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@gem_barrier_race@remote-request@rcs0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [FAIL][135] ([i915#6268]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-8/igt@gem_ctx_exec@basic-nohangcheck.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@unwedge-stress:
- {shard-dg1}: [FAIL][137] ([i915#5784]) -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-15/igt@gem_eio@unwedge-stress.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-18/igt@gem_eio@unwedge-stress.html
* igt@gem_eio@wait-wedge-immediate:
- {shard-dg1}: [DMESG-WARN][139] -> [PASS][140] +1 similar issue
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-19/igt@gem_eio@wait-wedge-immediate.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-16/igt@gem_eio@wait-wedge-immediate.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [FAIL][141] ([i915#2842]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk2/igt@gem_exec_fair@basic-none-share@rcs0.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk8/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-tglu: [ABORT][143] ([i915#7975] / [i915#8213]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-5/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-tglu: [ABORT][145] ([i915#5122] / [i915#5251]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-tglu-2/igt@gem_workarounds@suspend-resume-fd.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-tglu-3/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_pm_dc@dc9-dpms:
- shard-apl: [SKIP][147] ([fdo#109271]) -> [PASS][148]
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-apl3/igt@i915_pm_dc@dc9-dpms.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-apl3/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- {shard-dg1}: [SKIP][149] ([i915#1937] / [i915#4579]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-18/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-19/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-dg1}: [FAIL][151] ([i915#3591]) -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- {shard-dg2}: [SKIP][153] ([i915#1397]) -> [PASS][154] +2 similar issues
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg2-5/igt@i915_pm_rpm@modeset-lpsp-stress.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg2-12/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- {shard-dg1}: [SKIP][155] ([i915#1397]) -> [PASS][156]
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-19/igt@i915_pm_rpm@modeset-non-lpsp.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-16/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [FAIL][157] ([i915#6537]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-apl7/igt@i915_pm_rps@engine-order.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-apl6/igt@i915_pm_rps@engine-order.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-glk: [DMESG-FAIL][159] ([i915#5334]) -> [PASS][160]
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk6/igt@i915_selftest@live@gt_heartbeat.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk8/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_suspend@basic-s3-without-i915:
- {shard-dg2}: [FAIL][161] ([fdo#103375]) -> [PASS][162] +4 similar issues
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg2-5/igt@i915_suspend@basic-s3-without-i915.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg2-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_cursor_legacy@forked-move@pipe-b:
- {shard-dg1}: [INCOMPLETE][163] ([i915#8011] / [i915#8347]) -> [PASS][164]
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-19/igt@kms_cursor_legacy@forked-move@pipe-b.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-16/igt@kms_cursor_legacy@forked-move@pipe-b.html
* igt@kms_cursor_legacy@single-bo@pipe-b:
- shard-rkl: [INCOMPLETE][165] ([i915#8011]) -> [PASS][166]
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-7/igt@kms_cursor_legacy@single-bo@pipe-b.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-6/igt@kms_cursor_legacy@single-bo@pipe-b.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-glk: [FAIL][167] ([i915#79]) -> [PASS][168]
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-glk8/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-glk5/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@syncobj_timeline@wait-for-submit-complex:
- {shard-dg1}: [DMESG-WARN][169] ([i915#4391]) -> [PASS][170] +1 similar issue
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-dg1-19/igt@syncobj_timeline@wait-for-submit-complex.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-dg1-14/igt@syncobj_timeline@wait-for-submit-complex.html
#### Warnings ####
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][171] ([i915#4070] / [i915#4816]) -> [SKIP][172] ([i915#4816])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13312/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5251]: https://gitlab.freedesktop.org/drm/intel/issues/5251
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6032]: https://gitlab.freedesktop.org/drm/intel/issues/6032
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7484]: https://gitlab.freedesktop.org/drm/intel/issues/7484
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7892]: https://gitlab.freedesktop.org/drm/intel/issues/7892
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8229]: https://gitlab.freedesktop.org/drm/intel/issues/8229
[i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8295]: https://gitlab.freedesktop.org/drm/intel/issues/8295
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
[i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
[i915#8682]: https://gitlab.freedesktop.org/drm/intel/issues/8682
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7347 -> IGTPW_9245
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
[-- Attachment #2: Type: text/html, Size: 56677 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for lib/intel_blt: Prepare blt library to support xe
2023-06-23 15:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2023-06-26 6:06 ` Zbigniew Kempczyński
0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-06-26 6:06 UTC (permalink / raw)
To: igt-dev
On Fri, Jun 23, 2023 at 03:34:34PM +0000, Patchwork wrote:
> Patch Details
>
> Series: lib/intel_blt: Prepare blt library to support xe
> URL: https://patchwork.freedesktop.org/series/119792/
> State: failure
> Details: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> CI Bug Log - changes from CI_DRM_13312_full -> IGTPW_9245_full
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with IGTPW_9245_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_9245_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in
> CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
>
> Participating hosts (9 -> 8)
>
> Missing (1): shard-tglu0
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> IGTPW_9245_full:
>
> IGT changes
>
> Possible regressions
>
> * igt@i915_pm_rps@reset:
> * shard-tglu: PASS -> FAIL
Unrelated to the change. Structure of code was altered, not the logic.
I'm going to merge it as I need rebase on top of it.
--
Zbigniew
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@i915_pm_rps@reset:
> * {shard-dg2}: PASS -> FAIL
>
> New tests
>
> New tests have been introduced between CI_DRM_13312_full and
> IGTPW_9245_full:
>
> New IGT tests (2)
>
> * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-2:
>
> * Statuses : 1 pass(s)
> * Exec time: [0.0] s
> * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-c-dp-2:
>
> * Statuses : 1 pass(s)
> * Exec time: [0.0] s
>
> Known issues
>
> Here are the changes found in IGTPW_9245_full that come from known issues:
>
> IGT changes
>
> Issues hit
>
> * igt@api_intel_bb@object-reloc-purge-cache:
>
> * shard-rkl: NOTRUN -> SKIP (i915#8411)
> * igt@device_reset@unbind-cold-reset-rebind:
>
> * shard-tglu: NOTRUN -> SKIP (i915#7701)
> * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
>
> * shard-rkl: PASS -> FAIL (i915#7742)
> * igt@gem_bad_reloc@negative-reloc-lut:
>
> * shard-rkl: NOTRUN -> SKIP (i915#3281) +2 similar issues
> * igt@gem_ccs@ctrl-surf-copy:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3555 / i915#4579 / i915#5325)
> * igt@gem_ccs@suspend-resume:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4579 / i915#5325)
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#5325)
>
> * igt@gem_ctx_exec@basic-nohangcheck:
>
> * shard-rkl: PASS -> FAIL (i915#6268)
> * igt@gem_exec_balancer@parallel-balancer:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4525)
> * igt@gem_exec_endless@dispatch@vcs1:
>
> * shard-tglu: PASS -> TIMEOUT (i915#3778)
> * igt@gem_exec_fair@basic-deadline:
>
> * shard-rkl: PASS -> FAIL (i915#2846)
> * igt@gem_exec_fair@basic-none@vecs0:
>
> * shard-rkl: PASS -> FAIL (i915#2842) +1 similar issue
> * igt@gem_exec_fair@basic-pace@vcs0:
>
> * shard-glk: PASS -> FAIL (i915#2842) +2 similar issues
> * igt@gem_huc_copy@huc-copy:
>
> * shard-glk: NOTRUN -> SKIP (fdo#109271 / i915#2190)
> * igt@gem_lmem_swapping@massive:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4613) +1 similar issue
> * igt@gem_lmem_swapping@smem-oom:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4613) +3 similar issues
> * igt@gem_ppgtt@blt-vs-render-ctx0:
>
> * shard-snb: PASS -> DMESG-FAIL (i915#8295)
> * igt@gem_pxp@create-valid-protected-context:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4270) +1 similar issue
> * igt@gem_pxp@reject-modify-context-protection-on:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4270) +3 similar issues
> * igt@gem_set_tiling_vs_pwrite:
>
> * shard-rkl: NOTRUN -> SKIP (i915#3282) +4 similar issues
> * igt@gem_softpin@evict-snoop:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#109312)
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109312)
>
> * igt@gem_userptr_blits@dmabuf-sync:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3323)
> * igt@gem_userptr_blits@readonly-pwrite-unsync:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3297)
> * igt@gen9_exec_parse@allowed-all:
>
> * shard-tglu: NOTRUN -> SKIP (i915#2527 / i915#2856) +1 similar
> issue
> * igt@gen9_exec_parse@allowed-single:
>
> * shard-rkl: NOTRUN -> SKIP (i915#2527)
> * igt@i915_pm_backlight@bad-brightness:
>
> * shard-rkl: NOTRUN -> SKIP (i915#7561)
> * igt@i915_pm_dc@dc5-psr:
>
> * shard-rkl: NOTRUN -> SKIP (i915#658)
>
> * shard-tglu: NOTRUN -> SKIP (i915#658)
>
> * igt@i915_pm_dc@dc6-dpms:
>
> * shard-tglu: PASS -> FAIL (i915#3989 / i915#454)
> * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
>
> * shard-rkl: PASS -> SKIP (i915#1397) +2 similar issues
> * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
>
> * shard-rkl: NOTRUN -> SKIP (i915#1397)
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111644 / i915#1397)
>
> * igt@i915_pm_rpm@modeset-pc8-residency-stress:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109506)
> * igt@i915_query@query-topology-unsupported:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109302)
> * igt@i915_suspend@basic-s3-without-i915:
>
> * shard-rkl: PASS -> FAIL (fdo#103375)
> * igt@i915_suspend@fence-restore-untiled:
>
> * shard-tglu: PASS -> ABORT (i915#5122)
> * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y-rc_ccs:
>
> * shard-rkl: NOTRUN -> SKIP (i915#8502) +3 similar issues
> * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111615 / i915#5286) +3 similar
> issues
>
> * shard-rkl: NOTRUN -> SKIP (i915#5286)
>
> * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#111614 / i915#3638) +1 similar
> issue
> * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111614) +3 similar issues
> * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
>
> * shard-rkl: PASS -> FAIL (i915#3743) +1 similar issue
> * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
>
> * shard-glk: NOTRUN -> SKIP (fdo#109271) +46 similar issues
> * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#111615)
> * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111615) +3 similar issues
>
> * shard-rkl: NOTRUN -> SKIP (fdo#110723)
>
> * igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_mtl_mc_ccs:
>
> * shard-rkl: NOTRUN -> SKIP (i915#5354 / i915#6095) +7 similar
> issues
> * igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3689 / i915#5354 / i915#6095) +8
> similar issues
> * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
>
> * shard-glk: NOTRUN -> SKIP (fdo#109271 / i915#3886) +4 similar
> issues
> * igt@kms_ccs@pipe-b-missing-ccs-buffer-4_tiled_mtl_rc_ccs_cc:
>
> * shard-tglu: NOTRUN -> SKIP (i915#5354 / i915#6095) +24 similar
> issues
> * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3689 / i915#3886 / i915#5354 /
> i915#6095) +1 similar issue
> * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
>
> * shard-rkl: NOTRUN -> SKIP (i915#5354) +10 similar issues
> * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111615 / i915#3689 / i915#5354 /
> i915#6095) +1 similar issue
> * igt@kms_chamelium_color@ctm-limited-range:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111827)
> * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
>
> * shard-tglu: NOTRUN -> SKIP (i915#7828) +5 similar issues
>
> * shard-rkl: NOTRUN -> SKIP (i915#7828)
>
> * igt@kms_content_protection@atomic-dpms:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#6944 / i915#7116 /
> i915#7118)
> * igt@kms_cursor_crc@cursor-random-512x170:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3359)
> * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
>
> * shard-rkl: NOTRUN -> SKIP (i915#3555 / i915#4579) +3 similar
> issues
> * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109274)
> * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109274 / fdo#111767)
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
>
> * shard-apl: PASS -> FAIL (i915#2346)
> * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
>
> * shard-glk: PASS -> FAIL (i915#2346)
> * igt@kms_cursor_legacy@forked-move@pipe-b:
>
> * shard-rkl: PASS -> INCOMPLETE (i915#8011)
> * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4103)
> * igt@kms_display_modes@extended-mode-basic:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579)
> * igt@kms_dsc@dsc-with-bpc-formats:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3840 / i915#4579)
> * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#111825) +2 similar issues
> * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
>
> * shard-glk: PASS -> FAIL (i915#79) +1 similar issue
> * igt@kms_flip@2x-nonexisting-fb:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109274 / i915#3637) +5 similar
> issues
> * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
>
> * shard-rkl: NOTRUN -> SKIP (i915#2672 / i915#4579)
>
> * shard-tglu: NOTRUN -> SKIP (i915#2587 / i915#2672 / i915#4579) +1
> similar issue
>
> * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling@pipe-a-valid-mode:
>
> * shard-glk: NOTRUN -> SKIP (fdo#109271 / i915#4579) +4 similar
> issues
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
>
> * shard-rkl: NOTRUN -> SKIP (i915#3023) +8 similar issues
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109280) +21 similar issues
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#110189) +21 similar issues
> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#111825 / i915#1825) +9 similar
> issues
> * igt@kms_hdmi_inject@inject-audio:
>
> * shard-tglu: PASS -> SKIP (i915#433)
> * igt@kms_hdr@invalid-hdr:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4579 / i915#6953 / i915#8228)
> * igt@kms_hdr@invalid-metadata-sizes:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#6953 / i915#8228)
> * igt@kms_panel_fitting@legacy:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#6301)
> * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
>
> * shard-tglu: PASS -> FAIL (i915#8292)
> * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-1:
>
> * shard-rkl: NOTRUN -> SKIP (i915#5176) +2 similar issues
> * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4579 / i915#5176) +2 similar
> issues
> * igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1:
>
> * shard-snb: NOTRUN -> SKIP (fdo#109271) +22 similar issues
> * igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1:
>
> * shard-snb: NOTRUN -> SKIP (fdo#109271 / i915#4579) +12 similar
> issues
> * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1:
>
> * shard-tglu: NOTRUN -> SKIP (i915#5176) +2 similar issues
> * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-d-hdmi-a-1:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#5176)
> * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-1:
>
> * shard-tglu: NOTRUN -> SKIP (i915#5235) +2 similar issues
> * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-1:
>
> * shard-tglu: NOTRUN -> SKIP (i915#4579 / i915#5235)
> * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-a-hdmi-a-2:
>
> * shard-rkl: NOTRUN -> SKIP (i915#5235) +2 similar issues
> * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b-hdmi-a-2:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4579 / i915#5235) +2 similar
> issues
> * igt@kms_psr2_sf@cursor-plane-update-sf:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#111068 / i915#658)
> * igt@kms_psr2_sf@plane-move-sf-dmg-area:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111068 / i915#658) +1 similar
> issue
> * igt@kms_psr@psr2_sprite_plane_onoff:
>
> * shard-rkl: NOTRUN -> SKIP (i915#1072) +1 similar issue
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#111615 / i915#5289)
> * igt@kms_scaling_modes@scaling-mode-center:
>
> * shard-tglu: NOTRUN -> SKIP (i915#3555 / i915#4579) +4 similar
> issues
> * igt@kms_tiled_display@basic-test-pattern:
>
> * shard-tglu: NOTRUN -> SKIP (i915#8623) +1 similar issue
> * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
>
> * shard-rkl: NOTRUN -> SKIP (i915#8623)
> * igt@kms_vblank@pipe-d-query-idle-hang:
>
> * shard-rkl: NOTRUN -> SKIP (i915#4070 / i915#533 / i915#6768)
> * igt@kms_writeback@writeback-check-output:
>
> * shard-glk: NOTRUN -> SKIP (fdo#109271 / i915#2437)
> * igt@prime_vgem@coherency-gtt:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109295 / fdo#111656)
> * igt@prime_vgem@fence-write-hang:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109295)
> * igt@v3d/v3d_job_submission@threaded-job-submission:
>
> * shard-rkl: NOTRUN -> SKIP (fdo#109315) +4 similar issues
> * igt@v3d/v3d_submit_cl@valid-submission:
>
> * shard-tglu: NOTRUN -> SKIP (fdo#109315 / i915#2575) +9 similar
> issues
> * igt@vc4/vc4_perfmon@get-values-invalid-pointer:
>
> * shard-tglu: NOTRUN -> SKIP (i915#2575) +5 similar issues
> * igt@vc4/vc4_tiling@get-bad-handle:
>
> * shard-rkl: NOTRUN -> SKIP (i915#7711) +1 similar issue
>
> Possible fixes
>
> * igt@gem_barrier_race@remote-request@rcs0:
>
> * shard-rkl: ABORT (i915#7461 / i915#8211) -> PASS
>
> * shard-tglu: ABORT (i915#8211 / i915#8234) -> PASS
>
> * igt@gem_ctx_exec@basic-nohangcheck:
>
> * shard-tglu: FAIL (i915#6268) -> PASS
> * igt@gem_eio@unwedge-stress:
>
> * {shard-dg1}: FAIL (i915#5784) -> PASS
> * igt@gem_eio@wait-wedge-immediate:
>
> * {shard-dg1}: DMESG-WARN -> PASS +1 similar issue
> * igt@gem_exec_fair@basic-none-share@rcs0:
>
> * shard-glk: FAIL (i915#2842) -> PASS
> * igt@gem_exec_suspend@basic-s4-devices@smem:
>
> * shard-tglu: ABORT (i915#7975 / i915#8213) -> PASS
> * igt@gem_workarounds@suspend-resume-fd:
>
> * shard-tglu: ABORT (i915#5122 / i915#5251) -> PASS
> * igt@i915_pm_dc@dc9-dpms:
>
> * shard-apl: SKIP (fdo#109271) -> PASS
> * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
>
> * {shard-dg1}: SKIP (i915#1937 / i915#4579) -> PASS
> * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
>
> * {shard-dg1}: FAIL (i915#3591) -> PASS
> * igt@i915_pm_rpm@modeset-lpsp-stress:
>
> * {shard-dg2}: SKIP (i915#1397) -> PASS +2 similar issues
> * igt@i915_pm_rpm@modeset-non-lpsp:
>
> * {shard-dg1}: SKIP (i915#1397) -> PASS
> * igt@i915_pm_rps@engine-order:
>
> * shard-apl: FAIL (i915#6537) -> PASS
> * igt@i915_selftest@live@gt_heartbeat:
>
> * shard-glk: DMESG-FAIL (i915#5334) -> PASS
> * igt@i915_suspend@basic-s3-without-i915:
>
> * {shard-dg2}: FAIL (fdo#103375) -> PASS +4 similar issues
> * igt@kms_cursor_legacy@forked-move@pipe-b:
>
> * {shard-dg1}: INCOMPLETE (i915#8011 / i915#8347) -> PASS
> * igt@kms_cursor_legacy@single-bo@pipe-b:
>
> * shard-rkl: INCOMPLETE (i915#8011) -> PASS
> * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
>
> * shard-glk: FAIL (i915#79) -> PASS
> * igt@syncobj_timeline@wait-for-submit-complex:
>
> * {shard-dg1}: DMESG-WARN (i915#4391) -> PASS +1 similar issue
>
> Warnings
>
> * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
> * shard-rkl: SKIP (i915#4070 / i915#4816) -> SKIP (i915#4816)
>
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7347 -> IGTPW_9245
> * Piglit: piglit_4509 -> None
>
> CI-20190529: 20190529
> CI_DRM_13312: 08d15de81b3b0db3c9046d2556c10b9f136cc90f @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_9245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9245/index.html
> IGT_7347: 621c2d3115d40a1ba0b53668413ea21edf03a5ff @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2023-06-26 6:06 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-06-23 8:46 [igt-dev] [PATCH i-g-t] lib/intel_blt: Prepare blt library to support xe Zbigniew Kempczyński
2023-06-23 9:11 ` Karolina Stolarek
2023-06-23 10:10 ` Zbigniew Kempczyński
2023-06-23 9:33 ` Karolina Stolarek
2023-06-23 11:02 ` Zbigniew Kempczyński
2023-06-23 11:11 ` Karolina Stolarek
2023-06-23 10:06 ` [igt-dev] ✗ GitLab.Pipeline: warning for " Patchwork
2023-06-23 10:36 ` [igt-dev] ✗ Fi.CI.BAT: failure " Patchwork
2023-06-23 11:12 ` Zbigniew Kempczyński
2023-06-23 12:21 ` Yedireswarapu, SaiX Nandan
2023-06-23 11:53 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-06-23 15:34 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2023-06-26 6:06 ` Zbigniew Kempczyński
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox