* [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test
@ 2020-04-27 8:06 Mika Kahola
2020-04-27 8:44 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Mika Kahola @ 2020-04-27 8:06 UTC (permalink / raw)
To: igt-dev
This is a RFC patch that proposes to test CCS clear color
capability.
Especially, comments related to clearing a solid color are
welcomed as the clearfunc as it is presented here is inspired
by rendercopy function and therefore the order might need some
tweaking.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
lib/igt_fb.c | 29 +++++++++
lib/intel_batchbuffer.c | 10 +++
lib/intel_batchbuffer.h | 6 ++
lib/rendercopy.h | 4 ++
lib/rendercopy_gen9.c | 132 ++++++++++++++++++++++++++++++++++++++++
tests/kms_ccs.c | 16 ++++-
6 files changed, 196 insertions(+), 1 deletion(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 5ed586e7..6d72b6cf 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -481,6 +481,11 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
}
}
+static bool is_gen12_cc_ccs_modifier(uint64_t modifier)
+{
+ return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+}
+
static bool is_gen12_mc_ccs_modifier(uint64_t modifier)
{
return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
@@ -2146,6 +2151,26 @@ static bool use_vebox_copy(const struct igt_fb *src_fb,
igt_format_is_yuv(dst_fb->drm_format);
}
+static void clear_fb_with_engine(const struct igt_fb *dst_fb, uint32_t color)
+{
+ struct igt_buf dst;
+ drm_intel_bufmgr *bufmgr;
+ struct intel_batchbuffer *batch;
+ igt_render_clearfunc_t render_clear = NULL;
+ int devid = intel_get_drm_devid(dst_fb->fd);
+
+ render_clear = igt_get_render_clearfunc(devid);
+
+ bufmgr = drm_intel_bufmgr_gem_init(dst_fb->fd, 4096);
+ batch = intel_batchbuffer_alloc(bufmgr, devid);
+
+ render_clear(batch,
+ &dst,
+ 0, 0,
+ dst_fb->plane_width[0], dst_fb->plane_height[0],
+ color);
+}
+
/**
* copy_with_engine:
* @blit: context for the copy operation
@@ -2185,6 +2210,8 @@ static void copy_with_engine(struct fb_blit_upload *blit,
vebox_copy(blit->batch, &src,
dst_fb->plane_width[0], dst_fb->plane_height[0],
&dst);
+ else if (is_gen12_cc_ccs_modifier(dst_fb->modifier))
+ clear_fb_with_engine(dst_fb, 0x0000ff);
else
render_copy(blit->batch, NULL,
&src,
@@ -2337,6 +2364,8 @@ static void setup_linear_mapping(struct fb_blit_upload *blit)
if (blit->batch)
copy_with_engine(blit, &linear->fb, fb);
+ else if (is_gen12_cc_ccs_modifier(fb->modifier))
+ clear_fb_with_engine(&linear->fb, 0x0000ff);
else
blitcopy(&linear->fb, fb);
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index f1a45b47..fb5b49a4 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid)
return copy;
}
+igt_render_clearfunc_t igt_get_render_clearfunc(int devid)
+{
+ igt_render_clearfunc_t clear = NULL;
+
+ if (IS_GEN12(devid))
+ clear = gen12_render_clearfunc;
+
+ return clear;
+}
+
/**
* igt_get_media_fillfunc:
* @devid: pci device id
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 442f3a18..fe831575 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -367,6 +367,12 @@ typedef void (*igt_vebox_copyfunc_t)(struct intel_batchbuffer *batch,
igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid);
+typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch,
+ const struct igt_buf *dst, unsigned dst_x, unsigned dst_y,
+ unsigned width, unsigned height,
+ uint32_t color);
+igt_render_clearfunc_t igt_get_render_clearfunc(int devid);
+
/**
* igt_fillfunc_t:
* @batch: batchbuffer object
diff --git a/lib/rendercopy.h b/lib/rendercopy.h
index e0577cac..e75a1def 100644
--- a/lib/rendercopy.h
+++ b/lib/rendercopy.h
@@ -23,6 +23,10 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch,
OUT_BATCH(u.ui);
}
+void gen12_render_clearfunc(struct intel_batchbuffer *batch,
+ const struct igt_buf *dst, unsigned dst_x, unsigned dst_y,
+ unsigned width, unsigned height,
+ uint32_t color);
void gen12_render_copyfunc(struct intel_batchbuffer *batch,
drm_intel_context *context,
const struct igt_buf *src, unsigned src_x, unsigned src_y,
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 85ae4cab..b82b6c94 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch,
intel_batchbuffer_reset(batch);
}
+static
+void _gen12_render_clearfunc(struct intel_batchbuffer *batch,
+ drm_intel_context *context,
+ const struct igt_buf *dst, unsigned dst_x,
+ unsigned dst_y, unsigned width, unsigned height,
+ drm_intel_bo *aux_pgtable_bo,
+ const uint32_t ps_kernel[][4],
+ uint32_t ps_kernel_size)
+{
+ uint32_t ps_sampler_state, ps_kernel_off;
+ uint32_t scissor_state;
+ uint32_t vertex_buffer;
+ uint32_t batch_end;
+ uint32_t aux_pgtable_state;
+
+ intel_batchbuffer_flush_with_context(batch, context);
+
+ intel_batchbuffer_align(batch, 8);
+
+ batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
+
+ annotation_init(&aub_annotations);
+
+ ps_sampler_state = gen8_create_sampler(batch);
+ ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size);
+ vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL,
+ 0, 0,
+ dst_x, dst_y,
+ width, height);
+ cc.cc_state = gen6_create_cc_state(batch);
+ cc.blend_state = gen8_create_blend_state(batch);
+ viewport.cc_state = gen6_create_cc_viewport(batch);
+ viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch);
+ scissor_state = gen6_create_scissor_rect(batch);
+
+ aux_pgtable_state = gen12_create_aux_pgtable_state(batch,
+ aux_pgtable_bo);
+
+ /* TODO: there is other state which isn't setup */
+
+ assert(batch->ptr < &batch->buffer[4095]);
+
+ batch->ptr = batch->buffer;
+
+ /* Start emitting the commands. The order roughly follows the mesa blorp
+ * order */
+ OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D |
+ GEN9_PIPELINE_SELECTION_MASK);
+
+ gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true);
+
+ gen8_emit_sip(batch);
+
+ gen7_emit_push_constants(batch);
+
+ gen9_emit_state_base_address(batch);
+
+ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
+ OUT_BATCH(viewport.cc_state);
+ OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
+ OUT_BATCH(viewport.sf_clip_state);
+
+ gen7_emit_urb(batch);
+
+ gen8_emit_cc(batch);
+
+ gen8_emit_multisample(batch);
+
+ gen8_emit_null_state(batch);
+
+ OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+
+ gen7_emit_clip(batch);
+
+ gen8_emit_sf(batch);
+
+ gen8_emit_ps(batch, ps_kernel_off);
+
+ OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
+ OUT_BATCH(ps_sampler_state);
+
+ OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS);
+ OUT_BATCH(scissor_state);
+
+ gen9_emit_depth(batch);
+
+ gen7_emit_clear(batch);
+
+ gen6_emit_drawing_rectangle(batch, dst);
+
+ gen7_emit_vertex_buffer(batch, vertex_buffer);
+ gen6_emit_vertex_elements(batch);
+
+ gen8_emit_vf_topology(batch);
+ gen8_emit_primitive(batch, vertex_buffer);
+
+ OUT_BATCH(MI_BATCH_BUFFER_END);
+
+ batch_end = intel_batchbuffer_align(batch, 8);
+ assert(batch_end < BATCH_STATE_SPLIT);
+ annotation_add_batch(&aub_annotations, batch_end);
+
+ dump_batch(batch);
+
+ annotation_flush(&aub_annotations, batch);
+
+ gen6_render_flush(batch, context, batch_end);
+ intel_batchbuffer_reset(batch);
+}
+
void gen9_render_copyfunc(struct intel_batchbuffer *batch,
drm_intel_context *context,
const struct igt_buf *src, unsigned src_x, unsigned src_y,
@@ -1153,3 +1267,21 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch,
gen12_aux_pgtable_cleanup(&pgtable_info);
}
+
+void gen12_render_clearfunc(struct intel_batchbuffer *batch,
+ const struct igt_buf *dst, unsigned dst_x, unsigned dst_y,
+ unsigned width, unsigned height,
+ uint32_t color)
+{
+ struct aux_pgtable_info pgtable_info = { };
+
+ gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst);
+
+ _gen12_render_clearfunc(batch, NULL,
+ dst, dst_x, dst_y, 0, 0,
+ pgtable_info.pgtable_bo,
+ gen12_render_copy,
+ sizeof(gen12_render_copy));
+
+ gen12_aux_pgtable_cleanup(&pgtable_info);
+}
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index bc34aec5..3d3a5b1b 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -38,6 +38,7 @@ enum test_flags {
TEST_NO_AUX_BUFFER = 1 << 5,
TEST_BAD_CCS_HANDLE = 1 << 6,
TEST_BAD_AUX_STRIDE = 1 << 7,
+ TEST_CLEAR_COLOR = 1 << 8,
};
#define TEST_FAIL_ON_ADDFB2 \
@@ -249,6 +250,13 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
igt_put_cairo_ctx(data->drm_fd, fb, cr);
}
+ if (data->flags & TEST_CLEAR_COLOR) {
+ cr = igt_get_cairo_ctx(data->drm_fd, fb);
+ igt_paint_color(cr, 0, 0, width, height,
+ colors[0].r, colors[0].g, colors[0].b);
+ igt_put_cairo_ctx(data->drm_fd, fb, cr);
+ }
+
ret = drmIoctl(data->drm_fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f);
if (data->flags & TEST_FAIL_ON_ADDFB2) {
igt_assert_eq(ret, -1);
@@ -380,7 +388,8 @@ static int test_ccs(data_t *data)
igt_crc_t crc, ref_crc;
enum test_fb_flags fb_flags = 0;
- if (data->flags & TEST_CRC) {
+ if (data->flags & TEST_CRC ||
+ data->flags & TEST_CLEAR_COLOR) {
data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) &&
@@ -530,6 +539,11 @@ igt_main_args("c", NULL, help_str, opt_handler, NULL)
igt_describe("Test with bad AUX stride with given CCS modifier");
igt_subtest_f("pipe-%s-bad-aux-stride", pipe_name)
test_output(&data);
+
+ data.flags = TEST_CLEAR_COLOR;
+ igt_describe("Test clear color with solid red color");
+ igt_subtest_f("pipe-%s-clear-color", pipe_name)
+ test_output(&data);
}
igt_fixture
--
2.20.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_ccs: CCS Clear Color test 2020-04-27 8:06 [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test Mika Kahola @ 2020-04-27 8:44 ` Patchwork 2020-04-27 9:39 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2020-04-28 8:24 ` [igt-dev] [RFC PATCH i-g-t] " Lisovskiy, Stanislav 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2020-04-27 8:44 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev == Series Details == Series: tests/kms_ccs: CCS Clear Color test URL : https://patchwork.freedesktop.org/series/76536/ State : success == Summary == CI Bug Log - changes from IGT_5612 -> IGTPW_4507 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html Known issues ------------ Here are the changes found in IGTPW_4507 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@gt_pm: - fi-skl-6700k2: [PASS][1] -> [DMESG-FAIL][2] ([i915#1791]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/fi-skl-6700k2/igt@i915_selftest@live@gt_pm.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/fi-skl-6700k2/igt@i915_selftest@live@gt_pm.html - fi-cfl-8109u: [PASS][3] -> [DMESG-FAIL][4] ([i915#1791]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/fi-cfl-8109u/igt@i915_selftest@live@gt_pm.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/fi-cfl-8109u/igt@i915_selftest@live@gt_pm.html - fi-hsw-4770: [PASS][5] -> [DMESG-FAIL][6] ([i915#1791]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/fi-hsw-4770/igt@i915_selftest@live@gt_pm.html #### Possible fixes #### * igt@i915_selftest@live@gt_pm: - fi-bdw-5557u: [DMESG-FAIL][7] ([i915#1791]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/fi-bdw-5557u/igt@i915_selftest@live@gt_pm.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/fi-bdw-5557u/igt@i915_selftest@live@gt_pm.html [i915#1791]: https://gitlab.freedesktop.org/drm/intel/issues/1791 Participating hosts (45 -> 41) ------------------------------ Additional (2): fi-icl-y fi-bxt-dsi Missing (6): fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5612 -> IGTPW_4507 CI-20190529: 20190529 CI_DRM_8370: 1f3ffd7683d5457e14a1f879a8714a74b7b7faeb @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4507: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html IGT_5612: c8dc1fd926a550308b971ca7d83fe0a927a38152 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@kms_ccs@pipe-a-clear-color +igt@kms_ccs@pipe-b-clear-color +igt@kms_ccs@pipe-c-clear-color +igt@kms_ccs@pipe-d-clear-color +igt@kms_ccs@pipe-e-clear-color +igt@kms_ccs@pipe-f-clear-color == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 5+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for tests/kms_ccs: CCS Clear Color test 2020-04-27 8:06 [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test Mika Kahola 2020-04-27 8:44 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork @ 2020-04-27 9:39 ` Patchwork 2020-04-28 8:24 ` [igt-dev] [RFC PATCH i-g-t] " Lisovskiy, Stanislav 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2020-04-27 9:39 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev == Series Details == Series: tests/kms_ccs: CCS Clear Color test URL : https://patchwork.freedesktop.org/series/76536/ State : success == Summary == CI Bug Log - changes from IGT_5612_full -> IGTPW_4507_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html New tests --------- New tests have been introduced between IGT_5612_full and IGTPW_4507_full: ### New IGT tests (4) ### * igt@kms_ccs@pipe-a-clear-color: - Statuses : 5 pass(s) 2 skip(s) - Exec time: [0.0, 1.20] s * igt@kms_ccs@pipe-b-clear-color: - Statuses : 5 pass(s) 2 skip(s) - Exec time: [0.0, 1.99] s * igt@kms_ccs@pipe-c-clear-color: - Statuses : 2 pass(s) 5 skip(s) - Exec time: [0.0, 2.02] s * igt@kms_ccs@pipe-d-clear-color: - Statuses : 1 pass(s) 6 skip(s) - Exec time: [0.0, 1.62] s Known issues ------------ Here are the changes found in IGTPW_4507_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_params@invalid-bsd-ring: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb4/igt@gem_exec_params@invalid-bsd-ring.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb5/igt@gem_exec_params@invalid-bsd-ring.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html * igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen: - shard-kbl: [PASS][5] -> [FAIL][6] ([i915#54] / [i915#93] / [i915#95]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html * igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen: - shard-apl: [PASS][7] -> [FAIL][8] ([i915#54] / [i915#95]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl7/igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-64x21-onscreen.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109349]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled: - shard-glk: [PASS][11] -> [FAIL][12] ([i915#52] / [i915#54]) +5 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-glk6/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled: - shard-apl: [PASS][13] -> [FAIL][14] ([fdo#108145] / [i915#52] / [i915#54] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc: - shard-tglb: [PASS][15] -> [SKIP][16] ([i915#668]) +7 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-tglb1/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-tglb6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html * igt@kms_hdr@bpc-switch-suspend: - shard-kbl: [PASS][17] -> [INCOMPLETE][18] ([i915#155]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_plane_cursor@pipe-a-overlay-size-128: - shard-kbl: [PASS][19] -> [FAIL][20] ([i915#1559] / [i915#93] / [i915#95]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl7/igt@kms_plane_cursor@pipe-a-overlay-size-128.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl7/igt@kms_plane_cursor@pipe-a-overlay-size-128.html - shard-apl: [PASS][21] -> [FAIL][22] ([i915#1559] / [i915#95]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl6/igt@kms_plane_cursor@pipe-a-overlay-size-128.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl4/igt@kms_plane_cursor@pipe-a-overlay-size-128.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][23] -> [FAIL][24] ([i915#173]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb7/igt@kms_psr@no_drrs.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb3/igt@kms_psr@psr2_cursor_render.html * igt@kms_setmode@basic: - shard-hsw: [PASS][27] -> [FAIL][28] ([i915#31]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-hsw1/igt@kms_setmode@basic.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-hsw2/igt@kms_setmode@basic.html * igt@perf@gen12-mi-rpc: - shard-tglb: [PASS][29] -> [FAIL][30] ([i915#1085]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-tglb2/igt@perf@gen12-mi-rpc.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-tglb8/igt@perf@gen12-mi-rpc.html #### Possible fixes #### * igt@gem_ctx_persistence@legacy-engines-mixed-process@render: - shard-apl: [FAIL][31] ([i915#1528]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl1/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html * igt@gem_exec_whisper@basic-fds-forked: - shard-kbl: [FAIL][33] -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl4/igt@gem_exec_whisper@basic-fds-forked.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl4/igt@gem_exec_whisper@basic-fds-forked.html * igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen: - shard-apl: [FAIL][35] ([i915#54] / [i915#95]) -> [PASS][36] +1 similar issue [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl2/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html * igt@kms_cursor_crc@pipe-a-cursor-128x42-random: - shard-kbl: [FAIL][37] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][38] +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-random.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-apl: [DMESG-WARN][39] ([i915#180]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [DMESG-WARN][41] ([i915#180]) -> [PASS][42] +4 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_draw_crc@draw-method-rgb565-render-untiled: - shard-glk: [FAIL][43] ([i915#52] / [i915#54]) -> [PASS][44] +6 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-render-untiled.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-glk6/igt@kms_draw_crc@draw-method-rgb565-render-untiled.html * igt@kms_draw_crc@draw-method-xrgb8888-render-untiled: - shard-kbl: [FAIL][45] ([i915#177] / [i915#52] / [i915#54] / [i915#93] / [i915#95]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl2/igt@kms_draw_crc@draw-method-xrgb8888-render-untiled.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl2/igt@kms_draw_crc@draw-method-xrgb8888-render-untiled.html - shard-apl: [FAIL][47] ([i915#52] / [i915#54] / [i915#95]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl1/igt@kms_draw_crc@draw-method-xrgb8888-render-untiled.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl6/igt@kms_draw_crc@draw-method-xrgb8888-render-untiled.html * {igt@kms_flip@flip-vs-suspend@b-dp1}: - shard-kbl: [DMESG-WARN][49] ([i915#165] / [i915#180]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl6/igt@kms_flip@flip-vs-suspend@b-dp1.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl1/igt@kms_flip@flip-vs-suspend@b-dp1.html * {igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1}: - shard-glk: [FAIL][51] ([i915#34]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-glk1/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-glk7/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a1.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-kbl: [FAIL][53] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-kbl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html - shard-apl: [FAIL][55] ([fdo#108145] / [i915#265] / [i915#95]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [SKIP][57] ([fdo#109642] / [fdo#111068]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb6/igt@kms_psr2_su@frontbuffer.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb2/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +2 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_pwrite_crc: - shard-snb: [SKIP][61] ([fdo#109271]) -> [PASS][62] +3 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-snb4/igt@kms_pwrite_crc.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-snb2/igt@kms_pwrite_crc.html * {igt@perf@blocking-parameterized}: - shard-iclb: [FAIL][63] ([i915#1542]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-iclb7/igt@perf@blocking-parameterized.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-iclb3/igt@perf@blocking-parameterized.html * {igt@perf@gen12-oa-tlb-invalidate}: - shard-tglb: [SKIP][65] ([i915#405]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-tglb6/igt@perf@gen12-oa-tlb-invalidate.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-tglb7/igt@perf@gen12-oa-tlb-invalidate.html * {igt@prime_vgem@sync@bcs0}: - shard-tglb: [INCOMPLETE][67] ([i915#409]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-tglb8/igt@prime_vgem@sync@bcs0.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-tglb3/igt@prime_vgem@sync@bcs0.html #### Warnings #### * igt@i915_pm_dc@dc6-dpms: - shard-tglb: [SKIP][69] ([i915#468]) -> [FAIL][70] ([i915#454]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-tglb1/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_rpm@fences: - shard-snb: [INCOMPLETE][71] ([i915#82]) -> [SKIP][72] ([fdo#109271]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5612/shard-snb2/igt@i915_pm_rpm@fences.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/shard-snb6/igt@i915_pm_rpm@fences.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [i915#1085]: https://gitlab.freedesktop.org/drm/intel/issues/1085 [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559 [i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165 [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173 [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#405]: https://gitlab.freedesktop.org/drm/intel/issues/405 [i915#409]: https://gitlab.freedesktop.org/drm/intel/issues/409 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468 [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668 [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82 [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (8 -> 8) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5612 -> IGTPW_4507 CI-20190529: 20190529 CI_DRM_8370: 1f3ffd7683d5457e14a1f879a8714a74b7b7faeb @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4507: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html IGT_5612: c8dc1fd926a550308b971ca7d83fe0a927a38152 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4507/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test 2020-04-27 8:06 [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test Mika Kahola 2020-04-27 8:44 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork 2020-04-27 9:39 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork @ 2020-04-28 8:24 ` Lisovskiy, Stanislav 2020-04-28 8:34 ` Kahola, Mika 2 siblings, 1 reply; 5+ messages in thread From: Lisovskiy, Stanislav @ 2020-04-28 8:24 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev On Mon, Apr 27, 2020 at 11:06:01AM +0300, Mika Kahola wrote: > This is a RFC patch that proposes to test CCS clear color > capability. > > Especially, comments related to clearing a solid color are > welcomed as the clearfunc as it is presented here is inspired > by rendercopy function and therefore the order might need some > tweaking. > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > --- > lib/igt_fb.c | 29 +++++++++ > lib/intel_batchbuffer.c | 10 +++ > lib/intel_batchbuffer.h | 6 ++ > lib/rendercopy.h | 4 ++ > lib/rendercopy_gen9.c | 132 ++++++++++++++++++++++++++++++++++++++++ > tests/kms_ccs.c | 16 ++++- > 6 files changed, 196 insertions(+), 1 deletion(-) > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > index 5ed586e7..6d72b6cf 100644 > --- a/lib/igt_fb.c > +++ b/lib/igt_fb.c > @@ -481,6 +481,11 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, > } > } > > +static bool is_gen12_cc_ccs_modifier(uint64_t modifier) > +{ > + return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC; > +} > + > static bool is_gen12_mc_ccs_modifier(uint64_t modifier) > { > return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS; > @@ -2146,6 +2151,26 @@ static bool use_vebox_copy(const struct igt_fb *src_fb, > igt_format_is_yuv(dst_fb->drm_format); > } > > +static void clear_fb_with_engine(const struct igt_fb *dst_fb, uint32_t color) > +{ > + struct igt_buf dst; > + drm_intel_bufmgr *bufmgr; > + struct intel_batchbuffer *batch; > + igt_render_clearfunc_t render_clear = NULL; > + int devid = intel_get_drm_devid(dst_fb->fd); > + > + render_clear = igt_get_render_clearfunc(devid); > + > + bufmgr = drm_intel_bufmgr_gem_init(dst_fb->fd, 4096); > + batch = intel_batchbuffer_alloc(bufmgr, devid); > + > + render_clear(batch, > + &dst, > + 0, 0, > + dst_fb->plane_width[0], dst_fb->plane_height[0], > + color); > +} > + > /** > * copy_with_engine: > * @blit: context for the copy operation > @@ -2185,6 +2210,8 @@ static void copy_with_engine(struct fb_blit_upload *blit, > vebox_copy(blit->batch, &src, > dst_fb->plane_width[0], dst_fb->plane_height[0], > &dst); > + else if (is_gen12_cc_ccs_modifier(dst_fb->modifier)) > + clear_fb_with_engine(dst_fb, 0x0000ff); > else > render_copy(blit->batch, NULL, > &src, > @@ -2337,6 +2364,8 @@ static void setup_linear_mapping(struct fb_blit_upload *blit) > > if (blit->batch) > copy_with_engine(blit, &linear->fb, fb); > + else if (is_gen12_cc_ccs_modifier(fb->modifier)) > + clear_fb_with_engine(&linear->fb, 0x0000ff); > else > blitcopy(&linear->fb, fb); > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c > index f1a45b47..fb5b49a4 100644 > --- a/lib/intel_batchbuffer.c > +++ b/lib/intel_batchbuffer.c > @@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid) > return copy; > } > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid) > +{ > + igt_render_clearfunc_t clear = NULL; > + > + if (IS_GEN12(devid)) > + clear = gen12_render_clearfunc; > + > + return clear; > +} > + > /** > * igt_get_media_fillfunc: > * @devid: pci device id > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h > index 442f3a18..fe831575 100644 > --- a/lib/intel_batchbuffer.h > +++ b/lib/intel_batchbuffer.h > @@ -367,6 +367,12 @@ typedef void (*igt_vebox_copyfunc_t)(struct intel_batchbuffer *batch, > > igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid); > > +typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y, > + unsigned width, unsigned height, > + uint32_t color); > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid); > + > /** > * igt_fillfunc_t: > * @batch: batchbuffer object > diff --git a/lib/rendercopy.h b/lib/rendercopy.h > index e0577cac..e75a1def 100644 > --- a/lib/rendercopy.h > +++ b/lib/rendercopy.h > @@ -23,6 +23,10 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch, > OUT_BATCH(u.ui); > } > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y, > + unsigned width, unsigned height, > + uint32_t color); > void gen12_render_copyfunc(struct intel_batchbuffer *batch, > drm_intel_context *context, > const struct igt_buf *src, unsigned src_x, unsigned src_y, > diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c > index 85ae4cab..b82b6c94 100644 > --- a/lib/rendercopy_gen9.c > +++ b/lib/rendercopy_gen9.c > @@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch, > intel_batchbuffer_reset(batch); > } > > +static > +void _gen12_render_clearfunc(struct intel_batchbuffer *batch, > + drm_intel_context *context, > + const struct igt_buf *dst, unsigned dst_x, > + unsigned dst_y, unsigned width, unsigned height, > + drm_intel_bo *aux_pgtable_bo, > + const uint32_t ps_kernel[][4], > + uint32_t ps_kernel_size) > +{ > + uint32_t ps_sampler_state, ps_kernel_off; > + uint32_t scissor_state; > + uint32_t vertex_buffer; > + uint32_t batch_end; > + uint32_t aux_pgtable_state; > + > + intel_batchbuffer_flush_with_context(batch, context); > + > + intel_batchbuffer_align(batch, 8); > + > + batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; > + > + annotation_init(&aub_annotations); > + > + ps_sampler_state = gen8_create_sampler(batch); > + ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size); > + vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL, > + 0, 0, > + dst_x, dst_y, > + width, height); > + cc.cc_state = gen6_create_cc_state(batch); > + cc.blend_state = gen8_create_blend_state(batch); > + viewport.cc_state = gen6_create_cc_viewport(batch); > + viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); > + scissor_state = gen6_create_scissor_rect(batch); > + > + aux_pgtable_state = gen12_create_aux_pgtable_state(batch, > + aux_pgtable_bo); > + > + /* TODO: there is other state which isn't setup */ > + > + assert(batch->ptr < &batch->buffer[4095]); > + > + batch->ptr = batch->buffer; > + > + /* Start emitting the commands. The order roughly follows the mesa blorp > + * order */ > + OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D | > + GEN9_PIPELINE_SELECTION_MASK); > + > + gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true); > + > + gen8_emit_sip(batch); > + > + gen7_emit_push_constants(batch); > + > + gen9_emit_state_base_address(batch); > + > + OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); > + OUT_BATCH(viewport.cc_state); > + OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); > + OUT_BATCH(viewport.sf_clip_state); > + > + gen7_emit_urb(batch); > + > + gen8_emit_cc(batch); > + > + gen8_emit_multisample(batch); > + > + gen8_emit_null_state(batch); > + > + OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); > + OUT_BATCH(0); > + OUT_BATCH(0); > + OUT_BATCH(0); > + OUT_BATCH(0); > + > + gen7_emit_clip(batch); > + > + gen8_emit_sf(batch); > + > + gen8_emit_ps(batch, ps_kernel_off); > + > + OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); > + OUT_BATCH(ps_sampler_state); > + > + OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS); > + OUT_BATCH(scissor_state); > + > + gen9_emit_depth(batch); > + > + gen7_emit_clear(batch); > + > + gen6_emit_drawing_rectangle(batch, dst); > + > + gen7_emit_vertex_buffer(batch, vertex_buffer); > + gen6_emit_vertex_elements(batch); > + > + gen8_emit_vf_topology(batch); > + gen8_emit_primitive(batch, vertex_buffer); > + > + OUT_BATCH(MI_BATCH_BUFFER_END); > + > + batch_end = intel_batchbuffer_align(batch, 8); > + assert(batch_end < BATCH_STATE_SPLIT); > + annotation_add_batch(&aub_annotations, batch_end); > + > + dump_batch(batch); > + > + annotation_flush(&aub_annotations, batch); > + > + gen6_render_flush(batch, context, batch_end); > + intel_batchbuffer_reset(batch); > +} > + > void gen9_render_copyfunc(struct intel_batchbuffer *batch, > drm_intel_context *context, > const struct igt_buf *src, unsigned src_x, unsigned src_y, > @@ -1153,3 +1267,21 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch, > > gen12_aux_pgtable_cleanup(&pgtable_info); > } > + > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned dst_x, unsigned dst_y, > + unsigned width, unsigned height, > + uint32_t color) > +{ > + struct aux_pgtable_info pgtable_info = { }; > + > + gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst); > + > + _gen12_render_clearfunc(batch, NULL, > + dst, dst_x, dst_y, 0, 0, > + pgtable_info.pgtable_bo, > + gen12_render_copy, > + sizeof(gen12_render_copy)); > + > + gen12_aux_pgtable_cleanup(&pgtable_info); > +} Is it intentional or TODO that currently the color parameter is actually not used here, despite being declared? Stan > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c > index bc34aec5..3d3a5b1b 100644 > --- a/tests/kms_ccs.c > +++ b/tests/kms_ccs.c > @@ -38,6 +38,7 @@ enum test_flags { > TEST_NO_AUX_BUFFER = 1 << 5, > TEST_BAD_CCS_HANDLE = 1 << 6, > TEST_BAD_AUX_STRIDE = 1 << 7, > + TEST_CLEAR_COLOR = 1 << 8, > }; > > #define TEST_FAIL_ON_ADDFB2 \ > @@ -249,6 +250,13 @@ static void generate_fb(data_t *data, struct igt_fb *fb, > igt_put_cairo_ctx(data->drm_fd, fb, cr); > } > > + if (data->flags & TEST_CLEAR_COLOR) { > + cr = igt_get_cairo_ctx(data->drm_fd, fb); > + igt_paint_color(cr, 0, 0, width, height, > + colors[0].r, colors[0].g, colors[0].b); > + igt_put_cairo_ctx(data->drm_fd, fb, cr); > + } > + > ret = drmIoctl(data->drm_fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f); > if (data->flags & TEST_FAIL_ON_ADDFB2) { > igt_assert_eq(ret, -1); > @@ -380,7 +388,8 @@ static int test_ccs(data_t *data) > igt_crc_t crc, ref_crc; > enum test_fb_flags fb_flags = 0; > > - if (data->flags & TEST_CRC) { > + if (data->flags & TEST_CRC || > + data->flags & TEST_CLEAR_COLOR) { > data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); > > if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && > @@ -530,6 +539,11 @@ igt_main_args("c", NULL, help_str, opt_handler, NULL) > igt_describe("Test with bad AUX stride with given CCS modifier"); > igt_subtest_f("pipe-%s-bad-aux-stride", pipe_name) > test_output(&data); > + > + data.flags = TEST_CLEAR_COLOR; > + igt_describe("Test clear color with solid red color"); > + igt_subtest_f("pipe-%s-clear-color", pipe_name) > + test_output(&data); > } > > igt_fixture > -- > 2.20.1 > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test 2020-04-28 8:24 ` [igt-dev] [RFC PATCH i-g-t] " Lisovskiy, Stanislav @ 2020-04-28 8:34 ` Kahola, Mika 0 siblings, 0 replies; 5+ messages in thread From: Kahola, Mika @ 2020-04-28 8:34 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: igt-dev@lists.freedesktop.org > -----Original Message----- > From: Lisovskiy, Stanislav <stanislav.lisovskiy@intel.com> > Sent: Tuesday, April 28, 2020 11:25 AM > To: Kahola, Mika <mika.kahola@intel.com> > Cc: igt-dev@lists.freedesktop.org > Subject: Re: [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test > > On Mon, Apr 27, 2020 at 11:06:01AM +0300, Mika Kahola wrote: > > This is a RFC patch that proposes to test CCS clear color capability. > > > > Especially, comments related to clearing a solid color are welcomed as > > the clearfunc as it is presented here is inspired by rendercopy > > function and therefore the order might need some tweaking. > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > --- > > lib/igt_fb.c | 29 +++++++++ > > lib/intel_batchbuffer.c | 10 +++ > > lib/intel_batchbuffer.h | 6 ++ > > lib/rendercopy.h | 4 ++ > > lib/rendercopy_gen9.c | 132 > ++++++++++++++++++++++++++++++++++++++++ > > tests/kms_ccs.c | 16 ++++- > > 6 files changed, 196 insertions(+), 1 deletion(-) > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 5ed586e7..6d72b6cf > > 100644 > > --- a/lib/igt_fb.c > > +++ b/lib/igt_fb.c > > @@ -481,6 +481,11 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int > fb_bpp, > > } > > } > > > > +static bool is_gen12_cc_ccs_modifier(uint64_t modifier) { > > + return modifier == > LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC; > > +} > > + > > static bool is_gen12_mc_ccs_modifier(uint64_t modifier) { > > return modifier == > LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS; > > @@ -2146,6 +2151,26 @@ static bool use_vebox_copy(const struct igt_fb > *src_fb, > > igt_format_is_yuv(dst_fb->drm_format); > > } > > > > +static void clear_fb_with_engine(const struct igt_fb *dst_fb, > > +uint32_t color) { > > + struct igt_buf dst; > > + drm_intel_bufmgr *bufmgr; > > + struct intel_batchbuffer *batch; > > + igt_render_clearfunc_t render_clear = NULL; > > + int devid = intel_get_drm_devid(dst_fb->fd); > > + > > + render_clear = igt_get_render_clearfunc(devid); > > + > > + bufmgr = drm_intel_bufmgr_gem_init(dst_fb->fd, 4096); > > + batch = intel_batchbuffer_alloc(bufmgr, devid); > > + > > + render_clear(batch, > > + &dst, > > + 0, 0, > > + dst_fb->plane_width[0], dst_fb->plane_height[0], > > + color); > > +} > > + > > /** > > * copy_with_engine: > > * @blit: context for the copy operation @@ -2185,6 +2210,8 @@ static > > void copy_with_engine(struct fb_blit_upload *blit, > > vebox_copy(blit->batch, &src, > > dst_fb->plane_width[0], dst_fb->plane_height[0], > > &dst); > > + else if (is_gen12_cc_ccs_modifier(dst_fb->modifier)) > > + clear_fb_with_engine(dst_fb, 0x0000ff); > > else > > render_copy(blit->batch, NULL, > > &src, > > @@ -2337,6 +2364,8 @@ static void setup_linear_mapping(struct > > fb_blit_upload *blit) > > > > if (blit->batch) > > copy_with_engine(blit, &linear->fb, fb); > > + else if (is_gen12_cc_ccs_modifier(fb->modifier)) > > + clear_fb_with_engine(&linear->fb, 0x0000ff); > > else > > blitcopy(&linear->fb, fb); > > > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index > > f1a45b47..fb5b49a4 100644 > > --- a/lib/intel_batchbuffer.c > > +++ b/lib/intel_batchbuffer.c > > @@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t > igt_get_vebox_copyfunc(int devid) > > return copy; > > } > > > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid) { > > + igt_render_clearfunc_t clear = NULL; > > + > > + if (IS_GEN12(devid)) > > + clear = gen12_render_clearfunc; > > + > > + return clear; > > +} > > + > > /** > > * igt_get_media_fillfunc: > > * @devid: pci device id > > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index > > 442f3a18..fe831575 100644 > > --- a/lib/intel_batchbuffer.h > > +++ b/lib/intel_batchbuffer.h > > @@ -367,6 +367,12 @@ typedef void (*igt_vebox_copyfunc_t)(struct > > intel_batchbuffer *batch, > > > > igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid); > > > > +typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned dst_x, > unsigned dst_y, > > + unsigned width, unsigned height, > > + uint32_t color); > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid); > > + > > /** > > * igt_fillfunc_t: > > * @batch: batchbuffer object > > diff --git a/lib/rendercopy.h b/lib/rendercopy.h index > > e0577cac..e75a1def 100644 > > --- a/lib/rendercopy.h > > +++ b/lib/rendercopy.h > > @@ -23,6 +23,10 @@ static inline void emit_vertex_normalized(struct > intel_batchbuffer *batch, > > OUT_BATCH(u.ui); > > } > > > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned dst_x, unsigned > dst_y, > > + unsigned width, unsigned height, > > + uint32_t color); > > void gen12_render_copyfunc(struct intel_batchbuffer *batch, > > drm_intel_context *context, > > const struct igt_buf *src, unsigned src_x, unsigned > src_y, diff > > --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index > > 85ae4cab..b82b6c94 100644 > > --- a/lib/rendercopy_gen9.c > > +++ b/lib/rendercopy_gen9.c > > @@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct > intel_batchbuffer *batch, > > intel_batchbuffer_reset(batch); > > } > > > > +static > > +void _gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + drm_intel_context *context, > > + const struct igt_buf *dst, unsigned dst_x, > > + unsigned dst_y, unsigned width, unsigned height, > > + drm_intel_bo *aux_pgtable_bo, > > + const uint32_t ps_kernel[][4], > > + uint32_t ps_kernel_size) > > +{ > > + uint32_t ps_sampler_state, ps_kernel_off; > > + uint32_t scissor_state; > > + uint32_t vertex_buffer; > > + uint32_t batch_end; > > + uint32_t aux_pgtable_state; > > + > > + intel_batchbuffer_flush_with_context(batch, context); > > + > > + intel_batchbuffer_align(batch, 8); > > + > > + batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; > > + > > + annotation_init(&aub_annotations); > > + > > + ps_sampler_state = gen8_create_sampler(batch); > > + ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size); > > + vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL, > > + 0, 0, > > + dst_x, dst_y, > > + width, height); > > + cc.cc_state = gen6_create_cc_state(batch); > > + cc.blend_state = gen8_create_blend_state(batch); > > + viewport.cc_state = gen6_create_cc_viewport(batch); > > + viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); > > + scissor_state = gen6_create_scissor_rect(batch); > > + > > + aux_pgtable_state = gen12_create_aux_pgtable_state(batch, > > + aux_pgtable_bo); > > + > > + /* TODO: there is other state which isn't setup */ > > + > > + assert(batch->ptr < &batch->buffer[4095]); > > + > > + batch->ptr = batch->buffer; > > + > > + /* Start emitting the commands. The order roughly follows the mesa > blorp > > + * order */ > > + OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D | > > + GEN9_PIPELINE_SELECTION_MASK); > > + > > + gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true); > > + > > + gen8_emit_sip(batch); > > + > > + gen7_emit_push_constants(batch); > > + > > + gen9_emit_state_base_address(batch); > > + > > + OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); > > + OUT_BATCH(viewport.cc_state); > > + OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); > > + OUT_BATCH(viewport.sf_clip_state); > > + > > + gen7_emit_urb(batch); > > + > > + gen8_emit_cc(batch); > > + > > + gen8_emit_multisample(batch); > > + > > + gen8_emit_null_state(batch); > > + > > + OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + > > + gen7_emit_clip(batch); > > + > > + gen8_emit_sf(batch); > > + > > + gen8_emit_ps(batch, ps_kernel_off); > > + > > + OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); > > + OUT_BATCH(ps_sampler_state); > > + > > + OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS); > > + OUT_BATCH(scissor_state); > > + > > + gen9_emit_depth(batch); > > + > > + gen7_emit_clear(batch); > > + > > + gen6_emit_drawing_rectangle(batch, dst); > > + > > + gen7_emit_vertex_buffer(batch, vertex_buffer); > > + gen6_emit_vertex_elements(batch); > > + > > + gen8_emit_vf_topology(batch); > > + gen8_emit_primitive(batch, vertex_buffer); > > + > > + OUT_BATCH(MI_BATCH_BUFFER_END); > > + > > + batch_end = intel_batchbuffer_align(batch, 8); > > + assert(batch_end < BATCH_STATE_SPLIT); > > + annotation_add_batch(&aub_annotations, batch_end); > > + > > + dump_batch(batch); > > + > > + annotation_flush(&aub_annotations, batch); > > + > > + gen6_render_flush(batch, context, batch_end); > > + intel_batchbuffer_reset(batch); > > +} > > + > > void gen9_render_copyfunc(struct intel_batchbuffer *batch, > > drm_intel_context *context, > > const struct igt_buf *src, unsigned src_x, unsigned > src_y, @@ > > -1153,3 +1267,21 @@ void gen12_render_copyfunc(struct > > intel_batchbuffer *batch, > > > > gen12_aux_pgtable_cleanup(&pgtable_info); > > } > > + > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned dst_x, unsigned > dst_y, > > + unsigned width, unsigned height, > > + uint32_t color) > > +{ > > + struct aux_pgtable_info pgtable_info = { }; > > + > > + gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst); > > + > > + _gen12_render_clearfunc(batch, NULL, > > + dst, dst_x, dst_y, 0, 0, > > + pgtable_info.pgtable_bo, > > + gen12_render_copy, > > + sizeof(gen12_render_copy)); > > + > > + gen12_aux_pgtable_cleanup(&pgtable_info); > > +} > > Is it intentional or TODO that currently the color parameter is actually not used > here, despite being declared? That's still TODO. The whole idea about this RFC patch was to collect ideas on how the clear color feature should be tested. > > Stan > > > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index > > bc34aec5..3d3a5b1b 100644 > > --- a/tests/kms_ccs.c > > +++ b/tests/kms_ccs.c > > @@ -38,6 +38,7 @@ enum test_flags { > > TEST_NO_AUX_BUFFER = 1 << 5, > > TEST_BAD_CCS_HANDLE = 1 << 6, > > TEST_BAD_AUX_STRIDE = 1 << 7, > > + TEST_CLEAR_COLOR = 1 << 8, > > }; > > > > #define TEST_FAIL_ON_ADDFB2 \ > > @@ -249,6 +250,13 @@ static void generate_fb(data_t *data, struct igt_fb > *fb, > > igt_put_cairo_ctx(data->drm_fd, fb, cr); > > } > > > > + if (data->flags & TEST_CLEAR_COLOR) { > > + cr = igt_get_cairo_ctx(data->drm_fd, fb); > > + igt_paint_color(cr, 0, 0, width, height, > > + colors[0].r, colors[0].g, colors[0].b); > > + igt_put_cairo_ctx(data->drm_fd, fb, cr); > > + } > > + > > ret = drmIoctl(data->drm_fd, LOCAL_DRM_IOCTL_MODE_ADDFB2, &f); > > if (data->flags & TEST_FAIL_ON_ADDFB2) { > > igt_assert_eq(ret, -1); > > @@ -380,7 +388,8 @@ static int test_ccs(data_t *data) > > igt_crc_t crc, ref_crc; > > enum test_fb_flags fb_flags = 0; > > > > - if (data->flags & TEST_CRC) { > > + if (data->flags & TEST_CRC || > > + data->flags & TEST_CLEAR_COLOR) { > > data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, > > INTEL_PIPE_CRC_SOURCE_AUTO); > > > > if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && > @@ > > -530,6 +539,11 @@ igt_main_args("c", NULL, help_str, opt_handler, NULL) > > igt_describe("Test with bad AUX stride with given CCS > modifier"); > > igt_subtest_f("pipe-%s-bad-aux-stride", pipe_name) > > test_output(&data); > > + > > + data.flags = TEST_CLEAR_COLOR; > > + igt_describe("Test clear color with solid red color"); > > + igt_subtest_f("pipe-%s-clear-color", pipe_name) > > + test_output(&data); > > } > > > > igt_fixture > > -- > > 2.20.1 > > > > _______________________________________________ > > igt-dev mailing list > > igt-dev@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-04-28 8:34 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-04-27 8:06 [igt-dev] [RFC PATCH i-g-t] tests/kms_ccs: CCS Clear Color test Mika Kahola 2020-04-27 8:44 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork 2020-04-27 9:39 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2020-04-28 8:24 ` [igt-dev] [RFC PATCH i-g-t] " Lisovskiy, Stanislav 2020-04-28 8:34 ` Kahola, Mika
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