[igt-dev] [PATCH i-g-t v3 1/2] include: bump i915 header for new feature

[igt-dev] [PATCH i-g-t v3 1/2] include: bump i915 header for new feature

[Lionel Landwerlin]

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 include/drm-uapi/i915_drm.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 2b55af13..f9d753fa 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -1993,6 +1993,27 @@ enum drm_i915_perf_property_id {
 	 */
 	DRM_I915_PERF_PROP_POLL_OA_PERIOD,
 
+	/**
+	 * Specifies an array of u32 GEM context handles to filter reports
+	 * with.
+	 *
+	 * Using this parameter is incompatible with using
+	 * DRM_I915_PERF_PROP_CTX_HANDLE.
+	 *
+	 * This property is available in perf revision 6.
+	 */
+	DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY,
+
+	/**
+	 * Specifies the length of the array specified with
+	 * DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY.
+	 *
+	 * The length must be in the range [1, 4].
+	 *
+	 * This property is available in perf revision 6.
+	 */
+	DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH,
+
 	DRM_I915_PERF_PROP_MAX /* non-ABI */
 };
 
-- 
2.26.0

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[igt-dev] [PATCH i-g-t v3 2/2] tests/perf: add tests for multi context filtering

[Lionel Landwerlin]

Iris is using 2 GEM contexts for 3D & compute.

v2: Check higher number of contexts

v3: Test unmapped memory pointers (Chris)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/perf.c | 538 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 538 insertions(+)

diff --git a/tests/perf.c b/tests/perf.c
index b959f552..013fdf04 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -3351,6 +3351,42 @@ hsw_test_single_ctx_counters(void)
 	igt_waitchildren();
 }
 
+/* HSW hardware produces untagged reports and either listen to the
+ * entire system or a given context. As a result it cannot support
+ * multi context filtering.
+ */
+static void
+hsw_test_multi_ctx_counters(void)
+{
+	uint32_t context_ids[] = {
+		0,
+		0,
+		0,
+	};
+	uint64_t properties[] = {
+		/* Note: we have to specify at least one sample property even
+		 * though we aren't interested in samples in this case
+		 */
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+		/* OA unit configuration */
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+
+		/* Note: no OA exponent specified in this case */
+
+		DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY, to_user_pointer(&context_ids),
+		DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, ARRAY_SIZE(context_ids),
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+
+	do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param, ENODEV);
+}
+
 /* Tests the INTEL_performance_query use case where an unprivileged process
  * should be able to configure the OA unit for per-context metrics (for a
  * context associated with that process' drm file descriptor) and the counters
@@ -3797,6 +3833,348 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
 	} while (WEXITSTATUS(child_ret) == EAGAIN);
 }
 
+/* Tests the INTEL_performance_query use case for Iris which uses 2
+ * GEM contexts for 3D & compute commands.
+ */
+static void
+gen8_test_multi_ctx_render_target_writes_a_counter(int n_filtered_context_handles)
+{
+	int child_ret;
+	struct igt_helper_process child = {};
+
+	igt_debug("Filtering with %d contexts\n", n_filtered_context_handles);
+
+	/* should be default, but just to be sure... */
+	write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+
+	do {
+
+		igt_fork_helper(&child) {
+			int oa_exponent = max_oa_exponent_for_period_lte(1000000);
+			/*
+			 * Use twice the amount of GEM context to
+			 * generate some noise in the reports.
+			 */
+			uint32_t n_context_handles = 2 * n_filtered_context_handles;
+			uint32_t *filtered_context_handles;
+			uint64_t properties[] = {
+				/* Note: we have to specify at least one sample
+				 * property even though we aren't interested in
+				 * samples in this case
+				 */
+				DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+				/* OA unit configuration */
+				DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+				DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+				DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+				/* Note: no OA exponent specified in this case */
+
+				DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY, 0,
+				DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, n_filtered_context_handles,
+			};
+			struct drm_i915_perf_open_param param = {
+				.flags = I915_PERF_FLAG_FD_CLOEXEC,
+				.num_properties = ARRAY_SIZE(properties) / 2,
+				.properties_ptr = to_user_pointer(properties),
+			};
+			size_t format_size = get_oa_format(test_set->perf_oa_format).size;
+			size_t sample_size = (sizeof(struct drm_i915_perf_record_header) +
+					      format_size);
+			uint32_t max_reports = MAX_OA_BUF_SIZE / format_size;
+			uint32_t buf_size = sample_size * max_reports * 1.5;
+			drm_intel_bufmgr *bufmgr;
+			struct intel_batchbuffer *batch;
+			struct igt_buf src[3], dst[3];
+			drm_intel_bo *mi_rpc_bo;
+			int width = 800;
+			int height = 600;
+			int ret, last_context_idx = -1, matching_context_idx;
+			uint8_t *buf = malloc(buf_size);
+			ssize_t len;
+			struct drm_i915_perf_record_header *header;
+			struct {
+				drm_intel_context *context;
+				uint32_t hw_id;
+				uint32_t *report0_32;
+				uint32_t *report1_32;
+				uint64_t timestamp0_64, timestamp1_64;
+				struct accumulator accumulator;
+				bool accumulate_started;
+				bool accumulate_done;
+			} *ctxs;
+			uint32_t *prev_report32;
+			bool all_accumlate_valid;
+
+			bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
+			drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+
+			for (int i = 0; i < ARRAY_SIZE(src); i++) {
+				scratch_buf_init(bufmgr, &src[i], width, height, 0xff0000ff);
+				scratch_buf_init(bufmgr, &dst[i], width, height, 0x00ff00ff);
+			}
+
+			batch = intel_batchbuffer_alloc(bufmgr, devid);
+
+			filtered_context_handles = calloc(n_context_handles, sizeof(*filtered_context_handles));
+			igt_assert(filtered_context_handles);
+
+			properties[9] = to_user_pointer(filtered_context_handles);
+
+			ctxs = calloc(n_context_handles, sizeof(*ctxs));
+			igt_assert(ctxs);
+
+			for (int i = 0; i < n_context_handles; i++) {
+				ctxs[i].context = drm_intel_gem_context_create(bufmgr);
+				igt_assert(ctxs[i].context);
+
+				ret = drm_intel_gem_context_get_id(ctxs[i].context,
+								   &filtered_context_handles[i]);
+				igt_assert_eq(ret, 0);
+				igt_assert_neq(ctxs[i].hw_id, 0xffffffff);
+
+				memset(&ctxs[i].accumulator, 0, sizeof(ctxs[i].accumulator));
+				ctxs[i].accumulator.format = test_set->perf_oa_format;
+				ctxs[i].accumulate_started = false;
+				ctxs[i].accumulate_done = false;
+			}
+
+			scratch_buf_memset(src[0].bo, width, height, 0xff0000ff);
+			scratch_buf_memset(dst[0].bo, width, height, 0x00ff00ff);
+
+			igt_debug("opening i915-perf stream\n");
+			stream_fd = __perf_open(drm_fd, &param, false);
+
+			mi_rpc_bo = drm_intel_bo_alloc(bufmgr, "mi_rpc dest bo", 4096 * n_context_handles, 64);
+
+			ret = drm_intel_bo_map(mi_rpc_bo, true /* write enable */);
+			igt_assert_eq(ret, 0);
+
+			memset(mi_rpc_bo->virtual, 0x80, mi_rpc_bo->size);
+			drm_intel_bo_unmap(mi_rpc_bo);
+
+			/**/
+			for (int i = 0; i < n_context_handles; i++) {
+				uint32_t context_offset = i * 4096;
+
+				emit_stall_timestamp_and_rpc(batch,
+							     mi_rpc_bo,
+							     512 + context_offset /* timestamp offset */,
+							     context_offset, /* report dst offset */
+							     0xdeadbeef + i); /* report id */
+
+				/* Explicitly flush here (even though the render_copy() call
+				 * will itself flush before/after the copy) to clarify that
+				 * that the PIPE_CONTROL + MI_RPC commands will be in a
+				 * separate batch from the copy.
+				 */
+				intel_batchbuffer_flush_with_context(batch, ctxs[i].context);
+
+				render_copy(batch,
+					    ctxs[i].context,
+					    &src[0], 0, 0, width, height,
+					    &dst[0], 0, 0);
+
+				/* Another redundant flush to clarify batch bo is free to reuse */
+				intel_batchbuffer_flush_with_context(batch, ctxs[i].context);
+
+				emit_stall_timestamp_and_rpc(batch,
+							     mi_rpc_bo,
+							     520 + context_offset /* timestamp offset */,
+							     256 + context_offset, /* report dst offset */
+							     0xbeefbeef + i); /* report id */
+
+				intel_batchbuffer_flush_with_context(batch, ctxs[i].context);
+			}
+
+			ret = drm_intel_bo_map(mi_rpc_bo, false /* write enable */);
+			igt_assert_eq(ret, 0);
+
+			/* Collect the data written by MI_RPC commands. */
+			for (int i = 0; i < n_context_handles; i++) {
+				uint32_t context_offset = i * 4096;
+
+				ctxs[i].report0_32 = mi_rpc_bo->virtual + context_offset;
+				ctxs[i].report1_32 = mi_rpc_bo->virtual + context_offset + 256;
+				ctxs[i].hw_id = ctxs[i].report0_32[2];
+
+				igt_debug("context%i: rpt_id=0x%x/0x%x ts=0x%x/0x%x hw_id=0x%x/0x%x\n",
+					  i,
+					  ctxs[i].report0_32[0], ctxs[i].report1_32[0],
+					  ctxs[i].report0_32[1], ctxs[i].report1_32[1],
+					  ctxs[i].report0_32[2], ctxs[i].report1_32[2]);
+
+				/* We can only guarantee the report
+				 * IDs to match on pinned contexts.
+				 */
+				if (i < n_filtered_context_handles)
+					igt_assert_eq(ctxs[i].report0_32[2], ctxs[i].report1_32[2]);
+
+				igt_assert_eq(ctxs[i].report0_32[0], 0xdeadbeef + i); /* report ID */
+				igt_assert_eq(ctxs[i].report1_32[0], 0xbeefbeef + i); /* report ID */
+
+				ctxs[i].timestamp0_64 = *(uint64_t *)(mi_rpc_bo->virtual + context_offset + 512);
+				ctxs[i].timestamp1_64 = *(uint64_t *)(mi_rpc_bo->virtual + context_offset + 520);
+			}
+
+			if (ctxs[n_context_handles - 1].report1_32[1] < ctxs[0].report0_32[1]) {
+				igt_debug("32bit timestamp rollover, trying again\n");
+				exit(EAGAIN);
+			}
+
+			/* Read the entire OA buffer from first to last MI_RPC timestamp. */
+			len = i915_read_reports_until_timestamp(test_set->perf_oa_format,
+								buf, buf_size,
+								ctxs[0].report0_32[1],
+								ctxs[n_context_handles - 1].report1_32[1]);
+
+			igt_assert(len > 0);
+			igt_debug("read %d bytes\n", (int)len);
+
+			/* Go through the OA buffer reports and assign data to
+			 * each context.
+			 */
+			for (size_t offset = 0; offset < len; offset += header->size) {
+				uint32_t *report32;
+
+				header = (void *)(buf + offset);
+
+				igt_assert_eq(header->pad, 0); /* Reserved */
+
+				/* Currently the only test that should ever expect to
+				 * see a _BUFFER_LOST error is the buffer_fill test,
+				 * otherwise something bad has probably happened...
+				 */
+				igt_assert_neq(header->type, DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
+
+				/* Loosing a timer report should not be an
+				 * issue. We should have all the details we need
+				 * just out of context switch reports.
+				 */
+				if (header->type == DRM_I915_PERF_RECORD_OA_REPORT_LOST)
+					continue;
+
+				/* Given how we've configured the i915-perf
+				 * stream, we should be left with only this type
+				 * of reports of the expected size.
+				 */
+				igt_assert_eq(header->type, DRM_I915_PERF_RECORD_SAMPLE);
+				igt_assert_eq(header->size, sample_size);
+
+				report32 = (void *)(header + 1);
+
+
+				matching_context_idx = -1;
+				for (int i = 0; i < n_filtered_context_handles; i++) {
+					if (ctxs[i].report0_32[1] < report32[1] &&
+					    ctxs[i].report1_32[1] > report32[1]) {
+						matching_context_idx = i;
+						break;
+					}
+				}
+
+				igt_debug("report hw_id=0x%08x(valid=%i) ts=0x%08x reason=%s matching_ctx=%i\n",
+					  report32[2], oa_report_ctx_is_valid(report32), report32[1],
+					  gen8_read_report_reason(report32), matching_context_idx);
+
+				/* Go through each context and try to attribute
+				 * the delta between this report and the
+				 * previous one to a particular context.
+				 */
+				if (last_context_idx != -1) {
+					uint32_t *acc_prev_report32 = prev_report32;
+					uint32_t *acc_report32 = report32;
+
+					/* Before this context's time, skip. */
+					if (ctxs[last_context_idx].report0_32[1] < acc_report32[1]) {
+
+						if (!ctxs[last_context_idx].accumulate_started)
+							acc_prev_report32 = ctxs[last_context_idx].report0_32;
+
+						if (ctxs[last_context_idx].report1_32[1] < acc_report32[1]) {
+							if (!ctxs[last_context_idx].accumulate_done) {
+								acc_report32 = ctxs[last_context_idx].report1_32;
+								ctxs[last_context_idx].accumulate_done = true;
+							} else {
+								acc_report32 = NULL;
+							}
+						}
+
+						if (acc_report32) {
+							igt_debug("   attributed to context=%i (last accumulation: %i)\n",
+								  last_context_idx,
+								  acc_report32 == ctxs[last_context_idx].report1_32);
+							accumulate_reports(&ctxs[last_context_idx].accumulator,
+									   acc_prev_report32, acc_report32);
+							ctxs[last_context_idx].accumulate_started = true;
+						}
+					}
+				}
+
+				if (oa_report_ctx_is_valid(report32)) {
+					int next_context_idx = -1;
+
+					for (int i = 0; i < n_filtered_context_handles; i++) {
+						if (ctxs[i].hw_id == report32[2]) {
+							next_context_idx = i;
+							break;
+						}
+					}
+					igt_debug("   update last_context_idx=%i->%i\n",
+						  last_context_idx, next_context_idx);
+					/* We shouldn't find any context ID that
+					 * matches one of the context we didn't
+					 * pass to i915-perf.
+					 */
+					igt_assert(next_context_idx < n_filtered_context_handles);
+					last_context_idx = next_context_idx;
+				}
+
+				prev_report32 = report32;
+			}
+
+			all_accumlate_valid = true;
+			for (int i = 0; i < n_context_handles; i++) {
+				igt_debug("context%i written pixel=%lu\n",
+					  i, ctxs[i].accumulator.deltas[2 + 26]);
+
+				if (i < n_filtered_context_handles) {
+					if (ctxs[i].accumulator.deltas[2 + 26] != width * height)
+						all_accumlate_valid = false;
+				} else {
+					if (ctxs[i].accumulator.deltas[2 + 26] != 0)
+						all_accumlate_valid = false;
+				}
+			}
+			igt_assert(all_accumlate_valid);
+
+
+			drm_intel_bo_unmap(src[0].bo);
+			drm_intel_bo_unmap(dst[0].bo);
+
+			for (int i = 0; i < ARRAY_SIZE(src); i++) {
+				drm_intel_bo_unreference(src[i].bo);
+				drm_intel_bo_unreference(dst[i].bo);
+			}
+
+			drm_intel_bo_unmap(mi_rpc_bo);
+			drm_intel_bo_unreference(mi_rpc_bo);
+			intel_batchbuffer_free(batch);
+			for (int i = 0; i < n_context_handles; i++)
+				drm_intel_gem_context_destroy(ctxs[i].context);
+			drm_intel_bufmgr_destroy(bufmgr);
+			__perf_close(stream_fd);
+		}
+
+		child_ret = igt_wait_helper(&child);
+
+		igt_assert(WEXITSTATUS(child_ret) == EAGAIN ||
+			   WEXITSTATUS(child_ret) == 0);
+
+	} while (WEXITSTATUS(child_ret) == EAGAIN);
+}
+
 static void gen12_single_ctx_helper(void)
 {
 	uint64_t properties[] = {
@@ -4204,6 +4582,137 @@ test_stress_open_close(void)
 	load_helper_fini();
 }
 
+static void
+gen8_test_invalid_multi_ctx_params(void)
+{
+	/* Invalid context handle */
+	{
+		uint32_t context_ids[] = {
+			0xffffffff,
+			0,
+			0xdeadbeef,
+		};
+		uint64_t properties[] = {
+			/* Note: we have to specify at least one sample property even
+			 * though we aren't interested in samples in this case
+			 */
+			DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+			/* OA unit configuration */
+			DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+			DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+
+			/* Note: no OA exponent specified in this case */
+
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY, to_user_pointer(&context_ids),
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, ARRAY_SIZE(context_ids),
+		};
+		struct drm_i915_perf_open_param param = {
+			.flags = I915_PERF_FLAG_FD_CLOEXEC,
+			.num_properties = sizeof(properties) / 16,
+			.properties_ptr = to_user_pointer(properties),
+		};
+
+		do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param, ENOENT);
+	}
+
+	/* Both DRM_I915_PERF_PROP_CTX_HANDLE &
+	 * DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY are invalid.
+	 */
+	{
+		uint32_t context_ids[] = {
+			0,
+			0,
+		};
+		uint64_t properties[] = {
+			DRM_I915_PERF_PROP_CTX_HANDLE, 0,
+
+			/* Note: we have to specify at least one sample property even
+			 * though we aren't interested in samples in this case
+			 */
+			DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+			/* OA unit configuration */
+			DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+			DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+
+			/* Note: no OA exponent specified in this case */
+
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY, to_user_pointer(&context_ids),
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, ARRAY_SIZE(context_ids),
+		};
+		struct drm_i915_perf_open_param param = {
+			.flags = I915_PERF_FLAG_FD_CLOEXEC,
+			.num_properties = sizeof(properties) / 16,
+			.properties_ptr = to_user_pointer(properties),
+		};
+
+		do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param, EINVAL);
+	}
+
+	/* Missing DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY. */
+	{
+		uint32_t context_ids[] = {
+			0,
+			0,
+		};
+		uint64_t properties[] = {
+			/* Note: we have to specify at least one sample property even
+			 * though we aren't interested in samples in this case
+			 */
+			DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+			/* OA unit configuration */
+			DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+			DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+
+			/* Note: no OA exponent specified in this case */
+
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, ARRAY_SIZE(context_ids),
+		};
+		struct drm_i915_perf_open_param param = {
+			.flags = I915_PERF_FLAG_FD_CLOEXEC,
+			.num_properties = sizeof(properties) / 16,
+			.properties_ptr = to_user_pointer(properties),
+		};
+
+		do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param, EFAULT);
+	}
+
+	/* Unmapped DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY. */
+	{
+		uint32_t *context_ids =
+			mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+		uint64_t properties[] = {
+			/* Note: we have to specify at least one sample property even
+			 * though we aren't interested in samples in this case
+			 */
+			DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+			/* OA unit configuration */
+			DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+			DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+
+			/* Note: no OA exponent specified in this case */
+
+			DRM_I915_PERF_PROP_CTX_HANDLE_ARRAY_LENGTH, 1,
+		};
+		struct drm_i915_perf_open_param param = {
+			.flags = I915_PERF_FLAG_FD_CLOEXEC,
+			.num_properties = sizeof(properties) / 16,
+			.properties_ptr = to_user_pointer(properties),
+		};
+
+		igt_assert(context_ids != MAP_FAILED);
+
+		context_ids[0] = 0;
+
+		munmap(context_ids, 4096);
+
+		do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, &param, EFAULT);
+	}
+}
+
 static uint64_t mask_minus_one(uint64_t mask)
 {
 	unsigned int i;
@@ -5062,6 +5571,35 @@ igt_main
 			test_global_sseu_config();
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_require(i915_perf_revision(drm_fd) >= 6);
+		}
+
+		igt_describe("Verify that multi context filtering does not work on HSW");
+		igt_subtest("unprivileged-multi-ctx-counters") {
+			igt_require(IS_HASWELL(devid));
+			hsw_test_multi_ctx_counters();
+		}
+
+		igt_describe("Verify invalid multi context parameters are rejected");
+		igt_subtest("invalid-multi-ctx-params") {
+			igt_require(intel_gen(devid) >= 8);
+			gen8_test_invalid_multi_ctx_params();
+		}
+
+		igt_describe("Measure performance for a set of contexts");
+		igt_subtest("gen8-unprivileged-multi-ctx-counters") {
+			uint32_t n_contexts[] = {
+				1, 2, 4, 7, 13, 30,
+			};
+			igt_require(intel_gen(devid) >= 8);
+
+			for (int i = 0; i < ARRAY_SIZE(n_contexts); i++)
+				gen8_test_multi_ctx_render_target_writes_a_counter(n_contexts[i]);
+		}
+	}
+
 	igt_subtest("invalid-create-userspace-config")
 		test_invalid_create_userspace_config();
 
-- 
2.26.0

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Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/perf: add tests for multi context filtering

[Chris Wilson]

Quoting Lionel Landwerlin (2020-04-06 14:57:09)
> Iris is using 2 GEM contexts for 3D & compute.
> 
> v2: Check higher number of contexts
> 
> v3: Test unmapped memory pointers (Chris)
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

I trust you know the details of the report layout much better than I do,
so I just looked at the api coverage and was happy,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/perf: add tests for multi context filtering

[Chris Wilson]

Quoting Chris Wilson (2020-05-06 20:35:32)
> Quoting Lionel Landwerlin (2020-04-06 14:57:09)
> > Iris is using 2 GEM contexts for 3D & compute.
> > 
> > v2: Check higher number of contexts
> > 
> > v3: Test unmapped memory pointers (Chris)
> > 
> > Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> 
> I trust you know the details of the report layout much better than I do,
> so I just looked at the api coverage and was happy,
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

That being said, I didn't spot feeding in ctx->engine[rcs0, rcs0...] and
checking that all are reported?
-Chris
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Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/perf: add tests for multi context filtering

[Lionel Landwerlin]

On 06/05/2020 22:37, Chris Wilson wrote:
> Quoting Chris Wilson (2020-05-06 20:35:32)
>> Quoting Lionel Landwerlin (2020-04-06 14:57:09)
>>> Iris is using 2 GEM contexts for 3D & compute.
>>>
>>> v2: Check higher number of contexts
>>>
>>> v3: Test unmapped memory pointers (Chris)
>>>
>>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> I trust you know the details of the report layout much better than I do,
>> so I just looked at the api coverage and was happy,
>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> That being said, I didn't spot feeding in ctx->engine[rcs0, rcs0...] and
> checking that all are reported?
> -Chris

Thanks a lot for looking at this.


Unfortunately the libdrm has no support for this, so all the render copy 
cannot be used there :(


-Lionel

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,v3,1/2] include: bump i915 header for new feature

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/2] include: bump i915 header for new feature
URL   : https://patchwork.freedesktop.org/series/75551/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8261 -> IGTPW_4415
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html

Known issues
------------

  Here are the changes found in IGTPW_4415 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@basic-rte:
    - fi-icl-dsi:         [PASS][1] -> [INCOMPLETE][2] ([i915#189])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/fi-icl-dsi/igt@i915_pm_rpm@basic-rte.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/fi-icl-dsi/igt@i915_pm_rpm@basic-rte.html

  
#### Possible fixes ####

  * igt@kms_chamelium@dp-crc-fast:
    - fi-cml-u2:          [DMESG-WARN][3] -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html

  
  [i915#189]: https://gitlab.freedesktop.org/drm/intel/issues/189


Participating hosts (53 -> 46)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5572 -> IGTPW_4415

  CI-20190529: 20190529
  CI_DRM_8261: 80b64adc6f5ffeb1c69996737dbdc5ad275d8e6c @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4415: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html
  IGT_5572: 6c124b5c8501d900966c033ac86c3dc55c16a2da @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@perf@gen8-unprivileged-multi-ctx-counters
+igt@perf@invalid-multi-ctx-params
+igt@perf@unprivileged-multi-ctx-counters

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html
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[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,v3,1/2] include: bump i915 header for new feature

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,v3,1/2] include: bump i915 header for new feature
URL   : https://patchwork.freedesktop.org/series/75551/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8261_full -> IGTPW_4415_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_4415_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_4415_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_4415_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_ctx_persistence@engines-hostile@rcs0:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk6/igt@gem_ctx_persistence@engines-hostile@rcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk5/igt@gem_ctx_persistence@engines-hostile@rcs0.html

  * {igt@perf@gen8-unprivileged-multi-ctx-counters} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][3] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb6/igt@perf@gen8-unprivileged-multi-ctx-counters.html

  * {igt@perf@unprivileged-multi-ctx-counters} (NEW):
    - shard-tglb:         NOTRUN -> [SKIP][4] +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-tglb7/igt@perf@unprivileged-multi-ctx-counters.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gem_exec_schedule@pi-shared-iova@bcs0}:
    - shard-kbl:          [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl2/igt@gem_exec_schedule@pi-shared-iova@bcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@gem_exec_schedule@pi-shared-iova@bcs0.html

  
New tests
---------

  New tests have been introduced between CI_DRM_8261_full and IGTPW_4415_full:

### New IGT tests (3) ###

  * igt@perf@gen8-unprivileged-multi-ctx-counters:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  * igt@perf@invalid-multi-ctx-params:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  * igt@perf@unprivileged-multi-ctx-counters:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_4415_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_params@invalid-bsd-ring:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb4/igt@gem_exec_params@invalid-bsd-ring.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb8/igt@gem_exec_params@invalid-bsd-ring.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl4/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_pm_rpm@dpms-mode-unset-lpsp:
    - shard-tglb:         [PASS][11] -> [SKIP][12] ([i915#1316] / [i915#579]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-tglb8/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-tglb2/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@i915_pm_rpm@gem-execbuf:
    - shard-hsw:          [PASS][13] -> [SKIP][14] ([fdo#109271])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-hsw4/igt@i915_pm_rpm@gem-execbuf.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-hsw4/igt@i915_pm_rpm@gem-execbuf.html
    - shard-iclb:         [PASS][15] -> [SKIP][16] ([i915#1316] / [i915#579]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb3/igt@i915_pm_rpm@gem-execbuf.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb8/igt@i915_pm_rpm@gem-execbuf.html
    - shard-glk:          [PASS][17] -> [SKIP][18] ([fdo#109271]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk9/igt@i915_pm_rpm@gem-execbuf.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk1/igt@i915_pm_rpm@gem-execbuf.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x128-random:
    - shard-kbl:          [PASS][19] -> [FAIL][20] ([i915#54] / [i915#93] / [i915#95]) +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][21] -> [INCOMPLETE][22] ([i915#155])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_draw_crc@draw-method-rgb565-render-ytiled:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#52] / [i915#54]) +5 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-render-ytiled.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-render-ytiled.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [PASS][25] -> [FAIL][26] ([i915#64] / [i915#93] / [i915#95])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip_tiling@flip-changes-tiling-yf:
    - shard-kbl:          [PASS][27] -> [FAIL][28] ([i915#699] / [i915#93] / [i915#95])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl7/igt@kms_flip_tiling@flip-changes-tiling-yf.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl6/igt@kms_flip_tiling@flip-changes-tiling-yf.html
    - shard-apl:          [PASS][29] -> [FAIL][30] ([i915#95])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl6/igt@kms_flip_tiling@flip-changes-tiling-yf.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl4/igt@kms_flip_tiling@flip-changes-tiling-yf.html

  * igt@kms_frontbuffer_tracking@fbc-badstride:
    - shard-apl:          [PASS][31] -> [FAIL][32] ([i915#49] / [i915#95]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl3/igt@kms_frontbuffer_tracking@fbc-badstride.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl8/igt@kms_frontbuffer_tracking@fbc-badstride.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-kbl:          [PASS][33] -> [FAIL][34] ([i915#49]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
    - shard-glk:          [PASS][35] -> [FAIL][36] ([i915#49])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk4/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk8/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_plane_cursor@pipe-a-overlay-size-64:
    - shard-apl:          [PASS][37] -> [FAIL][38] ([i915#1559] / [i915#95])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl6/igt@kms_plane_cursor@pipe-a-overlay-size-64.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl6/igt@kms_plane_cursor@pipe-a-overlay-size-64.html

  * igt@kms_psr@psr2_basic:
    - shard-tglb:         [PASS][39] -> [SKIP][40] ([i915#668]) +7 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-tglb6/igt@kms_psr@psr2_basic.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-tglb6/igt@kms_psr@psr2_basic.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][41] -> [SKIP][42] ([fdo#109441]) +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@perf@enable-disable:
    - shard-iclb:         [PASS][43] -> [SKIP][44] ([i915#405])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb5/igt@perf@enable-disable.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb7/igt@perf@enable-disable.html
    - shard-kbl:          [PASS][45] -> [SKIP][46] ([fdo#109271])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl2/igt@perf@enable-disable.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@perf@enable-disable.html
    - shard-apl:          [PASS][47] -> [SKIP][48] ([fdo#109271])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl6/igt@perf@enable-disable.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl3/igt@perf@enable-disable.html
    - shard-tglb:         [PASS][49] -> [SKIP][50] ([i915#405])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-tglb1/igt@perf@enable-disable.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-tglb1/igt@perf@enable-disable.html

  
#### Possible fixes ####

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [DMESG-WARN][51] ([i915#180] / [i915#95]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl4/igt@gem_softpin@noreloc-s3.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl3/igt@gem_softpin@noreloc-s3.html
    - shard-kbl:          [DMESG-WARN][53] ([i915#180] / [i915#93] / [i915#95]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl2/igt@gem_softpin@noreloc-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@gem_softpin@noreloc-s3.html

  * igt@i915_pm_rpm@cursor:
    - shard-tglb:         [SKIP][55] ([i915#1316] / [i915#579]) -> [PASS][56] +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-tglb1/igt@i915_pm_rpm@cursor.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-tglb8/igt@i915_pm_rpm@cursor.html
    - shard-hsw:          [SKIP][57] ([fdo#109271]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-hsw7/igt@i915_pm_rpm@cursor.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-hsw1/igt@i915_pm_rpm@cursor.html
    - shard-glk:          [SKIP][59] ([fdo#109271]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk4/igt@i915_pm_rpm@cursor.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk7/igt@i915_pm_rpm@cursor.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-iclb:         [SKIP][61] ([i915#1316] / [i915#579]) -> [PASS][62] +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_busy@basic@flip:
    - shard-hsw:          [INCOMPLETE][63] ([i915#61]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-hsw7/igt@kms_busy@basic@flip.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-hsw8/igt@kms_busy@basic@flip.html

  * igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen:
    - shard-kbl:          [FAIL][65] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy:
    - shard-kbl:          [FAIL][67] ([i915#1566] / [i915#93] / [i915#95]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@kms_cursor_legacy@flip-vs-cursor-crc-legacy.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][69] ([fdo#109349]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb7/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-xtiled:
    - shard-glk:          [FAIL][71] ([i915#52] / [i915#54]) -> [PASS][72] +2 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk7/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-xtiled.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-xtiled.html

  * igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
    - shard-glk:          [FAIL][73] ([i915#177] / [i915#52] / [i915#54]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk5/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled:
    - shard-apl:          [FAIL][75] ([i915#52] / [i915#54] / [i915#95]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl4/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl1/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled.html
    - shard-kbl:          [FAIL][77] ([i915#177] / [i915#52] / [i915#54] / [i915#93] / [i915#95]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl3/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl2/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-untiled.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-apl:          [FAIL][79] ([i915#79]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl1/igt@kms_flip@flip-vs-expired-vblank.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl6/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][81] ([i915#79]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [DMESG-WARN][83] ([i915#180]) -> [PASS][84] +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
    - shard-kbl:          [FAIL][85] ([i915#49]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
    - shard-apl:          [FAIL][87] ([i915#49]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
    - shard-glk:          [FAIL][89] ([i915#49]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-glk6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-glk5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][91] ([fdo#109441]) -> [PASS][92] +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb3/igt@kms_psr@psr2_cursor_render.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][93] ([i915#31]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl8/igt@kms_setmode@basic.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl4/igt@kms_setmode@basic.html

  * {igt@perf@blocking-parameterized}:
    - shard-hsw:          [FAIL][95] ([i915#1542]) -> [PASS][96] +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-hsw1/igt@perf@blocking-parameterized.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-hsw7/igt@perf@blocking-parameterized.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [FAIL][97] ([i915#1515]) -> [WARN][98] ([i915#1515])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-snb:          [SKIP][99] ([fdo#109271]) -> [INCOMPLETE][100] ([i915#82])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-snb5/igt@i915_pm_rpm@system-suspend-execbuf.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-snb2/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@kms_content_protection@uevent:
    - shard-kbl:          [FAIL][101] ([i915#357] / [i915#93] / [i915#95]) -> [FAIL][102] ([i915#357])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl4/igt@kms_content_protection@uevent.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl4/igt@kms_content_protection@uevent.html
    - shard-apl:          [FAIL][103] ([i915#357] / [i915#95]) -> [FAIL][104] ([i915#357])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl3/igt@kms_content_protection@uevent.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl4/igt@kms_content_protection@uevent.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [DMESG-WARN][105] ([i915#180] / [i915#95]) -> [FAIL][106] ([i915#1525])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
    - shard-apl:          [FAIL][107] ([fdo#108145] / [i915#265]) -> [FAIL][108] ([fdo#108145] / [i915#265] / [i915#95])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
    - shard-kbl:          [FAIL][109] ([fdo#108145] / [i915#265]) -> [FAIL][110] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-kbl1/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-kbl7/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [SKIP][111] ([fdo#109642] / [fdo#111068]) -> [FAIL][112] ([i915#608])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8261/shard-iclb8/igt@kms_psr2_su@page_flip.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/shard-iclb2/igt@kms_psr2_su@page_flip.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#1316]: https://gitlab.freedesktop.org/drm/intel/issues/1316
  [i915#1515]: https://gitlab.freedesktop.org/drm/intel/issues/1515
  [i915#1525]: https://gitlab.freedesktop.org/drm/intel/issues/1525
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559
  [i915#1566]: https://gitlab.freedesktop.org/drm/intel/issues/1566
  [i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#357]: https://gitlab.freedesktop.org/drm/intel/issues/357
  [i915#405]: https://gitlab.freedesktop.org/drm/intel/issues/405
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
  [i915#608]: https://gitlab.freedesktop.org/drm/intel/issues/608
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#64]: https://gitlab.freedesktop.org/drm/intel/issues/64
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#699]: https://gitlab.freedesktop.org/drm/intel/issues/699
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 8)
------------------------------

  Missing    (2): pig-skl-6260u pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5572 -> IGTPW_4415
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_8261: 80b64adc6f5ffeb1c69996737dbdc5ad275d8e6c @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4415: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html
  IGT_5572: 6c124b5c8501d900966c033ac86c3dc55c16a2da @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4415/index.html
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Re: [igt-dev] [PATCH i-g-t v3 1/2] include: bump i915 header for new feature

[Chris Wilson]

Quoting Lionel Landwerlin (2020-04-06 14:57:08)
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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