From: Frank Li <Frank.Li@nxp.com>
To: krzysztof.kozlowski@linaro.org
Cc: Frank.li@nxp.com, bhelgaas@google.com, conor+dt@kernel.org,
devicetree@vger.kernel.org, festevam@gmail.com,
helgaas@kernel.org, hongxing.zhu@nxp.com, imx@lists.linux.dev,
kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org,
kw@linux.com, l.stach@pengutronix.de,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
lpieralisi@kernel.org, manivannan.sadhasivam@linaro.org,
robh@kernel.org, s.hauer@pengutronix.de, shawnguo@kernel.org
Subject: [PATCH v4 03/15] PCI: imx6: Simplify reset handling by using by using *_FLAG_HAS_*_RESET
Date: Sun, 17 Dec 2023 00:11:58 -0500 [thread overview]
Message-ID: <20231217051210.754832-4-Frank.Li@nxp.com> (raw)
In-Reply-To: <20231217051210.754832-1-Frank.Li@nxp.com>
Refactors the reset handling logic in the imx6 PCI driver by adding
IMX6_PCIE_FLAG_HAS_*_RESET bitmask define for drvdata::flags.
The drvdata::flags and a bitmask ensures a cleaner and more scalable
switch-case structure for handling reset.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Notes:
Change from v2 to v3:
- add Philipp's Reviewed-by tag
Change from v1 to v2:
- remove condition check before reset_control_(de)assert() because it is
none ops if a NULL pointer pass down.
- still keep condition check at probe to help identify dts file mismatch
problem.
Change from v1 to v2:
- remove condition check before reset_control_(de)assert() because it is
none ops if a NULL pointer pass down.
- still keep condition check at probe to help identify dts file mismatch
problem.
drivers/pci/controller/dwc/pci-imx6.c | 108 ++++++++++----------------
1 file changed, 41 insertions(+), 67 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 91ba26a4b4c3d..c1fb38a2ebeb6 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -61,6 +61,8 @@ enum imx6_pcie_variants {
#define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE BIT(1)
#define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2)
#define IMX6_PCIE_FLAG_HAS_PHY BIT(3)
+#define IMX6_PCIE_FLAG_HAS_APP_RESET BIT(4)
+#define IMX6_PCIE_FLAG_HAS_PHY_RESET BIT(5)
#define imx6_check_flag(pci, val) (pci->drvdata->flags & val)
@@ -661,18 +663,10 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
{
+ reset_control_assert(imx6_pcie->pciephy_reset);
+ reset_control_assert(imx6_pcie->apps_reset);
+
switch (imx6_pcie->drvdata->variant) {
- case IMX7D:
- case IMX8MQ:
- case IMX8MQ_EP:
- reset_control_assert(imx6_pcie->pciephy_reset);
- fallthrough;
- case IMX8MM:
- case IMX8MM_EP:
- case IMX8MP:
- case IMX8MP_EP:
- reset_control_assert(imx6_pcie->apps_reset);
- break;
case IMX6SX:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
@@ -693,6 +687,8 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
break;
+ default:
+ break;
}
/* Some boards don't have PCIe reset GPIO. */
@@ -706,14 +702,10 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
struct dw_pcie *pci = imx6_pcie->pci;
struct device *dev = pci->dev;
+ reset_control_deassert(imx6_pcie->pciephy_reset);
+
switch (imx6_pcie->drvdata->variant) {
- case IMX8MQ:
- case IMX8MQ_EP:
- reset_control_deassert(imx6_pcie->pciephy_reset);
- break;
case IMX7D:
- reset_control_deassert(imx6_pcie->pciephy_reset);
-
/* Workaround for ERR010728, failure of PCI-e PLL VCO to
* oscillate, especially when cold. This turns off "Duty-cycle
* Corrector" and other mysterious undocumented things.
@@ -745,11 +737,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
usleep_range(200, 500);
break;
- case IMX6Q: /* Nothing to do */
- case IMX8MM:
- case IMX8MM_EP:
- case IMX8MP:
- case IMX8MP_EP:
+ default:
break;
}
@@ -796,16 +784,11 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
IMX6Q_GPR12_PCIE_CTL_2,
IMX6Q_GPR12_PCIE_CTL_2);
break;
- case IMX7D:
- case IMX8MQ:
- case IMX8MQ_EP:
- case IMX8MM:
- case IMX8MM_EP:
- case IMX8MP:
- case IMX8MP_EP:
- reset_control_deassert(imx6_pcie->apps_reset);
+ default:
break;
}
+
+ reset_control_deassert(imx6_pcie->apps_reset);
}
static void imx6_pcie_ltssm_disable(struct device *dev)
@@ -819,16 +802,11 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0);
break;
- case IMX7D:
- case IMX8MQ:
- case IMX8MQ_EP:
- case IMX8MM:
- case IMX8MM_EP:
- case IMX8MP:
- case IMX8MP_EP:
- reset_control_assert(imx6_pcie->apps_reset);
+ default:
break;
}
+
+ reset_control_assert(imx6_pcie->apps_reset);
}
static int imx6_pcie_start_link(struct dw_pcie *pci)
@@ -1287,36 +1265,24 @@ static int imx6_pcie_probe(struct platform_device *pdev)
"failed to get pcie phy\n");
}
- switch (imx6_pcie->drvdata->variant) {
- case IMX7D:
- if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
- imx6_pcie->controller_id = 1;
-
- imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev,
- "pciephy");
- if (IS_ERR(imx6_pcie->pciephy_reset)) {
- dev_err(dev, "Failed to get PCIEPHY reset control\n");
- return PTR_ERR(imx6_pcie->pciephy_reset);
- }
-
- imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev,
- "apps");
- if (IS_ERR(imx6_pcie->apps_reset)) {
- dev_err(dev, "Failed to get PCIE APPS reset control\n");
- return PTR_ERR(imx6_pcie->apps_reset);
- }
- break;
- case IMX8MM:
- case IMX8MM_EP:
- case IMX8MP:
- case IMX8MP_EP:
- imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev,
- "apps");
+ if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_APP_RESET)) {
+ imx6_pcie->apps_reset = devm_reset_control_get_exclusive(dev, "apps");
if (IS_ERR(imx6_pcie->apps_reset))
return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset),
"failed to get pcie apps reset control\n");
+ }
- break;
+ if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHY_RESET)) {
+ imx6_pcie->pciephy_reset = devm_reset_control_get_exclusive(dev, "pciephy");
+ if (IS_ERR(imx6_pcie->pciephy_reset))
+ return dev_err_probe(dev, PTR_ERR(imx6_pcie->pciephy_reset),
+ "Failed to get PCIEPHY reset control\n");
+ }
+
+ switch (imx6_pcie->drvdata->variant) {
+ case IMX7D:
+ if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
+ imx6_pcie->controller_id = 1;
default:
break;
}
@@ -1441,31 +1407,39 @@ static const struct imx6_pcie_drvdata drvdata[] = {
},
[IMX7D] = {
.variant = IMX7D,
- .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
+ .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
+ IMX6_PCIE_FLAG_HAS_APP_RESET |
+ IMX6_PCIE_FLAG_HAS_PHY_RESET,
.gpr = "fsl,imx7d-iomuxc-gpr",
.clk_names = {IMX6_CLKS_NO_PHYDRV},
},
[IMX8MQ] = {
.variant = IMX8MQ,
+ .flags = IMX6_PCIE_FLAG_HAS_APP_RESET |
+ IMX6_PCIE_FLAG_HAS_PHY_RESET,
.gpr = "fsl,imx8mq-iomuxc-gpr",
.clk_names = {IMX6_CLKS_NO_PHYDRV, "pcie_aux"},
},
[IMX8MM] = {
.variant = IMX8MM,
.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
- IMX6_PCIE_FLAG_HAS_PHY,
+ IMX6_PCIE_FLAG_HAS_PHY |
+ IMX6_PCIE_FLAG_HAS_APP_RESET,
.gpr = "fsl,imx8mm-iomuxc-gpr",
.clk_names = {IMX6_CLKS_COMMON, "pcie_aux"},
},
[IMX8MP] = {
.variant = IMX8MP,
.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
- IMX6_PCIE_FLAG_HAS_PHY,
+ IMX6_PCIE_FLAG_HAS_PHY |
+ IMX6_PCIE_FLAG_HAS_APP_RESET,
.gpr = "fsl,imx8mp-iomuxc-gpr",
.clk_names = {IMX6_CLKS_COMMON, "pcie_aux"},
},
[IMX8MQ_EP] = {
.variant = IMX8MQ_EP,
+ .flags = IMX6_PCIE_FLAG_HAS_PHY |
+ IMX6_PCIE_FLAG_HAS_PHY_RESET,
.mode = DW_PCIE_EP_TYPE,
.gpr = "fsl,imx8mq-iomuxc-gpr",
.clk_names = {IMX6_CLKS_NO_PHYDRV, "pcie_aux"},
--
2.34.1
next prev parent reply other threads:[~2023-12-17 5:12 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-17 5:11 [PATCH v4 00/15] PCI: imx6: Clean up and add imx95 pci support Frank Li
2023-12-17 5:11 ` [PATCH v4 01/15] PCI: imx6: Simplify clock handling by using bulk_clk_*() function Frank Li
2023-12-17 17:06 ` Manivannan Sadhasivam
2023-12-18 14:28 ` Frank Li
2023-12-17 5:11 ` [PATCH v4 02/15] PCI: imx6: Simplify phy handling by using by using IMX6_PCIE_FLAG_HAS_PHY Frank Li
2023-12-17 17:18 ` Manivannan Sadhasivam
2023-12-18 14:35 ` Frank Li
2023-12-17 5:11 ` Frank Li [this message]
2023-12-17 17:34 ` [PATCH v4 03/15] PCI: imx6: Simplify reset handling by using by using *_FLAG_HAS_*_RESET Manivannan Sadhasivam
2023-12-17 5:11 ` [PATCH v4 04/15] PCI: imx6: Using "linux,pci-domain" as slot ID Frank Li
2023-12-17 17:51 ` Manivannan Sadhasivam
2023-12-17 5:12 ` [PATCH v4 05/15] PCI: imx6: Simplify ltssm_enable() by using ltssm_off and ltssm_mask Frank Li
2023-12-17 5:12 ` [PATCH v4 06/15] PCI: imx6: Simplify configure_type() by using mode_off and mode_mask Frank Li
2023-12-17 5:12 ` [PATCH v4 07/15] PCI: imx6: Simplify switch-case logic by involve init_phy callback Frank Li
2023-12-17 5:12 ` [PATCH v4 08/15] dt-bindings: imx6q-pcie: Clean up irrationality clocks check Frank Li
2023-12-17 5:12 ` [PATCH v4 09/15] dt-bindings: imx6q-pcie: remove reg and reg-name Frank Li
2023-12-20 15:46 ` Rob Herring
2023-12-20 15:54 ` Rob Herring
2023-12-17 5:12 ` [PATCH v4 10/15] dt-bindings: imx6q-pcie: Add imx95 pcie compatible string Frank Li
2023-12-17 5:12 ` [PATCH v4 11/15] PCI: imx6: Add iMX95 PCIe support Frank Li
2023-12-17 5:12 ` [PATCH v4 12/15] PCI: imx6: Clean up get addr_space code Frank Li
2023-12-17 5:12 ` [PATCH v4 13/15] PCI: imx6: Add epc_features in imx6_pcie_drvdata Frank Li
2023-12-17 5:12 ` [PATCH v4 14/15] dt-bindings: imx6q-pcie: Add iMX95 pcie endpoint compatible string Frank Li
2023-12-17 5:12 ` [PATCH v4 15/15] PCI: imx6: Add iMX95 Endpoint (EP) function support Frank Li
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