* [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
@ 2024-09-05 18:31 Tim Harvey
2024-09-06 8:14 ` Peng Fan
0 siblings, 1 reply; 3+ messages in thread
From: Tim Harvey @ 2024-09-05 18:31 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel
Cc: Tim Harvey
The GW79xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus with an
interrupt pin. Add it to the device-tree.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
.../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16 ++++++++++++++++
.../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 16 ++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
index 5eb92005195c..417c19774b17 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
@@ -116,6 +116,16 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
+ accelerometer@19 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_accel>;
+ compatible = "st,lis2de12";
+ reg = <0x19>;
+ st,drdy-int-pin = <1>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ };
+
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
@@ -198,6 +208,12 @@ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
>;
};
+ pinctrl_accel: accelgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x159
+ >;
+ };
+
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
index 0d40cb0f05f6..797d1168f4f2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
@@ -104,6 +104,16 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
+ accelerometer@19 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_accel>;
+ compatible = "st,lis2de12";
+ reg = <0x19>;
+ st,drdy-int-pin = <1>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ };
+
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
@@ -204,6 +214,12 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
>;
};
+ pinctrl_accel: accelgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x159
+ >;
+ };
+
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* RE: [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
2024-09-05 18:31 [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device Tim Harvey
@ 2024-09-06 8:14 ` Peng Fan
2024-09-09 21:46 ` Tim Harvey
0 siblings, 1 reply; 3+ messages in thread
From: Peng Fan @ 2024-09-06 8:14 UTC (permalink / raw)
To: tharvey@gateworks.com, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: tharvey@gateworks.com
> Subject: [PATCH] arm64: dts: imx8m*-venice-gw75xx: add
> Accelerometer device
>
> The GW79xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus
> with an interrupt pin. Add it to the device-tree.
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> .../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16
> ++++++++++++++++ .../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> | 16 ++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> index 5eb92005195c..417c19774b17 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> @@ -116,6 +116,16 @@ &i2c2 {
> pinctrl-0 = <&pinctrl_i2c2>;
> status = "okay";
>
> + accelerometer@19 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_accel>;
> + compatible = "st,lis2de12";
> + reg = <0x19>;
Nitpick:
compatible, reg should be top.
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
> + st,drdy-int-pin = <1>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> eeprom@52 {
> compatible = "atmel,24c32";
> reg = <0x52>;
> @@ -198,6 +208,12 @@ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4
> 0x40000040 /* GPIOC */
> >;
> };
>
> + pinctrl_accel: accelgrp {
> + fsl,pins = <
> + MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8
> 0x159
> + >;
> + };
> +
> pinctrl_gpio_leds: gpioledgrp {
> fsl,pins = <
> MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0
> 0x6 /* LEDG */
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> index 0d40cb0f05f6..797d1168f4f2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> @@ -104,6 +104,16 @@ &i2c2 {
> pinctrl-0 = <&pinctrl_i2c2>;
> status = "okay";
>
> + accelerometer@19 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_accel>;
> + compatible = "st,lis2de12";
> + reg = <0x19>;
Ditto.
> + st,drdy-int-pin = <1>;
This should be at end.
Regards,
Peng.
> + interrupt-parent = <&gpio5>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> eeprom@52 {
> compatible = "atmel,24c32";
> reg = <0x52>;
> @@ -204,6 +214,12 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28
> 0x40000106 /* PCI_WDIS# */
> >;
> };
>
> + pinctrl_accel: accelgrp {
> + fsl,pins = <
> +
> MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x159
> + >;
> + };
> +
> pinctrl_gpio_leds: gpioledgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22
> 0x6 /* LEDG */
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
2024-09-06 8:14 ` Peng Fan
@ 2024-09-09 21:46 ` Tim Harvey
0 siblings, 0 replies; 3+ messages in thread
From: Tim Harvey @ 2024-09-09 21:46 UTC (permalink / raw)
To: Peng Fan
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
On Fri, Sep 6, 2024 at 1:14 AM Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: [PATCH] arm64: dts: imx8m*-venice-gw75xx: add
> > Accelerometer device
> >
> > The GW79xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus
> > with an interrupt pin. Add it to the device-tree.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > ---
> > .../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16
> > ++++++++++++++++ .../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
> > | 16 ++++++++++++++++
> > 2 files changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> > index 5eb92005195c..417c19774b17 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
> > @@ -116,6 +116,16 @@ &i2c2 {
> > pinctrl-0 = <&pinctrl_i2c2>;
> > status = "okay";
> >
> > + accelerometer@19 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_accel>;
> > + compatible = "st,lis2de12";
> > + reg = <0x19>;
>
> Nitpick:
> compatible, reg should be top.
> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Hi Peng,
Thanks, I will submit a v2
Tim
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-09-05 18:31 [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device Tim Harvey
2024-09-06 8:14 ` Peng Fan
2024-09-09 21:46 ` Tim Harvey
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