[PATCH v2 0/6] configure imx8 dsp DT node for rproc usage

[PATCH v2 0/6] configure imx8 dsp DT node for rproc usage

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

Configure/add imx8 dsp DT node for rproc usage.
Additionally, fix number of power domains from the fsl,dsp.yaml binding.

---
Changes in v2:
- Modify subject of commit changing fsl,dsp.yaml to state that the change
  is for fsl,dsp.yaml

- Fix issue with arm,mhuv2 binding found by Rob's bot caused by the
  changes to fsl,dsp binding

- Improve formatting of commit messages

- Link to v1: https://lore.kernel.org/lkml/20240918182117.86221-1-laurentiumihalcea111@gmail.com
---

Laurentiu Mihalcea (6):
  dt-bindings: dsp: fsl,dsp: fix power domain count
  dt-bindings: arm: arm,mhuv2: remove power domain from example client
    node
  arm64: dts: imx8qxp: configure dsp node for rproc usage
  arm64: dts: imx8qm: drop dsp node from audio_subsys bus
  arm64: dts: imx8qm: add node for VPU dsp
  arm64: dts: imx8qm: enable dsp node for rproc usage

 .../devicetree/bindings/dsp/fsl,dsp.yaml      | 62 +++++++++++++++----
 .../bindings/mailbox/arm,mhuv2.yaml           |  2 +-
 .../boot/dts/freescale/imx8-ss-audio.dtsi     | 20 +++---
 arch/arm64/boot/dts/freescale/imx8qm-mek.dts  | 27 ++++++++
 arch/arm64/boot/dts/freescale/imx8qm.dtsi     | 29 +++++++++
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 15 ++++-
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 19 ++++++
 7 files changed, 148 insertions(+), 26 deletions(-)

-- 
2.34.1

[PATCH v2 1/6] dt-bindings: dsp: fsl,dsp: fix power domain count

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

Per the current binding, QM/QXP DSPs are supposed to have 4
power domains, while the rest just 1. For QM/QXP, the 4 power
domains are: DSP, DSP_RAM, MU13A, MU13B.

First off, drop MU13A from the count. This is attached to the
platform device of lsio_mu13. This decreases the count to 3.

Secondly, drop DSP and DSP_RAM from the count for QXP. These
are attached to the platform devices of the lpcgs (used as clock
providers for the DSP).

With this in mind, the number of required power domains for QXP
is 1 (MU13B), while for QM it's 3 (MU13B, DSP, DSP_RAM).

Additionally, two extra power domains may be required in the case
of QM/QXP DSPs. These are IRQSTR_DSP and MU2A. For the nodes using
the "-hifi4" compatibles these PDs are optional, while for nodes using
the "-dsp" compatibles these are mandatory.

These changes reflect all of this information.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 .../devicetree/bindings/dsp/fsl,dsp.yaml      | 62 +++++++++++++++----
 1 file changed, 49 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
index 9af40da5688e..e2f016af1048 100644
--- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
+++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
@@ -51,8 +51,6 @@ properties:
     description:
       List of phandle and PM domain specifier as documented in
       Documentation/devicetree/bindings/power/power_domain.txt
-    minItems: 1
-    maxItems: 4
 
   mboxes:
     description:
@@ -97,16 +95,55 @@ allOf:
       properties:
         compatible:
           contains:
-            enum:
-              - fsl,imx8qxp-dsp
-              - fsl,imx8qm-dsp
-              - fsl,imx8qxp-hifi4
-              - fsl,imx8qm-hifi4
+            const: fsl,imx8qxp-hifi4
     then:
       properties:
         power-domains:
-          minItems: 4
-    else:
+          maxItems: 3
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8qxp-dsp
+    then:
+      properties:
+        power-domains:
+          minItems: 3
+          maxItems: 3
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8qm-dsp
+    then:
+      properties:
+        power-domains:
+          minItems: 5
+          maxItems: 5
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx8qm-hifi4
+    then:
+      properties:
+        power-domains:
+          minItems: 3
+          maxItems: 5
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,imx8mp-dsp
+              - fsl,imx8mp-hifi4
+              - fsl,imx8ulp-dsp
+              - fsl,imx8ulp-hifi4
+    then:
       properties:
         power-domains:
           maxItems: 1
@@ -157,10 +194,9 @@ examples:
                  <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
                  <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
         clock-names = "ipg", "ocram", "core";
-        power-domains = <&pd IMX_SC_R_MU_13A>,
-                        <&pd IMX_SC_R_MU_13B>,
-                        <&pd IMX_SC_R_DSP>,
-                        <&pd IMX_SC_R_DSP_RAM>;
+        power-domains = <&pd IMX_SC_R_MU_13B>,
+                        <&pd IMX_SC_R_IRQSTR_DSP>,
+                        <&pd IMX_SC_R_MU_2A>;
         mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
         mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
         memory-region = <&dsp_reserved>;
-- 
2.34.1

Re: [PATCH v2 1/6] dt-bindings: dsp: fsl,dsp: fix power domain count

[Rob Herring (Arm)]

On Wed, 25 Sep 2024 19:20:03 -0400, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> 
> Per the current binding, QM/QXP DSPs are supposed to have 4
> power domains, while the rest just 1. For QM/QXP, the 4 power
> domains are: DSP, DSP_RAM, MU13A, MU13B.
> 
> First off, drop MU13A from the count. This is attached to the
> platform device of lsio_mu13. This decreases the count to 3.
> 
> Secondly, drop DSP and DSP_RAM from the count for QXP. These
> are attached to the platform devices of the lpcgs (used as clock
> providers for the DSP).
> 
> With this in mind, the number of required power domains for QXP
> is 1 (MU13B), while for QM it's 3 (MU13B, DSP, DSP_RAM).
> 
> Additionally, two extra power domains may be required in the case
> of QM/QXP DSPs. These are IRQSTR_DSP and MU2A. For the nodes using
> the "-hifi4" compatibles these PDs are optional, while for nodes using
> the "-dsp" compatibles these are mandatory.
> 
> These changes reflect all of this information.
> 
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> ---
>  .../devicetree/bindings/dsp/fsl,dsp.yaml      | 62 +++++++++++++++----
>  1 file changed, 49 insertions(+), 13 deletions(-)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mailbox/arm,mhuv2.example.dtb: dsp@596e8000: power-domains: [[4294967295, 0], [4294967295, 1], [4294967295, 2], [4294967295, 3]] is too long
	from schema $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240925232008.205802-2-laurentiumihalcea111@gmail.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v2 1/6] dt-bindings: dsp: fsl,dsp: fix power domain count

[Rob Herring]

On Wed, Sep 25, 2024 at 07:20:03PM -0400, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> 
> Per the current binding, QM/QXP DSPs are supposed to have 4
> power domains, while the rest just 1. For QM/QXP, the 4 power
> domains are: DSP, DSP_RAM, MU13A, MU13B.
> 
> First off, drop MU13A from the count. This is attached to the
> platform device of lsio_mu13. This decreases the count to 3.
> 
> Secondly, drop DSP and DSP_RAM from the count for QXP. These
> are attached to the platform devices of the lpcgs (used as clock
> providers for the DSP).

What's a platform device? Sounds like some Linux implementation detail.

The number of power islands for a h/w block shouldn't be changing.

> 
> With this in mind, the number of required power domains for QXP
> is 1 (MU13B), while for QM it's 3 (MU13B, DSP, DSP_RAM).
> 
> Additionally, two extra power domains may be required in the case
> of QM/QXP DSPs. These are IRQSTR_DSP and MU2A. For the nodes using
> the "-hifi4" compatibles these PDs are optional, while for nodes using
> the "-dsp" compatibles these are mandatory.
> 
> These changes reflect all of this information.
> 
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> ---
>  .../devicetree/bindings/dsp/fsl,dsp.yaml      | 62 +++++++++++++++----
>  1 file changed, 49 insertions(+), 13 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> index 9af40da5688e..e2f016af1048 100644
> --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
> @@ -51,8 +51,6 @@ properties:
>      description:
>        List of phandle and PM domain specifier as documented in
>        Documentation/devicetree/bindings/power/power_domain.txt
> -    minItems: 1
> -    maxItems: 4

Top level should be the range of domains that covers all variants.

>  
>    mboxes:
>      description:
> @@ -97,16 +95,55 @@ allOf:
>        properties:
>          compatible:
>            contains:
> -            enum:
> -              - fsl,imx8qxp-dsp
> -              - fsl,imx8qm-dsp
> -              - fsl,imx8qxp-hifi4
> -              - fsl,imx8qm-hifi4
> +            const: fsl,imx8qxp-hifi4
>      then:
>        properties:
>          power-domains:
> -          minItems: 4
> -    else:
> +          maxItems: 3
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx8qxp-dsp
> +    then:
> +      properties:
> +        power-domains:
> +          minItems: 3
> +          maxItems: 3
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx8qm-dsp
> +    then:
> +      properties:
> +        power-domains:
> +          minItems: 5
> +          maxItems: 5
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx8qm-hifi4
> +    then:
> +      properties:
> +        power-domains:
> +          minItems: 3
> +          maxItems: 5
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - fsl,imx8mp-dsp
> +              - fsl,imx8mp-hifi4
> +              - fsl,imx8ulp-dsp
> +              - fsl,imx8ulp-hifi4
> +    then:
>        properties:
>          power-domains:
>            maxItems: 1
> @@ -157,10 +194,9 @@ examples:
>                   <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
>                   <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
>          clock-names = "ipg", "ocram", "core";
> -        power-domains = <&pd IMX_SC_R_MU_13A>,
> -                        <&pd IMX_SC_R_MU_13B>,
> -                        <&pd IMX_SC_R_DSP>,
> -                        <&pd IMX_SC_R_DSP_RAM>;
> +        power-domains = <&pd IMX_SC_R_MU_13B>,
> +                        <&pd IMX_SC_R_IRQSTR_DSP>,
> +                        <&pd IMX_SC_R_MU_2A>;
>          mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
>          mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
>          memory-region = <&dsp_reserved>;
> -- 
> 2.34.1
> 

[PATCH v2 2/6] dt-bindings: arm: arm,mhuv2: remove power domain from example client node

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

The number of power domains required for DT nodes using the
'fsl,imx8qxp-dsp' compatible is 3. Remove one power domain from
the example client node using this compatible to align with this.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml
index a4f1fe63659a..9e878c028036 100644
--- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml
+++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml
@@ -197,7 +197,7 @@ examples:
             reg = <0 0x596e8000 0 0x88000>;
             clocks = <&adma_lpcg 0>, <&adma_lpcg 1>, <&adma_lpcg 2>;
             clock-names = "ipg", "ocram", "core";
-            power-domains = <&pd 0>, <&pd 1>, <&pd 2>, <&pd 3>;
+            power-domains = <&pd 0>, <&pd 1>, <&pd 2>;
             mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
             mboxes = <&mhu_tx 2 0>, //data-transfer protocol with 5 windows, mhu-tx
                      <&mhu_tx 3 0>, //data-transfer protocol with 7 windows, mhu-tx
-- 
2.34.1

Re: [PATCH v2 2/6] dt-bindings: arm: arm,mhuv2: remove power domain from example client node

[Krzysztof Kozlowski]

On Wed, Sep 25, 2024 at 07:20:04PM -0400, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> 
> The number of power domains required for DT nodes using the
> 'fsl,imx8qxp-dsp' compatible is 3. Remove one power domain from
> the example client node using this compatible to align with this.
> 
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> ---

Your patches are not bisectable. This must be squashed.

Best regards,
Krzysztof

[PATCH v2 3/6] arm64: dts: imx8qxp: configure dsp node for rproc usage

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

Currently, the dsp node is configured for SOF usage, which is not the
"default" case and should be done in a separate SOF DTS. As such,
configure the dsp node for rproc usage, which is the "default" case.

This also includes the addition of the 2 optional power domains which
may be required by some applications.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 .../boot/dts/freescale/imx8-ss-audio.dtsi     | 20 +++++++++----------
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 15 +++++++++++++-
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 19 ++++++++++++++++++
 3 files changed, 42 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
index ff5df0fed9e9..28970211dd67 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
@@ -431,22 +431,20 @@ dsp_ram_lpcg: clock-controller@59590000 {
 	};
 
 	dsp: dsp@596e8000 {
-		compatible = "fsl,imx8qxp-dsp";
+		compatible = "fsl,imx8qxp-hifi4";
 		reg = <0x596e8000 0x88000>;
 		clocks = <&dsp_lpcg IMX_LPCG_CLK_5>,
 			 <&dsp_ram_lpcg IMX_LPCG_CLK_4>,
 			 <&dsp_lpcg IMX_LPCG_CLK_7>;
 		clock-names = "ipg", "ocram", "core";
-		power-domains = <&pd IMX_SC_R_MU_13A>,
-			<&pd IMX_SC_R_MU_13B>,
-			<&pd IMX_SC_R_DSP>,
-			<&pd IMX_SC_R_DSP_RAM>;
-		mbox-names = "txdb0", "txdb1",
-			"rxdb0", "rxdb1";
-		mboxes = <&lsio_mu13 2 0>,
-			<&lsio_mu13 2 1>,
-			<&lsio_mu13 3 0>,
-			<&lsio_mu13 3 1>;
+		power-domains = <&pd IMX_SC_R_MU_13B>,
+				<&pd IMX_SC_R_IRQSTR_DSP>,
+				<&pd IMX_SC_R_MU_2A>;
+		mbox-names = "tx", "rx", "rxdb";
+		mboxes = <&lsio_mu13 0 0>,
+			 <&lsio_mu13 1 0>,
+			 <&lsio_mu13 3 0>;
+		firmware-name = "imx/dsp/hifi4.bin";
 		status = "disabled";
 	};
 
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 936ba5ecdcac..527933a3eb5c 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -63,7 +63,8 @@ sound-wm8960 {
 };
 
 &dsp {
-	memory-region = <&dsp_reserved>;
+	memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
+			<&dsp_vdev0vring1>, <&dsp_reserved>;
 	status = "okay";
 };
 
@@ -71,6 +72,18 @@ &dsp_reserved {
 	status = "okay";
 };
 
+&dsp_vdev0buffer {
+	status = "okay";
+};
+
+&dsp_vdev0vring0 {
+	status = "okay";
+};
+
+&dsp_vdev0vring1 {
+	status = "okay";
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_fec1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 0313f295de2e..9522a65b3e22 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -186,6 +186,25 @@ dsp_reserved: dsp@92400000 {
 			status = "disabled";
 		};
 
+		dsp_vdev0vring0: vdev0vring0@942f0000 {
+			reg = <0 0x942f0000 0 0x8000>;
+			no-map;
+			status = "disabled";
+		};
+
+		dsp_vdev0vring1: vdev0vring1@942f8000 {
+			reg = <0 0x942f8000 0 0x8000>;
+			no-map;
+			status = "disabled";
+		};
+
+		dsp_vdev0buffer: vdev0buffer@94300000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x94300000 0 0x100000>;
+			no-map;
+			status = "disabled";
+		};
+
 		encoder_rpc: encoder-rpc@94400000 {
 			reg = <0 0x94400000 0 0x700000>;
 			no-map;
-- 
2.34.1

Re: [PATCH v2 3/6] arm64: dts: imx8qxp: configure dsp node for rproc usage

[Frank Li]

On Wed, Sep 25, 2024 at 07:20:05PM -0400, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
>
> Currently, the dsp node is configured for SOF usage, which is not the
> "default" case and should be done in a separate SOF DTS. As such,
> configure the dsp node for rproc usage, which is the "default" case.

You should descript the reason why SOF is not default one.

>
> This also includes the addition of the 2 optional power domains which
> may be required by some applications.
>
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> ---
>  .../boot/dts/freescale/imx8-ss-audio.dtsi     | 20 +++++++++----------
>  arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 15 +++++++++++++-
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 19 ++++++++++++++++++
>  3 files changed, 42 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
> index ff5df0fed9e9..28970211dd67 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi
> @@ -431,22 +431,20 @@ dsp_ram_lpcg: clock-controller@59590000 {
>  	};
>
>  	dsp: dsp@596e8000 {
> -		compatible = "fsl,imx8qxp-dsp";
> +		compatible = "fsl,imx8qxp-hifi4";
>  		reg = <0x596e8000 0x88000>;
>  		clocks = <&dsp_lpcg IMX_LPCG_CLK_5>,
>  			 <&dsp_ram_lpcg IMX_LPCG_CLK_4>,
>  			 <&dsp_lpcg IMX_LPCG_CLK_7>;
>  		clock-names = "ipg", "ocram", "core";
> -		power-domains = <&pd IMX_SC_R_MU_13A>,
> -			<&pd IMX_SC_R_MU_13B>,
> -			<&pd IMX_SC_R_DSP>,
> -			<&pd IMX_SC_R_DSP_RAM>;
> -		mbox-names = "txdb0", "txdb1",
> -			"rxdb0", "rxdb1";
> -		mboxes = <&lsio_mu13 2 0>,
> -			<&lsio_mu13 2 1>,
> -			<&lsio_mu13 3 0>,
> -			<&lsio_mu13 3 1>;
> +		power-domains = <&pd IMX_SC_R_MU_13B>,
> +				<&pd IMX_SC_R_IRQSTR_DSP>,
> +				<&pd IMX_SC_R_MU_2A>;
> +		mbox-names = "tx", "rx", "rxdb";
> +		mboxes = <&lsio_mu13 0 0>,
> +			 <&lsio_mu13 1 0>,
> +			 <&lsio_mu13 3 0>;
> +		firmware-name = "imx/dsp/hifi4.bin";
>  		status = "disabled";
>  	};
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> index 936ba5ecdcac..527933a3eb5c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts

Shawn's requirement: board dts should be sperated patch.

> @@ -63,7 +63,8 @@ sound-wm8960 {
>  };
>
>  &dsp {
> -	memory-region = <&dsp_reserved>;
> +	memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
> +			<&dsp_vdev0vring1>, <&dsp_reserved>;
>  	status = "okay";
>  };
>
> @@ -71,6 +72,18 @@ &dsp_reserved {
>  	status = "okay";
>  };
>
> +&dsp_vdev0buffer {
> +	status = "okay";
> +};
> +
> +&dsp_vdev0vring0 {
> +	status = "okay";
> +};
> +
> +&dsp_vdev0vring1 {
> +	status = "okay";
> +};
> +
>  &fec1 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_fec1>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 0313f295de2e..9522a65b3e22 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -186,6 +186,25 @@ dsp_reserved: dsp@92400000 {
>  			status = "disabled";
>  		};
>
> +		dsp_vdev0vring0: vdev0vring0@942f0000 {
> +			reg = <0 0x942f0000 0 0x8000>;
> +			no-map;
> +			status = "disabled";
> +		};

This should move into board file like imx8qm-mek.dts because diffference
board has difference memory layout.

And node name 'vdev0vring0' should be common name 'memory'. I forget reply
your email. Driver should use phandle to get it. Node name doesn't impact
your driver if driver implement is correct.

Frank
> +
> +		dsp_vdev0vring1: vdev0vring1@942f8000 {
> +			reg = <0 0x942f8000 0 0x8000>;
> +			no-map;
> +			status = "disabled";
> +		};
> +
> +		dsp_vdev0buffer: vdev0buffer@94300000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0 0x94300000 0 0x100000>;
> +			no-map;
> +			status = "disabled";
> +		};
> +
>  		encoder_rpc: encoder-rpc@94400000 {
>  			reg = <0 0x94400000 0 0x700000>;
>  			no-map;
> --
> 2.34.1
>

[PATCH v2 4/6] arm64: dts: imx8qm: drop dsp node from audio_subsys bus

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

On i.MX8QM, the DSP is in the VPU subsystem, which means that using the
'dsp' node from 'imx8-ss-audio.dtsi' is wrong as it's placed under the
wrong bus. As such, drop it.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 3ee6e2869e3c..f8b577ebdbef 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -603,3 +603,5 @@ mipi_pll_div2_clk: clock-controller-mipi-div2-pll {
 #include "imx8qm-ss-audio.dtsi"
 #include "imx8qm-ss-lvds.dtsi"
 #include "imx8qm-ss-mipi.dtsi"
+
+/delete-node/ &dsp;
-- 
2.34.1

[PATCH v2 5/6] arm64: dts: imx8qm: add node for VPU dsp

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

Add DT node for i.MX8QM's DSP, which is found in the VPU subsystem.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm.dtsi | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index f8b577ebdbef..ae0165a44dcd 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -581,6 +581,33 @@ mipi_pll_div2_clk: clock-controller-mipi-div2-pll {
 		clock-output-names = "mipi_pll_div2_clk";
 	};
 
+	vpu_subsys_dsp: bus@55000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x55000000 0x0 0x55000000 0x1000000>;
+
+		vpu_dsp: dsp@556e8000 {
+			compatible = "fsl,imx8qm-hifi4";
+			reg = <0x556e8000 0x88000>;
+			clocks = <&clk_dummy>,
+				 <&clk_dummy>,
+				 <&clk_dummy>;
+			clock-names = "ipg", "ocram", "core";
+			power-domains = <&pd IMX_SC_R_MU_13B>,
+					<&pd IMX_SC_R_DSP>,
+					<&pd IMX_SC_R_DSP_RAM>,
+					<&pd IMX_SC_R_IRQSTR_DSP>,
+					<&pd IMX_SC_R_MU_2A>;
+			mbox-names = "tx", "rx", "rxdb";
+			mboxes = <&lsio_mu13 0 0>,
+				 <&lsio_mu13 1 0>,
+				 <&lsio_mu13 3 0>;
+			firmware-name = "imx/dsp/hifi4.bin";
+			status = "disabled";
+		};
+	};
+
 	/* sorted in register address */
 	#include "imx8-ss-cm41.dtsi"
 	#include "imx8-ss-audio.dtsi"
-- 
2.34.1

[PATCH v2 6/6] arm64: dts: imx8qm: enable dsp node for rproc usage

[Laurentiu Mihalcea]

From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

Set the status of the dsp node to "okay" and assign and add
its reserved memory regions.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 62203eed6a6c..7ee69ce7b193 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -92,6 +92,27 @@ vdevbuffer: memory@90400000 {
 			reg = <0 0x90400000 0 0x100000>;
 			no-map;
 		};
+
+		dsp_reserved: dsp@92400000 {
+			reg = <0 0x92400000 0 0x1000000>;
+			no-map;
+		};
+
+		dsp_vdev0vring0: vdev0vring0@942f0000 {
+			reg = <0 0x942f0000 0 0x8000>;
+			no-map;
+		};
+
+		dsp_vdev0vring1: vdev0vring1@942f8000 {
+			reg = <0 0x942f8000 0 0x8000>;
+			no-map;
+		};
+
+		dsp_vdev0buffer: vdev0buffer@94300000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x94300000 0 0x100000>;
+			no-map;
+		};
 	};
 
 	lvds_backlight0: backlight-lvds0 {
@@ -640,6 +661,12 @@ &sai7 {
 	status = "okay";
 };
 
+&vpu_dsp {
+	memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
+			<&dsp_vdev0vring1>, <&dsp_reserved>;
+	status = "okay";
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
-- 
2.34.1