* [PATCH v2 01/15] arm64: dts: freescale: imx93-phycore-som: Add PMIC support
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
@ 2025-04-15 4:32 ` Primoz Fiser
2025-04-15 4:32 ` [PATCH v2 02/15] arm64: dts: freescale: imx93-phycore-som: Add EEPROM support Primoz Fiser
` (13 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
PMIC driver for PCA9451A used on phyCORE-i.MX93 SOM is available since
commit 5edeb7d31262 ("regulator: pca9450: add pca9451a support"). Add
support for it in the SOM device-tree.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- add Reviewed-by tag
.../boot/dts/freescale/imx93-phycore-som.dtsi | 97 +++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
index 88c2657b50e6..507a71f9294b 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -72,6 +72,90 @@ ethphy1: ethernet-phy@1 {
};
};
+/* I2C3 */
+&lpi2c3 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpi2c3>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "VDD_SOC";
+ regulator-min-microvolt = <610000>;
+ regulator-max-microvolt = <950000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "VDDQ_0V6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <600000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck4: BUCK4 {
+ regulator-name = "VDD_3V3_BUCK";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5 {
+ regulator-name = "VDD_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "VDD_1V1";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "PMIC_SNVS_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "VDD_0V8";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "NVCC_SD2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
/* eMMC */
&usdhc1 {
pinctrl-names = "default";
@@ -108,6 +192,19 @@ MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e
>;
};
+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+
+ pinctrl_pmic: pmicgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_RD3__GPIO4_IO27 0x31e
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 02/15] arm64: dts: freescale: imx93-phycore-som: Add EEPROM support
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
2025-04-15 4:32 ` [PATCH v2 01/15] arm64: dts: freescale: imx93-phycore-som: Add PMIC support Primoz Fiser
@ 2025-04-15 4:32 ` Primoz Fiser
2025-04-15 18:30 ` Frank Li
2025-04-15 4:32 ` [PATCH v2 03/15] arm64: dts: freescale: imx93-phycore-som: Disable LED pull-up Primoz Fiser
` (12 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for the EEPROM chip available on I2C3 bus (address 0x50),
used for the PHYTEC SOM detection.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- move reg property ahead of pagesize
arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
index 507a71f9294b..0528e293c03d 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -154,6 +154,14 @@ ldo5: LDO5 {
};
};
};
+
+ /* EEPROM */
+ eeprom@50 {
+ compatible = "atmel,24c32";
+ reg = <0x50>;
+ pagesize = <32>;
+ vcc-supply = <&buck4>;
+ };
};
/* eMMC */
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 02/15] arm64: dts: freescale: imx93-phycore-som: Add EEPROM support
2025-04-15 4:32 ` [PATCH v2 02/15] arm64: dts: freescale: imx93-phycore-som: Add EEPROM support Primoz Fiser
@ 2025-04-15 18:30 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:30 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:32:58AM +0200, Primoz Fiser wrote:
> Add support for the EEPROM chip available on I2C3 bus (address 0x50),
> used for the PHYTEC SOM detection.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v2:
> - move reg property ahead of pagesize
>
> arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> index 507a71f9294b..0528e293c03d 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> @@ -154,6 +154,14 @@ ldo5: LDO5 {
> };
> };
> };
> +
> + /* EEPROM */
> + eeprom@50 {
> + compatible = "atmel,24c32";
> + reg = <0x50>;
> + pagesize = <32>;
> + vcc-supply = <&buck4>;
> + };
> };
>
> /* eMMC */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 03/15] arm64: dts: freescale: imx93-phycore-som: Disable LED pull-up
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
2025-04-15 4:32 ` [PATCH v2 01/15] arm64: dts: freescale: imx93-phycore-som: Add PMIC support Primoz Fiser
2025-04-15 4:32 ` [PATCH v2 02/15] arm64: dts: freescale: imx93-phycore-som: Add EEPROM support Primoz Fiser
@ 2025-04-15 4:32 ` Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 04/15] arm64: dts: freescale: imx93-phycore-som: Enhance eMMC pinctrl Primoz Fiser
` (11 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
There is already an external pull-down resistor on the LED output line.
It makes no sense to have both pull-down and pull-up resistors enabled
at the same time. Thus disable the internal pull-down.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- add Reviewed-by tag
arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
index 0528e293c03d..06a9e674e338 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -196,7 +196,7 @@ MX93_PAD_ENET2_TD2__ENET1_TX_CLK 0x4000050e
pinctrl_leds: ledsgrp {
fsl,pins = <
- MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e
+ MX93_PAD_I2C1_SDA__GPIO1_IO01 0x11e
>;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 04/15] arm64: dts: freescale: imx93-phycore-som: Enhance eMMC pinctrl
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (2 preceding siblings ...)
2025-04-15 4:32 ` [PATCH v2 03/15] arm64: dts: freescale: imx93-phycore-som: Disable LED pull-up Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 05/15] arm64: dts: freescale: imx93-phycore-som: Add eMMC no-1-8-v by default Primoz Fiser
` (10 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Improve eMMC on phyCORE-i.MX93 SOM by adding 100MHz and 200MHz pinctrl
modes. This enables to use eMMC at enhanced data rates (e.g. HS400).
While at it, apply a workaround for the i.MX93 chip errata ERR052021.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- no changes
.../boot/dts/freescale/imx93-phycore-som.dtsi | 57 +++++++++++++++----
1 file changed, 47 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
index 06a9e674e338..663530a7e2bb 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -166,8 +166,10 @@ eeprom@50 {
/* eMMC */
&usdhc1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
@@ -213,18 +215,53 @@ MX93_PAD_ENET2_RD3__GPIO4_IO27 0x31e
>;
};
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x1386
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x138e
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x1386
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x138e
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x1386
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x1386
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x1386
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x1386
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x1386
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001386
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001386
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001386
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001386
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001386
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001386
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001386
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000139e
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000139e
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000139e
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000139e
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000139e
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000139e
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000139e
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013be
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013be
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013be
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013be
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013be
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013be
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013be
MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e
>;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 05/15] arm64: dts: freescale: imx93-phycore-som: Add eMMC no-1-8-v by default
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (3 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 04/15] arm64: dts: freescale: imx93-phycore-som: Enhance eMMC pinctrl Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 06/15] arm64: dts: freescale: imx93-phyboard-segin: Drop eMMC no-1-8-v flag Primoz Fiser
` (9 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
The phyCORE-i.MX93 SoM comes in two variants, one with VDD_IO set to
3.3V and the other variant to 1.8V. The 3.3V variant can only support
DDR52 mode, while 1.8V variant is capable of HS400ES eMMC mode. The
information about VDD_IO option is encoded in the SoM's EEPROM. EEPROM
is read in the bootloader and bootloader clears the "no-1-8-v" flag in
case of 1.8V SoM variant is detected. Thus add property 'no-1-8-v' by
default to usdhc1 (eMMC) node and let bootloader handle the flag. In
case EEPROM is erased or read-out fails, flag "no-1-8-v" also ensures
fall-back compatibility with both SoM variants.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- reword commit message (add more info)
arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
index 663530a7e2bb..22dbcc89e311 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
@@ -172,6 +172,7 @@ &usdhc1 {
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
+ no-1-8-v;
status = "okay";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 06/15] arm64: dts: freescale: imx93-phyboard-segin: Drop eMMC no-1-8-v flag
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (4 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 05/15] arm64: dts: freescale: imx93-phycore-som: Add eMMC no-1-8-v by default Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 07/15] arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect Primoz Fiser
` (8 subsequent siblings)
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Drop redundant 'no-1-8-v' flag from usdhc1 (eMMC) node. Flag is now set
by default in the SOM include file (imx93-phycore-som.dtsi).
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- add Reviewed-by tag
arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 85fb188b057f..902b523fc92c 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -40,11 +40,6 @@ &lpuart1 {
status = "okay";
};
-/* eMMC */
-&usdhc1 {
- no-1-8-v;
-};
-
/* SD-Card */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 07/15] arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (5 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 06/15] arm64: dts: freescale: imx93-phyboard-segin: Drop eMMC no-1-8-v flag Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:31 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 08/15] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl Primoz Fiser
` (7 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add disable-wp flag (write-protect) to usdhc2 node (SD-card) to get rid
of the following kernel boot warning:
host does not support reading read-only switch, assuming write-enable
Micro SD cards can't be physically write-protected like full-sized
cards anyways.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- reword commit message
arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 902b523fc92c..3d5cd0561362 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -48,6 +48,7 @@ &usdhc2 {
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
bus-width = <4>;
cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ disable-wp;
no-mmc;
no-sdio;
vmmc-supply = <®_usdhc2_vmmc>;
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 07/15] arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect
2025-04-15 4:33 ` [PATCH v2 07/15] arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect Primoz Fiser
@ 2025-04-15 18:31 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:31 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:03AM +0200, Primoz Fiser wrote:
> Add disable-wp flag (write-protect) to usdhc2 node (SD-card) to get rid
> of the following kernel boot warning:
>
> host does not support reading read-only switch, assuming write-enable
>
> Micro SD cards can't be physically write-protected like full-sized
> cards anyways.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v2:
> - reword commit message
>
> arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 902b523fc92c..3d5cd0561362 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -48,6 +48,7 @@ &usdhc2 {
> pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
> bus-width = <4>;
> cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
> + disable-wp;
> no-mmc;
> no-sdio;
> vmmc-supply = <®_usdhc2_vmmc>;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 08/15] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (6 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 07/15] arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:38 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata Primoz Fiser
` (6 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Until now, all usdhc2 (SD-card) pinctrl labels pointed to one pinctrl
group "usdhc2grp" which was overwritten twice by the 100 and 200 MHz
modes. Fix this by using unique pinctrl names.
Additionally, adjust MX93_PAD_SD2_CLK__USDHC2_CLK pad drive-strength
according to values obtained by measurements from the PHYTEC hardware
department to improve signal integrity.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- reword commit msg
- split errata changes into separate patch
arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 3d5cd0561362..541297052b62 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -77,7 +77,7 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
pinctrl_usdhc2_default: usdhc2grp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
@@ -87,9 +87,9 @@ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
- pinctrl_usdhc2_100mhz: usdhc2grp {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
@@ -99,9 +99,9 @@ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
- pinctrl_usdhc2_200mhz: usdhc2grp {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 08/15] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl
2025-04-15 4:33 ` [PATCH v2 08/15] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl Primoz Fiser
@ 2025-04-15 18:38 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:38 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:04AM +0200, Primoz Fiser wrote:
> Until now, all usdhc2 (SD-card) pinctrl labels pointed to one pinctrl
> group "usdhc2grp" which was overwritten twice by the 100 and 200 MHz
> modes. Fix this by using unique pinctrl names.
>
> Additionally, adjust MX93_PAD_SD2_CLK__USDHC2_CLK pad drive-strength
> according to values obtained by measurements from the PHYTEC hardware
> department to improve signal integrity.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Strange, DTC should report error if meet the same node name.
> ---
> Changes in v2:
> - reword commit msg
> - split errata changes into separate patch
>
> arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 3d5cd0561362..541297052b62 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -77,7 +77,7 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>
> pinctrl_usdhc2_default: usdhc2grp {
> fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
> MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
> MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
> @@ -87,9 +87,9 @@ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
>
> - pinctrl_usdhc2_100mhz: usdhc2grp {
> + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x179e
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
> MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
> MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
> @@ -99,9 +99,9 @@ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
>
> - pinctrl_usdhc2_200mhz: usdhc2grp {
> + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x178e
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
> MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
> MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (7 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 08/15] arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:42 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support Primoz Fiser
` (5 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Implement fix for i.MX 93 silicon errata ERR052021:
ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
drive mode and nominal mode
Description:
uSDHC PADs have one integration issue.
When CMD/DATA lines direction change from output to input, uSDHC
controller begin sampling, the integration issue will make input
enable signal from uSDHC propagated to the PAD with a long delay,
thus the new input value on the pad comes to uSDHC lately. The
uSDHC sampled the old input value and the sampling result is wrong.
Workaround:
Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
propagate input to uSDHC with no delay, so correct value is sampled.
This issue will wrongly trigger the start bit when sample the USDHC
command response, cause the USDHC trigger command CRC/index/endbit
error, which will finally impact the tuning pass window, espically
will impact the standard tuning logic, and can't find a correct delay
cell to get the best timing.
Based on commit bb89601282fc ("arm64: dts: imx93-11x11-evk: set SION for
cmd and data pad of USDHC").
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- new patch in v2 (split from #8)
.../dts/freescale/imx93-phyboard-segin.dts | 37 ++++++++++---------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 541297052b62..525f52789f8b 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -75,39 +75,42 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>;
};
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_default: usdhc2grp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata
2025-04-15 4:33 ` [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata Primoz Fiser
@ 2025-04-15 18:42 ` Frank Li
2025-04-16 12:38 ` Primoz Fiser
0 siblings, 1 reply; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:42 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:05AM +0200, Primoz Fiser wrote:
subject should be
"set SION bit for CMD/DATA to fix ERR052021 errata"
> Implement fix for i.MX 93 silicon errata ERR052021:
>
> ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
> drive mode and nominal mode
> Description:
> uSDHC PADs have one integration issue.
> When CMD/DATA lines direction change from output to input, uSDHC
> controller begin sampling, the integration issue will make input
> enable signal from uSDHC propagated to the PAD with a long delay,
> thus the new input value on the pad comes to uSDHC lately. The
> uSDHC sampled the old input value and the sampling result is wrong.
>
nit:
add 2 char indention
> Workaround:
> Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
> propagate input to uSDHC with no delay, so correct value is sampled.
the same here
>
> This issue will wrongly trigger the start bit when sample the USDHC
> command response, cause the USDHC trigger command CRC/index/endbit
> error, which will finally impact the tuning pass window, espically
> will impact the standard tuning logic, and can't find a correct delay
> cell to get the best timing.
>
> Based on commit bb89601282fc ("arm64: dts: imx93-11x11-evk: set SION for
> cmd and data pad of USDHC").
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
> Changes in v2:
> - new patch in v2 (split from #8)
>
> .../dts/freescale/imx93-phyboard-segin.dts | 37 ++++++++++---------
> 1 file changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 541297052b62..525f52789f8b 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -75,39 +75,42 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
> >;
> };
>
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> pinctrl_usdhc2_default: usdhc2grp {
> fsl,pins = <
> MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
> MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
>
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> fsl,pins = <
> MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
>
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> fsl,pins = <
> MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> >;
> };
> };
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata
2025-04-15 18:42 ` Frank Li
@ 2025-04-16 12:38 ` Primoz Fiser
0 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-16 12:38 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
Hi Frank,
On 15. 04. 25 20:42, Frank Li wrote:
> On Tue, Apr 15, 2025 at 06:33:05AM +0200, Primoz Fiser wrote:
>
> subject should be
>
> "set SION bit for CMD/DATA to fix ERR052021 errata"
>
OK I can fix this in v3.
>> Implement fix for i.MX 93 silicon errata ERR052021:
>>
>> ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
>> drive mode and nominal mode
>> Description:
>> uSDHC PADs have one integration issue.
>> When CMD/DATA lines direction change from output to input, uSDHC
>> controller begin sampling, the integration issue will make input
>> enable signal from uSDHC propagated to the PAD with a long delay,
>> thus the new input value on the pad comes to uSDHC lately. The
>> uSDHC sampled the old input value and the sampling result is wrong.
>>
>
> nit:
> add 2 char indention
OK, will add.
BR,
Primoz
>
>> Workaround:
>> Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
>> propagate input to uSDHC with no delay, so correct value is sampled.
>
> the same here
>
>>
>> This issue will wrongly trigger the start bit when sample the USDHC
>> command response, cause the USDHC trigger command CRC/index/endbit
>> error, which will finally impact the tuning pass window, espically
>> will impact the standard tuning logic, and can't find a correct delay
>> cell to get the best timing.
>>
>> Based on commit bb89601282fc ("arm64: dts: imx93-11x11-evk: set SION for
>> cmd and data pad of USDHC").
>>
>> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
>> ---
>> Changes in v2:
>> - new patch in v2 (split from #8)
>>
>> .../dts/freescale/imx93-phyboard-segin.dts | 37 ++++++++++---------
>> 1 file changed, 20 insertions(+), 17 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> index 541297052b62..525f52789f8b 100644
>> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> @@ -75,39 +75,42 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>> >;
>> };
>>
>> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
>> pinctrl_usdhc2_default: usdhc2grp {
>> fsl,pins = <
>> MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
>> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
>> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
>> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
>> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x138e
>> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
>> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
>> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
>> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
>> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
>> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
>> MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>> >;
>> };
>>
>> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
>> pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
>> fsl,pins = <
>> MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e
>> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
>> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x138e
>> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x138e
>> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
>> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
>> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
>> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
>> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
>> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
>> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
>> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>> >;
>> };
>>
>> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
>> pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
>> fsl,pins = <
>> MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
>> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x139e
>> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x139e
>> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x139e
>> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x139e
>> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x139e
>> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e
>> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e
>> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e
>> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000139e
>> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000139e
>> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>> >;
>> };
>> };
>> --
>> 2.34.1
>>
--
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@norik.com
--
Norik systems d.o.o.
Your embedded software partner
Slovenia, EU
phone: +386-41-540-545
email: info@norik.com
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (8 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 09/15] arm64: dts: freescale: imx93-phyboard-segin: Fix for ERR052021 errata Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:46 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support Primoz Fiser
` (4 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
default RTC by configuring the aliases.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- reword commit message
.../dts/freescale/imx93-phyboard-segin.dts | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 525f52789f8b..38b89398e646 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -17,6 +17,11 @@ /{
compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
"fsl,imx93";
+ aliases {
+ rtc0 = &i2c_rtc;
+ rtc1 = &bbnsm_rtc;
+ };
+
chosen {
stdout-path = &lpuart1;
};
@@ -33,6 +38,24 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
};
};
+/* I2C2 */
+&lpi2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpi2c2>;
+ status = "okay";
+
+ /* RTC */
+ i2c_rtc: rtc@68 {
+ compatible = "microcrystal,rv4162";
+ reg = <0x68>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rtc>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
/* Console */
&lpuart1 {
pinctrl-names = "default";
@@ -56,6 +79,13 @@ &usdhc2 {
};
&iomuxc {
+ pinctrl_lpi2c2: lpi2c2grp {
+ fsl,pins = <
+ MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
+ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
@@ -69,6 +99,12 @@ MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
>;
};
+ pinctrl_rtc: rtcgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_RD2__GPIO4_IO26 0x31e
+ >;
+ };
+
pinctrl_usdhc2_cd: usdhc2cdgrp {
fsl,pins = <
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support
2025-04-15 4:33 ` [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support Primoz Fiser
@ 2025-04-15 18:46 ` Frank Li
2025-04-16 12:42 ` Primoz Fiser
0 siblings, 1 reply; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:46 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:06AM +0200, Primoz Fiser wrote:
> Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
> default RTC by configuring the aliases.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
> Changes in v2:
> - reword commit message
>
> .../dts/freescale/imx93-phyboard-segin.dts | 36 +++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 525f52789f8b..38b89398e646 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -17,6 +17,11 @@ /{
> compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
> "fsl,imx93";
>
> + aliases {
> + rtc0 = &i2c_rtc;
> + rtc1 = &bbnsm_rtc;
> + };
> +
> chosen {
> stdout-path = &lpuart1;
> };
> @@ -33,6 +38,24 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
> };
> };
>
> +/* I2C2 */
nit: needn't it
> +&lpi2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lpi2c2>;
> + status = "okay";
> +
> + /* RTC */
the same here, not name is rtc.
Frank
> + i2c_rtc: rtc@68 {
> + compatible = "microcrystal,rv4162";
> + reg = <0x68>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rtc>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> /* Console */
> &lpuart1 {
> pinctrl-names = "default";
> @@ -56,6 +79,13 @@ &usdhc2 {
> };
>
> &iomuxc {
> + pinctrl_lpi2c2: lpi2c2grp {
> + fsl,pins = <
> + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
> + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
> + >;
> + };
> +
> pinctrl_uart1: uart1grp {
> fsl,pins = <
> MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> @@ -69,6 +99,12 @@ MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
> >;
> };
>
> + pinctrl_rtc: rtcgrp {
> + fsl,pins = <
> + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x31e
> + >;
> + };
> +
> pinctrl_usdhc2_cd: usdhc2cdgrp {
> fsl,pins = <
> MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support
2025-04-15 18:46 ` Frank Li
@ 2025-04-16 12:42 ` Primoz Fiser
0 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-16 12:42 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
Hi Frank,
On 15. 04. 25 20:46, Frank Li wrote:
> On Tue, Apr 15, 2025 at 06:33:06AM +0200, Primoz Fiser wrote:
>> Add support for RTC connected via I2C on phyBOARD-Segin-i.MX93. Set
>> default RTC by configuring the aliases.
>>
>> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
>> ---
>> Changes in v2:
>> - reword commit message
>>
>> .../dts/freescale/imx93-phyboard-segin.dts | 36 +++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> index 525f52789f8b..38b89398e646 100644
>> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
>> @@ -17,6 +17,11 @@ /{
>> compatible = "phytec,imx93-phyboard-segin", "phytec,imx93-phycore-som",
>> "fsl,imx93";
>>
>> + aliases {
>> + rtc0 = &i2c_rtc;
>> + rtc1 = &bbnsm_rtc;
>> + };
>> +
>> chosen {
>> stdout-path = &lpuart1;
>> };
>> @@ -33,6 +38,24 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>> };
>> };
>>
>> +/* I2C2 */
>
> nit: needn't it
>
>> +&lpi2c2 {
>> + clock-frequency = <400000>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_lpi2c2>;
>> + status = "okay";
>> +
>> + /* RTC */
>
> the same here, not name is rtc.
>
I would like to keep the above comments.
This is just helpful for customers using this board as reference when
designing their own carrier boards.
Thank you for understanding,
BR,
Primoz
> Frank
>
>> + i2c_rtc: rtc@68 {
>> + compatible = "microcrystal,rv4162";
>> + reg = <0x68>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_rtc>;
>> + interrupt-parent = <&gpio4>;
>> + interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +};
>> +
>> /* Console */
>> &lpuart1 {
>> pinctrl-names = "default";
>> @@ -56,6 +79,13 @@ &usdhc2 {
>> };
>>
>> &iomuxc {
>> + pinctrl_lpi2c2: lpi2c2grp {
>> + fsl,pins = <
>> + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
>> + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
>> + >;
>> + };
>> +
>> pinctrl_uart1: uart1grp {
>> fsl,pins = <
>> MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
>> @@ -69,6 +99,12 @@ MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
>> >;
>> };
>>
>> + pinctrl_rtc: rtcgrp {
>> + fsl,pins = <
>> + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x31e
>> + >;
>> + };
>> +
>> pinctrl_usdhc2_cd: usdhc2cdgrp {
>> fsl,pins = <
>> MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>> --
>> 2.34.1
>>
--
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@norik.com
--
Norik systems d.o.o.
Your embedded software partner
Slovenia, EU
phone: +386-41-540-545
email: info@norik.com
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (9 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 10/15] arm64: dts: freescale: imx93-phyboard-segin: Add RTC support Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:44 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 12/15] arm64: dts: freescale: imx93-phyboard-segin: Add USB support Primoz Fiser
` (3 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
interface. The CAN PHY chip SN65HVD234D used on the board is compatible
with the TCAN1043 driver using the generic "can-transceiver-phy" and is
capable of up to 1Mbps data rate.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- drop CAN regulator hack in favor or "can-transceiver-phy" mechanism
- reword commit message
.../dts/freescale/imx93-phyboard-segin.dts | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 38b89398e646..be9c0a436734 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -26,6 +26,15 @@ chosen {
stdout-path = &lpuart1;
};
+ flexcan1_tc: can-phy0 {
+ compatible = "ti,tcan1043";
+ #phy-cells = <0>;
+ max-bitrate = <1000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1_tc>;
+ enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ };
+
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
enable-active-high;
@@ -38,6 +47,14 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
};
};
+/* CAN */
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ phys = <&flexcan1_tc>;
+ status = "okay";
+};
+
/* I2C2 */
&lpi2c2 {
clock-frequency = <400000>;
@@ -79,6 +96,19 @@ &usdhc2 {
};
&iomuxc {
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
+ MX93_PAD_PDM_CLK__CAN1_TX 0x139e
+ >;
+ };
+
+ pinctrl_flexcan1_tc: flexcan1tcgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_TD3__GPIO4_IO16 0x31e
+ >;
+ };
+
pinctrl_lpi2c2: lpi2c2grp {
fsl,pins = <
MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support
2025-04-15 4:33 ` [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support Primoz Fiser
@ 2025-04-15 18:44 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:44 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:07AM +0200, Primoz Fiser wrote:
> Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
> interface. The CAN PHY chip SN65HVD234D used on the board is compatible
> with the TCAN1043 driver using the generic "can-transceiver-phy" and is
> capable of up to 1Mbps data rate.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v2:
> - drop CAN regulator hack in favor or "can-transceiver-phy" mechanism
> - reword commit message
>
> .../dts/freescale/imx93-phyboard-segin.dts | 30 +++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 38b89398e646..be9c0a436734 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -26,6 +26,15 @@ chosen {
> stdout-path = &lpuart1;
> };
>
> + flexcan1_tc: can-phy0 {
> + compatible = "ti,tcan1043";
> + #phy-cells = <0>;
> + max-bitrate = <1000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1_tc>;
> + enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
> + };
> +
> reg_usdhc2_vmmc: regulator-usdhc2 {
> compatible = "regulator-fixed";
> enable-active-high;
> @@ -38,6 +47,14 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
> };
> };
>
> +/* CAN */
> +&flexcan1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + phys = <&flexcan1_tc>;
> + status = "okay";
> +};
> +
> /* I2C2 */
> &lpi2c2 {
> clock-frequency = <400000>;
> @@ -79,6 +96,19 @@ &usdhc2 {
> };
>
> &iomuxc {
> + pinctrl_flexcan1: flexcan1grp {
> + fsl,pins = <
> + MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
> + MX93_PAD_PDM_CLK__CAN1_TX 0x139e
> + >;
> + };
> +
> + pinctrl_flexcan1_tc: flexcan1tcgrp {
> + fsl,pins = <
> + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x31e
> + >;
> + };
> +
> pinctrl_lpi2c2: lpi2c2grp {
> fsl,pins = <
> MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 12/15] arm64: dts: freescale: imx93-phyboard-segin: Add USB support
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (10 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:47 ` Frank Li
2025-04-15 4:33 ` [PATCH v2 13/15] arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio Primoz Fiser
` (2 subsequent siblings)
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for both USB controllers. Set first controller in OTG mode
(USB micro-AB connector X8) and the second one in host mode (USB type A
connector X7) by default.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- reword commit message
.../boot/dts/freescale/imx93-phyboard-segin.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index be9c0a436734..e4f959f665b2 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -80,6 +80,19 @@ &lpuart1 {
status = "okay";
};
+/* USB */
+&usbotg1 {
+ disable-over-current;
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ status = "okay";
+};
+
/* SD-Card */
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 12/15] arm64: dts: freescale: imx93-phyboard-segin: Add USB support
2025-04-15 4:33 ` [PATCH v2 12/15] arm64: dts: freescale: imx93-phyboard-segin: Add USB support Primoz Fiser
@ 2025-04-15 18:47 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:47 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:08AM +0200, Primoz Fiser wrote:
> Add support for both USB controllers. Set first controller in OTG mode
> (USB micro-AB connector X8) and the second one in host mode (USB type A
> connector X7) by default.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v2:
> - reword commit message
>
> .../boot/dts/freescale/imx93-phyboard-segin.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index be9c0a436734..e4f959f665b2 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -80,6 +80,19 @@ &lpuart1 {
> status = "okay";
> };
>
> +/* USB */
> +&usbotg1 {
> + disable-over-current;
> + dr_mode = "otg";
> + status = "okay";
> +};
> +
> +&usbotg2 {
> + disable-over-current;
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> /* SD-Card */
> &usdhc2 {
> pinctrl-names = "default", "state_100mhz", "state_200mhz";
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 13/15] arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (11 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 12/15] arm64: dts: freescale: imx93-phyboard-segin: Add USB support Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 6:58 ` Daniel Baluta
2025-04-15 4:33 ` [PATCH v2 14/15] arm64: dts: freescale: imx93-phyboard-segin: Add EQOS Ethernet Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically Primoz Fiser
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for I2S audio found on phyBOARD-Segin-i.MX93. Audio codec
TLV320AIC3007 is connected to SAI1 interface as a DAI master. MCLK is
provided from the SAI's internal audio PLL (19.2 MHz).
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- add Reviewed-by tag
- remove empty line
.../dts/freescale/imx93-phyboard-segin.dts | 74 +++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index e4f959f665b2..54e084e69706 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -35,6 +35,20 @@ flexcan1_tc: can-phy0 {
enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
};
+ reg_sound_1v8: regulator-sound-1v8 {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "VCC1V8_AUDIO";
+ };
+
+ reg_sound_3v3: regulator-sound-3v3 {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VCC3V3_ANALOG";
+ };
+
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
enable-active-high;
@@ -45,6 +59,34 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
regulator-max-microvolt = <3300000>;
regulator-name = "VCC_SD";
};
+
+ sound: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "phyBOARD-Segin-TLV320AIC3007";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink_master>;
+ simple-audio-card,frame-master = <&dailink_master>;
+ simple-audio-card,widgets =
+ "Line", "Line In",
+ "Line", "Line Out",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "Line Out", "LLOUT",
+ "Line Out", "RLOUT",
+ "Speaker", "SPOP",
+ "Speaker", "SPOM",
+ "LINE1L", "Line In",
+ "LINE1R", "Line In";
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai1>;
+ };
+
+ dailink_master: simple-audio-card,codec {
+ sound-dai = <&audio_codec>;
+ clocks = <&clk IMX93_CLK_SAI1>;
+ };
+ };
};
/* CAN */
@@ -62,6 +104,17 @@ &lpi2c2 {
pinctrl-0 = <&pinctrl_lpi2c2>;
status = "okay";
+ /* Codec */
+ audio_codec: audio-codec@18 {
+ compatible = "ti,tlv320aic3007";
+ reg = <0x18>;
+ #sound-dai-cells = <0>;
+ AVDD-supply = <®_sound_3v3>;
+ IOVDD-supply = <®_sound_3v3>;
+ DRVDD-supply = <®_sound_3v3>;
+ DVDD-supply = <®_sound_1v8>;
+ };
+
/* RTC */
i2c_rtc: rtc@68 {
compatible = "microcrystal,rv4162";
@@ -80,6 +133,17 @@ &lpuart1 {
status = "okay";
};
+/* Audio */
+&sai1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai1>;
+ assigned-clocks = <&clk IMX93_CLK_SAI1>;
+ assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
+ assigned-clock-rates = <19200000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
/* USB */
&usbotg1 {
disable-over-current;
@@ -148,6 +212,16 @@ MX93_PAD_ENET2_RD2__GPIO4_IO26 0x31e
>;
};
+ pinctrl_sai1: sai1grp {
+ fsl,pins = <
+ MX93_PAD_UART2_RXD__SAI1_MCLK 0x1202
+ MX93_PAD_SAI1_TXFS__SAI1_TX_SYNC 0x1202
+ MX93_PAD_SAI1_TXC__SAI1_TX_BCLK 0x1202
+ MX93_PAD_SAI1_TXD0__SAI1_TX_DATA00 0x1402
+ MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00 0x1402
+ >;
+ };
+
pinctrl_usdhc2_cd: usdhc2cdgrp {
fsl,pins = <
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 13/15] arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio
2025-04-15 4:33 ` [PATCH v2 13/15] arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio Primoz Fiser
@ 2025-04-15 6:58 ` Daniel Baluta
0 siblings, 0 replies; 27+ messages in thread
From: Daniel Baluta @ 2025-04-15 6:58 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 7:37 AM Primoz Fiser <primoz.fiser@norik.com> wrote:
>
> Add support for I2S audio found on phyBOARD-Segin-i.MX93. Audio codec
> TLV320AIC3007 is connected to SAI1 interface as a DAI master. MCLK is
> provided from the SAI's internal audio PLL (19.2 MHz).
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v2 14/15] arm64: dts: freescale: imx93-phyboard-segin: Add EQOS Ethernet
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (12 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 13/15] arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 4:33 ` [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically Primoz Fiser
14 siblings, 0 replies; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Add support for the carrier-board Micrel KSZ8081 Ethernet PHY. This is a
10/100Mbit PHY connected to the EQOS interface and shares MDIO bus with
the Ethernet PHY located on the SoM (FEC interface).
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- add Reviewed-by tag
.../dts/freescale/imx93-phyboard-segin.dts | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index 54e084e69706..c62cc06fad4b 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -89,6 +89,28 @@ dailink_master: simple-audio-card,codec {
};
};
+/* Ethernet */
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eqos>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy2>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
+ <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+ assigned-clock-rates = <100000000>, <50000000>;
+ status = "okay";
+};
+
+&mdio {
+ ethphy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id0022.1561";
+ reg = <2>;
+ clocks = <&clk IMX93_CLK_ENET_REF_PHY>;
+ clock-names = "rmii-ref";
+ micrel,led-mode = <1>;
+ };
+};
+
/* CAN */
&flexcan1 {
pinctrl-names = "default";
@@ -173,6 +195,19 @@ &usdhc2 {
};
&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX93_PAD_ENET1_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK 0x4000050e
+ MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
+ MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
+ MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x50e
+ MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x50e
+ MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
+ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x50e
+ MX93_PAD_ENET1_RXC__ENET_QOS_RX_ER 0x57e
+ >;
+ };
+
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically
2025-04-15 4:32 [PATCH v2 00/15] Update PHYTEC i.MX93 DTS Primoz Fiser
` (13 preceding siblings ...)
2025-04-15 4:33 ` [PATCH v2 14/15] arm64: dts: freescale: imx93-phyboard-segin: Add EQOS Ethernet Primoz Fiser
@ 2025-04-15 4:33 ` Primoz Fiser
2025-04-15 18:48 ` Frank Li
14 siblings, 1 reply; 27+ messages in thread
From: Primoz Fiser @ 2025-04-15 4:33 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, upstream
Move pinctrl_uart1 to keep nodes in alphabetical order. No functional
changes.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
---
Changes in v2:
- new patch in v2 (fixing node order)
.../boot/dts/freescale/imx93-phyboard-segin.dts | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
index c62cc06fad4b..0c55b749c834 100644
--- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
@@ -228,13 +228,6 @@ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
>;
};
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
- MX93_PAD_UART1_TXD__LPUART1_TX 0x30e
- >;
- };
-
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
@@ -257,6 +250,13 @@ MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00 0x1402
>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
+ MX93_PAD_UART1_TXD__LPUART1_TX 0x30e
+ >;
+ };
+
pinctrl_usdhc2_cd: usdhc2cdgrp {
fsl,pins = <
MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
--
2.34.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically
2025-04-15 4:33 ` [PATCH v2 15/15] arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically Primoz Fiser
@ 2025-04-15 18:48 ` Frank Li
0 siblings, 0 replies; 27+ messages in thread
From: Frank Li @ 2025-04-15 18:48 UTC (permalink / raw)
To: Primoz Fiser
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, upstream
On Tue, Apr 15, 2025 at 06:33:11AM +0200, Primoz Fiser wrote:
> Move pinctrl_uart1 to keep nodes in alphabetical order. No functional
> changes.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Changes in v2:
> - new patch in v2 (fixing node order)
>
> .../boot/dts/freescale/imx93-phyboard-segin.dts | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index c62cc06fad4b..0c55b749c834 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -228,13 +228,6 @@ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
> >;
> };
>
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> - MX93_PAD_UART1_TXD__LPUART1_TX 0x30e
> - >;
> - };
> -
> pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> fsl,pins = <
> MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
> @@ -257,6 +250,13 @@ MX93_PAD_SAI1_RXD0__SAI1_RX_DATA00 0x1402
> >;
> };
>
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> + MX93_PAD_UART1_TXD__LPUART1_TX 0x30e
> + >;
> + };
> +
> pinctrl_usdhc2_cd: usdhc2cdgrp {
> fsl,pins = <
> MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 27+ messages in thread