[PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[Sherry Sun]

Disable PCIe bus in the default dts to avoid the shared regulatory
between SDIO and PCIe buses, the random probe order between the two
buses may break the PCIe initialization sequence which cause PCIe
devices has probability of failing to detect.

Enable the SDIO WiFi in the default imx95-15x15-evk.dts, and add a
separate imx95-15x15-evk-pcie.dtso to enable PCIe bus.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 arch/arm64/boot/dts/freescale/Makefile            |  5 ++++-
 .../boot/dts/freescale/imx95-15x15-evk-pcie.dtso  | 15 +++++++++++++++
 arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  2 +-
 3 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index c4e790a268ae..505efc9ebd58 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -471,7 +471,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb
 
-imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo
+imx95-15x15-evk-pcie-dtbs = imx95-15x15-evk.dtb imx95-15x15-evk-pcie.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie.dtb
+
+imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk-pcie.dtb imx-pcie0-ep.dtbo
 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb
 imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo
 imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
new file mode 100644
index 000000000000..42384e6233f3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 NXP
+ */
+
+/dts-v1/;
+/plugin/;
+
+&pcie0 {
+	status = "okay";
+};
+
+&usdhc3 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index 7eb12e7d5014..afd89ce3cc5b 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -557,7 +557,7 @@ &pcie0 {
 	vpcie-supply = <&reg_m2_pwr>;
 	vpcie3v3aux-supply = <&reg_m2_pwr>;
 	supports-clkreq;
-	status = "okay";
+	status = "disabled";
 };
 
 &pcie0_ep {
-- 
2.37.1

Re: [PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[Daniel Baluta]

On 3/17/26 05:10, Sherry Sun wrote:
> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2026 NXP
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	status = "disabled";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> index 7eb12e7d5014..afd89ce3cc5b 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> @@ -557,7 +557,7 @@ &pcie0 {
>  	vpcie-supply = <&reg_m2_pwr>;
>  	vpcie3v3aux-supply = <&reg_m2_pwr>;
>  	supports-clkreq;
> -	status = "okay";
> +	status = "disabled";
>  };

Since this node it is not used here would it make more sense to move it directly into the overlay file?

Re: [PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[Frank Li]

On Tue, Mar 17, 2026 at 11:10:24AM +0800, Sherry Sun wrote:
> Disable PCIe bus in the default dts to avoid the shared regulatory
> between SDIO and PCIe buses, the random probe order between the two
> buses may break the PCIe initialization sequence which cause PCIe
> devices has probability of failing to detect.
>
> Enable the SDIO WiFi in the default imx95-15x15-evk.dts, and add a
> separate imx95-15x15-evk-pcie.dtso to enable PCIe bus.
>
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---

Why SDIO WIFI is default one? Generally, PCIe have better preformance.

Frank

>  arch/arm64/boot/dts/freescale/Makefile            |  5 ++++-
>  .../boot/dts/freescale/imx95-15x15-evk-pcie.dtso  | 15 +++++++++++++++
>  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  2 +-
>  3 files changed, 20 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index c4e790a268ae..505efc9ebd58 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -471,7 +471,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb
>
> -imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo
> +imx95-15x15-evk-pcie-dtbs = imx95-15x15-evk.dtb imx95-15x15-evk-pcie.dtbo
> +dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie.dtb
> +
> +imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk-pcie.dtb imx-pcie0-ep.dtbo
>  dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb
>  imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo
>  imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo
> diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> new file mode 100644
> index 000000000000..42384e6233f3
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2026 NXP
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	status = "disabled";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> index 7eb12e7d5014..afd89ce3cc5b 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> @@ -557,7 +557,7 @@ &pcie0 {
>  	vpcie-supply = <&reg_m2_pwr>;
>  	vpcie3v3aux-supply = <&reg_m2_pwr>;
>  	supports-clkreq;
> -	status = "okay";
> +	status = "disabled";
>  };
>
>  &pcie0_ep {
> --
> 2.37.1
>

RE: [PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[Sherry Sun]

> > // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2026 NXP
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +&pcie0 {
> > +	status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > +	status = "disabled";
> > +};
> > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > index 7eb12e7d5014..afd89ce3cc5b 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > @@ -557,7 +557,7 @@ &pcie0 {
> >  	vpcie-supply = <&reg_m2_pwr>;
> >  	vpcie3v3aux-supply = <&reg_m2_pwr>;
> >  	supports-clkreq;
> > -	status = "okay";
> > +	status = "disabled";
> >  };
> 
> Since this node it is not used here would it make more sense to move it
> directly into the overlay file?
> 

Hi Daniel,
For imx95-15x15-evk board, the M.2 connector is physically wired to both
USDHC3 and PCIe0, and only one of them can be used at a time. Because
the HW routing for PCIe0 does exist on the EVK, I think it is more appropriate
to keep the full PCIe node in the base imx8mp-evk.dts and use status = "disabled"
to reflect the default configuration (SDIO WiFi via USDHC3 on M.2). The overlay
file is only used to switch the board into “PCIe mode”. Keeping the HW
description in the base DTS avoids duplication and keeps a single source of
truth for the PCIe node.

Best Regards
Sherry

RE: [PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts

[Sherry Sun]

> Subject: Re: [PATCH] arm64: dts: imx95-15x15-evk: Disable PCIe bus in the
> default dts
> 
> On Tue, Mar 17, 2026 at 11:10:24AM +0800, Sherry Sun wrote:
> > Disable PCIe bus in the default dts to avoid the shared regulatory
> > between SDIO and PCIe buses, the random probe order between the two
> > buses may break the PCIe initialization sequence which cause PCIe
> > devices has probability of failing to detect.
> >
> > Enable the SDIO WiFi in the default imx95-15x15-evk.dts, and add a
> > separate imx95-15x15-evk-pcie.dtso to enable PCIe bus.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> 
> Why SDIO WIFI is default one? Generally, PCIe have better preformance.

Hi Frank,

The out-of-box M.2 WiFi module on imx95-15x15-evk board is SDIO IW612.
imx95-19x19-evk board use PCIe WiFi as the out-of-box M.2 WiFi module.

Best Regards
Sherry
> 
> Frank
> 
> >  arch/arm64/boot/dts/freescale/Makefile            |  5 ++++-
> >  .../boot/dts/freescale/imx95-15x15-evk-pcie.dtso  | 15
> > +++++++++++++++  arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |
> > 2 +-
> >  3 files changed, 20 insertions(+), 2 deletions(-)  create mode 100644
> > arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index c4e790a268ae..505efc9ebd58 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -471,7 +471,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-
> sof.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb
> >
> > -imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo
> > +imx95-15x15-evk-pcie-dtbs = imx95-15x15-evk.dtb
> > +imx95-15x15-evk-pcie.dtbo
> > +dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie.dtb
> > +
> > +imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk-pcie.dtb
> > +imx-pcie0-ep.dtbo
> >  dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb
> > imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo
> > imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo
> > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> > b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> > new file mode 100644
> > index 000000000000..42384e6233f3
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk-pcie.dtso
> > @@ -0,0 +1,15 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2026 NXP
> > + */
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +&pcie0 {
> > +	status = "okay";
> > +};
> > +
> > +&usdhc3 {
> > +	status = "disabled";
> > +};
> > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > index 7eb12e7d5014..afd89ce3cc5b 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
> > @@ -557,7 +557,7 @@ &pcie0 {
> >  	vpcie-supply = <&reg_m2_pwr>;
> >  	vpcie3v3aux-supply = <&reg_m2_pwr>;
> >  	supports-clkreq;
> > -	status = "okay";
> > +	status = "disabled";
> >  };
> >
> >  &pcie0_ep {
> > --
> > 2.37.1
> >