Linux kernel and device drivers for NXP i.MX platforms
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From: sashiko-bot@kernel.org
To: "Khristine Andreea Barbulescu" <khristineandreea.barbulescu@oss.nxp.com>
Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, robh@kernel.org,
	conor+dt@kernel.org, imx@lists.linux.dev
Subject: Re: [PATCH v12 5/6] pinctrl: s32cc: implement GPIO functionality
Date: Tue, 30 Jun 2026 13:22:27 +0000	[thread overview]
Message-ID: <20260630132227.6DFC11F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260630125403.546375-6-khristineandreea.barbulescu@oss.nxp.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The GPIO output data registers (PGPDO) are not saved or restored during system suspend/resume, which will cause active GPIO outputs to glitch or lose their state upon resume.
- [High] The pinctrl device is exposed to the system via `pinctrl_enable()` before the newly added GPIO initialization is complete, creating a race condition if probe fails.
--

commit bb28a701f031ec673e77d3ce510a41fe2c84ffb3
Author: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Subject: pinctrl: s32cc: implement GPIO functionality

The commit implements GPIO data access and direction handling using the
gpio-regmap library backed by a virtual regmap. It translates the
gpio-regmap register model to the underlying SIUL2 registers (MSCR,
PGPDI, PGPDO) and uses existing pinctrl GPIO callbacks for request/free
paths. Both legacy and extended DT layouts are supported.

Link: https://lore.kernel.org/linux-gpio/20260120115923.3463866-4-khristineandreea.barbulescu@oss.nxp.com/T/#m543c9edbdde74bdc68b6a2364e8b975356c33043
Link: https://lore.kernel.org/all/20260504131148.3622697-7-khristineandreea.barbulescu@oss.nxp.com/

> diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> index b9b757e28bff4..35e2f8a18ef23 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
> +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c

[ ... ]

> @@ -721,7 +1249,7 @@ int s32_pinctrl_suspend(struct device *dev)
>  
>  		ret = s32_regmap_read(ipctl->pctl, pin->number, &config);
>  		if (ret)
> -			return -EINVAL;
> +			return ret;
>  
>  		saved_context->pads[i] = config;
>  	}

[Severity: High]
Does this code miss saving the GPIO output data registers (PGPDO)?

Currently, only the MSCR pad configuration registers are saved. When the
system enters deep sleep and the SIUL2 hardware block loses context, the
GPIO output states would be lost.

[ ... ]

> @@ -745,7 +1273,7 @@ int s32_pinctrl_resume(struct device *dev)
>  			continue;
>  
>  		ret = s32_regmap_write(ipctl->pctl, pin->number,
> -					 saved_context->pads[i]);
> +				 saved_context->pads[i]);
>  		if (ret)
>  			return ret;
>  	}

[Severity: High]
Will restoring the pad configurations without restoring the PGPDO registers
cause active GPIO outputs to glitch?

Since restoring the MSCR registers enables the output buffer, but the PGPDO
registers were not restored, GPIOs configured as outputs might drive a logic
level of 0 upon resume regardless of their previous state. This could
potentially break external peripherals.

[ ... ]

> @@ -995,7 +1535,42 @@ int s32_pinctrl_probe(struct platform_device *pdev,
>  		return dev_err_probe(&pdev->dev, ret,
>  				     "Failed to enable pinctrl\n");

[Severity: High]
Could exposing the pinctrl device before completing GPIO initialization cause
a use-after-free race condition if probe fails?

pinctrl_enable() makes the pinctrl device globally visible in pinctrldev_list.
If a concurrent consumer acquires a reference to it, but a subsequent GPIO
initialization step fails:

> -	dev_info(&pdev->dev, "Initialized S32 pinctrl driver\n");
> +	/* Setup GPIO if GPIO ranges are defined */
> +	if (!soc_data->gpio_ranges || !soc_data->num_gpio_ranges)
> +		return 0;
> +
> +	ret = s32_gpio_get_ngpio(soc_data, &ngpio);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret, "Invalid GPIO ranges\n");

[ ... ]

> +	ipctl->gpio_rgm = devm_gpio_regmap_register(&pdev->dev, &gpio_cfg);
> +	if (IS_ERR(ipctl->gpio_rgm))
> +		return dev_err_probe(&pdev->dev,
> +				     PTR_ERR(ipctl->gpio_rgm),
> +				     "Unable to add gpio_regmap chip\n");

Could we be left with a dangling pointer when devres cleans up the unregistered
pinctrl device on the error return path?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260630125403.546375-1-khristineandreea.barbulescu@oss.nxp.com?part=5

  reply	other threads:[~2026-06-30 13:22 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-30 12:53 [PATCH v12 0/6] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-06-30 12:53 ` [PATCH v12 1/6] pinctrl: s32cc: add/fix some comments Khristine Andreea Barbulescu
2026-06-30 12:59   ` sashiko-bot
2026-06-30 15:24   ` Frank Li
2026-06-30 12:53 ` [PATCH v12 2/6] pinctrl: s32cc: remove inline specifiers Khristine Andreea Barbulescu
2026-06-30 15:22   ` Frank Li
2026-06-30 12:54 ` [PATCH v12 3/6] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-06-30 12:54 ` [PATCH v12 4/6] dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources Khristine Andreea Barbulescu
2026-07-01  7:47   ` Bartosz Golaszewski
2026-06-30 12:54 ` [PATCH v12 5/6] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-06-30 13:22   ` sashiko-bot [this message]
2026-07-01  7:50   ` Bartosz Golaszewski
2026-06-30 12:54 ` [PATCH v12 6/6] arm64: dts: s32g: describe GPIO and EIRQ resources in SIUL2 pinctrl node Khristine Andreea Barbulescu
2026-07-01  7:50   ` Bartosz Golaszewski
2026-07-01 10:28 ` [PATCH v12 0/6] gpio: siul2-s32g2: add initial GPIO driver Linus Walleij

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