Linux kernel and device drivers for NXP i.MX platforms
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* [PATCH v2] PCI: dwc: Add suspend_poweroff flag for platforms with RC power loss
@ 2026-07-17  7:41 hongxing.zhu
  2026-07-17  7:46 ` sashiko-bot
  0 siblings, 1 reply; 2+ messages in thread
From: hongxing.zhu @ 2026-07-17  7:41 UTC (permalink / raw)
  To: frank.li, l.stach, lpieralisi, kwilczynski, mani, robh, bhelgaas,
	s.hauer, kernel, festevam
  Cc: linux-pci, linux-arm-kernel, imx, linux-kernel, Richard Zhu

From: Richard Zhu <hongxing.zhu@nxp.com>

Some platforms like i.MX power off their PCIe RC controllers during
system suspend, requiring full re-initialization on resume. These
platforms need to enter L2 state to properly notify endpoints before
power loss.

According to PCIe base spec r7.0, sec 5.2, the system software should
transition the device into D3Hot before broadcasting the PME_Turn_Off
message to initiate L2 entry. However, some endpoint devices fail the
D3cold capability check in pci_host_common_d3cold_possible(), which
would normally prevent L2 entry.

For platforms where the RC loses power during suspend, L2 entry is
essential regardless of D3cold support, as the link will be lost anyway.
Add a suspend_poweroff flag to force L2 entry in such cases, and enable
it for i.MX PCIe controllers.

Note: This violates the spec requirement that devices be in D3Hot before
PME_Turn_Off, but is necessary for proper operation on platforms with RC
power loss during suspend.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
Changes in v2:
- Rename the new added flag.
- Update commit description and comments.

---
 drivers/pci/controller/dwc/pci-imx6.c             | 11 +++++++++++
 drivers/pci/controller/dwc/pcie-designware-host.c | 10 ++++++++--
 drivers/pci/controller/dwc/pcie-designware.h      |  8 ++++++++
 3 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 98e1db751132a..5a43bf396521b 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1957,6 +1957,17 @@ static int imx_pcie_probe(struct platform_device *pdev)
 		 */
 		imx_pcie_add_lut_by_rid(imx_pcie, 0);
 	} else {
+		/*
+		 * i.MX RC is powered off during suspend, requiring L2 entry
+		 * to notify endpoints before power loss. Some endpoints fail
+		 * the D3cold capability check, which would normally prevent
+		 * L2 entry. Force L2 entry anyway since the link will be lost
+		 * when RC powers off.
+		 *
+		 * Note: Per PCIe spec r7.0 sec 5.2, devices should be in D3Hot
+		 * before PME_Turn_Off. This may not be guaranteed here.
+		 */
+		pci->pp.suspend_poweroff = true;
 		if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_SKIP_L23_READY))
 			pci->pp.skip_l23_ready = true;
 		if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_KEEP_MSI_CAP))
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 06722259d2e37..95a31d65e1ca9 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -1222,14 +1222,20 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
 
 int dw_pcie_suspend_noirq(struct dw_pcie *pci)
 {
-	bool pme_capable = false;
+	bool d3cold, pme_capable = false;
 	int ret = 0;
 	u32 val;
 
 	if (!dw_pcie_link_up(pci))
 		goto stop_link;
 
-	if (!pci_host_common_d3cold_possible(pci->pp.bridge, &pme_capable))
+	d3cold = pci_host_common_d3cold_possible(pci->pp.bridge, &pme_capable);
+	/*
+	 * Enter L2 if D3cold is possible, or if the platform loses RC power
+	 * during suspend (in which case L2 entry is required to notify
+	 * endpoints before power loss, regardless of D3cold support).
+	 */
+	if (!d3cold && !pci->pp.suspend_poweroff)
 		return 0;
 
 	if (pci->pp.ops->pme_turn_off) {
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index de4b245b1758c..3ce7d30d9a4d5 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -471,6 +471,14 @@ struct dw_pcie_rp {
 	bool			native_ecam;
 	bool                    skip_l23_ready;
 	bool			skip_pwrctrl_off;
+	/*
+	 * suspend_poweroff: Force L2 entry during suspend even when D3cold
+	 * capability check fails. Used on platforms where RC loses power
+	 * during suspend and must notify endpoints via L2 entry before
+	 * power loss. May not meet PCIe spec requirement for devices to be
+	 * in D3Hot before PME_Turn_Off.
+	 */
+	bool                    suspend_poweroff;
 };
 
 struct dw_pcie_ep_ops {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v2] PCI: dwc: Add suspend_poweroff flag for platforms with RC power loss
  2026-07-17  7:41 [PATCH v2] PCI: dwc: Add suspend_poweroff flag for platforms with RC power loss hongxing.zhu
@ 2026-07-17  7:46 ` sashiko-bot
  0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-07-17  7:46 UTC (permalink / raw)
  To: hongxing.zhu; +Cc: linux-pci, Frank.Li, imx

> From: Richard Zhu <hongxing.zhu@nxp.com>
> 
> Some platforms like i.MX power off their PCIe RC controllers during
> system suspend, requiring full re-initialization on resume. These
> platforms need to enter L2 state to properly notify endpoints before
> power loss.
> 
> According to PCIe base spec r7.0, sec 5.2, the system software should
> transition the device into D3Hot before broadcasting the PME_Turn_Off
> message to initiate L2 entry. However, some endpoint devices fail the
> D3cold capability check in pci_host_common_d3cold_possible(), which
> would normally prevent L2 entry.
> 
> For platforms where the RC loses power during suspend, L2 entry is
> essential regardless of D3cold support, as the link will be lost anyway.
> Add a suspend_poweroff flag to force L2 entry in such cases, and enable
> it for i.MX PCIe controllers.
> 
> Note: This violates the spec requirement that devices be in D3Hot before
> PME_Turn_Off, but is necessary for proper operation on platforms with RC
> power loss during suspend.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260717074121.3214222-1-hongxing.zhu@oss.nxp.com?part=1


^ permalink raw reply	[flat|nested] 2+ messages in thread

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