From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Clark Wang <xiaoning.wang@nxp.com>,
Linux Team <linux-imx@nxp.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH 1/3] dt-bindings: net: mx93: add enet_clk_sel binding
Date: Mon, 22 Apr 2024 11:11:04 +0200 [thread overview]
Message-ID: <40856e22-e5e2-4030-8ddf-89c02efc9514@linaro.org> (raw)
In-Reply-To: <20240422-v6-9-topic-imx93-eqos-rmii-v1-1-30151fca43d2@pengutronix.de>
On 22/04/2024 10:46, Steffen Trumtrar wrote:
> When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set
> to output mode. To do this, the ENET_CLK_SEL register must be accessed.
> This register is located in a GPR register space.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
> Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
> index 4c01cae7c93a7..1d1c8b90da871 100644
> --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
> +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
> @@ -56,6 +56,16 @@ properties:
> - tx
> - mem
>
> + enet_clk_sel:
Except what Sasha wrote, also missing vendor prefix. That's not a
generic property.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to the GPR syscon
> + - description: the offset of the GPR register
> + description:
> + Should be phandle/offset pair. The phandle to the syscon node which
> + encompases the GPR register, and the offset of the GPR register.
That's redundant. Provide full description in the items. You can say
here what is the purpose of this phandle.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-04-22 9:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 8:46 [PATCH 0/3] arm64: mx93: etherrnet: set TX_CLK in RMII mode Steffen Trumtrar
2024-04-22 8:46 ` [PATCH 1/3] dt-bindings: net: mx93: add enet_clk_sel binding Steffen Trumtrar
2024-04-22 8:58 ` Sascha Hauer
2024-04-23 6:46 ` Steffen Trumtrar
2024-04-22 9:11 ` Krzysztof Kozlowski [this message]
2024-04-22 9:11 ` Krzysztof Kozlowski
2024-04-22 16:02 ` Andrew Lunn
2024-04-22 8:46 ` [PATCH 2/3] arm64: dts: imx93: add enet_clk_sel Steffen Trumtrar
2024-04-22 8:46 ` [PATCH 3/3] net: stmicro: imx: set TX_CLK direction in RMII mode Steffen Trumtrar
2024-04-22 8:51 ` Ahmad Fatoum
2024-04-22 9:04 ` Marc Kleine-Budde
2024-04-22 9:12 ` Krzysztof Kozlowski
2024-04-22 9:28 ` [PATCH 0/3] arm64: mx93: etherrnet: set TX_CLK " Sébastien Szymanski
2024-04-23 6:43 ` Steffen Trumtrar
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