From: Adrian Hunter <adrian.hunter@intel.com>
To: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Haibo Chen <haibo.chen@nxp.com>
Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
s32@nxp.com
Subject: Re: [PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list for 'sdhci-esdhc-imx' driver
Date: Wed, 10 Jul 2024 16:19:40 +0300 [thread overview]
Message-ID: <70473b16-4636-4121-a534-f5095cf51cd9@intel.com> (raw)
In-Reply-To: <20240708121018.246476-4-ciprianmarian.costea@oss.nxp.com>
On 8/07/24 15:10, Ciprian Costea wrote:
> Since NXP S32G2 and S32G3 SoCs share the SDHCI controller with
> I.MX platforms it would be valuable to add 's32@nxp.com' as a
> relevant mailing list in this area.
>
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a39c237edb95..26b1ec2ba094 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20098,6 +20098,7 @@ SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) NXP i.MX DRIVER
> M: Haibo Chen <haibo.chen@nxp.com>
> L: imx@lists.linux.dev
> L: linux-mmc@vger.kernel.org
> +L: s32@nxp.com
> S: Maintained
> F: drivers/mmc/host/sdhci-esdhc-imx.c
>
Assuming Haibo has no objections:
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
next prev parent reply other threads:[~2024-07-10 13:19 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-08 12:10 [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities Ciprian Costea
2024-07-08 12:10 ` [PATCH 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms Ciprian Costea
2024-07-10 12:34 ` Adrian Hunter
2024-07-11 14:25 ` Ciprian Marian Costea
2024-07-11 15:55 ` Ulf Hansson
2024-07-08 12:10 ` [PATCH 2/3] mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement Ciprian Costea
2024-07-10 12:33 ` Adrian Hunter
2024-07-10 12:50 ` Ciprian Marian Costea
2024-07-10 13:18 ` Adrian Hunter
2024-07-08 12:10 ` [PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list for 'sdhci-esdhc-imx' driver Ciprian Costea
2024-07-10 13:19 ` Adrian Hunter [this message]
2024-07-12 2:34 ` Bough Chen
2024-07-12 9:09 ` [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities Ulf Hansson
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