[PATCH v2 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[PATCH v2 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

Up untill now the extra function mux (pull resistor, etc) has been
defined as a raw hex value, this is difficult to interpret. Add
definitions for these parts of the pinctrl registers to allow for more
readable pinctrl definitions in devictree files.

It should also be done for the mn/mq but I currently do not have the
reference manuals for these to verify these fields, though I can only
assume that they would be the same.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Changes in v2:
- Changed mystery bit to SION
- Link to v1: https://lore.kernel.org/r/20250214-pinctrl_defines-v1-0-fbc86a42ef3c@gocontroll.com

---
Maud Spierings (2):
      arm64: dts: imx8mm: Add pinctrl config definitions
      arm64: dts: imx8mp: Add pinctrl config definitions

 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
 2 files changed, 54 insertions(+)
---
base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
change-id: 20250214-pinctrl_defines-237e7db61c6a

Best regards,
-- 
Maud Spierings <maudspierings@gocontroll.com>

[PATCH v2 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

From: Maud Spierings <maudspierings@gocontroll.com>

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
index b1f11098d248ed5fc8ac42daed808beebe3bf7bc..127fed81bafdd1baee57a02e5be2deb2462e01a2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h
@@ -6,6 +6,33 @@
 #ifndef __DTS_IMX8MM_PINFUNC_H
 #define __DTS_IMX8MM_PINFUNC_H
 
+//Drive Strength
+#define MX8MM_DSE_X1 0x0
+#define MX8MM_DSE_X2 0x4
+#define MX8MM_DSE_X4 0x2
+#define MX8MM_DSE_X6 0x6
+
+//Slew Rate
+#define MX8MM_FSEL_FAST 0x10
+#define MX8MM_FSEL_SLOW 0x0
+
+//Open Drain
+#define MX8MM_ODE_ENABLE 0x20
+#define MX8MM_ODE_DISABLE 0x0
+
+#define MX8MM_PULL_DOWN 0x0
+#define MX8MM_PULL_UP 0x40
+
+//Hysteresis
+#define MX8MM_HYS_CMOS 0x0
+#define MX8MM_HYS_SCHMITT 0x80
+
+#define MX8MM_PULL_ENABLE 0x100
+#define MX8MM_PULL_DISABLE 0x0
+
+//SION force input mode
+#define MX8MM_SION 0x40000000
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>

-- 
2.48.1

Re: [PATCH v2 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Krzysztof Kozlowski]

On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote:
> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
> register is written in the dts, these values are not obvious. Add defines
> which describe the fields of this register which can be or-ed together to
> produce readable settings.
> 
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>

Why are you adding defines which have no users? This is just dead code.

Best regards,
Krzysztof

Re: [PATCH v2 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Maud Spierings | GOcontroll]

From: Krzysztof Kozlowski <krzk@kernel.org>
Sent: Sunday, February 23, 2025 11:27 AM
 
>On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote:
>> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
>> register is written in the dts, these values are not obvious. Add defines
>> which describe the fields of this register which can be or-ed together to
>> produce readable settings.
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>> ---
>>  arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>

>Why are you adding defines which have no users? This is just dead code.

I will be sending more patches in the near future that will use these bindings, the total stack of patches is starting to grow though so I'm trying to spread it out in multiple easy to manage bits.
It is also a bit of a test if I can continue using these defines as I plan, or if that will not be accepted and I should instead revert to using raw hex values.

If this is a problem then I will keep it in the larger patchset that is to come.

Kind regards,
Maud

Re: [PATCH v2 1/2] arm64: dts: imx8mm: Add pinctrl config definitions

[Krzysztof Kozlowski]

On 24/02/2025 08:39, Maud Spierings | GOcontroll wrote:
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Sunday, February 23, 2025 11:27 AM
>  
>> On Tue, Feb 18, 2025 at 09:39:16AM +0100, Maud Spierings wrote:
>>> Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
>>> register is written in the dts, these values are not obvious. Add defines
>>> which describe the fields of this register which can be or-ed together to
>>> produce readable settings.
>>>
>>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>>> ---
>>>   arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
>>>   1 file changed, 27 insertions(+)
>>>
> 
>> Why are you adding defines which have no users? This is just dead code.
> 
> I will be sending more patches in the near future that will use these bindings, the total stack of patches is starting to grow though so I'm trying to spread it out in multiple easy to manage bits.
> It is also a bit of a test if I can continue using these defines as I plan, or if that will not be accepted and I should instead revert to using raw hex values.

Please wrap your replies.

> 
> If this is a problem then I will keep it in the larger patchset that is to come.

Defines without users is dead code. It's not even easy to validate if
they make any sense without seeing how they are used.

Best regards,
Krzysztof

[PATCH v2 2/2] arm64: dts: imx8mp: Add pinctrl config definitions

[Maud Spierings via B4 Relay]

From: Maud Spierings <maudspierings@gocontroll.com>

Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.

Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
index 0fef066471ba607be02d0ab15da5a048a8a213a7..0927ed11ec687d5b273c4a4a6455e8d81468f676 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
@@ -6,6 +6,33 @@
 #ifndef __DTS_IMX8MP_PINFUNC_H
 #define __DTS_IMX8MP_PINFUNC_H
 
+//Drive Strength
+#define MX8MP_DSE_X1 0x0
+#define MX8MP_DSE_X2 0x4
+#define MX8MP_DSE_X4 0x2
+#define MX8MP_DSE_X6 0x6
+
+//Slew Rate
+#define MX8MP_FSEL_FAST 0x10
+#define MX8MP_FSEL_SLOW 0x0
+
+//Open Drain
+#define MX8MP_ODE_ENABLE 0x20
+#define MX8MP_ODE_DISABLE 0x0
+
+#define MX8MP_PULL_DOWN 0x0
+#define MX8MP_PULL_UP 0x40
+
+//Hysteresis
+#define MX8MP_HYS_CMOS 0x0
+#define MX8MP_HYS_SCHMITT 0x80
+
+#define MX8MP_PULL_ENABLE 0x100
+#define MX8MP_PULL_DISABLE 0x0
+
+//SION force input mode
+#define MX8MP_SION 0x40000000
+
 /*
  * The pin function ID is a tuple of
  * <mux_reg conf_reg input_reg mux_mode input_val>

-- 
2.48.1

Re: [PATCH v2 0/2] arm64: dts: imx8m: Add pinctrl config definitions

[Maud Spierings | GOcontroll]

From: Maud Spierings via B4 Relay <devnull+maudspierings.gocontroll.com@kernel.org>
Sent: Tuesday, February 18, 2025 9:39 AM
 
>Up untill now the extra function mux (pull resistor, etc) has been
>defined as a raw hex value, this is difficult to interpret. Add
>definitions for these parts of the pinctrl registers to allow for more
>readable pinctrl definitions in devictree files.
>
>It should also be done for the mn/mq but I currently do not have the
>reference manuals for these to verify these fields, though I can only
>assume that they would be the same.
>
>Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>---
>Changes in v2:
>- Changed mystery bit to SION
>- Link to v1: https://lore.kernel.org/r/20250214-pinctrl_defines-v1-0-fbc86a42ef3c@gocontroll.com
>
>---
>Maud Spierings (2):
>      arm64: dts: imx8mm: Add pinctrl config definitions
>      arm64: dts: imx8mp: Add pinctrl config definitions
>
> arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 27 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 27 ++++++++++++++++++++++++++
> 2 files changed, 54 insertions(+)
>---
>base-commit: 0ae0fa3bf0b44c8611d114a9f69985bf451010c3
>change-id: 20250214-pinctrl_defines-237e7db61c6a
>
>Best regards,
>--
>Maud Spierings <maudspierings@gocontroll.com>

This series has partially been integrated in another patchset (the imx8mp
one). The other one aimed at the imx8mm will also be sent later with a
patchset that also adds users for it.

This patchset should therefore not be merged, thank you all for your
feedback so far.

Kind regards,
Maud