[PATCH] arm64: dts: imx95-19x19-frdm-pro: add boot phase properties

[PATCH] arm64: dts: imx95-19x19-frdm-pro: add boot phase properties

[Joseph Guo (OSS)]

From: Joseph Guo <qijian.guo@nxp.com>

Add boot phase properties to essential resources during boot phase.

FRDM-IMX95-PRO need UART, SD-Card, eMMC access during boot process.

Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
index 1f62d729a5e7778e570fe2a66d1b2cb70ec6feec..8dc1134f8d24d3ac4928b63ce21d328295cb2ba7 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
@@ -180,6 +180,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
 		regulator-min-microvolt = <3300000>;
 		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
+		bootph-pre-ram;
 	};
 
 	reg_usdhc3_vmmc: regulator-usdhc3 {
@@ -418,6 +419,7 @@ &lpuart1 {
 	/* console */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
+	bootph-pre-ram;
 	status = "okay";
 };
 
@@ -696,6 +698,7 @@ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
 		fsl,pins = <
 			IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7			0x31e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_sai5: sai5grp {
@@ -712,6 +715,7 @@ pinctrl_uart1: uart1grp {
 			IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX		0x31e
 			IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX		0x31e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_uart5: uart5grp {
@@ -737,6 +741,7 @@ IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x138e
 			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x138e
 			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x158e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
@@ -753,6 +758,7 @@ IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x138e
 			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x138e
 			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x158e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
@@ -769,12 +775,14 @@ IMX95_PAD_SD1_DATA6__USDHC1_DATA6			0x13fe
 			IMX95_PAD_SD1_DATA7__USDHC1_DATA7			0x13fe
 			IMX95_PAD_SD1_STROBE__USDHC1_STROBE			0x15fe
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
 		fsl,pins = <
 			IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0			0x31e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc2: usdhc2grp {
@@ -787,6 +795,7 @@ IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e
 			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e
 			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
@@ -799,6 +808,7 @@ IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e
 			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e
 			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
@@ -811,6 +821,7 @@ IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e
 			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e
 			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
 		>;
+		bootph-pre-ram;
 	};
 
 	pinctrl_usdhc3: usdhc3grp {
@@ -984,6 +995,7 @@ &usdhc1 {
 	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 	pinctrl-3 = <&pinctrl_usdhc1>;
 	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+	bootph-pre-ram;
 	status = "okay";
 };
 
@@ -996,6 +1008,7 @@ &usdhc2 {
 	pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
 	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 	vmmc-supply = <&reg_usdhc2_vmmc>;
+	bootph-pre-ram;
 	status = "okay";
 };
 

---
base-commit: 3d7783543c2646af69ad65825e810060494bea21
change-id: 20261012-bootph-frdm-imx95-pro-6edf0494358e

Best regards,
-- 
Joseph Guo <qijian.guo@nxp.com>

Re: [PATCH] arm64: dts: imx95-19x19-frdm-pro: add boot phase properties

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: Missing bootph-pre-ram for gpio3 breaks early SD card access
--

commit dc22078eb20524e315ef0d520678ff9336ed179e
Author: Joseph Guo <qijian.guo@nxp.com>

    arm64: dts: imx95-19x19-frdm-pro: add boot phase properties
    
    Add boot phase properties to essential resources during boot phase.
    
    FRDM-IMX95-PRO need UART, SD-Card, eMMC access during boot process.

> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
> index 1f62d729a5e77..8dc1134f8d24d 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts
> @@ -180,6 +180,7 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>  		regulator-min-microvolt = <3300000>;
>  		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
>  		enable-active-high;
> +		bootph-pre-ram;
>  	};

[Severity: Medium]
Will this regulator be available in the SPL phase without adding bootph-pre-ram
to the gpio3 node?

Since the fdtgrep tool extracts nodes tagged with bootph-pre-ram but does not
automatically trace and retain phandles for nodes lacking the tag, the
gpio3 controller node will be entirely stripped from the SPL device tree.

Could the gpio3 node also be marked with bootph-pre-ram so that
reg_usdhc2_vmmc can resolve its GPIO dependency?

[ ... ]

> @@ -996,6 +1008,7 @@ &usdhc2 {
>  	pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
>  	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
>  	vmmc-supply = <&reg_usdhc2_vmmc>;
> +	bootph-pre-ram;
>  	status = "okay";
>  };

[Severity: Medium]
Similarly to the regulator, usdhc2 relies on gpio3 for card detect during the
boot process (cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>).

If the gpio3 node is missing from the SPL device tree, will usdhc2 fail to
probe during early boot because it cannot resolve the cd-gpios property?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261012-bootph-frdm-imx95-pro-v1-1-6757c5f04a17@nxp.com?part=1