Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: John Harrison <john.c.harrison@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/dg2: wait for HuC load completion before running selftests
Date: Tue, 16 Apr 2024 12:03:57 -0700	[thread overview]
Message-ID: <00c4f36c-18cb-49f2-9e8e-72e38bc01c2d@intel.com> (raw)
In-Reply-To: <20240410201505.894594-1-daniele.ceraolospurio@intel.com>

On 4/10/2024 13:15, Daniele Ceraolo Spurio wrote:
> On DG2, submissions to VCS engines tied to a gem context are blocked
> until the HuC is loaded. Since some selftests do use a gem context,
> wait for the HuC load to complete before running the tests to avoid
> contamination.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10564
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> ---
>   .../gpu/drm/i915/selftests/i915_selftest.c    | 36 ++++++++++++++++---
>   1 file changed, 32 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> index ee79e0809a6d..fee76c1d2f45 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> @@ -154,6 +154,30 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
>   		pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");
>   }
>   
> +static void
> +__wait_gsc_huc_load_completed(struct drm_i915_private *i915)
> +{
> +	/* this only applies to DG2, so we only care about GT0 */
> +	struct intel_huc *huc = &to_gt(i915)->uc.huc;
> +	bool need_to_wait = (IS_ENABLED(CONFIG_INTEL_MEI_PXP) &&
> +			     intel_huc_wait_required(huc));
> +	/*
> +	 * The GSC and PXP mei bringup depends on the kernel boot ordering, so
> +	 * to account for the worst case scenario the HuC code waits for up to
> +	 * 10s for the GSC driver to load and then another 5s for the PXP
> +	 * component to bind before giving up, even though those steps normally
> +	 * complete in less than a second from the i915 load. We match that
> +	 * timeout here, but we expect to bail early due to the fence being
> +	 * signalled even in a failure case, as it is extremely unlikely that
> +	 * both components will use their full timeout.
> +	 */
> +	unsigned long timeout_ms = 15000;
> +
> +	if (need_to_wait &&
> +	    wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))
> +		pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");
> +}
> +
>   static int __run_selftests(const char *name,
>   			   struct selftest *st,
>   			   unsigned int count,
> @@ -228,14 +252,16 @@ int i915_mock_selftests(void)
>   
>   int i915_live_selftests(struct pci_dev *pdev)
>   {
> +	struct drm_i915_private *i915 = pdev_to_i915(pdev);
>   	int err;
>   
>   	if (!i915_selftest.live)
>   		return 0;
>   
> -	__wait_gsc_proxy_completed(pdev_to_i915(pdev));
> +	__wait_gsc_proxy_completed(i915);
> +	__wait_gsc_huc_load_completed(i915);
>   
> -	err = run_selftests(live, pdev_to_i915(pdev));
> +	err = run_selftests(live, i915);
>   	if (err) {
>   		i915_selftest.live = err;
>   		return err;
> @@ -251,14 +277,16 @@ int i915_live_selftests(struct pci_dev *pdev)
>   
>   int i915_perf_selftests(struct pci_dev *pdev)
>   {
> +	struct drm_i915_private *i915 = pdev_to_i915(pdev);
>   	int err;
>   
>   	if (!i915_selftest.perf)
>   		return 0;
>   
> -	__wait_gsc_proxy_completed(pdev_to_i915(pdev));
> +	__wait_gsc_proxy_completed(i915);
> +	__wait_gsc_huc_load_completed(i915);
>   
> -	err = run_selftests(perf, pdev_to_i915(pdev));
> +	err = run_selftests(perf, i915);
>   	if (err) {
>   		i915_selftest.perf = err;
>   		return err;


  parent reply	other threads:[~2024-04-16 19:04 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-10 20:15 [PATCH] drm/i915/dg2: wait for HuC load completion before running selftests Daniele Ceraolo Spurio
2024-04-10 22:28 ` ✗ Fi.CI.BAT: failure for " Patchwork
2024-04-16 19:03 ` John Harrison [this message]
2024-04-17 21:33 ` ✓ Fi.CI.BAT: success for drm/i915/dg2: wait for HuC load completion before running selftests (rev2) Patchwork
2024-04-19  0:00 ` ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=00c4f36c-18cb-49f2-9e8e-72e38bc01c2d@intel.com \
    --to=john.c.harrison@intel.com \
    --cc=daniele.ceraolospurio@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox