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From: "Kahola, Mika" <mika.kahola@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Index min_{cdclk, voltage_level}[] with pipe
Date: Fri, 5 Feb 2021 13:49:38 +0000	[thread overview]
Message-ID: <00e09f6889b44f2c85b17d798e4cfc28@intel.com> (raw)
In-Reply-To: <20210204020846.2094-1-ville.syrjala@linux.intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, February 4, 2021 4:09 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Index min_{cdclk, voltage_level}[]
> with pipe
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> min_cdclk[] and min_voltage_level[] are supposed to be indexed with the
> pipe. Fix up a few cases where we index via the crtc index (via the atomic
> iterators) instead.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index bf83e9e75227..a9019287f7d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2145,10 +2145,10 @@ static int intel_compute_min_cdclk(struct
> intel_cdclk_state *cdclk_state)
>  		if (IS_ERR(bw_state))
>  			return PTR_ERR(bw_state);
> 
> -		if (cdclk_state->min_cdclk[i] == min_cdclk)
> +		if (cdclk_state->min_cdclk[crtc->pipe] == min_cdclk)
>  			continue;
> 
> -		cdclk_state->min_cdclk[i] = min_cdclk;
> +		cdclk_state->min_cdclk[crtc->pipe] = min_cdclk;
> 
>  		ret = intel_atomic_lock_global_state(&cdclk_state->base);
>  		if (ret)
> @@ -2199,10 +2199,10 @@ static int bxt_compute_min_voltage_level(struct
> intel_cdclk_state *cdclk_state)
>  		else
>  			min_voltage_level = 0;
> 
> -		if (cdclk_state->min_voltage_level[i] == min_voltage_level)
> +		if (cdclk_state->min_voltage_level[crtc->pipe] ==
> min_voltage_level)
>  			continue;
> 
> -		cdclk_state->min_voltage_level[i] = min_voltage_level;
> +		cdclk_state->min_voltage_level[crtc->pipe] =
> min_voltage_level;
> 
>  		ret = intel_atomic_lock_global_state(&cdclk_state->base);
>  		if (ret)
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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      parent reply	other threads:[~2021-02-05 13:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-04  2:08 [Intel-gfx] [PATCH 1/2] drm/i915: Index min_{cdclk, voltage_level}[] with pipe Ville Syrjala
2021-02-04  2:08 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use intel_hdmi_port_clock() more Ville Syrjala
2021-02-05 13:50   ` Kahola, Mika
2021-02-04  4:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Index min_{cdclk, voltage_level}[] with pipe Patchwork
2021-02-04  7:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-02-05 13:49 ` Kahola, Mika [this message]

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