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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Thomas Hellström (Intel)" <thomas_os@shipmail.org>,
	intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, Julia Lawall <julia.lawall@lip6.fr>
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Add ww context to intel_dpt_pin, v2.
Date: Thu, 30 Sep 2021 12:45:35 +0200	[thread overview]
Message-ID: <02d85667-3ba3-cc95-dc2f-81608b952a84@linux.intel.com> (raw)
In-Reply-To: <07332ad2-5a4d-90bc-47b0-069d292ccdad@shipmail.org>

Op 29-09-2021 om 16:50 schreef Thomas Hellström (Intel):
>
> On 9/29/21 10:59, Maarten Lankhorst wrote:
>> Ensure i915_vma_pin_iomap and vma_unpin are done with dpt->obj lock held.
>>
>> I don't think there's much of a point in merging intel_dpt_pin() with
>> intel_pin_fb_obj_dpt(), they touch different objects.
>>
>> Changes since v1:
>> - Fix using the wrong pointer to retrieve error code (Julia)
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Reported-by: Julia Lawall <julia.lawall@lip6.fr>
>
> LGTM.
>
> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dpt.c | 40 +++++++++++++++---------
>>   1 file changed, 25 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
>> index de62bd77b15e..8f7b1f7534a4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dpt.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dpt.c
>> @@ -121,32 +121,42 @@ struct i915_vma *intel_dpt_pin(struct i915_address_space *vm)
>>       intel_wakeref_t wakeref;
>>       struct i915_vma *vma;
>>       void __iomem *iomem;
>> +    struct i915_gem_ww_ctx ww;
>> +    int err;
>>         wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>>       atomic_inc(&i915->gpu_error.pending_fb_pin);
>>   -    vma = i915_gem_object_ggtt_pin(dpt->obj, NULL, 0, 4096,
>> -                       HAS_LMEM(i915) ? 0 : PIN_MAPPABLE);
>> -    if (IS_ERR(vma))
>> -        goto err;
>> +    for_i915_gem_ww(&ww, err, true) {
>> +        err = i915_gem_object_lock(dpt->obj, &ww);
>> +        if (err)
>> +            continue;
>>   -    iomem = i915_vma_pin_iomap(vma);
>> -    i915_vma_unpin(vma);
>> -    if (IS_ERR(iomem)) {
>> -        vma = ERR_CAST(iomem);
>> -        goto err;
>> -    }
>> +        vma = i915_gem_object_ggtt_pin_ww(dpt->obj, &ww, NULL, 0, 4096,
>> +                          HAS_LMEM(i915) ? 0 : PIN_MAPPABLE);
>> +        if (IS_ERR(vma)) {
>> +            err = PTR_ERR(vma);
>> +            continue;
>> +        }
>> +
>> +        iomem = i915_vma_pin_iomap(vma);
>> +        i915_vma_unpin(vma);
>>   -    dpt->vma = vma;
>> -    dpt->iomem = iomem;
>> +        if (IS_ERR(iomem)) {
>> +            err = PTR_ERR(iomem);
>> +            continue;
>> +        }
>>   -    i915_vma_get(vma);
>> +        dpt->vma = vma;
>> +        dpt->iomem = iomem;
>> +
>> +        i915_vma_get(vma);
>> +    }
>>   -err:
>>       atomic_dec(&i915->gpu_error.pending_fb_pin);
>>       intel_runtime_pm_put(&i915->runtime_pm, wakeref);
>>   -    return vma;
>> +    return err ? ERR_PTR(err) : vma;
>>   }
>>     void intel_dpt_unpin(struct i915_address_space *vm)

Thanks, pushed


      reply	other threads:[~2021-09-30 10:45 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-29  8:59 [Intel-gfx] [PATCH] drm/i915: Add ww context to intel_dpt_pin, v2 Maarten Lankhorst
2021-09-29 11:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-09-29 14:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-29 14:50 ` [Intel-gfx] [PATCH] " Thomas Hellström (Intel)
2021-09-30 10:45   ` Maarten Lankhorst [this message]

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