From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Declare .(de)gamma_lut_tests for icl+
Date: Thu, 18 Nov 2021 19:37:12 +0000 [thread overview]
Message-ID: <04c2fb304474435981b3ca0b8169ca93@intel.com> (raw)
In-Reply-To: <20211014181856.17581-1-ville.syrjala@linux.intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Thursday, October 14, 2021 11:49 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Declare .(de)gamma_lut_tests for icl+
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> All interpolated gamma modes including the icl+ multi segment mode require non-
> decreasing entries for the interpolation to work correctly. For some reason we're
> forgetting to declare that for icl+. Let us do so.
Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/3916
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_pci.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index
> 169837de395d..7655c7a4f904 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -145,6 +145,12 @@
> .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
> DRM_COLOR_LUT_EQUAL_CHANNELS, \
> }
> +#define ICL_COLORS \
> + .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145, \
> + .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
> + DRM_COLOR_LUT_EQUAL_CHANNELS, \
> + .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
> + }
>
> /* Keep in gen based order, and chronological order within a gen */
>
> @@ -811,7 +817,7 @@ static const struct intel_device_info cml_gt2_info = {
> [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
> }, \
> GEN(11), \
> - .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }, \
> + ICL_COLORS, \
> .dbuf.size = 2048, \
> .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
> .display.has_dsc = 1, \
> --
> 2.32.0
prev parent reply other threads:[~2021-11-18 19:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-14 18:18 [Intel-gfx] [PATCH 1/2] drm/i915: Declare .(de)gamma_lut_tests for icl+ Ville Syrjala
2021-10-14 18:18 ` [Intel-gfx] [PATCH 2/2] drm/i915: Disable DSB usage for now Ville Syrjala
2021-11-18 19:40 ` Shankar, Uma
2021-10-15 0:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Declare .(de)gamma_lut_tests for icl+ Patchwork
2021-10-17 23:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Declare .(de)gamma_lut_tests for icl+ (rev2) Patchwork
2021-10-18 0:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-11-18 19:37 ` Shankar, Uma [this message]
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