From: Nirmoy Das <nirmoy.das@intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
<intel-gfx@lists.freedesktop.org>
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
matthew.d.roper@intel.com, saurabhg.gupta@intel.com,
chris.p.wilson@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH v11 1/7] drm/i915: Add GuC TLB Invalidation device info flags
Date: Wed, 11 Oct 2023 11:00:03 +0200 [thread overview]
Message-ID: <08cc314d-5c2a-371b-e586-b69036c7d64b@intel.com> (raw)
In-Reply-To: <20231011000248.2181018-2-jonathan.cavitt@intel.com>
On 10/11/2023 2:02 AM, Jonathan Cavitt wrote:
> Add device info flags for if GuC TLB Invalidation is enabled.
>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cb60fc9cf8737..6a2a78c61f212 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -794,6 +794,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define HAS_GUC_DEPRIVILEGE(i915) \
> (INTEL_INFO(i915)->has_guc_deprivilege)
>
> +#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation)
> +
> #define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline)
>
> #define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 39817490b13fd..eba2f0b919c87 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -153,6 +153,7 @@ enum intel_ppgtt_type {
> func(has_heci_pxp); \
> func(has_heci_gscfi); \
> func(has_guc_deprivilege); \
> + func(has_guc_tlb_invalidation); \
> func(has_l3_ccs_read); \
> func(has_l3_dpf); \
> func(has_llc); \
next prev parent reply other threads:[~2023-10-11 9:00 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 0:02 [Intel-gfx] [PATCH v11 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 1/7] drm/i915: Add GuC TLB Invalidation device info flags Jonathan Cavitt
2023-10-11 9:00 ` Nirmoy Das [this message]
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 2/7] drm/i915/guc: Add CT size delay helper Jonathan Cavitt
2023-10-11 9:00 ` Nirmoy Das
2023-10-11 17:44 ` John Harrison
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-11 9:01 ` Nirmoy Das
2023-10-11 17:52 ` John Harrison
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 4/7] drm/i915: No TLB invalidation on suspended GT Jonathan Cavitt
2023-10-11 11:09 ` Nirmoy Das
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 5/7] drm/i915: No TLB invalidation on wedged GT Jonathan Cavitt
2023-10-11 9:03 ` Nirmoy Das
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck Jonathan Cavitt
2023-10-11 9:04 ` Nirmoy Das
2023-10-11 0:02 ` [Intel-gfx] [PATCH v11 7/7] drm/i915: Enable GuC TLB invalidations for MTL Jonathan Cavitt
2023-10-11 9:05 ` Nirmoy Das
2023-10-11 4:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-10-11 4:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-11 4:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-11 8:24 ` [Intel-gfx] [PATCH v11 0/7] " Tvrtko Ursulin
2023-10-11 18:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
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