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From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume
Date: Mon, 26 Feb 2018 12:28:49 +0530	[thread overview]
Message-ID: <0e15762d-4ad3-2065-3e28-bebb7cd9d9d4@intel.com> (raw)
In-Reply-To: <20180223141002.10364-1-michal.wajdeczko@intel.com>



On 2/23/2018 7:40 PM, Michal Wajdeczko wrote:
> We want to use higher level 'uc' functions as the main entry points to
> the GuC/HuC code to hide some details and keep code layered.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>

Couple of queries:
Need to add to commit message that ordering of disable_guc_interrupts 
and suspend is now changed as needed
for CTB. right?
Please find below another query.
> ---
<snip>
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -445,3 +445,48 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
>   	if (USES_GUC_SUBMISSION(dev_priv))
>   		gen9_disable_guc_interrupts(dev_priv);
>   }
> +
> +int intel_uc_suspend(struct drm_i915_private *i915)
> +{
> +	struct intel_guc *guc = &i915->guc;
> +	int err;
> +
> +	if (!USES_GUC(i915))
> +		return 0;
> +
> +	if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
Assume this will get replaced by intel_uc_fw_is_loaded from other patch 
under review?
> +		return 0;
> +
> +	err = intel_guc_suspend(guc);
> +	if (err) {
> +		DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
> +		return err;
> +	}
> +
> +	gen9_disable_guc_interrupts(i915);
> +
> +	return 0;
> +}
> +
> +int intel_uc_resume(struct drm_i915_private *i915)
> +{
> +	struct intel_guc *guc = &i915->guc;
> +	int err;
> +
> +	if (!USES_GUC(i915))
> +		return 0;
> +
> +	if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> +		return 0;
> +
> +	if (i915_modparams.guc_log_level)
> +		gen9_enable_guc_interrupts(i915);
> +
> +	err = intel_guc_resume(guc);
> +	if (err) {
> +		DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
> +		return err;
> +	}
> +
> +	return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
> index f2984e0..f76d51d 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -39,6 +39,8 @@
>   void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
>   int intel_uc_init(struct drm_i915_private *dev_priv);
>   void intel_uc_fini(struct drm_i915_private *dev_priv);
> +int intel_uc_suspend(struct drm_i915_private *dev_priv);
> +int intel_uc_resume(struct drm_i915_private *dev_priv);
>   
>   static inline bool intel_uc_is_using_guc(void)
>   {

-- 
Thanks,
Sagar

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  parent reply	other threads:[~2018-02-26  6:58 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-23 14:10 [PATCH 1/2] drm/i915/uc: Introduce intel_uc_suspend|resume Michal Wajdeczko
2018-02-23 14:10 ` [PATCH 2/2] HAX: Enable GuC for CI Michal Wajdeczko
2018-02-23 14:59 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/uc: Introduce intel_uc_suspend|resume Patchwork
2018-02-23 16:11 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-02-26  6:58 ` Sagar Arun Kamble [this message]
2018-02-26 12:33   ` [PATCH 1/2] " Michal Wajdeczko

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