Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsc/mtl: Enable alternate ICH method

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 8/17/2022 6:15 PM, Jani Nikula wrote:
> From: Vandita Kulkarni <vandita.kulkarni@intel.com>
>
> DSC 1.2 is supported from MTL, hence program ICH accordingly.
>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_vdsc.c | 2 ++
>   drivers/gpu/drm/i915/i915_reg.h           | 1 +
>   2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 43e1bbc1e303..ac4ba7ac85c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -597,6 +597,8 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>   		DSC_VER_MIN_SHIFT |
>   		vdsc_cfg->bits_per_component << DSC_BPC_SHIFT |
>   		vdsc_cfg->line_buf_depth << DSC_LINE_BUF_DEPTH_SHIFT;
> +	if (vdsc_cfg->dsc_version_minor == 2)
> +		pps_val |= DSC_ALT_ICH_SEL;
>   	if (vdsc_cfg->block_pred_enable)
>   		pps_val |= DSC_BLOCK_PREDICTION;
>   	if (vdsc_cfg->convert_rgb)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 50d7bfd541ad..2e3aa684cf1b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8003,6 +8003,7 @@ enum skl_power_gate {
>   #define ICL_DSC1_PICTURE_PARAMETER_SET_0(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
>   							   _ICL_DSC1_PICTURE_PARAMETER_SET_0_PB, \
>   							   _ICL_DSC1_PICTURE_PARAMETER_SET_0_PC)
> +#define  DSC_ALT_ICH_SEL		(1 << 20)
>   #define  DSC_VBR_ENABLE			(1 << 19)
>   #define  DSC_422_ENABLE			(1 << 18)
>   #define  DSC_COLOR_SPACE_CONVERSION	(1 << 17)