From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [PATCH 07/15] drm/i915/display: move cdclk funcs under cdclk sub-struct
Date: Wed, 29 Apr 2026 13:24:47 +0300 [thread overview]
Message-ID: <12a77d3e93e1bcf2a87c548bb9f3d85a0612788c.1777458161.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1777458161.git.jani.nikula@intel.com>
Move cdclk related functions under cdclk sub-struct of struct
intel_display.
The funcs sub-struct of struct intel_display seems unnecessary. Instead
of display->funcs.FEATURE, prefer display->FEATURE.funcs.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 84 +++++++++----------
.../gpu/drm/i915/display/intel_display_core.h | 6 +-
2 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 57d714c81fc4..a1bf01021d65 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -170,27 +170,27 @@ struct intel_cdclk_funcs {
void intel_cdclk_get_cdclk(struct intel_display *display,
struct intel_cdclk_config *cdclk_config)
{
- display->funcs.cdclk->get_cdclk(display, cdclk_config);
+ display->cdclk.funcs->get_cdclk(display, cdclk_config);
}
static void intel_cdclk_set_cdclk(struct intel_display *display,
const struct intel_cdclk_config *cdclk_config,
enum pipe pipe)
{
- display->funcs.cdclk->set_cdclk(display, cdclk_config, pipe);
+ display->cdclk.funcs->set_cdclk(display, cdclk_config, pipe);
}
static int intel_cdclk_modeset_calc_cdclk(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- return display->funcs.cdclk->modeset_calc_cdclk(state);
+ return display->cdclk.funcs->modeset_calc_cdclk(state);
}
static u8 intel_cdclk_calc_voltage_level(struct intel_display *display,
int cdclk)
{
- return display->funcs.cdclk->calc_voltage_level(cdclk);
+ return display->cdclk.funcs->calc_voltage_level(cdclk);
}
static void fixed_133mhz_get_cdclk(struct intel_display *display,
@@ -2619,7 +2619,7 @@ static void intel_set_cdclk(struct intel_display *display,
if (!intel_cdclk_changed(&display->cdclk.hw, cdclk_config))
return;
- if (drm_WARN_ON_ONCE(display->drm, !display->funcs.cdclk->set_cdclk))
+ if (drm_WARN_ON_ONCE(display->drm, !display->cdclk.funcs->set_cdclk))
return;
intel_cdclk_dump_config(display, cdclk_config, context);
@@ -4042,100 +4042,100 @@ static const struct intel_cdclk_funcs i830_cdclk_funcs = {
void intel_init_cdclk_hooks(struct intel_display *display)
{
if (DISPLAY_VER(display) >= 35) {
- display->funcs.cdclk = &xe3lpd_cdclk_funcs;
+ display->cdclk.funcs = &xe3lpd_cdclk_funcs;
display->cdclk.table = xe3p_lpd_cdclk_table;
} else if (DISPLAY_VER(display) >= 30) {
- display->funcs.cdclk = &xe3lpd_cdclk_funcs;
+ display->cdclk.funcs = &xe3lpd_cdclk_funcs;
display->cdclk.table = xe3lpd_cdclk_table;
} else if (DISPLAY_VER(display) >= 20) {
- display->funcs.cdclk = &rplu_cdclk_funcs;
+ display->cdclk.funcs = &rplu_cdclk_funcs;
display->cdclk.table = xe2lpd_cdclk_table;
} else if (DISPLAY_VERx100(display) >= 1401) {
- display->funcs.cdclk = &rplu_cdclk_funcs;
+ display->cdclk.funcs = &rplu_cdclk_funcs;
display->cdclk.table = xe2hpd_cdclk_table;
} else if (DISPLAY_VER(display) >= 14) {
- display->funcs.cdclk = &rplu_cdclk_funcs;
+ display->cdclk.funcs = &rplu_cdclk_funcs;
display->cdclk.table = mtl_cdclk_table;
} else if (display->platform.dg2) {
- display->funcs.cdclk = &tgl_cdclk_funcs;
+ display->cdclk.funcs = &tgl_cdclk_funcs;
display->cdclk.table = dg2_cdclk_table;
} else if (display->platform.alderlake_p) {
/* Wa_22011320316:adl-p[a0] */
if (intel_display_wa(display, INTEL_DISPLAY_WA_22011320316)) {
display->cdclk.table = adlp_a_step_cdclk_table;
- display->funcs.cdclk = &tgl_cdclk_funcs;
+ display->cdclk.funcs = &tgl_cdclk_funcs;
} else if (display->platform.alderlake_p_raptorlake_u) {
display->cdclk.table = rplu_cdclk_table;
- display->funcs.cdclk = &rplu_cdclk_funcs;
+ display->cdclk.funcs = &rplu_cdclk_funcs;
} else {
display->cdclk.table = adlp_cdclk_table;
- display->funcs.cdclk = &tgl_cdclk_funcs;
+ display->cdclk.funcs = &tgl_cdclk_funcs;
}
} else if (display->platform.rocketlake) {
- display->funcs.cdclk = &tgl_cdclk_funcs;
+ display->cdclk.funcs = &tgl_cdclk_funcs;
display->cdclk.table = rkl_cdclk_table;
} else if (DISPLAY_VER(display) >= 12) {
- display->funcs.cdclk = &tgl_cdclk_funcs;
+ display->cdclk.funcs = &tgl_cdclk_funcs;
display->cdclk.table = icl_cdclk_table;
} else if (display->platform.jasperlake || display->platform.elkhartlake) {
- display->funcs.cdclk = &ehl_cdclk_funcs;
+ display->cdclk.funcs = &ehl_cdclk_funcs;
display->cdclk.table = icl_cdclk_table;
} else if (DISPLAY_VER(display) >= 11) {
- display->funcs.cdclk = &icl_cdclk_funcs;
+ display->cdclk.funcs = &icl_cdclk_funcs;
display->cdclk.table = icl_cdclk_table;
} else if (display->platform.geminilake || display->platform.broxton) {
- display->funcs.cdclk = &bxt_cdclk_funcs;
+ display->cdclk.funcs = &bxt_cdclk_funcs;
if (display->platform.geminilake)
display->cdclk.table = glk_cdclk_table;
else
display->cdclk.table = bxt_cdclk_table;
} else if (DISPLAY_VER(display) == 9) {
- display->funcs.cdclk = &skl_cdclk_funcs;
+ display->cdclk.funcs = &skl_cdclk_funcs;
} else if (display->platform.broadwell) {
- display->funcs.cdclk = &bdw_cdclk_funcs;
+ display->cdclk.funcs = &bdw_cdclk_funcs;
} else if (display->platform.haswell) {
- display->funcs.cdclk = &hsw_cdclk_funcs;
+ display->cdclk.funcs = &hsw_cdclk_funcs;
} else if (display->platform.cherryview) {
- display->funcs.cdclk = &chv_cdclk_funcs;
+ display->cdclk.funcs = &chv_cdclk_funcs;
} else if (display->platform.valleyview) {
- display->funcs.cdclk = &vlv_cdclk_funcs;
+ display->cdclk.funcs = &vlv_cdclk_funcs;
} else if (display->platform.sandybridge || display->platform.ivybridge) {
- display->funcs.cdclk = &fixed_400mhz_cdclk_funcs;
+ display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;
} else if (display->platform.ironlake) {
- display->funcs.cdclk = &ilk_cdclk_funcs;
+ display->cdclk.funcs = &ilk_cdclk_funcs;
} else if (display->platform.gm45) {
- display->funcs.cdclk = &gm45_cdclk_funcs;
+ display->cdclk.funcs = &gm45_cdclk_funcs;
} else if (display->platform.g45) {
- display->funcs.cdclk = &g33_cdclk_funcs;
+ display->cdclk.funcs = &g33_cdclk_funcs;
} else if (display->platform.i965gm) {
- display->funcs.cdclk = &i965gm_cdclk_funcs;
+ display->cdclk.funcs = &i965gm_cdclk_funcs;
} else if (display->platform.i965g) {
- display->funcs.cdclk = &fixed_400mhz_cdclk_funcs;
+ display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;
} else if (display->platform.pineview) {
- display->funcs.cdclk = &pnv_cdclk_funcs;
+ display->cdclk.funcs = &pnv_cdclk_funcs;
} else if (display->platform.g33) {
- display->funcs.cdclk = &g33_cdclk_funcs;
+ display->cdclk.funcs = &g33_cdclk_funcs;
} else if (display->platform.i945gm) {
- display->funcs.cdclk = &i945gm_cdclk_funcs;
+ display->cdclk.funcs = &i945gm_cdclk_funcs;
} else if (display->platform.i945g) {
- display->funcs.cdclk = &fixed_400mhz_cdclk_funcs;
+ display->cdclk.funcs = &fixed_400mhz_cdclk_funcs;
} else if (display->platform.i915gm) {
- display->funcs.cdclk = &i915gm_cdclk_funcs;
+ display->cdclk.funcs = &i915gm_cdclk_funcs;
} else if (display->platform.i915g) {
- display->funcs.cdclk = &i915g_cdclk_funcs;
+ display->cdclk.funcs = &i915g_cdclk_funcs;
} else if (display->platform.i865g) {
- display->funcs.cdclk = &i865g_cdclk_funcs;
+ display->cdclk.funcs = &i865g_cdclk_funcs;
} else if (display->platform.i85x) {
- display->funcs.cdclk = &i85x_cdclk_funcs;
+ display->cdclk.funcs = &i85x_cdclk_funcs;
} else if (display->platform.i845g) {
- display->funcs.cdclk = &i845g_cdclk_funcs;
+ display->cdclk.funcs = &i845g_cdclk_funcs;
} else if (display->platform.i830) {
- display->funcs.cdclk = &i830_cdclk_funcs;
+ display->cdclk.funcs = &i830_cdclk_funcs;
}
- if (drm_WARN(display->drm, !display->funcs.cdclk,
+ if (drm_WARN(display->drm, !display->cdclk.funcs,
"Unknown platform. Assuming i830\n"))
- display->funcs.cdclk = &i830_cdclk_funcs;
+ display->cdclk.funcs = &i830_cdclk_funcs;
}
int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 5a1aee340728..a319fb97dafa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -313,9 +313,6 @@ struct intel_display {
struct {
/* Top level crtc-ish functions */
const struct intel_display_funcs *display;
-
- /* Display CDCLK functions */
- const struct intel_cdclk_funcs *cdclk;
} funcs;
struct {
@@ -345,6 +342,9 @@ struct intel_display {
} bw;
struct {
+ /* Internal CDCLK functions */
+ const struct intel_cdclk_funcs *funcs;
+
/* The current hardware cdclk configuration */
struct intel_cdclk_config hw;
--
2.47.3
next prev parent reply other threads:[~2026-04-29 10:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-29 10:24 [PATCH 00/15] drm/i915: refactor display funcs, add display irq hooks Jani Nikula
2026-04-29 10:24 ` [PATCH 01/15] drm/i915/display: move audio funcs under audio sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 02/15] drm/i915/display: move color funcs under color sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 03/15] drm/i915/display: move fdi funcs under fdi sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 04/15] drm/i915/display: move watermark funcs under wm sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 05/15] drm/i915/display: move hotplug irq funcs under hotplug sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 06/15] drm/i915/display: move dpll funcs under dpll sub-struct Jani Nikula
2026-04-29 10:24 ` Jani Nikula [this message]
2026-04-29 10:24 ` [PATCH 08/15] drm/i915/display: move display funcs under modeset sub-struct Jani Nikula
2026-04-29 10:24 ` [PATCH 09/15] drm/i915/irq: deduplicate dg1_de_irq_postinstall() and gen11_de_irq_postinstall() Jani Nikula
2026-04-29 10:24 ` [PATCH 10/15] drm/i915/irq: move VLV/CHV LPE irq handler call after irq acks Jani Nikula
2026-04-29 11:12 ` Ville Syrjälä
2026-04-30 7:49 ` Jani Nikula
2026-04-29 10:24 ` [PATCH 11/15] drm/i915/irq: constify pipe stats parameters Jani Nikula
2026-04-29 10:24 ` [PATCH 12/15] drm/i915/irq: add display irq funcs, start with intel_display_irq_reset() Jani Nikula
2026-04-29 10:24 ` [PATCH 13/15] drm/i915/irq: add intel_display_irq_postinstall() to irq funcs Jani Nikula
2026-04-29 10:24 ` [PATCH 14/15] drm/i915/irq: add intel_display_irq_ack() " Jani Nikula
2026-04-29 10:24 ` [PATCH 15/15] drm/i915/irq: add intel_display_irq_handler() " Jani Nikula
2026-04-29 11:56 ` Ville Syrjälä
2026-04-30 7:59 ` Jani Nikula
2026-04-30 10:28 ` Ville Syrjälä
2026-04-29 11:37 ` ✗ i915.CI.BAT: failure for drm/i915: refactor display funcs, add display irq hooks Patchwork
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