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From: Keith Packard <keithp@keithp.com>
To: intel-gfx@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Keith Packard <keithp@keithp.com>
Subject: [PATCH 6/7] drm/i915: Try harder during dp pattern 1 link training
Date: Tue,  1 Nov 2011 23:20:29 -0700	[thread overview]
Message-ID: <1320214830-12696-7-git-send-email-keithp@keithp.com> (raw)
In-Reply-To: <1320214830-12696-1-git-send-email-keithp@keithp.com>

Instead of going through the sequence just once, run through the whole
set up to 5 times to see if something can work. This isn't part of the
DP spec, but the BIOS seems to do it, and given that link training
failure is so bad, it seems reasonable to follow suit.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 drivers/gpu/drm/i915/intel_dp.c |   41 +++++++++++++++++++++++++-------------
 1 files changed, 27 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6be6a04..bf20a35 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1576,8 +1576,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
 
 	ret = intel_dp_aux_native_write(intel_dp,
 					DP_TRAINING_LANE0_SET,
-					intel_dp->train_set, 4);
-	if (ret != 4)
+					intel_dp->train_set,
+					intel_dp->lane_count);
+	if (ret != intel_dp->lane_count)
 		return false;
 
 	return true;
@@ -1593,7 +1594,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
 	int i;
 	uint8_t voltage;
 	bool clock_recovery = false;
-	int tries;
+	int voltage_tries, loop_tries;
 	u32 reg;
 	uint32_t DP = intel_dp->DP;
 
@@ -1620,7 +1621,8 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
 		DP &= ~DP_LINK_TRAIN_MASK;
 	memset(intel_dp->train_set, 0, 4);
 	voltage = 0xff;
-	tries = 0;
+	voltage_tries = 0;
+	loop_tries = 0;
 	clock_recovery = false;
 	for (;;) {
 		/* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */
@@ -1663,17 +1665,28 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
 		for (i = 0; i < intel_dp->lane_count; i++)
 			if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
 				break;
-		if (i == intel_dp->lane_count)
-			break;
-
-		/* Check to see if we've tried the same voltage 5 times */
-		if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
-			++tries;
-			if (tries == 5)
+		if (i == intel_dp->lane_count) {
+			++loop_tries;
+			if (loop_tries == 5) {
+				DRM_DEBUG_KMS("too many full retries, give up\n");
 				break;
-		} else
-			tries = 0;
-		voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+			}
+			memset(intel_dp->train_set, 0, 4);
+			voltage_tries = 0;
+			continue;
+		} else {
+
+			/* Check to see if we've tried the same voltage 5 times */
+			if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
+				++voltage_tries;
+				if (voltage_tries == 5) {
+					DRM_DEBUG_KMS("too many voltage retries, give up\n");
+					break;
+				}
+			} else
+				voltage_tries = 0;
+			voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+		}
 
 		/* Compute new intel_dp->train_set as requested by target */
 		intel_get_adjust_train(intel_dp, link_status);
-- 
1.7.7

  parent reply	other threads:[~2011-11-02  6:20 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-02  6:20 [PATCH 0/7] drm/i915: Fix PCH eDP support for SNB Keith Packard
2011-11-02  6:20 ` [PATCH 1/7] drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control Keith Packard
2011-11-02 16:02   ` [Intel-gfx] " Jesse Barnes
2011-11-02 16:13     ` Keith Packard
2011-11-02  6:20 ` [PATCH 2/7] drm/i915: Remove link_status field from intel_dp structure Keith Packard
2011-11-02 16:13   ` [Intel-gfx] " Jesse Barnes
2011-11-02  6:20 ` [PATCH 3/7] drm/i915: Treat PCH eDP like DP in most places Keith Packard
2011-11-02 15:29   ` [Intel-gfx] " Adam Jackson
2011-11-02 16:55     ` Keith Packard
2011-11-02 17:35     ` Keith Packard
2011-11-02 16:20   ` Jesse Barnes
2011-11-02 17:10     ` Keith Packard
2011-11-02 17:13     ` Adam Jackson
2011-11-02 17:31       ` Keith Packard
2011-11-02 19:36         ` [Intel-gfx] " Adam Jackson
2011-11-02 20:05           ` Keith Packard
2011-11-02 20:35             ` Adam Jackson
2011-11-02 21:13               ` Keith Packard
2011-11-02 21:16                 ` Adam Jackson
2011-11-02 18:54   ` Keith Packard
2011-11-02 19:07     ` Alex Deucher
2011-11-02  6:20 ` [PATCH 4/7] drm/i915: Let panel power sequencing hardware do its job Keith Packard
2011-11-02  7:31   ` Keith Packard
2011-11-02 16:23     ` [Intel-gfx] " Jesse Barnes
2011-11-02 17:14       ` Keith Packard
2011-11-02 17:37       ` Keith Packard
2011-11-03 19:57   ` Jesse Barnes
2011-11-03 22:01     ` Keith Packard
2011-11-02  6:20 ` [PATCH 5/7] drm/i915: Make DP prepare/commit consistent with DP dpms Keith Packard
2011-11-03 20:00   ` Jesse Barnes
2011-11-03 22:30     ` [Intel-gfx] " Keith Packard
2011-11-03 22:41       ` Jesse Barnes
2011-11-03 22:59         ` Keith Packard
2011-11-02  6:20 ` Keith Packard [this message]
2011-11-02  9:12   ` [PATCH 6/7] drm/i915: Try harder during dp pattern 1 link training Chris Wilson
2011-11-02 17:20     ` Keith Packard
2011-11-02 17:38     ` Keith Packard
2011-11-03 20:03   ` [Intel-gfx] " Jesse Barnes
2011-11-03 22:32     ` Keith Packard
2011-11-02  6:20 ` [PATCH 7/7] drm/i915: Remove trailing white space Keith Packard
2011-11-03 20:03   ` [Intel-gfx] " Jesse Barnes
2011-11-03 22:36     ` Keith Packard
2011-11-03 22:48     ` Keith Packard

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