From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 02/10] drm/i915: consolidate pch pll computations a bit
Date: Fri, 22 Feb 2013 01:04:58 +0100 [thread overview]
Message-ID: <1361491513-14231-4-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1361491513-14231-1-git-send-email-daniel.vetter@ffwll.ch>
We need the dpll/fp/fp2 values only when we need a pch pll. So move
them together with the code to acquire such a pll.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1c26109..c7f6dcb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5344,7 +5344,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
int plane = intel_crtc->plane;
int num_connectors = 0;
intel_clock_t clock, reduced_clock;
- u32 dpll, fp = 0, fp2 = 0;
+ u32 dpll = 0, fp = 0, fp2 = 0;
bool ok, has_reduced_clock = false;
bool is_lvds = false;
struct intel_encoder *encoder;
@@ -5384,13 +5384,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
/* Ensure that the cursor is valid for the new mode before changing... */
intel_crtc_update_cursor(crtc, true);
- fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
- if (has_reduced_clock)
- fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
- reduced_clock.m2;
-
- dpll = ironlake_compute_dpll(intel_crtc, &clock, fp);
-
DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
drm_mode_debug_printmodeline(mode);
@@ -5398,6 +5391,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
if (intel_crtc->config.has_pch_encoder) {
struct intel_pch_pll *pll;
+ fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
+ if (has_reduced_clock)
+ fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
+ reduced_clock.m2;
+
+ dpll = ironlake_compute_dpll(intel_crtc, &clock, fp);
+
pll = intel_get_pch_pll(intel_crtc, dpll, fp);
if (pll == NULL) {
DRM_DEBUG_DRIVER("failed to find PLL for pipe %d\n",
--
1.7.11.4
next prev parent reply other threads:[~2013-02-22 0:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-22 0:04 [PATCH 00/10] bpc handling fixes Daniel Vetter
2013-02-22 0:04 ` [PATCH 1/8] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-02-22 0:04 ` [PATCH 01/10] drm/i915: use pipe_config for lvds dithering Daniel Vetter
2013-02-22 0:04 ` Daniel Vetter [this message]
2013-02-22 0:04 ` [PATCH 2/8] drm/i915: move dp_m_n computation to dp_encoder->compute_config Daniel Vetter
2013-02-22 0:05 ` [PATCH 03/10] drm/i915: fixup 12bpc hdmi dotclock handling Daniel Vetter
2013-02-22 0:05 ` [PATCH 3/8] drm/i915: track dp target_clock in pipe_config Daniel Vetter
2013-02-22 0:05 ` [PATCH 04/10] drm/i915: Disable high-bpc on pre-1.4 EDID screens Daniel Vetter
2013-02-22 0:05 ` [PATCH 4/8] drm/i915: rip out superflous is_dp&is_cpu_edp tracking Daniel Vetter
2013-02-22 0:05 ` [PATCH 5/8] drm/i915: add hw state readout/checking for pipe_config Daniel Vetter
2013-02-22 0:05 ` [PATCH 05/10] drm/i915: force bpp for eDP panels Daniel Vetter
2013-02-22 6:50 ` Jani Nikula
2013-02-22 11:10 ` [PATCH] " Daniel Vetter
2013-02-22 0:05 ` [PATCH 06/10] drm/i915: extract i9xx_set_pipeconf Daniel Vetter
2013-02-22 0:05 ` [PATCH 6/8] drm/i915: hw readout support for ->has_pch_encoders Daniel Vetter
2013-02-22 0:05 ` [PATCH 7/8] drm/i915: create pipe_config->dpll for clock state Daniel Vetter
2013-02-22 0:05 ` [PATCH 07/10] drm/i915: drop adjusted_mode from *_set_pipeconf functions Daniel Vetter
2013-02-22 0:05 ` [PATCH 08/10] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv Daniel Vetter
2013-02-22 0:05 ` [PATCH 8/8] drm/i915: move dp clock computations to encoder->compute_config Daniel Vetter
2013-02-22 0:05 ` [PATCH 09/10] drm/i915: allow high-bpc modes on DP Daniel Vetter
2013-02-22 0:05 ` [PATCH 10/10] drm/i915: Fixup non-24bpp support for VGA screens on Haswell Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1361491513-14231-4-git-send-email-daniel.vetter@ffwll.ch \
--to=daniel.vetter@ffwll.ch \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox