Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 11/15] drm/i915: add HAS_POWER_WELL
Date: Wed,  6 Mar 2013 20:03:18 -0300	[thread overview]
Message-ID: <1362611003-4823-12-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1362611003-4823-1-git-send-email-przanoni@gmail.com>

From: Paulo Zanoni <paulo.r.zanoni@intel.com>

We're starting to add many IS_HASWELL checks for the power well code,
so add a HAS_POWER_WELL macro to properly document that we're checking
for hardware that has the power down well.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |    1 +
 drivers/gpu/drm/i915/intel_display.c |    4 ++--
 drivers/gpu/drm/i915/intel_pm.c      |    6 +++---
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9bf15e5..60e24d7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1337,6 +1337,7 @@ struct drm_i915_file_private {
 #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
 
 #define HAS_DDI(dev)		(IS_HASWELL(dev))
+#define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
 
 #define INTEL_PCH_DEVICE_ID_MASK		0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 835bec2..39f5f72 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9338,7 +9338,7 @@ intel_display_capture_error_state(struct drm_device *dev)
 
 	power_well_is_down = intel_power_well_is_down(dev);
 
-	if (IS_HASWELL(dev))
+	if (HAS_POWER_WELL(dev))
 		error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER);
 
 	for_each_pipe(i) {
@@ -9394,7 +9394,7 @@ intel_display_print_error_state(struct seq_file *m,
 	int i;
 
 	seq_printf(m, "Num Pipes: %d\n", dev_priv->num_pipe);
-	if (IS_HASWELL(dev))
+	if (HAS_POWER_WELL(dev))
 		seq_printf(m, "PWR_WELL_CTL2: %08x\n",
 			   error->power_well_driver);
 	for_each_pipe(i) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 90562bc..9e22ad3 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4080,7 +4080,7 @@ bool intel_power_well_is_down(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (IS_HASWELL(dev))
+	if (HAS_POWER_WELL(dev))
 		return !(I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_ENABLE);
 	else
 		return false;
@@ -4092,7 +4092,7 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
 	bool is_enabled, enable_requested;
 	uint32_t tmp;
 
-	if (!IS_HASWELL(dev))
+	if (!HAS_POWER_WELL(dev))
 		return;
 
 	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
@@ -4127,7 +4127,7 @@ void intel_init_power_well(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (!IS_HASWELL(dev))
+	if (!HAS_POWER_WELL(dev))
 		return;
 
 	/* For now, we need the power well to be always enabled. */
-- 
1.7.10.4

  parent reply	other threads:[~2013-03-06 23:04 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-06 23:03 [PATCH 00/15] More "unclaimed register" fixes Paulo Zanoni
2013-03-06 23:03 ` [PATCH 01/15] drm/i915: only disable DDI sound if intel_crtc->eld_vld Paulo Zanoni
2013-03-07  9:31   ` Ville Syrjälä
2013-03-17 20:17     ` Daniel Vetter
2013-03-17 20:23     ` Daniel Vetter
2013-03-20 22:03       ` Paulo Zanoni
2013-03-20 22:24         ` Daniel Vetter
2013-03-22 17:11   ` [PATCH 2/7] " Paulo Zanoni
2013-03-22 18:11     ` Ville Syrjälä
2013-03-06 23:03 ` [PATCH 02/15] drm/i915: disable sound first on intel_disable_ddi Paulo Zanoni
2013-03-15 18:24   ` Ben Widawsky
2013-03-17 20:25     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 03/15] drm/i915: add intel_power_well_is_down Paulo Zanoni
2013-03-06 23:26   ` Daniel Vetter
2013-03-06 23:31     ` Daniel Vetter
2013-03-15 18:31     ` Ben Widawsky
2013-03-20 22:21       ` Paulo Zanoni
2013-03-22 17:14   ` [PATCH 3/7] drm/i915: add intel_using_power_well Paulo Zanoni
2013-04-17  9:04     ` Daniel Vetter
2013-04-17 12:27       ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 04/15] drm/i915: don't touch the PF regs if the power well is down Paulo Zanoni
2013-03-06 23:28   ` Daniel Vetter
2013-03-15 18:41     ` Ben Widawsky
2013-03-22 17:16   ` [PATCH 4/7] " Paulo Zanoni
2013-04-12 20:23     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 05/15] drm/i915: capture the correct cursor registers on IVB Paulo Zanoni
2013-03-07  9:34   ` Ville Syrjälä
2013-03-15 18:45     ` Ben Widawsky
2013-03-17 20:26       ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 06/15] drm/i915: there's no DSPSIZE register on gen4+ Paulo Zanoni
2013-03-07  9:38   ` Ville Syrjälä
2013-03-15 19:04     ` Ben Widawsky
2013-03-15 19:08       ` Ben Widawsky
2013-03-17 20:29         ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 07/15] drm/i915: there's no DSPADDR register on Haswell Paulo Zanoni
2013-03-15 19:10   ` Ben Widawsky
2013-03-17 20:33     ` Daniel Vetter
2013-03-20 18:01       ` Paulo Zanoni
2013-03-20 21:44         ` Daniel Vetter
2013-03-22 17:19   ` [PATCH 5/7] drm/i915: fix DSPADDR Gen check Paulo Zanoni
2013-03-23 12:33     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 08/15] drm/i915: remove DSPPOS register Paulo Zanoni
2013-03-07  9:43   ` Ville Syrjälä
2013-03-17 20:39     ` Daniel Vetter
2013-03-15 19:13   ` Ben Widawsky
2013-03-22 17:20   ` [PATCH 6/7] drm/i915: there's no DSPPOS register on gen4+ Paulo Zanoni
2013-03-23 12:33     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 09/15] drm/i915: there's no PIPESTAT on Gen5+ Paulo Zanoni
2013-03-06 23:22   ` Daniel Vetter
2013-03-07  9:19     ` Ville Syrjälä
2013-03-22 17:24   ` [PATCH 7/7] drm/i915: there's no PIPESTAT on HAS_PCH_SPLIT platforms Paulo Zanoni
2013-03-23 12:33     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 10/15] drm/i915: check the power well when capturing error state Paulo Zanoni
2013-03-15 19:22   ` Ben Widawsky
2013-03-17 20:46   ` Daniel Vetter
2013-03-17 20:51     ` Daniel Vetter
2013-03-21 22:12     ` Paulo Zanoni
2013-03-22  8:45       ` Daniel Vetter
2013-03-06 23:03 ` Paulo Zanoni [this message]
2013-03-07 17:14   ` [PATCH 11/15] drm/i915: add HAS_POWER_WELL Jesse Barnes
2013-03-17 20:49     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 12/15] drm/i915: reorganize intel_lvds_supported Paulo Zanoni
2013-03-15 20:57   ` Ben Widawsky
2013-03-17 20:52     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 13/15] drm/i915: don't save/restore PCH_LVDS on LPT Paulo Zanoni
2013-03-15 21:04   ` Ben Widawsky
2013-03-17 20:54     ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 14/15] drm/i915: check the power well on i915_pipe_enabled Paulo Zanoni
2013-03-15 21:06   ` Ben Widawsky
2013-03-17 20:55   ` Daniel Vetter
2013-03-06 23:03 ` [PATCH 15/15] drm/i915: add missing space in error message Paulo Zanoni
2013-03-15 21:10   ` Ben Widawsky
2013-03-17 20:57     ` Daniel Vetter

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1362611003-4823-12-git-send-email-przanoni@gmail.com \
    --to=przanoni@gmail.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=paulo.r.zanoni@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox