From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Takashi Iwai <tiwai@suse.de>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH] drm/i915: fix up the edp power well check
Date: Fri, 31 May 2013 17:49:17 +0200 [thread overview]
Message-ID: <1370015357-8204-1-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <CA+gsUGSBpn4pbJ34ViZpsodtOPRN-W9SSvzPMtrv3Kw79855FA@mail.gmail.com>
Now that we track the cpu transcoder we need accurately in the pipe
config we can finally fix up the transcoder check. With the current
code eDP on port D will be broken since we'd errornously cut the
power.
For reference see
commit 2124b72e6283c4e84a55e71077fee91793f4c801
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Fri Mar 22 14:07:23 2013 -0300
drm/i915: don't disable the power well yet
v2:
- Kill the now outdated comment (Paulo)
- Add the missing crtc->base.enabled check and consolidate it (Paulo)
- Smash all checks together, looks neater that way.
v3: Kill the unused encoder variable.
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 18 ++++--------------
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3db4ed2..c4adbfe 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5798,23 +5798,13 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
{
bool enable = false;
struct intel_crtc *crtc;
- struct intel_encoder *encoder;
list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
- if (crtc->pipe != PIPE_A && crtc->base.enabled)
- enable = true;
- /* XXX: Should check for edp transcoder here, but thanks to init
- * sequence that's not yet available. Just in case desktop eDP
- * on PORT D is possible on haswell, too. */
- /* Even the eDP panel fitter is outside the always-on well. */
- if (crtc->config.pch_pfit.size && crtc->base.enabled)
- enable = true;
- }
+ if (!crtc->base.enabled)
+ continue;
- list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- base.head) {
- if (encoder->type != INTEL_OUTPUT_EDP &&
- encoder->connectors_active)
+ if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.size ||
+ crtc->config.cpu_transcoder != TRANSCODER_EDP)
enable = true;
}
--
1.7.10.4
next prev parent reply other threads:[~2013-05-31 15:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-29 17:56 [PATCH] drm/i915: fix up the edp power well check Daniel Vetter
2013-05-29 19:45 ` Daniel Vetter
2013-05-29 22:52 ` Daniel Vetter
2013-05-31 13:53 ` Takashi Iwai
2013-05-31 15:23 ` Daniel Vetter
2013-05-31 15:15 ` Paulo Zanoni
2013-05-31 15:48 ` Daniel Vetter
2013-05-31 15:49 ` Daniel Vetter [this message]
2013-05-31 17:24 ` Paulo Zanoni
2013-05-31 19:00 ` Daniel Vetter
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