From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Ben Widawsky <ben@bwidawsk.net>,
Ben Widawsky <benjamin.widawsky@intel.com>
Subject: [PATCH 6/7] drm/i915: Add some more registers to error state
Date: Mon, 27 Jan 2014 23:07:05 -0800 [thread overview]
Message-ID: <1390892826-26973-6-git-send-email-benjamin.widawsky@intel.com> (raw)
In-Reply-To: <1390892826-26973-1-git-send-email-benjamin.widawsky@intel.com>
Chris:
Do we also want to capture?
GAC_ECO_BITS /* gen6,7 */
GAM_ECOCHK /* gen6,7 */
GAB_CTL /* gen6 */
GFX_MODE /* gen6 */
Requested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++++
drivers/gpu/drm/i915/i915_gpu_error.c | 16 +++++++++++++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index defdb00..a144bc3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -307,6 +307,10 @@ struct drm_i915_error_state {
u32 error; /* gen6+ */
u32 err_int; /* gen7 */
u32 done_reg;
+ u32 gac_eco;
+ u32 gam_ecochk;
+ u32 gab_ctl;
+ u32 gfx_mode;
u32 extra_instdone[I915_NUM_INSTDONE_REG];
u32 pipestat[I915_MAX_PIPES];
u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 3f35896..2ef0566 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1021,8 +1021,9 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
/* General organization
* 1. GEN specific registers
* 2. >= GEN specific registers
- * 3. Feature specific registers.
- * 4. Everything else
+ * 3. GEN ranges
+ * 4. Feature specific registers.
+ * 5. Everything else
* Please try to follow the order.
*
* 1: */
@@ -1034,8 +1035,11 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
if (IS_GEN7(dev))
error->err_int = I915_READ(GEN7_ERR_INT);
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev)) {
error->forcewake = I915_READ(FORCEWAKE);
+ error->gab_ctl = I915_READ(GAB_CTL);
+ error->gfx_mode = I915_READ(GFX_MODE);
+ }
if (IS_GEN2(dev))
error->ier = I915_READ16(IER);
@@ -1051,6 +1055,12 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
}
/* 3: */
+ if (IS_GEN6(dev) || IS_GEN7(dev)) {
+ error->gam_ecochk = I915_READ(GAM_ECOCHK);
+ error->gac_eco = I915_READ(GAC_ECO_BITS);
+ }
+
+ /* 4: */
if (HAS_HW_CONTEXTS(dev))
error->ccid = I915_READ(CCID);
--
1.8.5.3
next prev parent reply other threads:[~2014-01-28 7:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-28 7:07 [PATCH 1/7] [v2] drm/i915: Create a USES_PPGTT macro Ben Widawsky
2014-01-28 7:07 ` [PATCH 2/7] drm/i915: Extract register state error capture Ben Widawsky
2014-01-28 11:33 ` Chris Wilson
2014-01-28 7:07 ` [PATCH 3/7] drm/i915: Logically reorder error register capture Ben Widawsky
2014-01-28 11:37 ` Chris Wilson
2014-01-28 7:07 ` [PATCH 4/7] drm/i915: Reorder struct members Ben Widawsky
2014-01-28 11:39 ` Chris Wilson
2014-01-28 7:07 ` [PATCH 5/7] drm/i915: Move per ring error state to ring_error Ben Widawsky
2014-01-28 11:42 ` Chris Wilson
2014-01-28 7:07 ` Ben Widawsky [this message]
2014-01-28 11:43 ` [PATCH 6/7] drm/i915: Add some more registers to error state Chris Wilson
2014-01-28 7:07 ` [PATCH 7/7] [v2] drm/i915: Capture PPGTT info on error capture Ben Widawsky
2014-01-28 11:47 ` Chris Wilson
2014-01-28 8:14 ` [PATCH 1/7] [v2] drm/i915: Create a USES_PPGTT macro Daniel Vetter
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