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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 2/4] drm/i915: don't bother enabling swizzle bits on gen7+ v2
Date: Fri, 14 Mar 2014 14:37:09 -0700	[thread overview]
Message-ID: <1394833031-4055-2-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1394833031-4055-1-git-send-email-jbarnes@virtuousgeek.org>

As of IVB, the memory controller does internal swizzling already, so we
shouldn't need to enable these.  Based on an earlier fix from Kristian.

v2: preserve swizzling if BIOS had it set (Daniel)

Reported-by: Kristian Høgsberg <hoegsberg@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_drv.h        |    1 +
 drivers/gpu/drm/i915/i915_gem.c        |    6 ++++++
 drivers/gpu/drm/i915/i915_gem_tiling.c |    3 ++-
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c64f770..29cd977 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1508,6 +1508,7 @@ typedef struct drm_i915_private {
 	struct intel_vbt_data vbt;
 
 	bool bios_ssc; /* BIOS had SSC enabled at boot? */
+	bool bios_swizzle;
 
 	/* overlay */
 	struct intel_overlay *overlay;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 92b0b41..87e34bc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4313,6 +4313,9 @@ void i915_gem_init_swizzling(struct drm_device *dev)
 	    dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
 		return;
 
+	if (INTEL_INFO(dev)->gen >= 7 && !dev_priv->bios_swizzle)
+		return;
+
 	I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
 				 DISP_TILE_SURFACE_SWIZZLING);
 
@@ -4454,6 +4457,9 @@ int i915_gem_init(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret;
 
+	if (I915_READ(DISP_ARB_CTL) & DISP_TILE_SURFACE_SWIZZLING)
+		dev_priv->bios_swizzle = true;
+
 	mutex_lock(&dev->struct_mutex);
 
 	if (IS_VALLEYVIEW(dev)) {
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index eb99358..c6447de 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -91,7 +91,8 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
 	uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;
 	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
 
-	if (IS_VALLEYVIEW(dev)) {
+	if (INTEL_INFO(dev)->gen >= 7 &&
+	    !(I915_READ(TILECTL) & TILECTL_SWZCTL)) {
 		swizzle_x = I915_BIT_6_SWIZZLE_NONE;
 		swizzle_y = I915_BIT_6_SWIZZLE_NONE;
 	} else if (INTEL_INFO(dev)->gen >= 6) {
-- 
1.7.9.5

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  reply	other threads:[~2014-03-15 13:37 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-14 21:37 [PATCH 1/4] drm/i915: preserve SSC if previously set v2 Jesse Barnes
2014-03-14 21:37 ` Jesse Barnes [this message]
2014-03-15 13:45   ` [PATCH 2/4] drm/i915: don't bother enabling swizzle bits on gen7+ v2 Daniel Vetter
2014-03-14 21:37 ` [PATCH 3/4] drm/i915: use current mode if the size matches the preferred mode Jesse Barnes
2014-03-14 21:37 ` [PATCH 4/4] drm/i915: enable fastboot by default Jesse Barnes

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