Re: [PATCH v5 3/6] drm/i915: prepare pipe for YCBCR420 output

["Sharma, Shashank" <shashank.sharma@intel.com>]

Regards

Shashank


On 7/22/2017 12:34 AM, Imre Deak wrote:
> On Fri, Jul 21, 2017 at 08:55:06PM +0530, Shashank Sharma wrote:
>> To get HDMI YCBCR420 output, the PIPEMISC register should be
>> programmed to:
>> - Generate YCBCR output (bit 11)
>> - In case of YCBCR420 outputs, it should be programmed in full
>>    blend mode to use the scaler in 5x3 ratio (bits 26 and 27)
>>
>> This patch:
>> - Adds definition of these bits.
>> - Programs PIPEMISC for YCBCR420 outputs.
>> - Adds readouts to compare HW and SW states.
>>
>> V2: rebase
>> V3: rebase
>> V4: rebase
>> V5: added r-b from Ander
>> V6: Handle only YCBCR420 outputs (ville)
>> V7: rebase
>> V8: Addressed review comments from Ville
>>      - Add readouts for state->ycbcr420 and 420 pixel_clock.
>>      - Handle warning due to mismatch in clock for ycbcr420 clock.
>>      - Rename PIPEMISC macros to match the Bspec.
>>      - Add a debug print stating if YCBCR 4:2:0 output enabled.
>>      Added r-b from Ville
>> V9: Addressed review comments from Imre:
>>      - Add 420 mode clock adjustment in intel_hdmi_mode_valid to
>>        prevent 420_only modes getting rejected for high clock.
>>      - Add port clock adjustment for ycbcr420 modes in ddi_get_clock
>>      - Rename macros as per Ville's suggestion.
>>      - Remove unnecessary wl changes.
>> V10: Added r-b from Imre
>>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Ander Conselvan de Oliveira <conselvan2@gmail.com>
>> Cc: Daniel Vetter <daniel.vetter@intel.com>
>> Cc: Imre Deak <imre.deak@intel.com>
>>
>> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
>> Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Reviewed-by: Imre Deak <imre.deak@intel.com>
>> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_reg.h      |  3 +++
>>   drivers/gpu/drm/i915/intel_ddi.c     |  3 +++
>>   drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++++
>>   drivers/gpu/drm/i915/intel_hdmi.c    |  3 +++
>>   4 files changed, 23 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index c712d01..e5b4e2f 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5227,6 +5227,9 @@ enum {
>>   
>>   #define _PIPE_MISC_A			0x70030
>>   #define _PIPE_MISC_B			0x71030
>> +#define   PIPEMISC_YUV420_ENABLE	(1<<27)
>> +#define   PIPEMISC_YUV420_MODE_FULL_BLEND (1<<26)
>> +#define   PIPEMISC_OUTPUT_COLORSPACE_YUV  (1<<11)
>>   #define   PIPEMISC_DITHER_BPC_MASK	(7<<5)
>>   #define   PIPEMISC_DITHER_8_BPC		(0<<5)
>>   #define   PIPEMISC_DITHER_10_BPC	(1<<5)
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index efb1358..d88731b 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -1174,6 +1174,9 @@ static void ddi_dotclock_get(struct intel_crtc_state *pipe_config)
>>   	else
>>   		dotclock = pipe_config->port_clock;
>>   
>> +	if (pipe_config->ycbcr420)
>> +		dotclock = pipe_config->port_clock / 2;
> I see, it's Friday afternoon, so who cares about some statecheck WARNs
> in dmesg?;) It's '* 2'. Moreover it'd be incorrect for YUV420 12bpc, so
> just
>
> dotclock *= 2;
Embarrassing, let me too blame it to Friday evening ;-),  but I 
seriously looked for warnings in dmesg.
Let me check it on Monday, why dint I get it in dmesg and come back !
>> +
>>   	if (pipe_config->pixel_multiplier)
>>   		dotclock /= pipe_config->pixel_multiplier;
>>   
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 05ba0e9..6473ecf 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -8034,6 +8034,7 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc)
>>   {
>>   	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>> +	struct intel_crtc_state *config = intel_crtc->config;
>>   
>>   	if (IS_BROADWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 9) {
>>   		u32 val = 0;
>> @@ -8059,6 +8060,12 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc)
>>   		if (intel_crtc->config->dither)
>>   			val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP;
>>   
>> +		if (config->ycbcr420) {
>> +			val |= PIPEMISC_OUTPUT_COLORSPACE_YUV |
>> +				PIPEMISC_YUV420_ENABLE |
>> +				PIPEMISC_YUV420_MODE_FULL_BLEND;
>> +		}
>> +
>>   		I915_WRITE(PIPEMISC(intel_crtc->pipe), val);
>>   	}
>>   }
>> @@ -9128,6 +9135,10 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>>   		pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
>>   	}
>>   
>> +	if (IS_GEMINILAKE(dev_priv))
>> +		pipe_config->ycbcr420 = I915_READ(PIPEMISC(crtc->pipe)) &
>> +					PIPEMISC_YUV420_ENABLE;
> You missed my last comments about this part (it was a separate email
> from the rest of my comments).
Yes, sorry about that, will get it done !
- Shashank
>
>> +
>>   	power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
>>   	if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
>>   		power_domain_mask |= BIT_ULL(power_domain);
>> @@ -10731,6 +10742,9 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
>>   				      pipe_config->fdi_lanes,
>>   				      &pipe_config->fdi_m_n);
>>   
>> +	if (pipe_config->ycbcr420)
>> +		DRM_DEBUG_KMS("YCbCr 4:2:0 output enabled\n");
>> +
>>   	if (intel_crtc_has_dp_encoder(pipe_config)) {
>>   		intel_dump_m_n_config(pipe_config, "dp m_n",
>>   				pipe_config->lane_count, &pipe_config->dp_m_n);
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
>> index 6addef5..da9d1d3 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1295,6 +1295,9 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>>   	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
>>   		clock *= 2;
>>   
>> +	if (drm_mode_is_420_only(&connector->display_info, mode))
>> +		clock /= 2;
>> +
>>   	/* check if we can do 8bpc */
>>   	status = hdmi_port_clock_valid(hdmi, clock, true, force_dvi);
>>   
>> -- 
>> 2.7.4
>>

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