From: Imre Deak <imre.deak@intel.com>
To: sagar.a.kamble@intel.com
Cc: "Goel, Akash" <akash.goel@intel.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/2] drm/i915: Created common handler for platform specific suspend/resume
Date: Thu, 14 Aug 2014 14:51:15 +0300 [thread overview]
Message-ID: <1408017075.25715.6.camel@intelbox> (raw)
In-Reply-To: <1407951426-27770-1-git-send-email-sagar.a.kamble@intel.com>
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On Wed, 2014-08-13 at 23:07 +0530, sagar.a.kamble@intel.com wrote:
> From: Sagar Kamble <sagar.a.kamble@intel.com>
>
> With this change, intel_runtime_suspend and intel_runtime_resume functions
> become completely platform agnostic. Platform specific suspend/resume
> changes are moved to intel_suspend_complete and intel_resume_prepare.
>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Goel, Akash <akash.goel@intel.com>
For the future: it's not necessary to CC the above people, they all read
the mailing list anyway.
> Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com>
Both patches look fine to me:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 76 ++++++++++++++++++++++++++---------------
> 1 file changed, 49 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index ec96f9a..88464ad 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -494,6 +494,10 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
> return true;
> }
>
> +
> +static int intel_suspend_complete(struct drm_i915_private *dev_priv);
> +static int intel_resume_prepare(struct drm_i915_private *dev_priv);
> +
> static int i915_drm_freeze(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -983,14 +987,14 @@ static int i915_pm_poweroff(struct device *dev)
> return i915_drm_freeze(drm_dev);
> }
>
> -static int hsw_runtime_suspend(struct drm_i915_private *dev_priv)
> +static int hsw_suspend_complete(struct drm_i915_private *dev_priv)
> {
> hsw_enable_pc8(dev_priv);
>
> return 0;
> }
>
> -static int snb_runtime_resume(struct drm_i915_private *dev_priv)
> +static int snb_resume_prepare(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = dev_priv->dev;
>
> @@ -999,7 +1003,7 @@ static int snb_runtime_resume(struct drm_i915_private *dev_priv)
> return 0;
> }
>
> -static int hsw_runtime_resume(struct drm_i915_private *dev_priv)
> +static int hsw_resume_prepare(struct drm_i915_private *dev_priv)
> {
> hsw_disable_pc8(dev_priv);
>
> @@ -1295,7 +1299,7 @@ static void vlv_check_no_gt_access(struct drm_i915_private *dev_priv)
> I915_WRITE(VLV_GTLC_PW_STATUS, VLV_GTLC_ALLOWWAKEERR);
> }
>
> -static int vlv_runtime_suspend(struct drm_i915_private *dev_priv)
> +static int vlv_suspend_complete(struct drm_i915_private *dev_priv)
> {
> u32 mask;
> int err;
> @@ -1335,7 +1339,7 @@ err1:
> return err;
> }
>
> -static int vlv_runtime_resume(struct drm_i915_private *dev_priv)
> +static int vlv_resume_prepare(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = dev_priv->dev;
> int err;
> @@ -1413,17 +1417,7 @@ static int intel_runtime_suspend(struct device *device)
> cancel_work_sync(&dev_priv->rps.work);
> intel_runtime_pm_disable_interrupts(dev);
>
> - if (IS_GEN6(dev)) {
> - ret = 0;
> - } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> - ret = hsw_runtime_suspend(dev_priv);
> - } else if (IS_VALLEYVIEW(dev)) {
> - ret = vlv_runtime_suspend(dev_priv);
> - } else {
> - ret = -ENODEV;
> - WARN_ON(1);
> - }
> -
> + ret = intel_suspend_complete(dev_priv);
> if (ret) {
> DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret);
> intel_runtime_pm_restore_interrupts(dev);
> @@ -1461,17 +1455,7 @@ static int intel_runtime_resume(struct device *device)
> intel_opregion_notify_adapter(dev, PCI_D0);
> dev_priv->pm.suspended = false;
>
> - if (IS_GEN6(dev)) {
> - ret = snb_runtime_resume(dev_priv);
> - } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> - ret = hsw_runtime_resume(dev_priv);
> - } else if (IS_VALLEYVIEW(dev)) {
> - ret = vlv_runtime_resume(dev_priv);
> - } else {
> - WARN_ON(1);
> - ret = -ENODEV;
> - }
> -
> + ret = intel_resume_prepare(dev_priv);
> /*
> * No point of rolling back things in case of an error, as the best
> * we can do is to hope that things will still work (and disable RPM).
> @@ -1490,6 +1474,44 @@ static int intel_runtime_resume(struct device *device)
> return ret;
> }
>
> +static int intel_suspend_complete(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + int ret;
> +
> + if (IS_GEN6(dev)) {
> + ret = 0;
> + } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> + ret = hsw_suspend_complete(dev_priv);
> + } else if (IS_VALLEYVIEW(dev)) {
> + ret = vlv_suspend_complete(dev_priv);
> + } else {
> + ret = -ENODEV;
> + WARN_ON(1);
> + }
> +
> + return ret;
> +}
> +
> +static int intel_resume_prepare(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + int ret;
> +
> + if (IS_GEN6(dev)) {
> + ret = snb_resume_prepare(dev_priv);
> + } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
> + ret = hsw_resume_prepare(dev_priv);
> + } else if (IS_VALLEYVIEW(dev)) {
> + ret = vlv_resume_prepare(dev_priv);
> + } else {
> + WARN_ON(1);
> + ret = -ENODEV;
> + }
> +
> + return ret;
> +}
> +
> static const struct dev_pm_ops i915_pm_ops = {
> .suspend = i915_pm_suspend,
> .suspend_late = i915_pm_suspend_late,
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next prev parent reply other threads:[~2014-08-14 11:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-28 17:37 [PATCH 1/1] drm/i915: Adding Gfx Clock, Wake and Gunit save/restore logic in PM suspend/resume paths sagar.a.kamble
2014-07-28 18:20 ` Sagar Arun Kamble
2014-07-28 18:51 ` Daniel Vetter
2014-07-31 12:36 ` [RFC 1/1] FOR_UPSTREAM [VPG]: " sagar.a.kamble
2014-08-01 7:04 ` [PATCH 1/1] " sagar.a.kamble
2014-08-04 8:07 ` Daniel Vetter
2014-08-08 6:52 ` Sagar Arun Kamble
2014-08-08 7:42 ` Daniel Vetter
2014-08-08 8:59 ` Sagar Arun Kamble
2014-08-08 9:14 ` Imre Deak
2014-08-08 9:15 ` Daniel Vetter
2014-08-08 10:24 ` Sagar Arun Kamble
2014-08-08 11:34 ` Imre Deak
2014-08-08 13:43 ` Daniel Vetter
2014-08-08 14:01 ` Daniel Vetter
2014-08-12 10:51 ` [PATCH v3 1/1] drm/i915: Sharing Gfx Clock, Wake and Gunit save/restore logic using common handler for runtime/system s/r paths sagar.a.kamble
2014-08-12 12:00 ` Daniel Vetter
2014-08-13 13:47 ` Imre Deak
2014-08-13 15:04 ` Sagar Arun Kamble
2014-08-13 17:37 ` [PATCH 1/2] drm/i915: Created common handler for platform specific suspend/resume sagar.a.kamble
2014-08-13 17:37 ` [PATCH 2/2] drm/i915: Sharing platform specific sequence between runtime and system suspend/ resume paths sagar.a.kamble
2014-08-14 11:51 ` Imre Deak [this message]
2014-08-14 14:14 ` [PATCH 1/2] drm/i915: Created common handler for platform specific suspend/resume Daniel Vetter
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