From: Mika Kahola <mika.kahola@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2] drm/i915: Limit CHV max cdclk
Date: Thu, 11 Jun 2015 10:54:03 +0300 [thread overview]
Message-ID: <1434009243-30656-2-git-send-email-mika.kahola@intel.com> (raw)
In-Reply-To: <1434009243-30656-1-git-send-email-mika.kahola@intel.com>
Limit CHV maximum cdclk to 320MHz.
v2: Rebase to the latest
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c38c297..ab40d04 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5647,7 +5647,7 @@ static void intel_update_max_cdclk(struct drm_device *dev)
else
dev_priv->max_cdclk_freq = 675000;
} else if (IS_VALLEYVIEW(dev)) {
- dev_priv->max_cdclk_freq = 400000;
+ dev_priv->max_cdclk_freq = IS_CHERRYVIEW(dev) ? 320000 : 400000;
} else {
/* otherwise assume cdclk is fixed */
dev_priv->max_cdclk_freq = dev_priv->cdclk_freq;
--
1.9.1
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next prev parent reply other threads:[~2015-06-11 7:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-11 7:54 [PATCH v2] Limit CHV max cdclk Mika Kahola
2015-06-11 7:54 ` Mika Kahola [this message]
2015-06-11 9:03 ` [PATCH v2] drm/i915: " Jani Nikula
2015-06-11 9:29 ` Mika Kahola
2015-06-14 16:14 ` shuang.he
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