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From: Derek Morton <derek.j.morton@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: thomas.wood@intel.com
Subject: [PATCH i-g-t] gem_flink_race/prime_self_import: Improve test reliability
Date: Tue,  8 Dec 2015 12:44:44 +0000	[thread overview]
Message-ID: <1449578684-16320-1-git-send-email-derek.j.morton@intel.com> (raw)

gem_flink_race and prime_self_import have subtests which read the
number of open gem objects from debugfs to determine if objects have
leaked during the test. However the test can fail sporadically if
the number of gem objects changes due to other process activity.
This patch introduces a change to check the number of gem objects
several times to filter out any fluctuations.

Signed-off-by: Derek Morton <derek.j.morton@intel.com>
---
 tests/gem_flink_race.c    | 34 +++++++++++++++++++++++++++++-----
 tests/prime_self_import.c | 43 +++++++++++++++++++++++++++++++++----------
 2 files changed, 62 insertions(+), 15 deletions(-)

diff --git a/tests/gem_flink_race.c b/tests/gem_flink_race.c
index b17ef85..0552e12 100644
--- a/tests/gem_flink_race.c
+++ b/tests/gem_flink_race.c
@@ -44,7 +44,7 @@ IGT_TEST_DESCRIPTION("Check for flink/open vs. gem close races.");
  * in the flink name and corresponding reference getting leaked.
  */
 
-/* We want lockless and I'm to lazy to dig out an atomic libarary. On x86 this
+/* We want lockless and I'm to lazy to dig out an atomic library. On x86 this
  * works, too. */
 volatile int pls_die = 0;
 int fd;
@@ -65,6 +65,32 @@ static int get_object_count(void)
 	return ret;
 }
 
+static int get_stable_obj_count(int driver)
+{
+	/* The test relies on the system being in the same state before and
+	   after the test so any difference in the object count is a result of
+	   leaks during the test. gem_quiescent_gpu() mostly achieves this but
+	   occasionally obj_count can still change. The loop ensures obj_count
+	   has remained stable over several checks */
+	int obj_count, prev_obj_count;
+	int loop_count = 0;
+	gem_quiescent_gpu(driver);
+	prev_obj_count = get_object_count();
+	while (loop_count < 4) {
+		usleep(200000);
+		gem_quiescent_gpu(driver);
+		obj_count = get_object_count();
+		if (obj_count == prev_obj_count) {
+			loop_count++;
+		} else {
+			igt_debug("loop_count=%d, obj_count=%d, prev_obj_count=%d\n", loop_count, obj_count, prev_obj_count);
+			loop_count = 0;
+			prev_obj_count = obj_count;
+		}
+
+	}
+	return obj_count;
+}
 
 static void *thread_fn_flink_name(void *p)
 {
@@ -164,8 +190,7 @@ static void test_flink_close(void)
 	 * up the counts */
 	fake = drm_open_driver(DRIVER_INTEL);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count();
+	obj_count = get_stable_obj_count(fake);
 
 	num_threads = sysconf(_SC_NPROCESSORS_ONLN);
 
@@ -190,8 +215,7 @@ static void test_flink_close(void)
 
 	close(fd);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count() - obj_count;
+	obj_count = get_stable_obj_count(fake) - obj_count;
 
 	igt_info("leaked %i objects\n", obj_count);
 
diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 91fe231..977c7b2 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -47,7 +47,7 @@
 #include "drm.h"
 
 IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same"
-		     " device.");
+		     " device... but with different fds.");
 
 #define BO_SIZE (16*1024)
 
@@ -157,7 +157,7 @@ static void test_with_one_bo_two_files(void)
 	dma_buf_fd2 = prime_handle_to_fd(fd2, handle_open);
 	handle_import = prime_fd_to_handle(fd2, dma_buf_fd2);
 
-	/* dma-buf selfimporting an flink bo should give the same handle */
+	/* dma-buf self importing an flink bo should give the same handle */
 	igt_assert_eq_u32(handle_import, handle_open);
 
 	close(fd1);
@@ -226,6 +226,33 @@ static int get_object_count(void)
 	return ret;
 }
 
+static int get_stable_obj_count(int driver)
+{
+	/* The test relies on the system being in the same state before and
+	   after the test so any difference in the object count is a result of
+	   leaks during the test. gem_quiescent_gpu() mostly achieves this but
+	   occasionally obj_count can still change. The loop ensures obj_count
+	   has remained stable over several checks */
+	int obj_count, prev_obj_count;
+	int loop_count = 0;
+	gem_quiescent_gpu(driver);
+	prev_obj_count = get_object_count();
+	while (loop_count < 4) {
+		usleep(200000);
+		gem_quiescent_gpu(driver);
+		obj_count = get_object_count();
+		if (obj_count == prev_obj_count) {
+			loop_count++;
+		} else {
+			igt_debug("loop_count=%d, obj_count=%d, prev_obj_count=%d\n", loop_count, obj_count, prev_obj_count);
+			loop_count = 0;
+			prev_obj_count = obj_count;
+		}
+
+	}
+	return obj_count;
+}
+
 static void *thread_fn_reimport_vs_close(void *p)
 {
 	struct drm_gem_close close_bo;
@@ -258,8 +285,7 @@ static void test_reimport_close_race(void)
 	 * up the counts */
 	fake = drm_open_driver(DRIVER_INTEL);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count();
+	obj_count = get_stable_obj_count(fake);
 
 	num_threads = sysconf(_SC_NPROCESSORS_ONLN);
 
@@ -290,8 +316,7 @@ static void test_reimport_close_race(void)
 	close(fds[0]);
 	close(fds[1]);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count() - obj_count;
+	obj_count = get_stable_obj_count(fake) - obj_count;
 
 	igt_info("leaked %i objects\n", obj_count);
 
@@ -350,8 +375,7 @@ static void test_export_close_race(void)
 	 * up the counts */
 	fake = drm_open_driver(DRIVER_INTEL);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count();
+	obj_count = get_stable_obj_count(fake);
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
@@ -373,8 +397,7 @@ static void test_export_close_race(void)
 
 	close(fd);
 
-	gem_quiescent_gpu(fake);
-	obj_count = get_object_count() - obj_count;
+	obj_count = get_stable_obj_count(fake) - obj_count;
 
 	igt_info("leaked %i objects\n", obj_count);
 
-- 
1.9.1

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             reply	other threads:[~2015-12-08 12:45 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-08 12:44 Derek Morton [this message]
2015-12-10 10:13 ` [PATCH i-g-t] gem_flink_race/prime_self_import: Improve test reliability Daniel Vetter
2015-12-10 11:51   ` Morton, Derek J
2015-12-10 12:52     ` Daniel Vetter
2015-12-11 10:33       ` Morton, Derek J
2015-12-11 17:06         ` Daniel Vetter
2015-12-14  9:38           ` Morton, Derek J

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