public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/7] drm/i915: Move the hw semaphore initialisation from GEM to the engine
Date: Wed, 06 Apr 2016 13:27:29 +0300	[thread overview]
Message-ID: <1459938449.7193.16.camel@linux.intel.com> (raw)
In-Reply-To: <1459900669-31740-4-git-send-email-chris@chris-wilson.co.uk>

On ke, 2016-04-06 at 00:57 +0100, Chris Wilson wrote:
> Since we are setting engine local values that are tied to the hardware,
> move it out of i915_gem_init_seqno() into the intel_ring_init_seqno()
> backend, next to where the other hw semaphore registers are written.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Comment below, but anyway;

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem.c         | 8 ++------
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++++++
>  2 files changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 3e9e6f9b66f5..65f18f583ae1 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2468,7 +2468,7 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_engine_cs *engine;
> -	int ret, j;
> +	int ret;
>  
>  	/* Carefully retire all requests without writing to the rings */
>  	for_each_engine(engine, dev_priv) {
> @@ -2479,13 +2479,9 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
>  	i915_gem_retire_requests(dev);
>  
>  	/* Finally reset hw state */
> -	for_each_engine(engine, dev_priv) {
> +	for_each_engine(engine, dev_priv)
>  		intel_ring_init_seqno(engine, seqno);
>  
> -		for (j = 0; j < ARRAY_SIZE(engine->semaphore.sync_seqno); j++)
> -			engine->semaphore.sync_seqno[j] = 0;
> -	}
> -
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 371f4c1fc33c..fb304df8085d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2552,14 +2552,21 @@ void intel_ring_init_seqno(struct intel_engine_cs *engine, u32 seqno)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(engine->dev);
>  
> +	/* Semaphores are strictly monotonic, so whenever we reset the seqno,
> +	 * so long as we reset the tracking semaphore value to 0, it will
> +	 * always be before the next request's seqno.
> +	 */

I'd start the comment with; "Our semaphore implementation" to make it
clear it's deliberately engineered to be so, not by hardware.

Regards, Joonas

>  	if (INTEL_INFO(dev_priv)->gen == 6 || INTEL_INFO(dev_priv)->gen == 7) {
>  		I915_WRITE(RING_SYNC_0(engine->mmio_base), 0);
>  		I915_WRITE(RING_SYNC_1(engine->mmio_base), 0);
>  		if (HAS_VEBOX(dev_priv))
>  			I915_WRITE(RING_SYNC_2(engine->mmio_base), 0);
>  	}
> +	memset(engine->semaphore.sync_seqno, 0,
> +	       sizeof(engine->semaphore.sync_seqno));
>  
>  	engine->set_seqno(engine, seqno);
> +
>  	engine->hangcheck.seqno = seqno;
>  }
>  
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2016-04-06 10:26 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-05 23:57 [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Chris Wilson
2016-04-05 23:57 ` [PATCH 2/7] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06  9:29   ` Mika Kuoppala
2016-04-06 10:40   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 3/7] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06  9:08   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 4/7] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-06  9:29   ` Mika Kuoppala
2016-04-06 10:27   ` Joonas Lahtinen [this message]
2016-04-05 23:57 ` [PATCH 5/7] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-06  9:58   ` Joonas Lahtinen
2016-04-06 10:10     ` Chris Wilson
2016-04-06 10:43       ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 6/7] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-06  9:30   ` Mika Kuoppala
2016-04-06 10:36   ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 7/7] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06  9:05   ` Joonas Lahtinen
2016-04-06  9:32   ` Mika Kuoppala
2016-04-06  9:44     ` Chris Wilson
2016-04-06  8:57 ` [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Joonas Lahtinen
2016-04-06  8:59 ` ✗ Fi.CI.BAT: failure for series starting with [1/7] " Patchwork
2016-04-06  9:28 ` [PATCH 1/7] " Mika Kuoppala
2016-04-06 12:33 ` [PATCH v2 1/9] " Chris Wilson
2016-04-06 12:33   ` [PATCH v2 2/9] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06 12:33   ` [PATCH v2 3/9] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06 12:33   ` [PATCH v2 4/9] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-07  6:24     ` Joonas Lahtinen
2016-04-06 12:33   ` [PATCH v2 5/9] drm/i915: Refactor gen8 semaphore offset calculation Chris Wilson
2016-04-07  6:23     ` Joonas Lahtinen
2016-04-06 12:33   ` [PATCH v2 6/9] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-07  6:21     ` Joonas Lahtinen
2016-04-06 12:33   ` [PATCH v2 7/9] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-06 12:33   ` [PATCH v2 8/9] drm/i915: Apply a mb between emitting the request and hangcheck Chris Wilson
2016-04-06 14:24     ` Mika Kuoppala
2016-04-06 12:33   ` [PATCH v2 9/9] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06 14:24     ` Mika Kuoppala

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1459938449.7193.16.camel@linux.intel.com \
    --to=joonas.lahtinen@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox